MIC5821 [MICREL]
8-Bit Serial-Input Latched Drivers; 8位串行输入锁存驱动器
| 型号： | MIC5821 |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | 8-Bit Serial-Input Latched Drivers |
| 文件： | 总5页 (文件大小：82K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MIC5821/5822
8-Bit Serial-Input Latched Drivers
General Description
Features
BiCMOS technology gives the MIC5821/5822 family flexibil-
ity beyond the reach of standard logic buffers and power
driver arrays. These devices each have an eight-bit CMOS
shift register, CMOS control circuitry, eight CMOS data
latches, and eight bipolar current-sink Darlington output
drivers. The 500mA outputs are suitable for use with incan-
descent bulbs and other moderate to high current loads. The
driverscanbeoperatedwithasplitsupplywherethenegative
supply is down to –20V. Except for maximum driver output
voltage ratings, the MIC5821 and MIC5822 are identical.
• 3.3 MHz Minimum Data-Input Rate
• CMOS, PMOS, NMOS, TTL Compatible
• Internal Pull-Down or Pull-Up Resistors
• Low-Power CMOS Logic and Latches
• High-Voltage Current-Sink Outputs
• Single or Split Supply Operation
Ordering Information
Part Number
MIC5821BN
MIC5822BN
Temperature Range Package
–40°C to +85°C
–40°C to +85°C
16-Pin Plastic DIP
16-Pin Plastic DIP
These devices have greatly improved data-input rates. With
a 5V logic supply they will typically operate faster than 5
MHz. With a 12V supply significantly higher speeds are
obtained. The CMOS inputs are compatible with standard
CMOS, PMOS, andNMOSlogiclevels. TTLandDTLcircuits
mayrequiretheuseofappropriatepull-upresistors. Byusing
the serial data output, the drivers can be cascaded for
interface applications requiring additional drive lines.
7
Functional Diagram
Pin Configuration
CLK
1
CLOCK
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OUT
1
SERIAL
5
DATA OUT
SERIAL DATA IN
SERIAL
DATA IN
OUT
2
8-BIT SERIAL-PARALLEL SHIFT REGISTER
2
VDD
V
SS
OUT
3
4
V
DD
OUT
4
VSS
3
LATCHES
STROBE
6
SERIAL DATA OUT
STROBE
OUT
5
OUTPUT ENABLE
(ACTIVE LOW)
OUT
6
7
8
MOS
OUTPUT ENABLE
OUT
7
Bipolar
V
OUT
8
Sub
EE
SUB
GND
VEE
16
15
14
13
12
11
10
9
OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8
(Plastic DIP)
October 1998
7-37
MIC5821/5822
Micrel
Typical Input Circuits
Absolute Maximum Ratings (Note 1)
at 25°C Free-Air Temperature and V = 0V
SS
Output Voltage, V
(MIC5821)
(MIC5822)
50V
80V
CE
Output Voltage, V
(MIC5821)(Note 3)
(MIC5822)(Note 3)
35V
50V
CE SUS
Logic Supply Voltage, V
15V
+ 0.3V
25V
DD
V
DD
Input Voltage Range, V
–0.3V to V
IN
DD
V
DD
– V
EE
Emitter Supply Voltage, V
Continuous Output Current, I
Package Power Dissipation, P
–20V
500mA
1.67W
EE
OUT
D(Note 1)
STROBE
OUTPUT
ENABLE
Operating Temperature Range, T
–55°C to +85°C
–65°C to +150°C
A
Storage Temperature Range, T
S
Note 1: Derate at the rate of 16.7mW/°C above T = 25°C.
A
V
SS
Note 2: CMOS devices have input static protection but are susceptible to
damage when exposed to extremely high static electrical
charges.
Note 3: For inductive load applications.
V
DD
Typical Output Driver
OUT
N
CLOCK
SERIAL
DATA IN
7.2K
3K
VEE
V
SS
SUB
Maximum Allowable Duty Cycle (Plastic DIP)
Number of Outputs ON
(I
= 200mA
Maximum Allowable Duty Cycle at Ambient Temperature of
OUT
V
DD
= 12V)
25°C
73%
40°C
62%
50°C
55%
60°C
47%
70°C
40%
8
7
6
5
4
3
2
1
83%
71%
62%
54%
46%
97%
82%
72%
63%
53%
100%
100%
100%
100%
100%
98%
87%
75%
63%
100%
100%
100%
100%
100%
100%
100%
100%
93%
79%
100%
100%
100%
100%
100%
100%
7-38
October 1998
MIC5821/5822
Micrel
Electrical Characteristics at T = 25°C V = 5V, V = V = 0V (unless otherwise specified)
A
DD
EE
SS
Applicable
Devices
Limits
Max.
50
Characteristic
Symbol
Test Conditions
Min.
Unit
Output Leakage Current
I
MIC5821
V
OUT
V
OUT
V
OUT
V
OUT
= 50V
µA
CEX
= 50V, T = +70°C
100
50
A
MIC5822
Both
= 80V
= 80V, T = +70°C
100
1.1
A
Collector-Emitter
V
I
I
I
= 100mA
= 200mA
V
V
CE(SAT)
OUT
OUT
OUT
Saturation Voltage
1.3
= 350mA, V
= 7.0V
1.6
DD
Input Voltage
V
V
Both
Both
0.8
IN(0)
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
= 12V
= 10V
= 5.0V
= 12V
= 10V
= 5.0V
10.5
8.5
3.5
50
IN(1)
Input Resistance
Supply Current
R
IN
Both
Both
kΩ
50
50
I
One Driver ON, V
One Driver ON, V
One Driver ON, V
= 12V
= 10V
= 5.0V
= 12V
= 10V
= 5.0V
4.5
3.9
2.4
16
14
8
mA
DD(ON)
DD
DD
DD
DD
DD
DD
All Drivers ON, V
All Drivers ON, V
All Drivers ON, V
I
Both
All Drivers OFF, V
All Inputs = 0V
= 5.0V,
1.6
DD(OFF)
DD
All Drivers OFF, V
All Inputs= 0V
= 12V,
2.9
DD
7
Electrical Characteristics T = –55°C, V = 5V, V = V = 0V (unless otherwise noted)
A
DD
SS
EE
Limits
Max.
50
Characteristic
Symbol
Test Conditions
V = 80V
OUT
Min.
Unit
µA
V
Output Leakage Current
Collector-Emitter
I
CEX
V
I
I
I
= 100mA
1.3
CE(SAT)
OUT
OUT
OUT
Saturation Voltage
= 200mA
1.5
= 350mA, V
= 7.0V
1.8
DD
Input Voltage
V
IN0)
0.8
V
V
V
DD
V
DD
V
DD
V
DD
V
DD
= 12V
= 5.0V
= 12V
= 10V
= 5.0V
10.5
3.5
35
IN(1)
Input Resistance
Supply Current
RIN
kΩ
mA
35
35
I
One Driver ON, V
One Driver ON, V
One Driver ON, V
= 12V
= 10V
= 5.0V
= 12V
= 10V
= 5.0V
5.5
4.5
3.0
16
DD(ON)
DD
DD
DD
DD
DD
DD
All Drivers ON, V
All Drivers ON, V
All Drivers ON, V
14
10
I
All Drivers OFF, V
= 12V
3.5
2.0
DD(OFF)
DD
DD
All Drivers OFF, V
= 5.0V
October 1998
7-39
MIC5821/5822
Micrel
Electrical Characteristics T = +125°C, V = 5V, V = V = 0V (unless otherwise noted)
A
DD
SS
EE
Limits
Max.
500
1.3
Characteristic
Symbol
Test Conditions
V = 80V
OUT
Min.
Unit
µA
V
Output Leakage Current
Collector-Emitter
I
CEX
V
I
I
I
= 100mA
CE(SAT)
OUT
OUT
OUT
Saturation Voltage
= 200mA
1.5
= 350mA, V
= 7.0V
1.8
DD
Input Voltage
V
V
0.8
V
IN(0)
V
V
V
V
V
= 12V
= 5.0V
= 12V
= 10V
= 5.0V
10.5
3.5
50
IN(1)
DD
DD
DD
DD
DD
Input Resistance
Supply Current
R
kΩ
mA
IN
50
50
I
One Driver ON, V
One Driver ON, V
One Driver ON, V
= 12V
= 10V
= 5.0V
= 12V
= 10V
= 5.0V
4.5
3.9
2.4
16
14
8
DD(ON)
DD
DD
DD
DD
DD
DD
All Drivers ON, V
All Drivers ON, V
All Drivers ON, V
I
All Drivers OFF, V
= 12V
2.9
1.6
DD(OFF)
DD
DD
All Drivers OFF, V
= 5.0V
MIC5821/5822 Family Truth Table
Serial
Shift Register Contents
Serial
Latch Contents
Output Contents
Data
Input
Clock
Input
Data Strobe
Output Input
Output
Enable
I
I
I
……
……
……
……
……
……
I
I
I
I
……
I
I
I
I
……
I
8
1
2
3
8
1
2
3
8
1
2
3
H
L
H
L
R
R
R
R
R
R
R
R
R
R
7
R
7
R
8
1
1
2
2
2
3
7
7
8
X
R
1
X
X
X
X
X
L
R
R
P
R
……
……
……
R
1
2
3
8
P
P
P
P
P
8
H
P
P
P
L
P
P
P
……
……
P
8
1
2
3
8
1
2
3
8
1
2
3
X
X
X
X
H
H
H
H
H
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State
Timing Diagram
CLOCK
A
D
B
DATA IN
STROBE
E
F
C
OUTPUT
ENABLE
G
OUT
N
7-40
October 1998
MIC5821/5822
Micrel
Timing Conditions
A
(T = +25°C, Logic Levels are V
and V
)
SS
DD
V
DD
= 5.0V
A. Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) .......................................................................75 ns
B. Minimum Data Active Time After Clock Pulse (Data Hold Time).............................................................................75 ns
C. Minimum Data Pulse Width ....................................................................................................................................150 ns
D. Minimum Clock Pulse Width ...................................................................................................................................150 ns
E. Minimum Time Between Clock Activation and Strobe ............................................................................................300 ns
F. Minimum Strobe Pulse Width..................................................................................................................................100 ns
G. Typical Time Between Strobe Activation and Output Transition .............................................................................500 ns
SERIAL DATA present at the input is transferred to the shift register on the logic “0” to logic “1” transition of the CLOCK input
pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL
DATA must appear at the input prior to the rising edge of the CLOCK input waveform.
InformationpresentatanyregisteristransferredtoitsrespectivelatchwhentheSTROBEishigh(serial-to-parallelconversion).
The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed
(STROBE tied high) will require that the ENABLE input be high during serial entry.
When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting the information stored in the
latches or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches.
Typical Applications
MIC5822 Level Shifting Lamp Driver with Darlington Emitters Tied to a Negative Supply
SERIAL DATA CLOCK
-9V
7
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+5V
0.1µ
SUB
100µ
+
October 1998
7-41
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