PL602041_14 [MICREL]
ClockWorks⢠PCIe Quad Outputs Ultra-Low Jitter, HCSL Frequency Synthesizer;
| 型号： | PL602041_14 |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | ClockWorks⢠PCIe Quad Outputs Ultra-Low Jitter, HCSL Frequency Synthesizer PC |
| 文件： | 总9页 (文件大小：604K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PL602041
ClockWorks™ PCIe Quad Outputs
Ultra-Low Jitter, HCSL
Frequency Synthesizer
General Description
Features
The PL602041 is a member of the ClockWorks family of
devices from Micrel and provides an extremely low-noise
timing solution for PCI Express clock signals.
Input crystal frequency of 25MHz
Generates four HCSL clock outputs at 25MHz, 100MHz,
125MHz, and 200MHz
2.5V or 3.3V operating range
Typical phase jitter @ 100MHz
The device operates from a 3.3V or 2.5V power supply
and synthesizes four HCSL output clocks at 25MHz,
100MHz, 125MHz, and 200MHz. The PL602041 accepts a
25MHz crystal.
(1.875MHz to 20MHz): 105fs
Compliant with PCI Express Gen1, Gen2, and Gen3
Industrial temperature range (–40C to +85C)
RoHS and PFOS compliant
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Available in 24-pin 4mm x 4mm QFN package
Applications
Servers
Storage systems
Switches and routers
Gigabit Ethernet
Set-top boxes/DVRs
_________________________________________________________________________________________________________________________
Block Diagram
ClockWorks and Ripple Blocker are trademarks of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
Revision 1.3
tcghelp@micrel.com or (408) 955-1690
January 28, 2014
Micrel, Inc.
PL602041
Ordering Information(1)
Part Number
Marking
Shipping
Junction Temperature Range
Package
Lead Finish
PL602
041
PL602041UMG
Tube
–40°C to +85°C
24-Pin QFN
NiPdAu
PL602
041
PL602041UMG TR
Tape and Reel
–40°C to +85°C
24-Pin QFN
NiPdAu
Note:
1. Devices are RoHS and PFOS compliant.
Pin Configuration
24-Pin QFN
(Top View)
Pin Description
Pin Number
Pin Name
Pin Type
Pin Level
Pin Function
17, 18
19, 20
/Q0, Q0
/Q1, Q1
O, (DIF)
HCSL
Differential Clock Outputs Pairs.
23, 24
1, 2
/Q2, Q2
/Q3, Q3
O, (DIF)
HCSL
Differential Clock Outputs Pairs.
9
VDDO2
VDDO1
VDD
PWR
PWR
PWR
PWR
Power Supply.
16, 21
3, 7
Power Supply.
Core Power Supply.
Power Supply Ground.
4, 5, 13, 22
VSS
Frequency Select for 25MHz, 100MHZ, 125MHZ, and 200MHz. Each pin
has a 45K pull-up.
6, 8
S0, S1
I
LVCMOS
10
11
XIN
XOUT
OE
I, (SE)
O, (SE)
I, (SE)
Crystal
Crystal
Crystal Input, no load caps needed (see Figure 5).
Crystal Output, no load caps needed (see Figure 5).
Output Enable/Disable.
12
LVCMOS
14, 15
NC
No Connect.
Revision 1.3
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January 28, 2014
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Micrel, Inc.
PL602041
Absolute Maximum Ratings(2)
Operating Ratings(3)
Supply Voltage (VDD, VDDO1/2)......................................+4.6V
Input Voltage (VIN).............................. 0.50V to VDD + 0.5V
Lead Temperature (soldering, 20s)............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (TS).........................65C to 150°C
Supply Voltage (VDD, VDDO1/2)............... +2.375V to +3.465V
Ambient Temperature (TA)..........................–40°C to +85°C
Junction Thermal Resistance(4)
QFN (JA) Still Air...............................................50°C/W
QFN (JB) Junction-to-Board.............................30°C/W
DC Electrical Characteristics(5)
VDD = VDDO1/2 = 3.3V 5% or 2.5V 5%
VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5%
TA = 40C to 85C.
Symbol
Parameter
Condition
Min.
2.375
3.135
Typ.
2.5
Max.
2.625
3.465
185
Units
V
VDD, VDDO1/2 2.5V Operating Voltage
VDD, VDDO1/2 2.5V Operating Voltage
3.3
V
IDD
Supply Current to VDD + VDDO Outputs 50Ω to VSS
150
mA
HCSL DC Electrical Characteristics(5)
VDD = VDDO1/2 = 3.3V 5% or 2.5V 5%
VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5%
TA = 40C to 85C. RL = 50Ω to VSS
Symbol
VOH
Parameter
Condition
Min.
660
Typ.
700
0
Max.
850
27
Units
mV
Output High Voltage
Output Low Voltage
Crossing Point Voltage
VOL
mV
150
250
VCROSS
350
550
mV
LVCMOS (S0, S1) DC Electrical Characteristics(6)
VDD = 3.3V 5%, or 2.5V 5%, TA = 40C to 85C.
Symbol
VIH
Parameter
Condition
Min.
Typ.
Max.
Units
V
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
2
VDD + 0.3
0.8
VIL
V
0.3
IIH
VDD = VIN = 3.465V
150
A
A
IIL
VDD = 3.465V, VIN = 0V
150
Notes:
2. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
3. The datasheet limits are not guaranteed if the device is operated beyond operating ratings.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB.
5. The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
6. All phase noise measurements were taken with an Agilent 5052B phase noise system.
Revision 1.3
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January 28, 2014
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Micrel, Inc.
PL602041
Crystal Characteristics
Parameter
Condition
Min.
Typ.
Max.
Units
Mode of Oscillation
Frequency
10pF load capacitance
Fundamental, Parallel Resonant
25
MHz
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
50
5
Ω
1
pF
W
10
100
AC Electrical Characteristics(6, 7)
VDD = VDDO1/2 = 3.3V 5% or 2.5V 5%
VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5%
TA = 40C to 85C. RL = 50Ω to VSS
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
25,
100,
125,
200
FOUT
Output Frequency
MHz
FREF
Crystal Input Frequency
HCSL Output Rise/Fall Time
Output Duty Cycle
25
300
50
MHz
ps
TR/TF
ODC
TSKEW
TLOCK
20% – 80%
150
48
450
52
%
Output-to-Output Skew
PLL Lock Time
Note 7
45
ps
20
ms
100MHz
RMS Phase Jitter(8)
Integration Range (1.875MHz–20MHz)
Integration Range (12kHz–20MHz)
105
250
fs
TJIT()
Notes:
7. Defined as skew between outputs at the same supply voltage and with equal load conditions; measured at the output differential crossing points.
8. Measured using 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an external
reference, the phase noise will follow the input source phase noise up to about 1MHz.
Truth Tables
S1
0
S0
0
OUTPUT
25MHz
0
1
100MHz
125MHz
200MHz
1
0
1
1
Revision 1.3
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January 28, 2014
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Micrel, Inc.
PL602041
Phase Noise Plots
Phase Noise Plot: 100MHz, 1.875MHz20MHz 104fs
Phase Noise Plot: 100MHz, 12kHz20MHz 242fs
Revision 1.3
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January 28, 2014
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Micrel, Inc.
PL602041
Figure 1. Duty Cycle Timing
Figure 2. All Outputs Rise/Fall Time
Figure 3. RMS Phase/Noise Jitter
Revision 1.3
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January 28, 2014
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Micrel, Inc.
PL602041
Figure 4. HCSL Output Load and Test Circuit
Figure 5. HCSL Recommended Application Termination (Source Terminated)
Figure 6. Crystal Input Interface
Revision 1.3
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January 28, 2014
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Micrel, Inc.
PL602041
Application Information
The impedance value of the Ferrite Bead (FB) needs to
be between 240Ω and 600Ω with a saturation current
≥150mA.
Crystal Layout
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal. Crystal load capacitance is built inside
the die, so no external capacitance is needed. See the
Selecting a Quartz Crystal for the Clockworks Flex I
Family of Precision Synthesizers application note for
more details.
VDDO1 and VDDO2 pins connect directly to the VDD
plane. All VDD pins on the PL602041 connect to VDD
after the power supply filter.
HCSL Outputs
HCSL outputs are to be terminated with 50Ω to VSS. For
best performance load all outputs. If you want to AC-
couple or change the termination, contact Micrel’s
application group: tcghelp@micrel.com (see Figure 5).
Contact
Micrel’s HBW
applications group
at:
tcghelp@micrel.com if you need help selecting a suitable
crystal for your application.
Power Supply and Decoupling
Place the smallest value decoupling capacitor (4.7nF
above) between the VDD and VSS pins, as close as
possible to those pins and at the same side of the PCB
as the IC. The shorter the physical path from VDD to
capacitor and back from capacitor to VSS, the more
effective the decoupling. Use one 4.7nF capacitor for
each VDD pin on the PL602041.
Power Supply Filtering Recommendations
Preferred filter, using Micrel MIC94300 or MIC94310 Ripple Blocker™:
Alternative, traditional filter, using a ferrite bead:
Revision 1.3
tcghelp@micrel.com or (408) 955-1690
January 28, 2014
8
Micrel, Inc.
PL602041
Package Information(9)
24-Pin Package Type (QFN)
Note:
9. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
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relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
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© 2014 Micrel, Incorporated.
Revision 1.3
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January 28, 2014
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