SM802123UMGTR [MICREL]
ClockWorks? 125MHz/25MHz Ultra-Low Jitter, LVCMOS Frequency Synthesizer; 发条?为125MHz / 25MHz的超低抖动, LVCMOS频率合成器型号: | SM802123UMGTR |
厂家: | MICREL SEMICONDUCTOR |
描述: | ClockWorks? 125MHz/25MHz Ultra-Low Jitter, LVCMOS Frequency Synthesizer |
文件: | 总12页 (文件大小:417K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SM802123
ClockWorks™ 125MHz/25MHz
Ultra-Low Jitter, LVCMOS
Frequency Synthesizer
General Description
Features
The SM802123 is a member of the ClockWorks™ family of
devices from Micrel and provides an extremely low-noise
timing solution. It is based upon a unique patented
RotaryWave® architecture that provides very-low phase
noise.
• Generates eight LVCMOS output clocks at 125MHz and
eight LVCMOS output clocks at 25MHz
• 2.5V or 3.3V operating range
• Typical phase jitter @ 125MHz
(1.875MHz to 20MHz): 115fs
The device operates from a 2.5V or 3.3V power supply
and synthesizes 16 LVCMOS output clocks, eight at
125MHz and eight at 25MHz. The SM802123 accepts a
25MHz LVCMOS reference input.
• Industrial temperature range
• Green, RoHS, and PFOS compliant
• Available in 44-pin 7mm × 7mm QFN package
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Applications
• Gigabit Ethernet – (GbE)
________________________________________________________________________________________________
Block Diagram Top Level Schematic
ClockWorks is a trademark of Micrel, Inc
RotaryWave is a registered trademark of Multigig, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
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SM802123
Ordering Information
Junction Temperature
Range(1)
Part Number
Marking
Shipping
Package
SM802123UMG
SM802123UMGTR
Note:
802123
802123
Tray
–40°C to +85°C
–40°C to +85°C
44-Pin QFN
44-Pin QFN
Tape and Reel
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
44-Pin QFN
(Top View)
Pin Description
Pin Number
Pin Name
Pin Type
Pin Level
Pin Function
25, 26
28, 29
32, 33
35, 36
Q1, Q2
Q3, Q4
O, (DIF)
LVCMOS
Clock Outputs from Bank 1 (25MHz) .
Clock Outputs from Bank 2 (125MHz).
/Q5, /Q6
/Q7, /Q8
41, 42
1, 2
Q9, Q10
/Q11, /Q12
/Q13, /Q14
Q15, Q16
O, (DIF)
LVCMOS
4, 5
7, 8
31, 37, 38
43, 44, 16
24, 39
VDDO1
VDDO2
VSSO1
VSSO2
PWR
PWR
PWR
PWR
Power Supply for the Outputs on Bank 1.
Power Supply for the Outputs on Bank 2.
Power Supply Ground for the Outputs on Bank 1.
Power Supply Ground for the Outputs on Bank 2.
3, 6, 40
11, 14, 18, 19,
20, 27, 30, 34
TEST
VDD
Factory Test Pins. Do not connect anything to these pins.
Core Power Supply.
12, 13
PWR
PWR
Core Power Supply Ground. The exposed pad must be
connected to the VSS ground plane.
10, 21, 23
VSS (Exposed Pad)
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SM802123
Pin Description (Continued)
Pin Number
Pin Name
Pin Type
Pin Level
Pin Function
17
REF_IN
I, (SE)
LVCMOS
Reference Clock Input
PLL Bypass, Selects Output Source
0 = Normal PLL Operation
9
PLL_BYPASS
I, (SE)
LVCMOS
1 = Output from Input Reference Clock
45KΩ Pull-Down
Output Enable, Q1-/Q8 disables to tri-state,
0 = Disabled, 1 = Enabled, 45Kꢀ Pull-Up
15
22
OE1
OE2
I, (SE)
I, (SE)
LVCMOS
LVCMOS
Output Enable, Q9-Q16 disables to tri-state,
0 = Disabled, 1 = Enabled, 45Kꢀ Pull-Up
Truth Table
OE1/2
OUTPUTS
Tri-State
0
1
LVCMOS
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SM802123
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD, VDDO1/2) .....................................+4.6V
Input Voltage (VIN)……….……… ........... –0.5V to VDD+0.5V
Lead Temperature (soldering, 20s.)........................... 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (Ts) .........................–65°C to +150°C
Supply Voltage (VDD, VDDO1/2)............... +2.375V to +3.465V
Ambient Temperature (TA).......................... –40°C to +85°C
Junction Thermal Resistance(3)
QFN (θ JA)
Still-Air ............................................................... 24°C/W
QFN (ψ JB)
Junction-to-Board................................................ 8°C/W
DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C
Symbol
VDD, VDDO1/2
IDD
Parameter
Condition
Min.
3.135
2.375
Typ.
3.3
Max.
3.465
2.625
170
Units
V
3.3V Operating Voltage
2.5V Operating Voltage
Total supply current
VDDO1 = VDDO2
VDDO1 = VDDO2
Outputs floating
2.5
V
130
mA
LVCMOS INPUT (OE1, OE2, PLL_BYPASS) DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C
Symbol
VIH
Parameter
Condition
Min.
2
Typ.
Max.
VDD + 0.3
0.8
Units
V
Input High Voltage
Input Low Voltage
VIN
V
−0.3
IIH
IIL
Input High Current
Input Low Current
VDD = VIN = 3.465V
150
μA
μA
VDD = 3.465V, VIN = 0V
−150
LVCMOS OUTPUT DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 50ꢀ to VDDO/2
Symbol
VOH
Parameter
Condition
Figure 4
Figure 4
Min.
Typ.
Max.
Units
Output High Voltage
Output Low Voltage
VDDO – 0.7
V
V
VOL
0.6
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4. The circuit is designed to meet the AC and DC specifications shown in the above table after thermal equilibrium has been established.
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SM802123
REF_IN DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C
Symbol
VIH
Parameter
Condition
Min.
1.1
Typ.
Max.
Units
Input High Voltage
Input Low Voltage
VDD + 0.3
V
V
VIL
0.6
5
−0.3
IIN
Input Current
VIN = 0V to VDD
−5
μA
AC Electrical Characteristics(4, 5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 50ꢀ to VDDO/2
Symbol
Parameter
Condition
Q1 – /Q8
Q9 – Q16
Min
Typ
25
Max
Units
FOUT
Output Frequency
MHz
125
LVCMOS Output Rise/Fall
Time
TR/TF
20% – 80%, Fig. 2
100
45
200
50
500
ps
ODC
TLOCK
Output Duty Cycle
55
20
%
PLL Lock Time
ms
RMS Phase Jitter (6)
(Output = 25MHz)
Integration Range:(12kHz – 5MHz)
5MHz limited by phase-noise system.
315
fs
Tjit(∅)
RMS Phase Jitter (6)
(Output = 125MHz)
Integration Range:(12kHz – 20MHz)
340
115
−64
fs
fs
Integration Range:(1.875MHz – 20MHz)
Spurious Noise Components 25MHz
dBc
Notes:
1. All phase-noise measurements were taken with an Agilent 5052B phase-noise system.
2. REF_IN driven with a low-noise source ClockWorksTM SM802001 programmed for a 25MHz CMOS output. Phase noise will track the input phase
noise up to about 1MHz offset frequency.
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SM802123
Phase Noise Plots
125MHz LVCMOS Integrated Jitter 12kHz – 20MHz 339fs
125MHz LVCMOS Integrated Jitter 1.875MHz – 20MHz 114fs
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Phase Noise Plots (Continued)
25MHz LVCMOS Integrated Jitter 12kHz – 5MHz 315fs
Input Source (25MHz LVCMOS) Programmed from a ClockworksTM Part
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SM802123
Phase Noise Plots (Continued)
125MHz LVCMOS Output Waveform
25MHz LVCMOS Output Waveform
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SM802123
Figure 2. All Outputs Rise/Fall Time
Figure 1. Duty Cycle TIming
Figure 4. LVCMOS Output Load and Test Circuit
Figure 3. RMS Phase Noise/Jitter
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SM802123
Package Information
44-Pin Package Type (QFN)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2012 Micrel, Incorporated.
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SM802123
Revision Template History
Date
Change Description/Edits by:
Rev.
8/4/10
Added new paragraph to disclaimer in boiler plate. Per Colin Sturt. M.Galvan
14
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SM802123
HBW Datasheet Revision History
Part Number:
Initial Release Date:
Rev.
Date Revisions
Reason
Engineer
A
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