SY100EL34ZGTR [MICREL]
5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip; 5V / 3.3V ÷ 2 ÷ 4 ÷ 8时钟发生器芯片
| 型号： | SY100EL34ZGTR |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | 5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip |
| 文件： | 总7页 (文件大小：171K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SY10EL34/L
SY100EL34/L
5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip
Precision Edge®
General Description
The SY10/100EL34/L are low-skew ÷2, ÷4, ÷8 clock
generation chips designed explicitly for low-skew clock
generation applications. The internal dividers are
synchronous to each other; therefore, the common output
edges are all precisely aligned. The devices can be driven
by either a differential or single-ended ECL or, if positive
power supplies are used, PECL input signal. In addition,
by using the VBB output, a sinusoidal source can be AC-
coupled into the device. If a single-ended input is to be
Precision Edge®
Features
• 3.3V and 5V power supply options
• 50ps output-to-output skew
• Synchronous enable/disable
• Master Reset for synchronization
• Internal 75KΩ input pull-down resistors
• Available in 16-pin SOIC package
used, the VBB output should be connected to the CLK
input and bypassed to ground via a 0.01µF capacitor. The
VBB output is designed to act as the switching reference for
the input of the EL34/L under single-ended input
conditions. As a result, this pin can only source/ sink up to
0.5mA of current.
Pin Description
Pin Name Pin Function
CLK
Differential clock inputs.
Synchronous enable.
The common enable (EN ) is synchronous so that the
internal dividers will only be enabled/disabled when the
internal clock is already in the LOW state. This avoids any
chance of generating a runt clock pulse on the internal
clock when the device is enabled/disabled as can happen
with an asynchronous control. An internal runt pulse could
lead to losing synchronization between the internal divider
stages. The internal enable flip-flop is clocked on the
falling edge of the divider stages. The internal enable flip-
flop is clocked on the falling edge of the input clock;
therefore, all associated specification limits are referenced
to the negative edge of the clock input.
EN
MR
VBB
Q0
Master reset.
Reference output.
Differential ÷2 outputs.
Differential ÷4 outputs.
Differential ÷8 outputs.
Q1
Q2
Upon start-up, the internal flip-flops will attain a random
state; the master reset (MR) input allows for the
synchronization of the internal dividers, as well as for
multiple EL34/Ls in a system.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
M9999-120611-I
December 2011
hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
Precision Edge®
SY10EL34/L
SY100EL34/L
Ordering Information
Part Number
Package Type
Operating Range
Package Marking
Lead Finish
SY10EL34LZG with
Pb-Free Bar Line Indicator
SY10EL34LZG
Z16-2
Z16-2
Z16-2
Z16-2
Z16-2
Z16-2
Z16-2
Z16-2
Industrial
Pb-Free NiPdAu
SY10EL34LZG with
Pb-Free Bar Line Indicator
SY10EL34LZGTR(2)
SY100EL34LZG
SY100EL34LZGTR(2)
SY10EL34ZG
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Pb-Free NiPdAu
Pb-Free NiPdAu
Pb-Free NiPdAu
Pb-Free NiPdAu
Pb-Free NiPdAu
Pb-Free NiPdAu
Pb-Free NiPdAu
SY100EL34LZG with
Pb-Free Bar Line Indicator
SY100EL34LZG with
Pb-Free Bar Line Indicator
SY10EL34ZG with
Pb-Free Bar Line Indicator
SY10EL34ZG with
Pb-Free Bar Line Indicator
SY10EL34ZGTR(2)
SY100EL34ZG
SY100EL34ZG with
Pb-Free Bar Line Indicator
SY100EL34ZG with
Pb-Free Bar Line Indicator
SY100EL34ZGTR(2)
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only.
2. Tape and reel.
Pin Configuration
16-Pin Narrow SOIC (Z16-2)
M9999-120611-I
hbwhelp@micrel.com or (408) 955-1690
December 2011
3
Micrel, Inc.
Precision Edge®
SY10EL34/L
SY100EL34/L
DC Electrical Characteristics(1)
VEE = VEE (minimum) to VEE (maximum); VCC = GND.
Symbol
Parameter
Min.
Typ.
Max.
Units
TA = −40°C
Power Supply Current
10EL
49
49
IEE
−
−
−
−
mA
100EL
Output Reference Voltage
10EL
VBB
−1.43
−1.38
−
−1.30
−1.26
150
V
100EL
IIH
Input High Current
µA
−
TA = 0°C
Power Supply Current
10EL
49
49
IEE
−
−
−
−
mA
100EL
Output Reference Voltage
10EL
VBB
−1.38
−1.38
−
−1.27
−1.26
150
V
100EL
IIH
Input High Current
µA
−
TA = +25°C
Power Supply Current
10EL
49
49
IEE
−
−
−
−
mA
100EL
Output Reference Voltage
10EL
VBB
−1.35
−1.38
−
−1.25
−1.26
150
V
100EL
IIH
Input High Current
µA
−
TA = +85°C
Power Supply Current
10EL
49
54
IEE
−
−
−
−
mA
100EL
Output Reference Voltage
Input High Current
10EL
VBB
−1.31
−1.38
−
−1.19
−1.26
150
V
100EL
IIH
µA
−
Note:
1. Parametric values specified at:
−
5V Power Supply Range:
100EL34 Series: −4.2V to −5.5V
10EL34 Series: −4.75V to −5.5V
−
3V Power Supply Range:
10/100EL34L Series: −3.0V to −3.8V
M9999-120611-I
hbwhelp@micrel.com or (408) 955-1690
December 2011
4
Micrel, Inc.
Precision Edge®
SY10EL34/L
SY100EL34/L
AC Electrical Characteristics(1)
VEE = VEE (minimum) to VEE (maximum); VCC = GND.
Symbol
Parameter
Min.
Typ.
Max.
Units
TA = −40°C
Propagation Delay to Output
tPD
CLK
MR
960
650
−
1100
800
−
1200
1010
50
ps
tSKEW
tS
Within-Device Skew(2)
Set-Up Time (EN )
ps
ps
400
−
−
−
−
tH
200
250
−1.3
ps
Hold Time (EN )
VPP
VCMR
tr
Minimum Input Swing(3)
Common-Mode Range(4)
Output Rise/Fall Times
Q (20% − 80%)
mV
V
−
−
−
−0.4
275
400
525
ps
tf
TA = 0°C
Propagation Delay to Output
tPD
CLK
MR
960
650
−
1100
800
−
1200
1010
50
ps
tSKEW
tS
Within-Device Skew(2)
Set-Up Time (EN )
ps
ps
400
−
−
−
−
tH
200
250
−1.4
ps
Hold Time (EN )
VPP
VCMR
tr
Minimum Input Swing(3)
Common-Mode Range(4)
Output Rise/Fall Times
Q (20% − 80%)
mV
V
−
−
−
−0.4
275
400
525
ps
tf
TA = +25°C
Propagation Delay to Output
tPD
CLK
MR
960
650
−
1100
800
−
1200
1010
50
ps
tSKEW
tS
Within-Device Skew(2)
Set-Up Time (EN )
ps
ps
400
−
−
−
−
tH
200
250
−1.4
ps
Hold Time (EN )
VPP
VCMR
tr
Minimum Input Swing(3)
Common-Mode Range(4)
Output Rise/Fall Times
Q (20% − 80%)
mV
V
−
−
−
−0.4
275
400
525
ps
tf
M9999-120611-I
hbwhelp@micrel.com or (408) 955-1690
December 2011
5
Micrel, Inc.
Precision Edge®
SY10EL34/L
SY100EL34/L
AC Electrical Characteristics(1) (Continued)
VEE = VEE (minimum) to VEE (maximum); VCC = GND.
Symbol
Parameter
Min.
Typ.
Max.
Units
TA = +85°C
Propagation Delay to Output
tPD
CLK
MR
960
650
−
1100
800
−
1200
1010
50
ps
tSKEW
tS
Within-Device Skew
Set-Up Time (EN )
ps
ps
400
−
−
−
−
tH
200
250
−1.4
ps
Hold Time (EN )
VPP
VCMR
tr
Minimum Input Swing(3)
Common-Mode Range(4)
Output Rise/Fall Times
Q (20% − 80%)
mV
V
−
−
−
−0.4
275
400
525
ps
tf
Notes:
1. Parametric values specified at:
−
5V Power Supply Range:
100EL34 Series: −4.2V to −5.5V
10EL34 Series: −4.75V to −5.5V
−
3V Power Supply Range:
10/100EL34L Series: −3.0V to −3.8V
2. Skew is measured between outputs under identical transitions.
3. Minimum input swing for which AC parameters are guaranteed. The device will function reliably with differential inputs down to 100mV.
4. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the
specified range and the peak-to-peak voltage lies between VPP minimum and 1V. The lower end of the CMR range varies 1:1 with VEE. The
numbers in the specification table assume a nominal VEE = −3.3V. Note for PECL operation, the VCMR(MIN) will be fixed at 3.3V − IVCMR(MIN)I.
Truth Table
CLK
MR
Function
EN
L
Z
ZZ
X
L
L
Divide
H
Hold Q0 2
−
X
H
Reset Q0 2
−
Notes:
Z = LOW-to-HIGH transition
ZZ = HIGH-to-LOW transition
M9999-120611-I
hbwhelp@micrel.com or (408) 955-1690
December 2011
6
Micrel, Inc.
Precision Edge®
SY10EL34/L
SY100EL34/L
Timing Diagram
The EN signal will freeze the internal clocks to the flip-flops on the first falling edge of CLK after its assertion. The internal
dividers will maintain their state during the internal clock freeze and will return to clocking once the internal clocks are
unfrozen. The outputs will transition to their next states in the same manner, time and relationship as they would have had
the EN signal not been asserted.
M9999-120611-I
hbwhelp@micrel.com or (408) 955-1690
December 2011
7
Micrel, Inc.
Precision Edge®
SY10EL34/L
SY100EL34/L
Package Information
16-Pin .150” Wide SOIC (Z16-2)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2006 Micrel, Incorporated.
M9999-120611-I
hbwhelp@micrel.com or (408) 955-1690
December 2011
8
相关型号：
SY100EL35LZI-TR
100EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
MICROCHIP
SY100EL35LZITR
100EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, 0.150 INCH, SOIC-8
MICROCHIP
©2020 ICPDF网 联系我们和版权申明