SY100S351_06 [MICREL]

HEX D FLIP-FLOP; 六路D触发器
SY100S351_06
型号: SY100S351_06
厂家: MICREL SEMICONDUCTOR    MICREL SEMICONDUCTOR
描述:

HEX D FLIP-FLOP
六路D触发器

触发器
文件: 总8页 (文件大小:96K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SY100S351  
HEX D FLIP-FLOP  
FEATURES  
DESCRIPTION  
Max. toggle frequency of 700MHz  
Clock to Q max. of 1200ps  
IEE min. of –98mA  
The SY100S351 offers six D-type, edge-triggered,  
master/slave flip-flops with differential outputs, and is  
designed for use in high-performance ECL systems. The  
flip-flops are controlled by the signal from the logical OR  
operation on a pair of common clock signals (CPa, CPb).  
Data enters the master when both CPa and CPb are LOW  
and transfers to the slave when either CPa or CPb (or both)  
go to a logic HIGH. The Master Reset (MR) input overrides  
all other inputs and takes the Q outputs to a logic LOW. The  
inputs on this device have 75Kpull-down resistors.  
Industry standard 100K ECL levels  
Extended supply voltage option:  
VEE = –4.2V to –5.5V  
Voltage and temperature compensation for improved  
noise immunity  
Internal 75Kinput pull-down resistors  
50% faster than Fairchild 300K  
Better than 20% lower power than Fairchild  
Function and pinout compatible with Fairchild F100K  
Available in 24-pin CERPACK and 28-pin PLCC  
packages  
BLOCK DIAGRAM  
D
E
D
5
Q
Q
Q
Q
5
5
CP  
CP  
MR  
b
a
R
R
R
R
R
R
D
E
D
D
D
D
D
4
3
2
1
0
Q
Q
Q
Q
4
4
D
E
Q
Q
Q
Q
3
3
D
E
Q
Q
Q
Q
2
2
D
E
Q
Q
Q
Q
1
1
D
E
Q
Q
Q
Q
0
0
Rev.: H  
Amendment:/0  
M9999-032406  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: March 2006  
SY100S351  
Micrel, Inc.  
PACKAGE/ORDERING INFORMATION  
Ordering Information  
Package Operating  
Package  
Marking  
Lead  
Finish  
Part Number  
Type  
F24-1  
F24-1  
J28-1  
Range  
11 10 9  
8 7 6 5  
SY100S351FC  
SY100S351FCTR(1)  
SY100S351JC  
Commercial  
Commercial  
Commercial  
SY100S351FC  
SY100S351FC  
SY100S351JC  
Sn-Pb  
Sn-Pb  
Sn-Pb  
D2  
D3  
12  
13  
14  
15  
16  
17  
18  
4
3
Q2  
Q2  
VEE  
VEES  
MR  
2
VCCA  
VCC  
VCC  
Q3  
Top View  
PLCC  
J28-1  
1
SY100S351JCTR(1)  
SY100S351JZ(2)  
J28-1  
J28-1  
Commercial  
Commercial  
SY100S351JC  
Sn-Pb  
28  
27  
26  
CPa  
CPb  
SY100S351JZ with  
Matte-Sn  
Q3  
Pb-Free bar-line indicator  
19 20 21 22 23 24 25  
SY100S351JZTR(1, 2)  
J28-1  
Commercial  
SY100S351JZ with  
Matte-Sn  
Pb-Free bar-line indicator  
Notes:  
1. Tape and Reel.  
28-Pin PLCC (J28-1)  
2. Pb-Free package is recommended for new designs.  
24 23 22 21 20 19  
1
2
3
4
5
6
18  
17  
16  
15  
14  
13  
D
D
4
5
D
1
0
D
Top View  
Flatpack  
F24-1  
Q
Q
5
5
Q
Q
Q
Q
0
0
1
1
Q
4
Q
4
7
8 9 10 11 12  
24-Pin Cerpack (F24-1)  
M9999-032406  
hbwhelp@micrel.com or (408) 955-1690  
2
SY100S351  
Micrel, Inc.  
PIN NAMES  
Pin  
D0 — D5  
CPa, CPb  
MR  
Function  
Data Inputs  
Common Clock Inputs  
Asynchronous Master Reset Input  
Data Outputs  
Q0 — Q5  
Q0 — Q5  
VEES  
Complementary Data Outputs  
VEE Substrate  
VCCA  
VCCO for ECL Outputs  
TRUTH TABLES  
Synchronous Operation(1)  
Inputs  
Asynchronous Operation(1)  
Inputs  
Outputs  
Qn (t+1)  
L
Outputs  
Dn  
L
CPa  
u
CPb  
L
MR  
L
Qn (t+1)  
Dn  
CPa  
CPb  
MR  
L
H
X
X
X
H
NOTE:  
H
L
u
L
L
1. H = High Voltage Level  
L = Low Voltage Level  
X = Don't Care  
L
u
L
L
H
X
X
X
L
u
L
H
t = Time before CP Positive Transition  
t+1 = Time after CP Positive Transition  
u = LOW-to-HIGH Transition  
H
u
u
L
Qn(t)  
Qn(t)  
Qn(t)  
H
L
L
L
L
DC ELECTRICAL CHARACTERISTICS  
VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND  
Symbol  
Parameter  
Input HIGH Current  
Min.  
Typ.  
Max.  
Unit  
Condition  
IIH  
µA  
VIN = VIH (Max.)  
MR  
D0 – D5  
CPa, CPb  
270  
200  
300  
IEE  
Power Supply Current  
–98  
–71  
–49  
mA  
Inputs Open  
M9999-032406  
hbwhelp@micrel.com or (408) 955-1690  
3
SY100S351  
Micrel, Inc.  
AC ELECTRICAL CHARACTERISTICS  
CERPACK  
VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND  
TA = 0°C  
TA = +25°C  
TA = +85°C  
Symbol  
Parameter  
Toggle Frequency  
Min.  
Max.  
Min.  
700  
Max.  
Min.  
700  
Max.  
Unit  
MHz  
ps  
Condition  
fMAX  
700  
tPLH  
tPHL  
Propagation Delay  
CPa, CPb to Output  
1200  
1200  
1200  
tPLH  
tPHL  
Propagation Delay  
MR to Output  
1200  
900  
1200  
900  
1200  
900  
ps  
ps  
ps  
tTLH  
tTHL  
Transition Time  
20% to 80%, 80% to 20%  
300  
300  
300  
tS  
Set-up Time  
D0–D5  
MR (Release Time)  
500  
1000  
500  
1000  
500  
1000  
tH  
Hold Time, D0–D5  
550  
550  
550  
ps  
ps  
tPW (H)  
Pulse Width HIGH  
CPa, CPb, MR  
1000  
1000  
1000  
PLCC  
VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND  
TA = 0°C TA = +25°C  
TA = +85°C  
Symbol  
Parameter  
Toggle Frequency  
Min.  
Max.  
Min.  
700  
Max.  
Min.  
700  
Max.  
Unit  
MHz  
ps  
Condition  
fMAX  
700  
tPLH  
tPHL  
Propagation Delay  
CPa, CPb to Output  
1200  
1200  
1200  
tPLH  
tPHL  
Propagation Delay  
MR to Output  
1200  
900  
1200  
900  
1200  
900  
ps  
ps  
ps  
tTLH  
tTHL  
Transition Time  
20% to 80%, 80% to 20%  
300  
300  
300  
tS  
Set-up Time  
D0–D5  
MR (Release Time)  
500  
1000  
500  
1000  
500  
1000  
tH  
Hold Time, D0–D5  
550  
550  
550  
ps  
ps  
tPW (H)  
Pulse Width HIGH  
CPa, CPb, MR  
1000  
1000  
1000  
M9999-032406  
hbwhelp@micrel.com or (408) 955-1690  
4
SY100S351  
Micrel, Inc.  
TIMING DIAGRAMS  
DATA  
0.7 ± 0.1 ns  
0.7 ± 0.1 ns  
0.95V  
80%  
CLOCK  
50%  
20%  
1.69V  
1/fmax  
tpw (H)  
t
t
PHL  
PLH  
tPLH  
OUTPUT  
OUTPUT  
50%  
t
PHL  
t
TLH  
tTHL  
Propagation Delay (Clock) and Transition Times  
NOTE:  
VEE = 4.2V to 5.5V unless otherwise specified; VCC = VCCA = GND  
0.7 ± 0.1 ns  
MR  
0.7 ± 0.1 ns  
0.95V  
1.69V  
80%  
50%  
20%  
t
S
(RELEASE TIME)  
50%  
tpw (H)  
CLOCK  
t
t
PHL  
PLH  
tPLH  
OUTPUT  
OUTPUT  
50%  
t
PHL  
80%  
50%  
20%  
Propagation Delay (Resets)  
M9999-032406  
hbwhelp@micrel.com or (408) 955-1690  
5
SY100S351  
Micrel, Inc.  
TIMING DIAGRAMS  
0.95V  
DATA  
50%  
1.69V  
0.95V  
tH  
tS  
CLOCK  
50%  
1.69V  
Data Set-up and Hold Time  
Notes:  
1. VEE = 4.2V to 5.5V unless otherwise specified; VCC = VCCA = GND  
2. tS is the minimum time before the transition of the clock that information  
must be present at the data input.  
3. tH is the minimum time after the transition of the clock that information must  
remain unchanged at the data input.  
M9999-032406  
hbwhelp@micrel.com or (408) 955-1690  
6
SY100S351  
Micrel, Inc.  
24-PIN CERPACK (F24-1)  
Rev. 03  
M9999-032406  
hbwhelp@micrel.com or (408) 955-1690  
7
SY100S351  
Micrel, Inc.  
28-PIN PLCC (J28-1)  
Rev. 03  
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA  
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com  
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.  
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.  
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can  
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into  
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchasers  
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchasers own risk and Purchaser agrees to fully indemnify  
Micrel for any damages resulting from such use or sale.  
© 2006 Micrel, Incorporated.  
M9999-032406  
hbwhelp@micrel.com or (408) 955-1690  
8

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