SY10E171JCTR [MICREL]

3-BIT 4:1 MULTIPLEXER; 3位4: 1多路转换器
SY10E171JCTR
型号: SY10E171JCTR
厂家: MICREL SEMICONDUCTOR    MICREL SEMICONDUCTOR
描述:

3-BIT 4:1 MULTIPLEXER
3位4: 1多路转换器

转换器 逻辑集成电路
文件: 总4页 (文件大小:63K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
3-BIT 4:1  
MULTIPLEXER  
SY10E171  
SY100E171  
FEATURES  
DESCRIPTION  
725ps max. D to output  
The SY10/100E171 offer three 4:1 multiplexers with  
differential outputs, designed for use in new, high-  
performance ECL systems. The leading 4-bit multiplexer  
operation is organized pairwise, with each pair being a 2-  
bit multiplexer. Separate select (SEL1A, SEL1B) controls  
are provided within each pair. The SEL1A and SEL1B  
signals control the leading multiplexers, while the SEL2  
signal controls the output multiplexer. The three select  
signals can be used to determine which of the four data  
inputs will be propagated to the corresponding outputs.  
Extended 100E VEE range of –4.2V to –5.5V  
Differential outputs  
Split select architecture  
Fully compatible with industry standard 10KH,  
100K ECL levels  
Internal 75Kinput pulldown resistors  
Fully compatible with Motorola MC10E/100E171  
Available in 28-pin PLCC package  
BLOCK DIAGRAM  
PIN CONFIGURATION  
2:1  
MUX  
SEL  
D
0a  
0b  
D
2:1  
MUX  
SEL  
Q
0
0
25  
24 23 22 21 20 19  
Q
SEL1A  
SEL1B  
18  
17  
16  
15  
14  
13  
12  
26  
27  
28  
1
Q
Q
2
2
2:1  
MUX  
SEL  
D
0c  
D0d  
SEL  
2
V
CC  
TOP VIEW  
PLCC  
V
EE  
Q
Q
1
1
NC  
NC  
2
2:1  
MUX  
SEL  
D
1a  
1b  
J28-1  
3
V
CCO  
D
2:1  
MUX  
SEL  
Q
1
1
D
1c  
4
Q
0
5
6
7
8
9
10 11  
Q
2:1  
MUX  
SEL  
D
1c  
D1d  
2:1  
MUX  
SEL  
D
2a  
2b  
D
2:1  
MUX  
SEL  
Q
2
2
PIN NAMES  
Q
2:1  
MUX  
SEL  
D
2c  
Pin  
D0x–D2x  
SEL1A, SEL1B  
SEL2  
Function  
Data Inputs  
D2d  
First-stage Select Inputs  
Second-stage Select Input  
True Output  
SEL1A  
SEL1B  
Q0–Q2  
Q0–Q2  
Inverted Output  
SEL  
2
VCCO  
VCC to Output  
Rev.: C  
Amendment: /1  
Issue Date: February, 1998  
1
SY10E171  
SY100E171  
Micrel  
TRUTH TABLE  
Pin  
State  
H
Operation  
Output c/d data  
Input d data  
Input b data  
SEL2  
SEL1A  
SEL1B  
H
H
DC ELECTRICAL CHARACTERISTICS  
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND  
TA = 0°C  
TA = +25°C  
TA = +85°C  
Symbol  
IIH  
Parameter  
Input HIGH Current  
Power Supply Current  
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit  
Condition  
150  
150  
150  
µA  
IEE  
mA  
10E  
100E  
56  
56  
67  
67  
56  
56  
67  
67  
56  
65  
67  
77  
AC ELECTRICAL CHARACTERISTICS  
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND  
TA = 0°C  
TA = +25°C  
TA = +85°C  
Symbol  
Parameter  
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit  
Condition  
tPLH  
tPHL  
Propagation Delay to Output  
D
SEL1  
SEL2  
ps  
275 480 650 275 480  
450 650 850 450 650  
350 550 700 350 550  
650 275 480  
850 450 650  
700 350 550  
650  
850  
700  
tskew  
Within-Device Skew  
Dnm, Dnm to Qn  
Da, Db, Dc, Dd to Q  
ps  
ps  
1
60  
40  
60  
40  
60  
40  
tr  
tf  
Rise/Fall Time  
20% to 80%  
300 475 650 300 475  
650 300 475  
650  
NOTE:  
1. Within-device skew is defined as identical transitions on similar paths through a device; n = 0, 1, 2 m = a, b, c, d.  
PRODUCT ORDERING CODE  
Ordering  
Code  
Package  
Type  
Operating  
Range  
SY10E171JC  
J28-1  
J28-1  
J28-1  
J28-1  
Commercial  
Commercial  
Commercial  
Commercial  
SY10E171JCTR  
SY100E171JC  
SY100E171JCTR  
2
SY10E171  
SY100E171  
Micrel  
28 LEAD PLCC (J28-1)  
Rev. 03  
3
SY10E171  
SY100E171  
Micrel  
MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA  
TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com  
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or  
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.  
© 2000 Micrel Incorporated  
4

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