SY58036UMG [MICREL]
6GHz, 1:6 400mV LVPECL FANOUT BUFFER WITH 2:1 MUX INPUT AND INTERNAL TERMINATION; 6GHz的， 1 ： 6 400mV的LVPECL扇出缓冲器，以2： 1多路复用器输入和内部终端
| 型号： | SY58036UMG |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | 6GHz, 1:6 400mV LVPECL FANOUT BUFFER WITH 2:1 MUX INPUT AND INTERNAL TERMINATION |
| 文件： | 总11页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
Precision Edge®
6GHz, 1:6 400mV LVPECL FANOUT
BUFFER WITH 2:1 MUX INPUT
AND INTERNAL TERMINATION
SY58036U
FEATURES
■ Provides six ultra-low skew copies of the selected
®
input
Precision Edge
■ 2:1 MUX input included for clock switchover
DESCRIPTION
applications
■ Guaranteed AC performance over temperature and
The SY58036U is a 2.5V/3.3V precision, high-speed, 1:6
fanout buffer capable of handling clocks up to 6GHz. A
differential 2:1 MUX input is included for redundant clock
switchover applications.
voltage:
• Clock frequency range: DC to > 6GHz
• <300ps IN-to-OUT t
pd
• <80ps t / t times
r
f
The differential input includes Micrel’s unique, 3-pin input
termination architecture that allows the device to interface
to any differential signal (AC- or DC-coupled) as small as
100mV without any level shifting or termination resistor
networks in the signal path. The outputs are 400mV LVPECL
(100K temperature compensated), with extremely fast rise/
fall times guaranteed to be less than 80ps.
• <20ps skew (output-to-output)
■ Ultra-low jitter design:
• <1ps
random jitter
RMS
• <10ps total jitter (clock)
PP
• <1ps
cycle-to-cycle jitter
RMS
• <0.7ps
crosstalk-induced jitter
RMS
■ Low supply voltage operation: 2.5V and 3.3V
The SY58036U operates from a 2.5V ±5% supply or a
3.3V ±10% supply and is guaranteed over the full industrial
temperature range of –40°C to +85°C. For applications that
require CML outputs, consider the SY58034U or for 800mV
LVPECL outputs the SY58035U. The SY58036U is part of
■ Unique input termination and VT pin accepts DC-
coupled and AC-coupled inputs (CML, PECL, LVDS)
■ Unique input isolation design minimizes crosstalk
■ 400mV LVPECL (100K compatible) output swing
■ –40°C to +85°C temperature range
®
Micrel’s high-speed, Precision Edge product line.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
®
■ Available in 32-pin (5mm × 5mm) MLF package
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS
■ Redundant clock distribution
1:6 Fanout
■ All SONET/SDH clock distribution
■ All Fibre Channel distribution
■ All Gigabit Ethernet clock distribution
Q0
/Q0
2:1 Mux
IN0
VT0
Q1
50Ω
50Ω
/Q1
0
1
/IN0
VREF-AC0
Q2
Mux
S
/Q2
IN1
VT1
50Ω
50Ω
Q3
/Q3
/IN1
Q4
VREF-AC1
/Q4
SEL
(TTL/CMOS)
Q5
/Q5
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
Rev.: D
Amendment: /0
M9999-020707
hbwhelp@micrel.com or (408) 955-1690
1
Issue Date: February 2007
Precision Edge®
SY58036U
Micrel, Inc.
PACKAGE/ORDERING INFORMATION
Ordering Information(1)
Package Operating
Package
Marking
Lead
Finish
32 31 30 29 28 27 26 25
Part Number
Type
Range
1
24
23
GND
VCC
Q2
/Q2
Q3
/Q3
VCC
GND
IN0
VT0
VREF-AC0
SY58036UMI
SY58036UMITR(2)
MLF-32
MLF-32
MLF-32
Industrial
Industrial
Industrial
SY58036U
SY58036U
Sn-Pb
Sn-Pb
2
3
4
5
6
7
22
21
20
19
18
/IN0
IN1
VT1
SY58036UMG(3)
SY58036U with
NiPdAu
Pb-Free bar-line indicator Pb-Free
SY58036U with NiPdAu
Pb-Free bar-line indicator Pb-Free
VREF-AC1
/IN1
SY58036UMGTR(2, 3) MLF-32
Industrial
8
17
9
10 11 12 13 14 15 16
Notes:
1. Contact factory for die availability. Dice are guaranteed at T = 25°C, DC electricals only.
A
®
2. Tape and Reel.
32-Pin MLF (MLF-32)
3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number
Pin Name
Pin Function
1, 4
5, 8
IN0, /IN0
IN1, /IN1
Differential Input: These input pairs are the differential signal inputs to the device. These
inputs accept AC- or DC-coupled signals as small as 100mV. Each pin of a pair internally
terminates to a VT pin through 50Ω. Note that these inputs will default to an indeterminate
state if left open. Please refer to the “Input Interface Applications” section for more details.
2, 6
31
VT0, VT1
SEL
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT
pin. The VT0 and VT1 pins provide a center-tap to a termination network for maximum
interface flexibility. See “Input Interface Applications” section for more details.
This single-ended TTL/CMOS compatible input selects the inputs to the multiplexer. Note
that this input is internally connected to a 25kΩ pull-up resistor and will default to a logic
HIGH state if left open. The MUX select switchover function is asynchronous.
10
NC
No connect.
11, 16, 18,
23, 25, 30
VCC
Positive Power Supply: Bypass with 0.1µF0.01µF low ESR capacitors and place as
close to the VCC pins as possible.
29, 28
27, 26
22, 21
20, 19
15, 14
13, 12
Q0, /Q0,
Q1, /Q1,
Q2, /Q2,
Q3, /Q3,
Q4, /Q4,
Q5, /Q5
Differential Outputs: These 100K (temperature compensated) LVPECL output pairs are
low skew copies of the selected input. Please refer to the “Truth Table” for details.
9, 17, 24, 32
GND,
Ground. Ground pin and exposed pad must be connected to the same ground plane.
Exposed Pad
3, 7
VREF-AC0
VREF-AC1
Reference Voltage: These output biases to VCC–1.2V. It is used for AC-coupling inputs
(IN, /IN). Connect VREF-AC directly to the VT pin. Bypass with 0.01µF low ESR capacitor to
VCC. See “Input Interface Applications” section. Maximum sink/source current is ±1.5mA.
Due to the limited drive capability, the VREF-AC pin is only intended to drive its respective
VT pin.
TRUTH TABLE
SEL
0
1
IN0 Input Selected
IN1 Input Selected
M9999-020707
hbwhelp@micrel.com or (408) 955-1690
2
Precision Edge®
SY58036U
Micrel, Inc.
Absolute Maximum Ratings(1)
Operating Ratings(2)
Power Supply Voltage (V ) ...................... –0.5V to +4.0V
Power Supply Voltage (V ) ............... +2.375V to +2.625V
CC
CC
Input Voltage (V ) ......................................... –0.5V to V
............................................................ +3.0V to +3.6V
IN
CC
LVPECL Output Current (I
)
Ambient Temperature Range (T ) ............. –40°C to +85°C
OUT
A
(3)
Continuous .............................................................50mA
Surge....................................................................100mA
Package Thermal Resistance
®
MLF (θ )
JA
Termination Current
Still-Air .............................................................35°C/W
Source or sink current on V pin ........................ ±100mA
®
T
MLF (ψ )
JB
Input Current
Junction-to-Board ............................................16°C/W
Source or sink current on IN, /IN pin .................... ±50mA
Source or sink current on VREF-AC pin ................ ±2mA
Lead Temperature (soldering, 10 sec.) ..................... 220°C
Storage Temperature Range (T ) ........... –65°C to +150°C
S
(4)
DC ELECTRICAL CHARACTERISTICS
TA= –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
2.375
3.0
Typ
2.5
Max
2.625
3.6
Units
V
VCC
Power Supply Voltage
3.3
V
ICC
Power Supply Current
No load, max. VCC
180
100
250
mA
Ω
RDIFF_IN
Differential Input Resistance
(IN-to-/IN)
90
110
RIN
Input Resistance (IN-to-VT)
Input HIGH Voltage (IN, /IN)
Input LOW Voltage (IN, /IN)
Input Voltage Swing (IN, /IN)
45
VCC–1.2
0
50
55
VCC
Ω
V
V
V
V
VIH
VIL
VIH–0.1
1.7
VIN
See Figure 1a.
See Figure 1b.
0.1
VDIFF_IN
Differential Input Voltage Swing
|IN, /IN|
0.2
VT IN
IN to VT (IN, /IN)
1.28
V
V
VREF-AC
Reference Voltage
VCC–1.3 VCC–1.2 VCC–1.1
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Thermal performance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB. Ψ and θ are shown
JB
JA
for a 4-layer PCB in a still air environment, unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
M9999-020707
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Precision Edge®
SY58036U
Micrel, Inc.
(6)
LVPECL OUTPUT DC ELECTRICAL CHARACTERISTICS
VCC = 2.5V ±5% or 3.3V ±10%, RL = 50Ω to VCC–2V; TA= –40°C to +85°C, unless otherwise stated.
Symbol
VOH
Parameter
Condition
Min
VCC–1.145
VCC–1.545
150
Typ
Max
Units
V
Output HIGH Voltage
Output LOW Voltage
Output Differential Swing
Differential Output Voltage Swing
VCC–0.895
VCC–1.295
VOL
V
VOUT
See Figure 1a.
See Figure 1b.
400
800
mV
mV
VDIFF_OUT
300
(6)
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS
VCC = 2.5V ±5% or 3.3V ±10%; TA= –40°C to +85°C, unless otherwise stated.
Symbol
VIH
Parameter
Condition
Min
Typ
Max
Units
V
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
2.0
VIL
0.8
40
V
IIH
–125
–300
µA
µA
IIL
Note:
6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
M9999-020707
hbwhelp@micrel.com or (408) 955-1690
4
Precision Edge®
SY58036U
Micrel, Inc.
(7)
AC ELECTRICAL CHARACTERISTICS
VCC = 2.5V ±5% or 3.3V ±10%, RL = 50Ω to VCC–2V; TA= –40°C to +85°C, unless otherwise stated.
Symbol
fMAX
Parameter
Condition
Min
Typ
Max
Units
Maximum Operating Frequency
VOUT ≥ 200mV
6
7
GHz
tpd
Differential Propagation Delay
(IN0 or IN1-to-Q)
(SEL-to-Q)
150
100
220
220
65
300
400
ps
ps
∆tpd Tempco Differential Propagation Delay
fs/°C
Temperature Coefficient
tSKEW
Output-to-Output Note 8
Part-to-Part Note 9
20
100
1
ps
ps
tJITTER
Clock
Cycle-to-Cycle Jitter Note 10
Random Jitter (RJ) Note 11
Total Jitter (TJ) Note 12
psRMS
psRMS
psPP
1
10
Adjacent Channel Note 13
Crosstalk-Induced Jitter
0.7
80
psRMS
ps
tr, tf
Output Rise/Fall Time
Full Swing, 20% to 80%
20
40
Notes:
7. High frequency AC electricals are guaranteed by design and characterization.
8. Output-to-output skew is measured between outputs under identical transitions.
9. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs.
10. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, T –T
where T is the time between rising edges of the output
n–1
n
signal.
11. Random jitter is measured with a K28.7, measured at 2.5Gbps.
12
12. Total jitter definition: with an ideal clock input of frequency ≤ f
, no more than one output edge in 10 output edges will deviate by more than the
MAX
specified peak-to-peak jitter value.
13. Crosstalk is measured at the output while applying two similar clock frequencies that are asynchronous with respect to each other at the inputs.
SINGLE-ENDED AND DIFFERENTIAL SWINGS
VDIFF_IN
,
VIN,
VOUT
VDIFF_OUT 800mV (Typ.)
400mV (Typ.)
Figure 1a. Single-Ended Voltage Swing
Figure 1b. Differential Voltage Swing
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Precision Edge®
SY58036U
Micrel, Inc.
TIMING DIAGRAMS
IN
/IN
tpd
Q
/Q
Input-to-Q tpd
SEL
VCC/2
VCC/2
tpd
tpd
Q
/Q
SEL-to-Q tpd
M9999-020707
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Precision Edge®
SY58036U
Micrel, Inc.
TYPICAL OPERATING CHARACTERISTICS
V
= 2.5V, GND = 0, V = 100mV, R = 50Ω to V –2V; T = 25°C, unless otherwise stated.
CC
IN
L
CC
A
Output Swing
vs. Frequency
Propagation Delay
vs. Temperature
226
224
222
220
218
450
400
350
300
250
200
150
100
50
0
-40 -20
0
20 40 60 80 100
0
2000 4000 6000 8000 10000
FREQUENCY (MHz)
TEMPERATURE (C)
M9999-020707
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Precision Edge®
SY58036U
Micrel, Inc.
FUNCTIONAL CHARACTERISTICS
V
= 3.3V, GND = 0, V = 100mV, R = 50Ω to V –2V; T = 25°C, unless otherwise stated.
CC
IN
L
CC
A
200MHz Output
2.5GHz Output
TIME (600ps/div.)
TIME (50ps/div.)
5GHz Output
7GHz Output
TIME (25ps/div.)
TIME (20ps/div.)
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Precision Edge®
SY58036U
Micrel, Inc.
INPUT AND OUTPUT STAGES
VCC
VCC
IN
50Ω
VT
GND
50Ω
/Q
Q
/IN
Figure 2a. Simplified Differential Input Stage
Figure 2b. Simplified LVPECL Output Stage
INPUT INTERFACE APPLICATIONS
VCC
VCC
VCC
IN
LVPECL
IN
IN
/IN
LVPECL
CML
SY58036U
/IN
/IN
GND
NC
VREF-AC
VT
Rpd
Rpd
SY58036U
SY58036U
VCC
GND
VCC
0.01µF
VREF-AC
VT
GND
Rpd
NC
NC
VREF-AC
VT
0.01µF
GND
For 3.3V, Rpd = 100Ω.
For 2.5V, Rpd = 50Ω.
For 3.3V, Rpd = 50Ω.
For 2.5V, Rpd = 19Ω.
Option: May connect VT to VCC
.
Figure 3b. LVPECL
Figure 3a. LVPECL
Figure 3c. CML
Interface (AC-Coupled)
Interface (DC-Coupled)
Interface (DC-Coupled)
VCC
VCC
IN
CML
IN
/IN
LVDS
/IN
SY58036U
GND
SY58036U
VCC
VREF-AC
VT
GND
NC
NC
VREF-AC
VT
0.01µF
Figure 3d. CML
Interface (AC-Coupled)
Figure 3e. LVDS Interface
9
M9999-020707
hbwhelp@micrel.com or (408) 955-1690
Precision Edge®
SY58036U
Micrel, Inc.
OUTPUT INTERFACE APPLICATIONS
for terminating the LVECL output: parallel-thevenin
equivalent termination and parallel termination (3-resistor).
Unused output pairs may be left floating. However, single-
ended outputs must be terminated, or balanced.
LVPECL has high input impedance, very low output (open
emitter) impedance, and small signal swing, which results
in low EMI. LVPECL is ideal driving 50Ω and 100Ω controlled
impedance transmission lines. There are several techniques
+3.3V
+3.3V
+3.3V
R1
R1
130Ω
Z = 50Ω
Z = 50Ω
+3.3V
130Ω +3.3V
ZO = 50Ω
ZO = 50Ω
50Ω
50Ω
“source”
“destination”
VCC
R2
R2
82Ω
82Ω
50Ω
R
b
C1
0.01µF
(optional)
Note: For 2.5V systems:
= 19Ω
Note: For 2.5V systems:
R1 = 250Ω, R2 = 62.5Ω
R
b
Figure 4b. Parallel Termination
(3-Resistor)
Figure 4a. Parallel Thevenin-Equivalent
Termination
RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION
Part Number
Function
Data Sheet Link
SY58034U
6GHz, 1:6 CML Fanout Buffer with 2:1 MUX Input http://www.micrel.com/product-info/products/sy58034u.shtml
and Internal I/O Termination
SY58035U
4.5GHz, 1:6 LVPECL Fanout Buffer with 2:1 MUX http://www.micrel.com/product-info/products/sy58035u.shtml
Input and Internal Termination
MLF® Application Note
www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf
www.micrel.com/product-info/products/solutions.shtml
HBW Solutions New Products and Applications
M9999-020707
hbwhelp@micrel.com or (408) 955-1690
10
Precision Edge®
SY58036U
Micrel, Inc.
®
32-PIN MicroLeadFrame (MLF-32)
Package
EP- Exposed Pad
Die
CompSide Island
Heat Dissipation
Heat Dissipation
VEE
Heavy Copper Plane
Heavy Copper Plane
®
VEE
PCB Thermal Consideration for 32-Pin MLF Package
(Always solder, or equivalent, the exposed pad to the PCB)
Package Notes:
1. Package meets Level 2 qualification.
2. All parts are dry-packaged before shipment.
3. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
M9999-020707
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