SY88843VEY [MICREL]
3.3V/5V 3.2Gbps CML LOW-POWER LIMITING POST AMPLIFIER w/TTL SD; 3.3V / 5V的3.2Gbps CML低功率限幅后置放大器W / SD TTL
| 型号： | SY88843VEY |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | 3.3V/5V 3.2Gbps CML LOW-POWER LIMITING POST AMPLIFIER w/TTL SD |
| 文件： | 总11页 (文件大小：123K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3.3V/5V 3.2Gbps CML LOW-POWER
LIMITING POST AMPLIFIER w/TTL SD
SY88843V
DESCRIPTION
FEATURES
The SY88843V low-power limiting post amplifier is
designed for use in fiber-optic receivers. The device connects
to typical transimpedance amplifiers (TIAs). The linear signal
output from TIAs can contain significant amounts of noise
and may vary in amplitude over time. The SY88843V
■ Multi-rate up to 3.2Gbps operation
■ Wide gain-bandwidth product
• 38dB differential gain
• 2GHz 3dB bandwidth
quantizes these signals and outputs typically 800mV
voltage-limited waveforms.
PP
■ Low noise 50Ω CML data outputs
• 800mV output swing
The SY88843V operates from a single +3.3V ±10% or
+5V ±10% power supply, over an industrial temperature
range of –40°C to +85°C. With its wide bandwidth and high
gain, signals with data rates up to 3.2Gbps and as small as
10mVp-p can be amplified to drive devices with CML inputs
or AC-coupled PECL inputs.
The SY88843V incorporates a signal detect (SD), open-
collector TTL output with internal 4.75kΩ pull-up resistor. A
programmable, loss-of-signal level set pin (SDLVL) sets the
sensitivity of the input amplitude detection. SD asserts high
if the input amplitude rises above the threshold set by SDLVL
and de-asserts low otherwise. SD can be fed back to the
enable (EN) input to maintain output stability under a loss
of signal condition. EN asserts the true output signal without
removing the input signal. Typically 4.6dB SD hysteresis is
provided to prevent chattering.
PP
• 60ps edge rates
• 5ps
typ. random jitter
RMS
• 15ps typ. deterministic jitter
PP
■ Chatter-free, Signal-Detect (SD) output
• 4.6dB electrical hysteresis
• OC-TTL output with internal 4.75kΩ pull-up
resistor
■ Programmable SD sensitivity using single external
resistor
■ Internal 50Ω data input termination
■ TTL EN input allows feedback from SD
■ Wide operating range
Please see Micrel’s website at www.micrel.com for a
complete selection of optical module ICs. The following table
summarizes the differences between devices in Micrel’s
latest family of Limiting Amplifiers.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
• Single 3.3V ±10% or 5V ±10% power supply
• –40°C to +85°C industrial temperature range
■ Available in tiny 10-pin EPAD-MSOP and
16-pin MLF™ packages
Integrated 50Ω
LOS
Active LOW
Part Number Input Termination or SD or HIGH Enable
APPLICATIONS
SY88773V
SY88823V
SY88843V
SY88973V
No
LOS
SD
LOW
HIGH
HIGH
LOW
■ 1.25Gbps and 2.5Gbps Gigabit Ethernet
■ 1.062Gbps and 2.125Gbps Fibre Channel
No
Yes
Yes
SD
■ 155Mbps, 622Mbps, 1.25Gbps, and 2.5Gbps SONET/
LOS
SDH
Table 1. Limiting Amplifiers Selection Guide
■ Gigabit interface converter (GBIC)
TYPICAL PERFORMANCE
■ Small form factor (SFF) and small form factor
pluggable (SFP) transceivers
3.3V, 25°C, 10mVpp Input
@3.2Gbps 231–1 PRBS, RLOAD = 50Ω to VCC
■ Parallel 10G Ethernet
■ High-gain line driver and line receiver
TIME (50ps/div.)
Micro LeadFrame and MLF are trademarks of Amkor Technology
Rev.: C
Amendment: /0
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
1
Issue Date: November2005
SY88843V
Micrel, Inc.
FUNCTIONAL BLOCK DIAGRAM
VCC
DOUT
DIN
CML
Buffer
Limiting
Amplifer
50Ω
/DOUT
EN
/DIN
REF
VCC
25k
Ω
TTL
Buffer
REF
Generator
Level
Detect
VCC
2.8k
Ω
4.75kΩ
OC-TTL
Buffer
SD
SDLVL
GND
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88843V
Micrel, Inc.
PACKAGE/ORDERING INFORMATION
Ordering Information(1)
Package Operating
Package
Marking
Lead
Finish
Part Number
Type
Range
16 15 14 13
SY88843VKI
K10-2
Industrial
Industrial
Industrial
Industrial
Industrial
843V
843V
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Pb-Free
1
2
12
11
10
9
/DOUT
GND
DIN
SY88843VKITR(2)
K10-2
GND
SY88843VMI
MLF-16
MLF-16
K10-2
843V
GND
3
4
GND
/DIN
SY88843VMITR(2)
SY88843VEY(3)
843V
/DOUT
843V with
5
6
7
8
Pb-Free bar-line indicator Matte-Sn
843V with Pb-Free
Pb-Free bar-line indicator Matte-Sn
SY88843VEYTR(2, 3)
SY88843VMG(3)
K10-2
Industrial
Industrial
MLF-16
843V with
Pb-Free
NiPdAu
16-Pin MLF™ (MLF-16)
Pb-Free bar-line indicator
SY88843VMGTR(2, 3) MLF-16
Industrial
843V with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
EN
DIN
1
2
3
4
5
10 VCC
9
8
7
6
DOUT
Notes:
/DIN
/DOUT
SD
1. Contact factory for die availability. Dice are guaranteed at T = 25°C, DC Electricals only.
A
REF
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
SDLVL
GND
10-Pin EPAD-MSOP (K10-2)
PIN DESCRIPTION
Pin Number Pin Number
(MSOP)
(MLF™)
Pin Name
Type
Pin Function
1
15
EN
TTL Input:
Enable: De-asserts true data output when low.
Default is high.
Incorporates 25kΩ pull-up to VCC.
2, 3
4
1, 4
6
DIN, /DIN
REF
Differential
Data Input
Differential data input. Each pin internally terminates to
REF through 50Ω.
Reference Voltage: Bypass with 0.01µF low ESR
capacitor from REF to VCC to stabilize SDLVL and REF.
5
14
SDLVL
Input:
Default is
Signal Detect Level Set: A resistor from this pin to VCC
sets the threshold for the data input amplitude at which
maximum sensitivity. the SD output will be asserted.
6
2, 3, 10, 11
GND
SD
Ground
Device ground. Exposed pad must be soldered
(or equivalent) to the same potential as the ground pins.
Exposed Pad Exposed Pad
7
7
Open Collector
TTL Output with
internal 4.75kΩ
pull-up resistor
Signal Detect: Asserts high when the data input amplitude
rises above the threshold set by SDLVL.
8, 9
10
9, 12
DOUT, /DOUT
VCC
Differential
CML Output
Differential data output.
5, 8, 13, 16
Power Supply
Positive power supply. Bypass with 0.1µF 0.01µF low
ESR capacitors. 0.01µF capacitors should be as close as
possible to VCC pins.
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
3
SY88843V
Micrel, Inc.
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (V ) .............................. +3.0V to +3.6V or
Supply Voltage (V ) ....................................... 0V to +7.0V
CC
CC
............................................................ +4.5V to +5.5V
EN, SDLVL Voltage................................................0 to V
CC
Ambient Temperature (T ) ......................... –40°C to +85°C
REF Current ...............................................................±1mA
SD Current .................................................................±5mA
DOUT, /DOUT Current .............................................±25mA
DIN, /DIN Current .....................................................±10mA
A
Junction Temperature (T ) ....................... –40°C to +120°C
J
(3)
Package Thermal Resistance
MLF™
θ
ψ
(Still-Air).....................................................61°C/W
................................................................................... 38°C/W
JA
Storage Temperature (T ) ....................... –65°C to +150°C
S
JB
Lead Temperature (Soldering, 20 sec.) .................... 260°C
EPAD-MSOP
(Still-Air).....................................................38°C/W
θ
JA
ψ
................................................................................... 22°C/W
JB
DC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C; typical values at VCC = 3.3V, TA = 25°C
Symbol
Parameter
Condition
Min
Typ
Max
Units
ICC
Power Supply Current
3.3V, Note 4
5V, Note 4
28
30
42
45
mA
mA
Power Supply Current
3.3V, Note 5
5V, Note 5
45
47
62
65
mA
mA
VREF
SDLVL
VOH
REF Voltage
VCC–1.3
V
V
V
SDLVL Voltage Range
DOUT, /DOUT HIGH Voltage
DOUT, /DOUT LOW Voltage
VREF
VCC
VCC
Note 6
VCC–0.020 VCC–0.005
VOL
3.3V, Note 6
5V, Note 6
VCC–0.475 VCC–0.400 VCC–0.350
VCC–0.510 VCC–0.400 VCC–0.350
V
V
VOFFSET
Differential Output Offset
Note 6
±80
mV
Ω
ZO
ZI
Single-Ended Output Impedance
Single-Ended Input Impedance
40
40
50
50
60
60
Ω
TTL DC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C
Symbol
VOH
VOL
VIH
Parameter
Condition
Min
Typ
Max
VCC
0.5
Units
SD Output HIGH Level
SD Output LOW Level
EN Input HIGH Voltage
EN Input LOW Voltage
EN Input HIGH Current
Sourcing 100µA
Sinking 2mA
2.4
V
V
V
V
2.0
VIL
0.8
IIH
VIN = 2.7V
VIN = VCC
20
100
µA
µA
IIL
EN Input LOW Current
VIN = 0.5V
–0.3
mA
Notes:
1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to Absolute Maximum Rating conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Thermal performance assumes the use of 4-layer PCB. Exposed pad must be soldered (or equivalent) to the device’s most negative potential on the
PCB.
4. Excludes current of CML output stage. See “Detailed Description.”
5. Total device current with no output load.
6. Output levels are based on a 50Ω to V load impedance. If the load impedance is different, the output level will be changed. Amplifier is in limiting
CC
mode.
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88843V
Micrel, Inc.
AC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C, RLOAD = 50Ω to VCC; typical values at VCC = 3.3V, TA = 25°C.
Symbol
PSRR
tr,tf
Parameter
Condition
Min
Typ
35
Max
Units
dB
Power Supply Rejection Ratio
Output Rise/Fall Time
(20% to 80%)
Note 7
Note 8
60
120
ps
tJITTER
Deterministic
Random
15
5
psPP
psRMS
VID
Differential Input Voltage Swing
Differential Output Voltage Swing
10
1800
mVPP
VOD
3.3V, Note 7
5V, Note 7
700
700
800
800
950
1020
mVPP
mVPP
HYS
tOFF
tON
SD Hysteresis
Note 9
2
4.6
0.1
0.2
8
dB
µs
SD Release Time
0.5
0.5
35
SD Assert Time
µs
VSR
SD Sensitivity Range
–3dB Bandwidth
Note 10
10
mVPP
GHz
dB
B–3dB
AV(Diff)
S21
2.0
38
32
Differential Voltage Gain
Single-Ended Small-Signal Gain
32
26
dB
Notes:
7. Amplifier in limiting mode. Input is a 200MHz square wave, t < 300ps.
r
8. Deterministic jitter measured using 2.488Gbps K28.5 pattern, V = 10mV . Random jitter measured using 2.488Gbps K28.7 pattern, V = 10mV .
pp
ID
pp
ID
9. Electrical signal.
10. This is the detectable range of input amplitudes that can de-assert SD. The input amplitude to assert SD is 2–8dB higher than the de-assert
amplitude. See “Typical Operating Characteristics” for graphs showing how to choose a particular V or R for a particular SD de-assert,
SDLVL
SDLVL
and its associated assert, amplitude. If increased SD sensitivity and hysteresis are required, an application note entitled “Notes on Sensitivity and
Hysteresis in Micrel Post Amplifiers” is available at http://www.micrel.com/product-info/app_hints+notes.shtml.
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88843V
Micrel, Inc.
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, TA = 25°C, RLOAD = 50Ω to VCC, unless otherwise stated.
10mVpp Input @3.2Gbps 231–1 PRBS
1.8Vpp Input @3.2Gbps 231–1 PRBS
TIME (50ps/div.)
TIME (50ps/div.)
V
to Assert/De-assert SD
V
to Assert/De-assert SD
ID
ID
Single-Ended Small-Signal
vs. R
vs. V
SDLVL
SDLVL
Gain vs. Frequency
100
10
1
100
10
1
40
35
30
25
20
15
10
5
0
0
0.2 0.4 0.6 0.8 1.0 1.2
– V (V)
0.1
1
10
(kΩ)
100
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
V
R
SDLVL
FREQUENCY (GHz)
CC
SDLVL
Differential Output Voltage
Swing vs. Temperature
Differential Output Voltage Swing
vs. Differential Input Voltage Swing
900
Power Supply Current
vs. Temperature
(Amplifier in Limiting Mode)
60
55
50
45
40
35
30
25
900
880
860
840
820
800
780
760
740
720
700
800
700
600
500
400
300
200
100
0
-40
-15
10
35
60
85
-40
-15
10
35
60
85
0
5 10 15 20 25 30 35 40 45 50
(mV
TEMPERATURE (°C)
TEMPERATURE (°C)
V
)
pp
ID
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88843V
Micrel, Inc.
DETAILED DESCRIPTION
Signal Detect-Level Set
The SY88843V low-power, limiting post amplifier operates
from a single +3.3V ±10% or +5V ±10% power supply, over
an industrial temperature range of –40°C to +85°C. Signals
A programmable, signal-detect level set pin sets the
threshold of the input amplitude detection. Connecting an
external resistor between VCC and SDLVL sets the voltage
with data rates up to 3.2Gbps and as small as 10mV can
PP
be amplified. Figure 1 shows the allowed input voltage swing.
The SY88843V generates an SD output, providing feedback
to EN for output stability. SDLVL sets the sensitivity of the
input amplitude detection.
at SDLVL. This voltage ranges from V
external resistor creates a voltage divider between V and
REF as shown in Figure 6. If desired, an appropriate external
voltage may be applied rather than using a resistor. The
to V
. The
CC
REF
CC
relationship between V
and R
is given by:
Input Amplifier/Buffer
SDLVL
SDLVL
The SY88843V’s inputs are internally terminated with 50Ω
to REF. Unless unaffected by this internal termination
scheme, upstream devices need to be AC-coupled to the
SY88843V’s inputs. Figure 2 shows a simplified schematic
of the input structure.
RSDLVL
VSDLVL = VCC –1.3
RSDLVL +2.8
where voltages are in volts and resistances are in kΩ.
The smaller the external resistor, which implies a smaller
voltage difference from SDLVL to VCC, the lower the SD
sensitivity. Hence, larger input amplitude is required to assert
SD. The “Typical Operating Characteristics” section contains
graphs showing the relationship between the input amplitude
The high sensitivity of the input amplifier detects and
amplifies as small as 10mV . The input amplifier allows
PP
input signals as large as 1800mV . Input signals are linearly
PP
amplified with a typically 38dB differential voltage gain. Since
it is a limiting amplifier, the SY88843V outputs typically
detection sensitivity and V
or R
.
SDLVL
SDLVL
800mV
voltage-limited waveforms for input signals that Hysteresis
PP
are greater than 10mV . Applications requiring the
PP
The SY88843V provides typically 4.6dB SD electrical
hysteresis. By definition, a power ratio measured in dB is
SY88843V to operate with high gain should have the
upstream TIA placed as close as possible to the SY88843V’s
input pins to ensure the device's best performance of the
device.
2
10log(power ratio). Power is calculated as V /R for an
IN
electrical signal. Hence, the same ratio can be stated as
20log(voltage ratio). While in linear mode, the electrical
voltage input changes linearly with the optical power and
the ratios change linearly. Therefore, the optical hysteresis
in dB is half the electrical hysteresis in dB given in the
datasheet. The SY88843V provides typically 2.3dB SD
optical hysteresis. As the SY88843V is an electrical device,
this datasheet refers to hysteresis in electrical terms. With
4.6dB SD hysteresis, a voltage factor of 1.7 is required to
assert SD.
Output Buffer
The SY88843V’s CML output buffer is designed to drive
50Ω lines. The output buffer requires appropriate termination
for proper operation. An external 50Ω resistor to VCC or
equivalent for each output pin provides buffer termination.
Figure 3 shows a simplified schematic of the output structure
and includes an appropriate termination method. Of course,
driving a downstream device with a CML input that is
internally terminated with 50Ω to VCC eliminates the need Hysteresis and Sensitivity Improvement
for external termination. As noted in the previous section,
If increased SD sensitivity and hysteresis are required,
the amplifier outputs, typically 800mV , waveforms across
PP
an application note entitled “Notes on Sensitivity and
Hysteresis in Micrel Post Amplifiers” is available at http://
www.micrel.com/product-info/app_hints+notes.shtml.
25Ω total loads. The output buffer, thus, switches typically
16mA tail-current. Figure 4 shows the power supply current
measurement which excludes the 16mA tail-current.
Signal Detect
The SY88843V incorporates a chatter-free, SD open-
collector TTL output with internal 4.75kΩ pull-up resistor as
shown in Figure 5. SD is used to determine that the input
amplitude large enough to be considered a valid input. SD
asserts high if the input amplitude rises above the threshold
set by SDLVL and de-asserts low otherwise. SD can be fed
back to the enable (EN) input to maintain output stability
under a loss-of-signal condition. EN de-asserts low the true
output signal without removing the input signals. Typically,
4.6dB SD hysteresis is provided to prevent chattering.
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88843V
Micrel, Inc.
DATA+
5mV (Min.)
VIS(mV)
900mV (Max.)
DATA–
(DATA+) – (DATA–)
10mV (Min.)
pp
VID(mV
pp
)
1800mV (Max.)
pp
Figure 1. V and V Definition
IS
ID
VCC
VCC
VCC
0.1µF
REF
50Ω
0.1µF
50Ω
VCC
50Ω
50Ω
Z0 = 50Ω
Z0 = 50Ω
DOUT
/DOUT
AC-Coupling
Capacitors
50Ω 50Ω
0.1µF
DIN
0.1µF
/DIN
16mA
AC-Coupling
Capacitors
ESD
STRUCTURE
ESD
STRUCTURE
GND
GND
Figure 3. Output Structure
Figure 2. Input Structure
VCC
VCC
ICC
16mA
4.75kΩ
SD
50Ω
50Ω
Figure 5. SD Output Structure
ESD
STRUCTURE
VCC
RSDLVL
16mA
SDLVL
2.8kΩ
GND
REF
Figure 4. Power Supply Current Measurement
Figure 6. SD
Setting Circuit
LVL
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88843V
Micrel, Inc.
TYPICAL APPLICATIONS CIRCUIT
VCC
SD
EN
0.1µF
0.1µF
0.1µF
DIN
/DIN
DOUT
/DOUT
From
Transimpedance
Amp.
To
CDR
SY88843V
0.1µF
SDLVL REF
GND
VCC
0.1µF
100kΩ
RELATED PRODUCT AND SUPPORT DOCUMENTATION
Part Number
Function
Data Sheet Link
SY88773V
3.3V/5V 3.2Gbps CML Low-Power,
Limiting Post Amplifier w/ TTL LOS
http://www.micrel.com/_PDF/HBW/sy88773v.pdf
http://www.micrel.com/_PDF/HBW/sy88823v.pdf
http://www.micrel.com/_PDF/HBW/sy88843v.pdf
http://www.micrel.com/_PDF/HBW/sy88973v.pdf
SY88823V
3.3V/5V 3.2Gbps CML Low-Power,
Limiting Post Amplifier w/ TTL SD
SY88843V
3.3V/5V 3.2Gbps CML Low-Power,
Limiting Post Amplifier w/ TTL SD
SY88973V
3.3V/5V 3.2Gbps CML Low-Power,
Limiting Post Amplifier w/ TTL LOS
Application Notes
Notes on Sensitivity and Hysteresis
in Micrel Post Amplifiers
http://www.micrel.com/product-info/app_hints+notes.shtml
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
9
SY88843V
Micrel, Inc.
10 LEAD EPAD-MSOP (K10-2)
+0.08
-0.08
+0.003
-0.003
+0.05
-0.05
+0.002
-0.002
+0.15
-0.15
+0.004
-0.004
+0.10
-0.10
+0.008
-0.008
+0.07
-0.08
+0.004
+0.003
+0.003
-0.004
-0.003
-0.003
+0.15
Rev.01
-0.15
+0.006
-0.006
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
10
SY88843V
Micrel, Inc.
16-PIN MicroLEADFRAME™ (MLF-16)
Package
EP- Exposed Pad
Die
CompSide Island
Heat Dissipation
Heat Dissipation
VEE
Heavy Copper Plane
Heavy Copper Plane
VEE
PCB Thermal Consideration for 16-Pin MLF™ Package
(Always solder, or equivalent, the exposed pad to the PCB)
Package Notes:
1. Package meets Level 2 qualification.
2. All parts are dry-packaged before shipment.
3. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
M9999-110905
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