SY88933V [MICREL]

3.3V/5V 1.25Gbps PECL LOW-POWER LIMITING POST AMPLIFIER; 3.3V / 5V 1.25Gbps的PECL低功率限幅后置放大器
SY88933V
型号: SY88933V
厂家: MICREL SEMICONDUCTOR    MICREL SEMICONDUCTOR
描述:

3.3V/5V 1.25Gbps PECL LOW-POWER LIMITING POST AMPLIFIER
3.3V / 5V 1.25Gbps的PECL低功率限幅后置放大器

放大器
文件: 总8页 (文件大小:65K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
3.3V/5V 1.25Gbps PECL LOW-POWER  
LIMITING POST AMPLIFIER  
w/TTL SIGNAL DETECT  
SY88933V  
Final  
DESCRIPTION  
FEATURES  
Single 3.3V or 5V power supply  
DC to 1.25Gbps operation  
The SY88933V low-power limiting post amplifier is  
designed for use in fiber-optic receivers. The device connects  
to typical transimpedance amplifiers (TIAs). The linear signal  
output from TIAs can contain significant amounts of noise  
and may vary in amplitude over time. The SY88933V  
quantizes these signals and outputs PECL level waveforms.  
Low noise PECL data outputs  
Chatter-free OC-TTL signal setect (SD) output with  
internal 6.75kpull-up resistor  
TTL EN input  
The SY88933V operates from a single +3.3V or +5V  
power supply, over temperatures ranging from –40°C to  
+85°C. With its wide bandwidth and high gain, signals with  
data rates up to 1.25Gbps and as small as 5mVp-p can be  
amplified to drive devices with PECL inputs.  
Programmable SD level set (SD  
)
LVL  
Available in a tiny 10-pin MSOP (3mm) package  
The SY88933V generates a TTL SD output. A  
programmable signal-detect level set pin (SD ) sets the  
LVL  
sensitivity of the input amplitude detection. SD asserts high  
APPLICATIONS  
if the input amplitude rises above the threshold set by SD  
LVL  
and deasserts low otherwise. EN deasserts the true output  
signal without removing the input signal. Typically 4.6dB  
SD hysteresis is provided to prevent chattering.  
1.25Gbps Ethernet  
1.55Mbps and 622Mbps SONET/SDH  
High-gain line driver and line receiver  
531Mbps and 1062Mbps Fibre Channel  
Gigabit interface converter  
TYPICAL APPLICATIONS CIRCUIT  
VCC  
SD  
EN  
DIN  
DOUT  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
From  
Transimpedance  
Amp.  
To  
CDR  
/DIN  
/DOUT  
SY88933V  
SDLVL  
VREF  
50Ω  
50Ω  
Rpd  
Rpd  
VCC  
GND  
GND  
0.1µF  
100kΩ  
For 3.3V, Rpd = 120Ω  
For 5V, Rpd = 220Ω  
Rev.: A  
Amendment: /0  
Issue Date: May 1, 2003  
1
SY88933V  
Micrel  
PACKAGE/ORDERING INFORMATION  
Ordering Information  
Package  
Operating  
Range  
Package  
Marking  
EN  
DIN  
1
2
3
4
5
10 VCC  
Part Number  
Type  
K10-1  
K10-1  
K10-1  
K10-1  
9
8
7
6
DOUT  
SY88933VKC  
SY88933VKCTR(Note 1)  
Commercial  
Commercial  
Industrial  
933V  
933V  
933V  
933V  
/DIN  
/DOUT  
SD  
VREF  
SDLVL  
SY88933VKI  
SY88933VKITR(Note 1)  
GND  
Industrial  
Note 1. Tape and Reel.  
10-Pin MSOP (K10-1)  
PIN DESCRIPTION  
Pin Number  
Pin Name  
Type  
Pin Function  
1
EN  
TTL Input:  
Enable: Deasserts true data output when high.  
Default is high.  
2
3
4
5
DIN  
/DIN  
Data Input  
Data Input  
True data input.  
Complementary data input.  
VREF  
SDLVL  
Reference voltage: capacitor here to VCC helps stabilize SDLVL  
Signal-Detect Level Set: a resistor from this pin to VCC sets the  
.
Input  
threshold for the data input amplitude at which SD will be asserted.  
6
7
GND  
SD  
Ground  
Device ground.  
Open-collector  
TTL output w/  
internal 6.75kΩ  
pull-up resistor  
Signal-Detect: asserts high when the data input amplitude rises above  
the threshold set by SDLVL  
.
8
9
/DOUT  
DOUT  
VCC  
PECL Output  
PECL Output  
Power Supply  
Complementary data output.  
True data output.  
10  
Positive power supply.  
2
SY88933V  
Micrel  
Absolute Maximum Ratings(Note 1)  
Operating Ratings(Note 2)  
Supply Voltage (V ) ....................................... 0V to +7.0V  
Supply Voltage (V ) .............................. +3.0V to +3.6V or  
CC  
CC  
............................................................ +4.5V to +5.5V  
Input Voltage (D , /D ) .........................................0 to V  
IN  
IN  
CC  
Ambient Temperature (T ), Note 3 ............ 40°C to +85°C  
Output Current (I  
)
A
OUT  
Continuous .............................................................50mA Junction Temperature (T ), Note 3 .......... 40°C to +120°C  
J
Surge.................................................................... 100mA  
Package Thermal Resistance  
MSOP  
EN Voltage .............................................................0 to V  
CC  
) Still-Air ..................................................113°C/W  
V
Current ......................................... 800µA to +500µA  
JA  
REF  
SD  
Voltage ................................................. V  
to V  
LVL  
REF CC  
Storage Temperature (T ) ....................... 55°C to +125°C  
S
Note 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is  
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG  
conditions for extended periods may affect device reliability.  
Note 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.  
Note 3. Commercial devices are guaranteed from 0°C to +85°C ambient temperature.  
DC ELECTRICAL CHARACTERISTICS  
VCC = 3.0V to 3.6V or 4.5V to 5.5V; RLOAD = 50to VCC2V; TA = 40°C to +85°C; typical values at VCC = 3.3V, TA = 25°C.  
Symbol  
ICC  
Parameter  
Condition  
Min  
Typ  
Max  
42  
Units  
mA  
V
Power Supply Current  
SDLVL Voltage  
No output load  
22  
SDLVL  
VIH  
VREF  
2.0  
VCC  
EN Input HIGH Voltage  
EN Input LOW Voltage  
EN Input HIGH Current  
V
VIL  
0.8  
V
IIH  
VIN = 2.7V  
VIN = VCC  
20  
100  
µA  
µA  
IIL  
EN Input LOW Current  
SD Output HIGH Level  
VIN = 0.5V  
0.3  
mA  
VOH  
VCC 3.3V  
2.4  
2.0  
V
V
VCC < 3.3V  
VOL  
SD Output LOW Level  
PECL Output HIGH Voltage  
PECL Output LOW Voltage  
Differential Output Offset  
Common Mode Range  
Reference Voltage  
IOL = +2mA  
0.5  
V
V
VOH  
50to VCC2V output load  
50to VCC2V output load  
VCC1.085 VCC0.955 VCC0.880  
VCC1.830 VCC1.705 VCC1.555  
±100  
VOL  
V
VOFFSET  
VIHCMR  
VREF  
mV  
V
Note 1  
Note 2  
GND +2.0  
VCC  
VCC1.38 VCC1.32 VCC1.26  
V
Note 1. The V  
range is referenced to the most positive side of the differential input signal.  
IHCMR  
Note 2. The current provided into or from V  
must be limited to 800µA source and 500µA sink.  
REF  
3
SY88933V  
Micrel  
AC ELECTRICAL CHARACTERISTICS  
VCC = 3.0V to 3.6V or 4.5V to 5.5V; RLOAD = 50to VCC2V; TA = 40°C to +85°C; typical values at VCC = 3.3V, TA = 25°C.  
Symbol  
HYS  
tOFF  
tON  
Parameter  
Condition  
Min  
Typ  
4.6  
0.1  
0.2  
Max  
Units  
dB  
SD Hysteresis  
electrical signal  
2
8
SD Release Time  
0.5  
0.5  
µs  
SD Assert Time  
µs  
VID  
Differential Input Voltage Swing  
Differential Output Voltage Swing  
5
5
1800 mVp-p  
VOD  
V
ID 18mVp-p  
1500  
400  
mVp-p  
mVp-p  
VID = 5mVp-p  
VSR  
SD Sensitivity Range  
Differential Voltage Gain  
3dB Bandwidth  
50  
mVp-p  
dB  
AV(Diff)  
B3dB  
S21  
38  
32  
1
GHz  
dB  
Single-Ended Small-Signal Gain  
26  
tr,tf  
Differential Output Rise/Fall Time  
(20% to 80%)  
VID > 100mVp-p and 50to VCC 2V load  
260  
ps  
TYPICAL OPERATING CHARACTERISTICS  
SD Assert and Deassert  
SD Assert and Deassert  
Levels vs. SD  
Levels vs. R  
LVL  
SDLVL  
120  
140  
120  
100  
80  
VSUP = 3.3V  
VSUP = 3.3V  
TA = 25°C  
100  
80  
60  
40  
20  
0
TA = 25°C  
1.25Gbps  
1.25Gbps  
Pattern 2231  
Pattern 2231  
ASSERT  
ASSERT  
60  
40  
DEASSERT  
20  
DEASSERT  
0
0
0.2 0.4 0.6 0.8  
1
1.2 1.4  
SD (referenced to V ) (V)  
LVL  
CC  
R
()  
SDLVL  
4
SY88933V  
Micrel  
DETAILED DESCRIPTION  
SD  
and deasserts low otherwise. SD can be fed back to  
The SY88933V low-power limiting post amplifier operates  
from a single +3.3V or +5V power supply, over temperatures  
from 40°C to +85°C. Signals with data rates up to 1.25Gbps  
and as small as 5mVp-p can be amplified. Figure 1 shows  
the allowed input voltage swing. The SY88933V generates  
LVL  
the enable (EN) input to maintain output stability under a  
loss of signal condition. EN deasserts the true output signal  
without removing the input signals. Typically 4.6dB SD  
hysteresis is provided to prevent chattering.  
an SD output. SD  
amplitude detection.  
sets the sensitivity of the input  
LVL  
Signal-Detect Level Set  
A programmable SD level set pin (SD ) sets the  
threshold of the input amplitude detection. Connecting an  
LVL  
Input Amplifier/Buffer  
external resistor between V  
and SD  
sets the voltage  
Figure 2 shows a simplified schematic of the SY88933V's  
input stage. The high-sensitivity of the input amplifier allows  
signals as small as 5mVp-p to be detected and amplified.  
The input amplifier allows input signals as large as  
1800mVp-p. Input signals are linearly amplified with a  
typically 38dB differential voltage gain. Since it is a limiting  
amplifier, the SY88933V outputs typically 1500mVp-p  
voltage-limited waveforms for input signals that are greater  
than 18mVp-p. Applications requiring the SY88933V to  
operate with high-gain should have the upstream TIA placed  
as close as possible to the SY88933Vs input pins to ensure  
the best performance of the device.  
CC  
LVL  
at SD . This voltages ranges from V  
to V  
. The  
REF  
LVL  
CC  
external resistor creates a voltage divider between V and  
CC  
V
as shown in Figure 5. If desired, an appropriate  
REF  
external voltage may be applied rather than using a resistor.  
The smaller the external resistor, implying a smaller voltage  
difference from SD  
to V , the smaller the SD sensitivity.  
LVL  
CC  
Hence, larger input amplitude is required to assert SD.  
Typical Operating Characteristicsshows the relationship  
between the input amplitude detection sensitivity and the  
SD  
voltage.  
LVL  
Hysteresis  
Output Buffer  
The SY88933V provides typically 4.6dB SD electrical  
hysteresis. By definition, a power ratio measured in dB is  
The SY88933Vs PECL output buffer is designed to drive  
50lines. The output buffer requires appropriate termination  
2
10log(power ratio). Power is calculated as V /R for an  
IN  
electrical signal. Hence the same ratio can be stated as  
20log(voltage ratio). While in linear mode, the electrical  
voltage input changes linearly with the optical power and  
hence the ratios change linearly. Therefore, the optical  
hysteresis in dB is half the electrical hysteresis in dB given  
in the datasheet. The SY88933V provides typically 2.3dB  
SD optical hysteresis. As the SY88933V is an electrical  
device, this datasheet refers to hysteresis in electrical terms.  
With 6dB SD hysteresis, a voltage factor of two is required  
to assert or deassert SD.  
for proper operation. An external 50resistor to V 2V  
CC  
for each output pin provides this. Figure 3 shows a simplified  
schematic of the output stage and includes an appropriate  
termination method.  
Signal-Detect  
The SY88933V generates a chatter-free SD open-collector  
TTL output with internal 6.75kpullup resistor as shown in  
Figure 4. SD is used to determine that the input amplitude  
is large enough to be considered a valid input. SD asserts  
high if the input amplitude rises above the threshold set by  
5
SY88933V  
Micrel  
DATA+  
2.5mV (Min.)  
900mV (Max.)  
VIS(mVp-p)  
VID(mVp-p)  
DATA—  
(DATA+) (DATA)  
5mVp-p (Min.)  
1800mVp-p (Max.)  
Figure 1. V and V Definitions  
IS  
ID  
VCC  
VCC  
ESD  
STRUCTURE  
DOUT  
/DOUT  
DIN  
/DIN  
ESD  
STRUCTURE  
GND  
GND  
Figure 2. Input Structure  
Figure 3. Output Structure  
VCC  
RSDLVL  
SDLVL  
VCC  
6.75kΩ  
3kΩ  
SD  
VREF  
Figure 4. SD Output Structure  
Figure 5. SD  
Setting Circuit  
LVL  
6
SY88933V  
Micrel  
FUNCTIONAL BLOCK DIAGRAM  
DOUT  
DIN  
Limiting  
Amplifer  
PECL  
Buffer  
/DIN  
/DOUT  
VREF  
VCC  
Enable  
EN  
SD  
Level  
Detect  
GND  
SDLVL  
DESIGN PROCEDURE  
Layout and PCB Design  
The SY88933Vs ground pin should be connected to the  
circuit board ground. Use multiple PCB vias close to the  
part to connect to ground. Avoid long, inductive runs which  
can degrade performance.  
Since the SY88933V is a high-frequency component,  
performance can be largely determined by the board layout  
and design. A common problem with high-gain amplifiers is  
the feedback from the large swing outputs to the input via  
the power supply.  
7
SY88933V  
Micrel  
10 LEAD MSOP (K10-1)  
Rev. 00  
MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA  
TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com  
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.  
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.  
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can  
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into  
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchasers  
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchasers own risk and Purchaser agrees to fully indemnify  
Micrel for any damages resulting from such use or sale.  
© 2003 Micrel, Incorporated.  
8

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