首页 |元器件品牌

SY89874U [MICREL]

2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION; 2.5GHz的任何DIFF 。 IN- TO- LVPECL与内部终端可编程时钟分频器/扇出缓冲器
SY89874U
型号： SY89874U
厂家： MICREL SEMICONDUCTOR    MICREL SEMICONDUCTOR
描述：

2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION
2.5GHz的任何DIFF 。 IN- TO- LVPECL与内部终端可编程时钟分频器/扇出缓冲器

时钟
文件： 总10页 (文件大小：111K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
 查看货源
®  
2.5GHz ANY DIFF. IN-TO-LVPECL  
PROGRAMMABLE CLOCK DIVIDER/  
®
Precision Edge  
SY89874U  
FANOUT BUFFER WITH INTERNAL TERMINATION  
FEATURES  
■ Integrated programmable clock divider and 1:2  
®
fanout buffer  
Precision Edge  
■ Guaranteed AC performance over temperature and  
voltage:  
• > 2.5GHz f  
DESCRIPTION  
MAX  
• < 250ps t /t  
• < 15ps within device skew  
This low-skew, low-jitter device is capable of accepting a  
high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDS or  
HSTL clock input signal and dividing down the frequency  
using a programmable divider ratio to create a frequency-  
locked, lower speed version of the input clock. Available divider  
ratios are 2, 4, 8 and 16, or straight pass-through. In a typical  
622MHz clock system this would provide availability of  
311MHz, 155MHz, 77MHz or 38MHz auxiliary clock  
components.  
r f  
■ Low jitter design:  
• < 10ps total jitter  
PP  
• < 1ps  
cycle-to-cycle jitter  
RMS  
■ Unique input termination and V pin for DC-coupled  
T
and AC-coupled Inputs; CML, PECL, LVDS and  
HSTL  
■ TTL/CMOS inputs for select and reset  
■ 100k EP compatible LVPECL outputs  
■ Parallel programming capability  
■ Programmable divider ratios of 1, 2, 4, 8 and 16  
■ Low voltage operation 2.5V or 3.3V  
■ Output disable function  
The differential input buffer has a unique internal termination  
design that allows access to the termination network through  
a V pin. This feature allows the device to easily interface to  
T
different logic standards. A V  
AC-coupled applications.  
reference is included for  
REF-AC  
The /RESET input asynchronously resets the divider. In  
the pass-through function (divide by 1) the /RESET  
synchronously enables or disables the outputs on the next  
falling edge of IN (rising edge of /N).  
■ –40°C to 85°C temperature range  
®
■ Available in 16-pin (3mm × 3mm) MLF package  
TYPICAL PERFORMANCE  
APPLICATIONS  
■ SONET/SDH line cards  
■ Transponders  
OC-12 to OC-3  
Translator/Divider  
■ High-end, multiprocessor sensors  
FUNCTIONAL BLOCK DIAGRAM  
LVDS  
622MHz  
Clock In  
LVPECL  
155.5MHz  
Clock Out  
Divide-by-4  
S2  
/RESET  
Enable  
FF  
622MHz In  
Enable  
MUX  
Q0  
IN  
/Q0  
MUX  
Q1  
IN  
VT  
Divided  
by  
2, 4, 8  
or 16  
R0  
R1  
/Q1  
/IN  
Q0  
/IN  
S0  
155.5MHz Out  
Decoder  
S1  
VREF-AC  
/Q0  
Precision Edge is a registered trademark of Micrel, Inc.  
MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.  
Rev.: D  
Amendment: /0  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: February 2007  
Precision Edge®  
SY89874U  
Micrel, Inc.  
PACKAGE/ORDERING INFORMATION  
Ordering Information(1)  
Package Operating  
Package  
Marking  
Lead  
Finish  
16 15 14 13  
Part Number  
Type  
Range  
1
2
12  
11  
10  
9
IN  
Q0  
SY89874UMI  
MLF-16  
MLF-16  
MLF-16  
Industrial  
Industrial  
Industrial  
874U  
874U  
Sn-Pb  
Sn-Pb  
/Q0  
VT  
SY89874UMITR(2)  
SY89874UMG(3)  
VREF-AC  
/IN  
3
4
Q1  
874U with  
NiPdAu  
/Q1  
Pb-Free bar line indicator Pb-Free  
874U with NiPdAu  
Pb-Free bar line indicator Pb-Free  
5
6
7
8
SY89874UMGTR(2, 3) MLF-16  
Industrial  
Notes:  
1. Contact factory for die availability. Dice are guaranteed at T = 25°C, DC Electricals only.  
A
2. Tape and Reel.  
®
16-Pin MLF (MLF-16)  
3. Pb-Free package is recommended for new designs.  
PIN DESCRIPTION  
Pin Number  
Pin Name  
Pin Function  
12, 9  
IN, /IN  
Differential Input: Internal 50Ω termination resistors to VT input. Flexible input accepts any  
differential input. See “Input Interface Applications” section.  
1, 2, 3, 4  
16, 15, 5  
Q0, /Q0  
Q1, /Q1  
Differential Buffered LVPECL Outputs: Divided by 1, 2, 4, 8 or 16. See “Truth Table.”  
Unused PECL outputs may be left floating with no impact on jitter performance.  
S0, S1, S2  
Select Pins: See “Truth Table.” LVTTL/CMOS logic levels. Internal 25kΩ pull-up  
resistor. Logic HIGH if left unconnected (divided by 16 mode.) Input threshold is VCC/2.  
6
8
NC  
No Connect.  
/RESET  
/DISABLE  
LVTTL/CMOS Logic Levels: Internal 25kΩ pull-up resistor. Logic HIGH if left unconnected.  
Apply LOW to reset the divider (divided by 2, 4, 8 or 16 mode). Also acts as a synchronous  
disable/enable function. The reset and disable function occurs on the next high-to-low  
clock input transition. Input threshold is VCC/2.  
10  
11  
VREF-AC  
VT  
Reference Voltage: Equal to VCC–1.4V (approx.). Used for AC-coupled applications only.  
Decouple the VREF-AC pin with a 0.01µF capacitor. See “Input Interface Applications” section.  
Termination Center-Tap: For CML or LVDS inputs, leave this pin floating. Otherwise, see  
Figures 2a to 2f “Input Interface Applications” section.  
7, 14  
13  
VCC  
GND  
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitor.  
Ground.  
TRUTH TABLE  
/RESET(1) S2  
S1  
X
0
S0 Outputs  
1
1
0
1
1
1
1
1
X
0
1
0
1
X
Reference Clock (pass through)  
Reference Clock ÷2  
1
0
Reference Clock ÷4  
1
1
Reference Clock ÷8  
1
1
Reference Clock ÷16  
0(1)  
X
Q = LOW, /Q = HIGH  
Clock Disable  
Note 1. Reset/Disable function is asserted on the next clock input  
(IN, /IN) high-to-low transition.  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
2
Precision Edge®  
SY89874U  
Micrel, Inc.  
Absolute Maximum Ratings(Note 1)  
Operating Ratings(Note 2)  
Supply Voltage (V ) .................................. –0.5V to +4.0V Supply Voltage (V ) ................+3.3V ±10% or +2.5V ±5%  
CC  
CC  
Input Voltage (V ) .................................. –0.5V to V +0.3 Ambient Temperature (T ) ......................... –40°C to +85°C  
IN  
CC  
A
ECL Output Current (I  
)
Package Thermal Resistance  
OUT  
®
MLF (θ )  
JA  
Continuous .........................................................50mA  
Surge ................................................................100mA  
Still-Air .............................................................60°C/W  
500lfpm............................................................54°C/W  
Input Current IN, /IN (I ) ..........................................±50mA  
IN  
®
MLF (ψ ), Note 4  
JB  
V Current (I ) ......................................................±100mA  
T
VT  
Junction-to-Board ............................................32°C/W  
V
Sink/Source Current (I  
), Note 3 .......±2mA  
REF-AC  
VREF-AC  
Lead Temperature (soldering 20 sec.) ...................... 260°C  
Storage Temperature (T ) ....................... –65°C to +150°C  
S
Note 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is  
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng  
conditions for extended periods may affect device reliability.  
Note 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.  
Note 3. Due to the limited drive capability use for input of the same package only.  
Note 4. Junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the pcb.  
(Notes 1, 2)  
DC ELECTRICAL CHARACTERISTICS  
TA= –40°C to +85°C; Unless otherwise stated.  
Symbol  
VCC  
Parameter  
Condition  
Min  
Typ  
Max  
3.63  
75  
Units  
V
Power Supply  
2.375  
ICC  
Power Supply Current  
No load, max. VCC  
50  
mA  
Ω
RIN  
Differential Input Resistance  
(IN-to-/IN)  
90  
100  
110  
VIH  
Input High Voltage (IN, /IN)  
Input Low Voltage (IN, /IN)  
Input Voltage Swing  
Note 3  
0.1  
–0.3  
0.1  
0.2  
–
–
–
–
–
–
VCC+0.3  
VCC+0.2  
3.6  
V
V
VIL  
Note 3  
VIN  
Notes 3, 4  
Notes 3, 4, 5  
Note 3  
V
VDIFF_IN  
|IIN|  
Differential Input Voltage Swing  
Input Current (IN, /IN)  
V
45  
mA  
V
VREF-AC  
Reference Voltage  
Note 6  
VCC–1.525 VCC–1.425 VCC–1.325  
Note 1. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.  
Note 2. Specification for packaged product only.  
Note 3. Due to the internal termination (see “Input Structures” ) the input current depends on the applied voltages at IN, /IN and V inputs. Do not apply  
T
a combination of voltages that causes the input current to exceed the maximum limit!  
Note 4. See “Timing Diagram” for V definition. V (Max) is specified when V is floating.  
IN  
IN  
T
Note 5. See “Typical Operating Characteristics” section for V  
definition.  
DIFF  
Note 6. Operating using V is limited to AC-coupled PECL or CML applications only. Connect directly to V pin.  
IN  
T
(Notes 1, 2)  
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS  
VCC = 3.3V ±10% or 2.5V ±5%; TA = –40°C to +85°C, RL = 50Ω to VCC –2V; Unless otherwise stated.  
Symbol  
VOH  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
V
Output High Voltage  
Output Low Voltage  
Output Voltage Swing  
Differential Output Voltage Swing  
VCC–1.145 VCC–1.020 VCC–0.895  
VCC–1.945 VCC–1.820 VCC–1.695  
VOL  
V
VOUT  
550  
800  
1050  
2.10  
mV  
V
VDIFF_OUT  
1.10  
1.60  
Note 1. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.  
Note 2. Specification for packaged product only.  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
3
Precision Edge®  
SY89874U  
Micrel, Inc.  
(Notes 1, 2)  
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS  
VCC = 3.3V ±10% or 2.5V ±5%; TA = –40°C to +85°C; Unless otherwise stated.  
Symbol  
VIH  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
V
Input HIGH Voltage  
Input LOW Voltage  
Input HIGH Current  
Input LOW Current  
2.0  
VIL  
0.8  
20  
V
IIH  
–125  
µA  
µA  
IIL  
–300  
Note 1. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.  
Note 2. Specification for packaged product only.  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
4
Precision Edge®  
SY89874U  
Micrel, Inc.  
(Notes 1, 2)  
AC ELECTRICAL CHARACTERISTICS  
VCC = 3.3V ±10% or 2.5V ±5%; TA = –40°C to +85°C; Unless otherwise stated.  
Symbol  
Parameter  
Condition  
Min  
2.5  
Typ  
Max  
Units  
GHz  
GHz  
ps  
fMAX  
Maximum Output Toggle Frequency Output Swing ≥ 400mV  
Maximum Input Frequency  
Divide by 2, 4, 8, 16  
Input Swing < 400mV  
Input Swing ≥ 400mV  
Note 3  
3.2  
tPD  
Differential Propagation Delay  
IN to Q  
540  
480  
650  
600  
7
790  
730  
15  
ps  
tSKEW  
Within-Device Skew (diff.)  
Q0–Q1  
ps  
Part-to-Part Skew (diff.)  
Reset Recovery Time  
Cycle-to-Cycle Jitter  
Total Jitter  
Note 3  
Note 4  
Note 5  
Note 6  
250  
ps  
ps  
tRR  
600  
70  
Tjitter  
1
psRMS  
psPP  
ps  
10  
tr,tf  
Rise/Fall Time (20% to 80%)  
150  
250  
Note 1. Measured with 400mV input signal, 50% duty cycle, all outputs loaded with 50Ω to V –2V, unless otherwise stated.  
CC  
Note 2. Specification for packaged product only.  
Note 3. Skew is measured between outputs under identical transitions.  
Note 4. See “Timing Diagram.”  
Note 5. Cycle-to-cycle jitter definition: the variation in period between adjacent cycles over a random sample of adjacent cycle pairs. T  
=T –T  
,
jitter_cc  
n
n+1  
where T is the time between rising edges of the output signal.  
12  
Note 6. Total jitter definition: with an ideal clock input, of frequency ≤ f  
(device), no more than one output edge in 10 output edges will deviate by more  
MAX  
than the specified peak-to-peak jitter value.  
TIMING DIAGRAM  
/RESET  
VCC/2  
tRR  
IN  
VIN  
/IN  
VIN Swing  
tPD  
/Q  
Q
V
OUT Swing  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
5
Precision Edge®  
SY89874U  
Micrel, Inc.  
TYPICAL OPERATING CHARACTERISTICS  
V
= 3.3V, V = 400mV, T = 25°C, unless otherwise stated.  
IN  
A
CC  
QA Output Amplitude  
vs. Frequency  
IN to Q Propagation Delay  
vs. Input Swing  
IN to Q Propagation Delay  
vs. Temperature  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
800  
700  
600  
500  
400  
0
200 400 600 800 1000 1200  
INPUT SWING (mV)  
-40 -20  
0
20 40 60 80 100 120  
TEMPERATURE (°C)  
FREQUENCY (MHz)  
622MHz Output  
1.25GHz Output  
/Q  
/Q  
Q
Q
TIME (200ps/div.)  
TIME (200ps/div.)  
2.5GHz Output  
/Q  
Q
TIME (100ps/div.)  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
6
Precision Edge®  
SY89874U  
Micrel, Inc.  
DEFINITION OF SINGLE-ENDED AND DIFFERENTIAL SWING  
VIN, VOUT  
VDIFF_IN, VDIFF_OUT  
800mV  
(typical)  
1600mV (typical)  
Figure 1a. Single-Ended Swing  
Figure 1b. Differential Swing  
INPUT BUFFER STRUCTURE  
VCC  
VCC  
1.86kΩ  
1.86kΩ  
1.86kΩ  
1.86kΩ  
25kΩ  
R
R
S0  
S1  
S2  
/RESET  
IN  
VT  
50Ω  
50Ω  
GND  
GND  
/IN  
Figure 2a. Simplified Differential Input Buffer  
Figure 2b. Simplified TTL/CMOS Input Buffer  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
7
Precision Edge®  
SY89874U  
Micrel, Inc.  
INPUT INTERFACE APPLICATIONS  
VCC  
VCC  
VCC  
VCC  
VCC  
VCC  
IN  
PECL  
GND  
IN  
IN  
/IN  
VT  
CML  
CML  
SY89874U  
/IN  
/IN  
VCC–2V*  
SY89874U  
SY89874U  
0.01µF  
50Ω  
GND  
GND  
VT  
NC  
NC  
VT  
VCC  
NC  
VREF-AC  
VREF-AC  
VREF-AC  
VCC  
* Bypass with 0.01µF to GND  
0.01µF  
Figure 3b. AC-Coupled CML  
Input Interface  
Figure 3a. DC-Coupled CML  
Input Interface  
Figure 3c. DC-Coupled PECL  
Input Interface  
VCC  
VCC  
VCC  
VCC  
VCC  
VCC  
IN  
IN  
PECL  
IN  
HSTL  
/IN  
LVDS  
/IN  
Rpd  
*
Rpd  
*
SY89874U  
/IN  
SY89874U  
SY89874U  
VT  
VCC  
GND  
VT  
GND  
NC  
NC  
VT  
GND  
GND  
VREF-AC  
NC  
GND  
VREF-AC  
0.01µF  
*Note. 3.3V = Rpd = 100Ω  
2.5V = Rpd = 50Ω  
VREF-AC  
Figure 3d. AC-Coupled PECL  
Input Interface  
Figure 3e. LVDS  
Input Interface  
Figure 3f. HSTL  
Input Interface  
RELATED PRODUCT AND SUPPORT DOCUMENTATION  
Part Number  
Function  
Data Sheet Link  
SY89871U  
2.5GHz Any Diff. In-to-LVPECL  
Programmable Clock Divider/Fanout Buffer  
w/Internal Termination  
http://www.micrel.com/product-info/products/sy89871u.shtml  
MLF® Application Note  
http://www.amkor.com/products/notes_papers/mlf_appnote_0902.pdf  
http://www.micrel.com/product-info/products/solutions.shtml  
HBW Solutions  
New Products and Applications  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
8
Precision Edge®  
SY89874U  
Micrel, Inc.  
LVPECL OUTPUT TERMINATION RECOMMENDATIONS  
+3.3V  
R1  
R1  
+3.3V  
130Ω  
130Ω  
+3.3V  
ZO = 50Ω  
O = 50Ω  
Z
R2  
82Ω  
R2  
82Ω  
Vt = VCC –2V  
Figure 4a. Parallel Termination–Thevenin Equivalent  
Note 1. For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω  
+3.3V  
+3.3V  
Z = 50Ω  
Z = 50Ω  
50Ω  
50Ω  
“source”  
“destination”  
(Optional)  
C1  
50Ω  
R
b
0.01µF  
Figure 4b. Three-Resistor “Y–Termination”  
Note 1. Power-saving alternative to Thevenin termination.  
Note 2. Place termination resistors as close to destination inputs as possible.  
Note 3. R resistor sets the DC bias voltage, equal to V . For +3.3V systems R = 46Ω to 50Ω. For +2.5V systems R = 39Ω  
b
t
b
b
Note 4. C1 is an optional bypass capacitor intended to compensate for any t /t mismatches.  
r
f
+3.3V  
+3.3V  
R1  
Vt = VCC –1.3V  
R1  
130Ω  
R3  
+3.3V  
+3.3V  
130Ω  
1kΩ  
Q
Z
O = 50Ω  
/Q  
R4  
1.6kΩ  
Vt = VCC –2V  
R2  
82Ω  
R2  
82Ω  
Figure 4d. Terminating Unused I/O  
Note 1. Unused output (/Q) must be terminated to balance the output.  
Note 2. For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω, R3 = 1.25kΩ, R4 = 1.2kΩ.  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
9
Precision Edge®  
SY89874U  
Micrel, Inc.  
®
16-PIN MicroLeadFrame (MLF-16)  
Package  
EP- Exposed Pad  
Die  
CompSide Island  
Heat Dissipation  
Heat Dissipation  
VEE  
Heavy Copper Plane  
Heavy Copper Plane  
®
VEE  
PCB Thermal Consideration for 16-Pin MLF Package  
(Always solder, or equivalent, the exposed pad to the PCB)  
Package Notes:  
Note 1. Package meets Level 2 moisture sensitivity classification, and is shipped in dry-pack form.  
Note 2. Exposed pads must be soldered to a ground for proper thermal management.  
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA  
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com  
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.  
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.  
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can  
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into  
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s  
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify  
Micrel for any damages resulting from such use or sale.  
© 2005 Micrel, Incorporated.  
M9999-020707  
hbwhelp@micrel.com or (408) 955-1690  
10  

相关型号：

SY89874UMG

 2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION
MICREL

SY89874UMGTR

 2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION
MICREL

SY89874UMI

 2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION
MICREL

SY89874UMITR

 2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION
MICREL

SY89874U_07

 2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION
MICREL

SY89874U_08

 2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER
MICREL

SY89875U

 2.5V, 2.0GHz ANY DIFF. IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER AND 1;2 FANOUT BUFFER W/ INTERNAL TERMINATION
MICREL

SY89875UMG

 2.5V, 2.0GHz ANY DIFF. IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER AND 1:2 FANOUT BUFFER W/ INTERNAL TERMINATION
MICREL

SY89875UMG

 89875 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16
MICROCHIP

SY89875UMG-TR

 89875 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16
MICROCHIP

SY89875UMGTR

 2.5V, 2.0GHz ANY DIFF. IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER AND 1:2 FANOUT BUFFER W/ INTERNAL TERMINATION
MICREL

SY89875UMGTR

 89875 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16, 3 X 3 MM, LEAD FREE, MLF-16
MICROCHIP
©2020 ICPDF网 联系我们和版权申明