24AA02TE/SN [MICROCHIP]
2K I2C Serial EEPROM; 2K I2C串行EEPROM型号: | 24AA02TE/SN |
厂家: | MICROCHIP |
描述: | 2K I2C Serial EEPROM |
文件: | 总24页 (文件大小:325K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
24AA02/24LC02B
2K I2C™ Serial EEPROM
Device Selection Table
Description
The Microchip Technology Inc. 24AA02/24LC02B
Part
VCC
Max Clock
Temp
(24XX02*) is a 2 Kbit Electrically Erasable PROM. The
device is organized as one block of 256 x 8-bit memory
with a 2-wire serial interface. Low-voltage design
permits operation down to 1.8V, with standby and
active currents of only 1 µA and 1 mA, respectively.
The 24XX02 also has a page write capability for up to
8 bytes of data. The 24XX02 is available in the
standard 8-pin PDIP, surface mount SOIC, TSSOP and
MSOP packages and is also available in the 5-lead
SOT-23 package.
Number
Range
Frequency
Ranges
24AA02
1.8-5.5
2.5-5.5
400 kHz(1)
400 kHz
I
24LC02B
I, E
Note 1: 100 kHz for VCC <2.5V
Features
• Single supply with operation down to 1.8V
• Low-power CMOS technology
- 1 mA active current typical
Package Types
- 1 µA standby current typical (I-temp)
• Organized as 1 block of 256 bytes (1 x 256 x 8)
• 2-wire serial interface bus, I2C™ compatible
• Schmitt Trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
PDIP/SOIC/TSSOP/MSOP
SOT-23-5
A0
A1
1
2
3
4
8
7
6
5
Vcc
WP
WP
Vcc
1
5
4
SCL
2
3
Vss
A2
SCL
SDA
• 100 kHz (24AA02) and 400 kHz (24LC02B)
compatibility
SDA
Vss
• Self-timed write cycle (including auto-erase)
• Page write buffer for up to 8 bytes
• 2 ms typical write cycle time for page write
• Hardware write-protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
Note:
Pins A0, A1 and A2 are not used by the
24XX02. (No internal connections).
Block Diagram
HV
WP
Generator
• 1,000,000 erase/write cycles
• Data retention > 200 years
• 8-lead PDIP, SOIC, TSSOP and MSOP packages
• 5-lead SOT-23 package
I/O
Memory
Control
Logic
EEPROM
Array
Control
Logic
XDEC
• Pb-free finish available
Page
Latches
• Available for extended temperature ranges:
- Industrial (I): -40°C to +85°C
I/O
SCL
- Automotive (E): -40°C to +125°C
YDEC
SDA
VCC
VSS
Sense Amp.
R/W Control
2003 Microchip Technology Inc.
DS21709C-page 1
24AA02/24LC02B
1.0
ELECTRICAL CHARACTERISTICS
(†)
Absolute Maximum Ratings
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-65°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
VCC = +1.8V to +5.5V
DC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
No.
D1
D2
D3
D4
VIH
—
WP, SCL and SDA pins
High-level input voltage
Low-level input voltage
—
—
—
—
—
—
—
—
V
—
0.7 VCC
—
—
VIL
0.3 VCC
—
V
—
VHYS
Hysteresis of Schmitt
Trigger inputs
0.05 VCC
V
(Note)
D5
D6
D7
D8
VOL
ILI
Low-level output voltage
Input leakage current
Output leakage current
—
—
—
—
—
—
—
—
0.40
±1
V
IOL = 3.0 mA, VCC = 2.5V
VIN = .1V to VCC
µA
µA
pF
ILO
±1
VOUT = .1V to VCC
CIN,
Pin capacitance
10
VCC = 5.0V (Note)
COUT
(all inputs/outputs)
TA = 25°C, FCLK = 1 MHz
D9
ICC write Operating current
—
—
0.1
3
1
mA
mA
VCC = 5.5V, SCL = 400 kHz
—
D10
D11
ICC read
0.05
ICCS
Standby current
—
—
0.01
—
1
5
µΑ
µΑ
Industrial
Automotive
SDA = SCL = VCC
WP = VSS
Note:
This parameter is periodically sampled and not 100% tested.
DS21709C-page 2
2003 Microchip Technology Inc.
24AA02/24LC02B
TABLE 1-2:
AC CHARACTERISTICS
VCC = +1.8V to +5.5V
AC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C
Automotive (E):
TA = -40°C to +125°C
Param.
Sym
Characteristic
Clock frequency
Min
Typ
Max
Units
Conditions
No.
1
2
3
4
FCLK
THIGH
TLOW
TR
—
—
—
—
400
100
kHz 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
2.5V ≤ VCC ≤ 5.5V
Clock high time
Clock low time
600
4000
—
—
—
—
ns
ns
ns
1.8V ≤ VCC < 2.5V (24AA02)
1300
4700
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
SDA and SCL rise time
(Note 1)
—
—
—
—
300
1000
2.5V ≤ VCC ≤ 5.5V (Note 1)
1.8V ≤ VCC < 2.5V (24AA02)
(Note 1)
5
TF
SDA and SCL fall time
—
—
—
300
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
6
THD:STA Start condition hold time
600
4000
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
7
TSU:STA Start condition setup
time
600
4700
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
8
THD:DAT Data input hold time
0
—
—
—
(Note 2)
9
TSU:DAT Data input setup time
100
250
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
10
11
12
TSU:STO Stop condition setup
time
600
4000
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
TAA
Output valid from clock
(Note 2)
—
—
—
—
900
3500
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
TBUF
Bus free time: Time the
bus must be free before
a new transmission can
start
1300
4700
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
13
14
TOF
TSP
Output fall time from VIH 20+0.1CB
—
—
250
250
ns
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA02)
minimum to VIL
maximum
—
Input filter spike
suppression
—
—
50
(Notes 1 and 3)
(SDA and SCL pins)
15
16
TWC
—
Write cycle time (byte or
page)
—
—
—
5
ms
—
Endurance
1M
—
cycles 25°C, (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site:
www.microchip.com.
2003 Microchip Technology Inc.
DS21709C-page 3
24AA02/24LC02B
FIGURE 1-1:
BUS TIMING DATA
5
4
2
3
SCL
7
8
9
10
6
SDA
IN
14
12
11
SDA
OUT
FIGURE 1-2:
BUS TIMING START/STOP
D4
SCL
SDA
6
7
10
Start
Stop
DS21709C-page 4
2003 Microchip Technology Inc.
24AA02/24LC02B
3.4
Data Valid (D)
2.0
FUNCTIONAL DESCRIPTION
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The 24XX02 supports a bidirectional, 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, while a device
receiving data is defined as a receiver. The bus has to
be controlled by a master device which generates the
serial clock (SCL), controls the bus access and gener-
ates the Start and Stop conditions, while the 24XX02
works as slave. Both master and slave can operate as
transmitter or receiver, but the master device
determines which mode is activated.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of data
bytes transferred between Start and Stop conditions is
determined by the master device and is, theoretically,
unlimited (although only the last sixteen will be stored
when doing a write operation). When an overwrite does
occur, it will replace data in a first-in first-out (FIFO)
fashion.
3.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
3.5
Acknowledge
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
Accordingly, the following bus conditions have been
defined (Figure 3-1).
Note:
The 24XX02 does not generate any
Acknowledge bits if an internal
programming cycle is in progress.
3.1
Bus not Busy (A)
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must signal an end of
data to the slave by not generating an Acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (24XX02) will leave the data line
high to enable the master to generate the Stop
condition.
Both data and clock lines remain high.
3.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
3.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
FIGURE 3-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(A)
(B)
(D)
(D)
(C) (A)
SCL
SDA
Start
Condition
Stop
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
2003 Microchip Technology Inc.
DS21709C-page 5
24AA02/24LC02B
FIGURE 3-2:
CONTROL BYTE
ALLOCATION
3.6
Device Addressing
A control byte is the first byte received following the
Start condition from the master device. The control byte
consists of a four-bit control code. For the 24XX02, this
is set as ‘1010’ binary for read and write operations.
The next three bits of the control byte are ‘don’t care’s’
for the 24XX02.
START
READ/WRITE
R/W
A
SLAVE ADDRESS
The last bit of the control byte defines the operation to
be performed. When set to ‘1’, a read operation is
selected. When set to ‘0’, a write operation is selected.
Following the Start condition, the 24XX02 monitors the
SDA bus checking the device type identifier being
transmitted and, upon a ‘1010’ code, the slave device
outputs an Acknowledge signal on the SDA line.
Depending on the state of the R/W bit, the 24XX02 will
select a read or write operation.
1
0
1
0
X
X
X
X = ‘Don’t care’
Control
Code
Operation
Block Select
R/W
Read
Write
Block Address
Block Address
1010
1010
1
0
DS21709C-page 6
2003 Microchip Technology Inc.
24AA02/24LC02B
master has transmitted a Stop condition. Upon receipt
of each word, the four lower-order address pointer bits
are internally incremented by ‘1’. The higher-order 7
bits of the word address remain constant. If the master
should transmit more than 8 words prior to generating
the Stop condition, the address counter will roll over and
the previously received data will be overwritten. As with
the byte write operation, once the Stop condition is
received an internal write cycle will begin (Figure 4-2).
4.0
4.1
WRITE OPERATION
Byte Write
Following the Start condition from the master, the
device code (4 bits), the block address (3 bits, ‘don’t
cares’) and the R/W bit which is a logic low, is placed
onto the bus by the master transmitter. This indicates to
the addressed slave receiver that a byte with a word
address will follow once it has generated an Acknowl-
edge bit during the ninth clock cycle. Therefore, the
next byte transmitted by the master is the word address
and will be written into the address pointer of the
24XX02. After receiving another Acknowledge signal
from the 24XX02, the master device will transmit the
data word to be written into the addressed memory
location. The 24XX02 acknowledges again and the
master generates a Stop condition. This initiates the
internal write cycle and, during this time, the 24XX02
will not generate Acknowledge signals (Figure 4-1).
Note:
Page write operations are limited to writing
bytes within single physical page
a
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and end at addresses that are
integer multiples of [page size - 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
4.2
Page Write
The write-control byte, word address and the first data
byte are transmitted to the 24XX02 in the same way as
in a byte write. However, instead of generating a Stop
condition, the master transmits up to 8 data bytes to the
24XX02, which are temporarily stored in the on-chip
page buffer and will be written into memory once the
FIGURE 4-1:
BYTE WRITE
S
T
A
R
T
S
T
O
P
BUS ACTIVITY
MASTER
CONTROL
BYTE
WORD
ADDRESS
DATA
SDA LINE
S
P
A
C
K
A
C
K
A
C
K
BUS ACTIVITY
FIGURE 4-2:
PAGE WRITE
S
S
T
T
BUS ACTIVITY
MASTER
CONTROL
BYTE
WORD
ADDRESS (n)
A
O
P
DATA (n)
DATA (n + 1)
DATA (n + 7)
R
T
S
SDA LINE
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY
2003 Microchip Technology Inc.
DS21709C-page 7
24AA02/24LC02B
5.0
ACKNOWLEDGE POLLING
6.0
WRITE PROTECTION
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W = 0). If the device is still
busy with the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next Read or
Write command. See Figure 5-1 for a flow diagram of
this operation.
The 24XX02 can be used as a serial ROM when the
WP pin is connected to VCC. Programming will be
inhibited and the entire memory will be write-protected.
FIGURE 5-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
No
Yes
Next
Operation
DS21709C-page 8
2003 Microchip Technology Inc.
24AA02/24LC02B
7.3
Sequential Read
7.0
READ OPERATION
Sequential reads are initiated in the same way as a
random read, except that once the 24XX02 transmits
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24XX02 to transmit the next sequentially-
addressed 8-bit word (Figure 7-3).
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
7.1
Current Address Read
To provide sequential reads, the 24XX02 contains an
internal address pointer that is incremented by one
upon completion of each operation. This address
pointer allows the entire memory contents to be serially
read during one operation.
The 24XX02 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by ‘1’. Therefore, if the previous access
(either a read or write operation) was to address n, the
next current address read operation would access data
from address n + 1. Upon receipt of the slave address
with R/W bit set to ‘1’, the 24XX02 issues an acknowl-
edge and transmits the 8-bit data word. The master will
not acknowledge the transfer but does generate a Stop
condition and the 24XX02 discontinues transmission
(Figure 7-1).
7.4
Noise Protection
The 24XX02 employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 1.5V at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation, even on a noisy bus.
7.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is accomplished by sending the word
address to the 24XX02 as part of a write operation.
Once the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the inter-
nal address pointer is set. The master then issues the
control byte again, but with the R/W bit set to a ‘1’. The
24XX02 will then issue an acknowledge and transmit
the 8-bit data word. The master will not acknowledge
the transfer but does generate a Stop condition and the
24XX02 will discontinue transmission (Figure 7-2).
FIGURE 7-1:
CURRENT ADDRESS READ
S
BUS ACTIVITY
MASTER
T
A
R
CONTROL
BYTE
S
T
DATA (n)
O
P
T
SDA LINE
S
P
A
C
K
N
O
BUS ACTIVITY
A
C
K
2003 Microchip Technology Inc.
DS21709C-page 9
24AA02/24LC02B
FIGURE 7-2:
RANDOM READ
S
S
T
A
R
T
T
A
R
T
S
T
O
P
BUS ACTIVITY
MASTER
CONTROL
BYTE
WORD
ADDRESS (n)
CONTROL
BYTE
DATA (n)
S
P
S
SDA LINE
A
C
K
A
C
K
A
C
K
N
O
BUS ACTIVITY
A
C
K
FIGURE 7-3:
SEQUENTIAL READ
S
T
O
P
BUS ACTIVITY CONTROL
MASTER
BYTE
DATA (n)
DATA (n + 1)
DATA (n + 2)
DATA (n + X)
SDA LINE
P
A
C
K
A
C
K
A
C
K
A
C
K
N
O
BUS ACTIVITY
A
C
K
DS21709C-page 10
2003 Microchip Technology Inc.
24AA02/24LC02B
8.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 8-1.
TABLE 8-1:
Name
PIN FUNCTION TABLE
PDIP
SOIC
TSSOP
MSOP
SOT23
Description
A0
A1
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
—
—
—
2
Not Connected
Not Connected
A2
Not Connected
VSS
SDA
SCL
WP
VCC
Ground
3
Serial Address/Data I/O
Serial Clock
1
5
Write-Protect Input
+1.8V to 5.5V Power Supply
4
8.1
Serial Address/Data Input/Output
(SDA)
8.3
Write-Protect (WP)
The WP pin must be connected to either VSS or VCC.
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an open-
drain terminal, the SDA bus requires a pull-up resistor
to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz).
If tied to VSS, normal memory operation is enabled
(read/write the entire memory 00-FF).
If tied to VCC, write operations are inhibited. The entire
memory will be write-protected. Read operations are
not affected.
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
This feature allows the user to use the 24XX02 as a
serial ROM when WP is enabled (tied to VCC).
8.2
Serial Clock (SCL)
8.4
A0, A1, A2
The SCL input is used to synchronize the data transfer
to and from the device.
These A0, A1 and A2 pins are not used by the 24XX02.
They may be left floating or tied to either VSS or VCC.
2003 Microchip Technology Inc.
DS21709C-page 11
24AA02/24LC02B
9.0
9.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil)
Example:
XXXXXXXX
XXXXXNNN
24LC02B
I/P13F
YYWW
0327
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
XXXXYYWW
24LC02B
I/SN0327
NNN
13F
Example:
8-Lead TSSOP
4L02
I327
13F
XXXX
XYWW
NNN
TSSOP/MSOP
Marking Codes
Example:
8-Lead MSOP
Part
Number
XXXXXX
4L02BI
32713F
STD
Pb-Free
YWWNNN
24AA02
4A02
4L02
G4A2
G4L2
24LC02B
SOT-23
Marking Codes
Example:
5-Lead SOT-23
Part Number
STD
Pb-Free
24AA02
B2
M2
N2
B2
M2
N2
24LC02B-I
24LC02B-E
Note:
XXNN
M23F
Pb-free part number using
“G” suffix is marked on
carton.
Legend: XX...X Customer specific information*
T
Temperature grade (I,E)
YY
Year code (last 2 digits of calendar year)
WW
NNN
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*
Standard QTP marking consists of Microchip part number, year code, week code, and traceability code.
DS21709C-page 12
2003 Microchip Technology Inc.
24AA02/24LC02B
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
Number of Pins
Pitch
8
8
.100
.155
.130
2.54
3.94
3.30
Top to Seating Plane
A
.140
.170
3.56
4.32
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A2
A1
E
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
.145
2.92
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
3.68
.313
.250
.373
.130
.012
.058
.018
.370
10
.325
.260
.385
.135
.015
.070
.022
.430
15
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
E1
D
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
B1
B
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
§
eB
α
β
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
2003 Microchip Technology Inc.
DS21709C-page 13
24AA02/24LC02B
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
A1
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
1.27
Overall Height
A
.053
.069
1.35
1.32
1.55
1.42
0.18
6.02
3.91
4.90
0.38
0.62
4
1.75
Molded Package Thickness
Standoff
A2
A1
E
.052
.004
.228
.146
.189
.010
.019
0
.061
.010
.244
.157
.197
.020
.030
8
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
§
0.10
5.79
3.71
4.80
0.25
0.48
0
Overall Width
Molded Package Width
Overall Length
E1
D
Chamfer Distance
Foot Length
h
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.008
.013
0
.009
.017
12
.010
.020
15
0.20
0.33
0
0.23
0.42
12
0.25
0.51
15
B
α
Mold Draft Angle Top
Mold Draft Angle Bottom
β
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21709C-page 14
2003 Microchip Technology Inc.
24AA02/24LC02B
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
A1
A2
φ
β
L
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.026
0.65
Overall Height
A
.043
1.10
0.95
0.15
6.50
4.50
3.10
0.70
8
Molded Package Thickness
Standoff
A2
A1
E
.033
.035
.004
.251
.173
.118
.024
4
.037
.006
.256
.177
.122
.028
8
0.85
0.05
0.90
0.10
6.38
4.40
3.00
0.60
4
§
.002
.246
.169
.114
.020
0
Overall Width
6.25
4.30
2.90
0.50
0
Molded Package Width
Molded Package Length
Foot Length
E1
D
L
φ
Foot Angle
c
Lead Thickness
.004
.007
0
.006
.010
5
.008
.012
10
0.09
0.19
0
0.15
0.25
5
0.20
0.30
10
Lead Width
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
2003 Microchip Technology Inc.
DS21709C-page 15
24AA02/24LC02B
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Dimension Limits
INCHES
NOM
MILLIMETERS*
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.026 BSC
0.65 BSC
Overall Height
A
A2
A1
E
-
-
.043
-
-
0.85
-
1.10
Molded Package Thickness
Standoff
.030
.000
.033
-
.037
.006
0.75
0.95
0.15
0.00
Overall Width
.193 TYP.
4.90 BSC
Molded Package Width
Overall Length
Foot Length
E1
D
.118 BSC
.118 BSC
3.00 BSC
3.00 BSC
L
.016
.024
.037 REF
.031
0.40
0.60
0.95 REF
0.80
Footprint (Reference)
Foot Angle
F
φ
c
0°
.003
.009
5°
-
8°
.009
.016
15°
0°
0.08
0.22
5°
-
-
-
-
-
8°
0.23
0.40
15°
Lead Thickness
Lead Width
.006
B
α
β
.012
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
-
-
5°
15°
5°
15°
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
JEDEC Equivalent: MO-187
Drawing No. C04-111
DS21709C-page 16
2003 Microchip Technology Inc.
24AA02/24LC02B
5-Lead Plastic Small Outline Transistor (OT) (SOT-23)
E
E1
p
B
p1
D
n
1
α
c
A
A2
φ
A1
L
β
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
Number of Pins
5
5
Pitch
.038
.075
.046
.043
.003
.110
.064
.116
.018
5
0.95
1.90
1.18
1.10
0.08
2.80
1.63
2.95
0.45
5
p1
Outside lead pitch (basic)
Overall Height
A
A2
A1
E
.035
.035
.000
.102
.059
.110
.014
0
.057
0.90
1.45
Molded Package Thickness
.051
.006
.118
.069
.122
.022
10
0.90
0.00
2.60
1.50
2.80
0.35
0
1.30
0.15
3.00
1.75
3.10
0.55
10
Standoff
§
Overall Width
Molded Package Width
Overall Length
E1
D
Foot Length
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.004
.014
0
.006
.017
5
.008
.020
10
0.09
0.35
0
0.15
0.43
5
0.20
0.50
10
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
2003 Microchip Technology Inc.
DS21709C-page 17
24AA02/24LC02B
APPENDIX A: REVISION HISTORY
Revision C
Corrections to Section 1.0, Electrical Characteristics.
DS21709C-page 18
2003 Microchip Technology Inc.
24AA02/24LC02B
ON-LINE SUPPORT
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
Microchip provides on-line support on the Microchip
World Wide Web site.
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits. The Hot Line
Numbers are:
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape® or Microsoft®
Internet Explorer. Files are also available for FTP
download from our FTP site.
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
Connecting to the Microchip Internet
Web Site
042003
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
2003 Microchip Technology Inc.
DS21709C-page 19
24AA02/24LC02B
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
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RE:
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City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
24AA02/24LC02B
DS21709C
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21709C-page 20
2003 Microchip Technology Inc.
24AA02/24LC02B
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Examples:
Temperature Package
Range
a) 24AA02-I/P: Industrial Temperature,
1.8V, PDIP package
b) 24AA02-I/SN: Industrial Temperature,
1.8V, SOIC package
2
Device:
24AA02:
24AA02T:
=
=
1.8V, 2 Kbit I C Serial EEPROM
2
c)
24AA02T-I/OT: Industrial Temperature,
1.8V, SOT-23 package, tape and reel
1.8V, 2 Kbit I C Serial EEPROM
(Tape and Reel)
2
d) 24LC02B-I/P: Industrial Temperature,
2.5V, PDIP package
24LC02B:
=
2.5V, 2 Kbit I C Serial EEPROM
2
24LC02BT: = 2.5V, 2 Kbit I C Serial EEPROM
(Tape and Reel)
e) 24LC02B-E/SN: Extended Temperature,
2.5V, SOIC package
f)
24LC02BT-I/OT: Industrial Temperature,
2.5V, SOT-23 package, tape and reel
Temperature
Range:
I
E
=
=
-40°C to +85°C
-40°C to +125°C
g)
h)
24LC02B-I/PG: Industrial Temperature,
2.5V, SOT-23 package, Pb-free
Package:
P
=
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
Plastic TSSOP (4.4 mm), 8-lead
Plastic Micro Small Outline (MSOP), 8-lead
SOT-23, 5-lead (Tape and Reel only)
Standard 63/37 Sn/Pb
24LC02BT-I/OTG: Industrial Temperature,
2.5V, SOT-23 package, tape and reel,
Pb-free
SN
ST
MS
OT
=
=
=
=
Lead Finish Blank =
G
=
Matte Tin (Pure Sn)
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2003 Microchip Technology Inc.
DS21709C-page21
24AA02/24LC02B
NOTES:
DS21709C-page 22
2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
2003 Microchip Technology Inc.
DS21709C-page 23
WORLDWIDE SALES AND SERVICE
Korea
AMERICAS
ASIA/PACIFIC
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Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
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82-2-558-5934
Corporate Office
Australia
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Tel: 480-792-7200
Suite 22, 41 Rawson Street
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Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Singapore
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Tel: 65-6334-8870 Fax: 65-6334-8850
China - Beijing
Unit 915
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San Jose
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Netherlands
P. A. De Biesbosch 14
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India
Toronto
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Japan
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Tel: 81-45-471- 6166 Fax: 81-45-471-6122
07/28/03
DS21709C-page 24
2003 Microchip Technology Inc.
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