24AA512T-I/CS17K [MICROCHIP]
512K I2C⢠Serial EEPROM; 512K I2Câ ?? ¢串行EEPROM
| 型号： | 24AA512T-I/CS17K |
| 厂家： | 
MICROCHIP |
| 描述： | 512K I2C⢠Serial EEPROM |
| 文件： | 总36页 (文件大小：680K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
24AA512/24LC512/24FC512
512K I2C™ Serial EEPROM
Description:
Device Selection Table
Part
Number
VCC
Range
Max. Clock
Frequency
Temp.
Ranges
The Microchip Technology Inc. 24AA512/24LC512/
24FC512 (24XX512*) is a 64K x 8 (512 Kbit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.7V to 5.5V). It has
been developed for advanced, low-power applications
such as personal communications and data acquisi-
tion. This device also has a page write capability of up
to 128 bytes of data. This device is capable of both
random and sequential reads up to the 512K boundary.
Functional address lines allow up to eight devices on
the same bus, for up to 4 Mbit address space. This
device is available in the standard 8-pin plastic DIP,
SOIJ, SOIC, TSSOP, DFN, and 14-lead TSSOP
packages. The 24AA512 is also available in the 8-lead
Chip Scale package.
24AA512
24LC512
24FC512
1.7-5.5V
2.5-5.5V
1.7-5.5V
400 kHz(1)
I
I, E
I
400 kHz
1 MHz(2)
Note 1: 100 kHz for VCC < 2.5V
2: 400 kHz for VCC < 2.5V
Features:
• Single Supply with Operation down to 1.7V for
24AA512 and 24FC512 Devices, 2.5V for
24LC512 Devices
• Low-Power CMOS Technology:
- Active current 400 uA, typical
Block Diagram
- Standby current 100 nA, typical
• 2-Wire Serial Interface, I2C™ Compatible
• Cascadable for up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Time 5 ms max.
A0 A1 A2 WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
EEPROM
Array
XDEC
Page Latches
• Self-Timed Erase/Write Cycle
SCL
I/O
YDEC
• 128-Byte Page Write Buffer
• Hardware Write-Protect
SDA
VCC
• ESD Protection >4000V
• More than 1 Million Erase/Write Cycles
• Data Retention > 200 years
Sense Amp.
R/W Control
VSS
• Packages Include 8-lead PDIP, SOIJ, SOIC,
TSSOP, DFN, Chip Scale and 14-lead TSSOP
• Pb-Free and RoHS Compliant
• Temperature Ranges:
- Industrial (I): -40C to +85C
- Automotive (E):-40C to +125C
Package Type
CS (Chip Scale)(1)
PDIP/SOIJ/SOIC/TSSOP
TSSOP
DFN
VCC A1 A0
1
14
VCC
A0
1
8
VCC
A0
A1
NC
NC
NC
A2
1
2
3
4
A0
A1
A2
8
7
6
5
VCC
WP
2
3
4
5
6
7
13
12
11
10
9
1
2
3
WP
NC
NC
NC
SCL
SDA
A1
A2
2
3
7
6
WP
4
5
WP
A2
8
6
7
SCL
SDA
SCL
SDA SCL VSS
VSS
VSS
4
5
SDA
(TOP DOWN VIEW,
BALLS NOT VISIBLE)
8
VSS
Note 1: Available in I-temp, “AA” only.
* 24XX512 is used in this document as a generic part number for the 24AA512/24LC512/24FC512 devices.
2010 Microchip Technology Inc.
DS21754M-page 1
24AA512/24LC512/24FC512
1.0
ELECTRICAL CHARACTERISTICS
(†)
Absolute Maximum Ratings
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Electrical Characteristics:
DC CHARACTERISTICS
Industrial (I):
Automotive (E): VCC = +2.5V to 5.5V
VCC = +1.7V to 5.5V
TA = -40°C to +85°C
TA = -40°C to +125°C
Param.
Sym.
No.
Characteristic
Min.
Max.
Units
Conditions
D1
—
A0, A1, A2, SCL, SDA
and WP pins:
—
—
—
—
—
D2
D3
VIH
VIL
High-level input voltage
Low-level input voltage
0.7 VCC
—
—
V
0.3 VCC
0.2 VCC
V
V
VCC 2.5V
VCC < 2.5V
D4
VHYS
Hysteresis of Schmitt
Trigger inputs
0.05 VCC
—
V
VCC 2.5V (Note)
(SDA, SCL pins)
D5
D6
VOL
ILI
Low-level output voltage
Input leakage current
Output leakage current
—
—
0.40
±1
V
IOL = 3.0 ma @ VCC = 4.5V
IOL = 2.1 ma @ VCC = 2.5V
A
VIN = VSS or VCC, WP = VSS
VIN = VSS or VCC, WP = VCC
D7
D8
ILO
—
—
±1
10
A
VOUT = VSS or VCC
CIN,
Pin capacitance
pF
VCC = 5.0V (Note)
COUT
(all inputs/outputs)
TA = 25°C, FCLK = 1 MHz
D9
ICC Read Operating current
ICC Write
—
—
—
400
5
A
mA
A
VCC = 5.5V, SCL = 400 kHz
VCC = 5.5V
D10
ICCS
Standby current
1
TA = -40°C to +85°C
SCL = SDA = VCC = 5.5V
A0, A1, A2, WP = VSS
—
5
A
TA = -40°C to +125°C
SCL = SDA = VCC = 5.5V
A0, A1, A2, WP = VSS
Note:
This parameter is periodically sampled and not 100% tested.
DS21754M-page 2
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
TABLE 1-2:
AC CHARACTERISTICS
Electrical Characteristics:
AC CHARACTERISTICS
Industrial (I):
Automotive (E):
VCC = +1.7V to 5.5V
VCC = +2.5V to 5.5V
TA = -40°C to +85°C
TA = -40°C to +125°C
Param.
Sym.
No.
Characteristic
Clock frequency
Min.
Max.
Units
Conditions
FCLK
—
—
—
—
100
400
400
kHz
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 2.5V 24FC512
2.5V VCC 5.5V 24FC512
1
2
3
4
1000
THIGH
TLOW
Clock high time
Clock low time
4000
600
600
500
—
—
—
—
ns
ns
ns
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 2.5V 24FC512
2.5V VCC 5.5V 24FC512
4700
1300
1300
500
—
—
—
—
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 2.5V 24FC512
2.5V VCC 5.5V 24FC512
TR
TF
SDA and SCL rise time (Note 1)
SDA and SCL fall time (Note 1)
—
—
—
1000
300
300
1.7V VCC< 2.5V
2.5V VCC 5.5V
1.7V VCC 5.5V 24FC512
—
—
300
100
ns
ns
All except, 24FC512
1.7V VCC 5.5V 24FC512
5
6
THD:STA Start condition hold time
4000
600
600
250
—
—
—
—
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 2.5V 24FC512
2.5V VCC 5.5V 24FC512
TSU:STA Start condition setup time
4700
600
600
250
—
—
—
—
ns
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 2.5V 24FC512
2.5V VCC 5.5V 24FC512
7
THD:DAT Data input hold time
TSU:DAT Data input setup time
0
—
ns
ns
(Note 2)
8
9
250
100
100
—
—
—
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 5.5V 24FC512
TSU:STO Stop condition setup time
4000
600
600
250
—
—
—
—
ns
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 2.5V 24FC512
2.5V VCC 5.5V 24FC512
10
TSU:WP WP setup time
THD:WP WP hold time
4000
600
600
—
—
—
ns
ns
ns
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 5.5V 24FC512
11
12
13
4700
1300
1300
—
—
—
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 5.5V 24FC512
TAA
Output valid from clock (Note 2)
—
—
—
—
3500
900
900
400
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 2.5V 24FC512
2.5V VCC 5.5V 24FC512
TBUF
Bus free time: Time the bus
must be free before a new trans-
mission can start
4700
1300
1300
500
—
—
—
—
ns
1.7V VCC 2.5V
2.5V VCC 5.5V
1.7V VCC 2.5V 24FC512
2.5V VCC 5.5V 24FC512
14
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
2010 Microchip Technology Inc.
DS21754M-page 3
24AA512/24LC512/24FC512
Electrical Characteristics:
AC CHARACTERISTICS (Continued)
Param.
Industrial (I):
Automotive (E):
VCC = +1.7V to 5.5V
VCC = +2.5V to 5.5V
TA = -40°C to +85°C
TA = -40°C to +125°C
Sym.
Characteristic
Min.
Max.
Units
Conditions
No.
TSP
Input filter spike suppression
(SDA and SCL pins)
—
50
ns
All except, 24FC512 (Notes 1 and 3)
16
TWC
—
Write cycle time (byte or page)
Endurance
—
5
ms
—
17
18
1,000,000
—
cycles Page Mode, 25°C, VCC = 5.5V
(Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
DS21754M-page 4
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
FIGURE 1-1:
BUS TIMING DATA
5
4
D4
2
SCL
7
3
10
8
9
SDA
IN
6
16
14
12
13
SDA
OUT
(protected)
WP
11
(unprotected)
2010 Microchip Technology Inc.
DS21754M-page 5
24AA512/24LC512/24FC512
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
14-lead
TSSOP
Name
PDIP
SOIC
SOIJ TSSOP
DFN
CS
Function
A0
A1
1
2
1
2
1
2
1
2
1
1
2
3
2
User Configured Chip Select
User Configured Chip Select
Not Connected
2
(NC)
A2
—
3
—
3
—
3
—
3
3, 4, 5
—
3
—
5
6
User Configured Chip Select
Ground
VSS
SDA
SCL
(NC)
WP
VCC
4
4
4
4
7
4
8
5
5
5
5
8
5
6
Serial Data
6
6
6
6
9
10, 11, 12
13
6
7
Serial Clock
—
7
—
7
—
7
—
7
—
7
—
4
Not Connected
Write-Protect Input
8
8
8
8
14
8
1
+1.7V to 5.5V (24AA512)
+2.5V to 5.5V (24LC512)
+1.7V to 5.5V (24FC512)
2.1
A0, A1 and A2 Chip Address
Inputs
2.3
Serial Clock (SCL)
This input is used to synchronize the data transfer from
and to the device.
The A0, A1 and A2 inputs are used by the 24XX512 for
multiple device operations. The logic levels on these
inputs are compared with the corresponding bits in the
slave address. The chip is selected if the compare is
true.
2.4
Write-Protect (WP)
This pin must be connected to either VSS or VCC. If tied
to VSS, write operations are enabled. If tied to VCC,
write operations are inhibited but read operations are
not affected.
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either VCC or VSS.
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable logic device,
the chip address pins must be driven to logic ‘0’ or logic
‘1’ before normal device operation can proceed.
3.0
FUNCTIONAL DESCRIPTION
The 24XX512 supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter and a device
receiving data as a receiver. The bus must be
controlled by a master device which generates the
Serial Clock (SCL), controls the bus access and
generates the Start and Stop conditions, while the
24XX512 works as a slave. Both master and slave
can operate as a transmitter or receiver, but the
master device determines which mode is activated.
2.2
Serial Data (SDA)
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pull-
up resistor to VCC (typical 10 k for 100 kHz, 2 kfor
400 kHz and 1 MHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
DS21754M-page 6
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
4.5
Acknowledge
4.0
BUS CHARACTERISTICS
Each receiving device, when addressed, is obliged to
generate an Acknowledge signal after the reception of
each byte. The master device must generate an extra
clock pulse which is associated with this Acknowledge
bit. See Figure 4-2 for acknowledge timing.
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line, while the clock line is high, will be
interpreted as a Start or Stop condition.
Note:
The 24XX512 does not generate any
Acknowledge bits if an internal programming
cycle is in progress.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
A device that acknowledges must pull down the SDA
line during the Acknowledge clock pulse in such a way
that the SDA line is stable low during the high period of
the acknowledge related clock pulse. Of course, setup
and hold times must be taken into account. During
reads, a master must signal an end of data to the slave
by NOT generating an Acknowledge bit on the last byte
that has been clocked out of the slave. In this case, the
slave (24XX512) will leave the data line high to enable
the master to generate the Stop condition.
4.1
Bus Not Busy (A)
Both data and clock lines remain high.
4.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must end with a Stop condition.
4.4
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device.
2010 Microchip Technology Inc.
DS21754M-page 7
24AA512/24LC512/24FC512
FIGURE 4-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(A)
(B)
(D)
(D)
(C) (A)
SCL
SDA
Start
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
Stop
Condition
FIGURE 4-2:
ACKNOWLEDGE TIMING
Acknowledge
Bit
1
2
3
4
5
6
7
8
9
1
2
3
SCL
SDA
Data from transmitter
Data from transmitter
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
Receiver must release the SDA line
at this point so the Transmitter can
continue sending data.
DS21754M-page 8
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
FIGURE 5-1:
CONTROL BYTE FORMAT
5.0
DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
The control byte consists of a 4-bit control code; for the
24XX512 this is set as ‘1010’ binary for read and write
operations. The next three bits of the control byte are
the Chip Select bits (A2, A1 and A0). The Chip Select
bits allow the use of up to eight 24XX512 devices on
the same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are in effect the three Most Significant bits of the word
address.
Read/Write Bit
Chip Select
Control Code
Bits
1
S
1
0
0
A2 A1 A0 R/W ACK
Slave Address
Acknowledge Bit
Start Bit
5.1
Contiguous Addressing Across
Multiple Devices
The last bit of the control byte defines the operation to
be performed. When set to a one a read operation is
selected and when set to a zero a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because all
A15…A0 are used, there are no upper address bits that
are “don’t care”. The upper address bits are transferred
first, followed by the Less Significant bits.
The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to 4 Mbit
by adding up to eight 24XX512 devices on the same
bus. In this case, software can use A0 of the control
byte as address bit A16; A1 as address bit A17; and A2
as address bit A18. It is not possible to sequentially
read across device boundaries.
Following the Start condition, the 24XX512 monitors
the SDA bus checking the device type identifier being
transmitted. Upon receiving a ‘1010’ code and appro-
priate device select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX512 will select a read or
write operation.
FIGURE 5-2:
ADDRESS SEQUENCE BIT ASSIGNMENTS
Address High Byte
Control Byte
Address Low Byte
A
A
A
A
A
2
A
1
A
0
A
A
10
A
9
A
8
A
7
A
0
•
•
•
•
•
•
1
0
1
0
R/W
12 11
15 14 13
Control
Code
Chip
Select
Bits
2010 Microchip Technology Inc.
DS21754M-page 9
24AA512/24LC512/24FC512
6.2
Page Write
6.0
6.1
WRITE OPERATIONS
Byte Write
The write control byte, word address and the first data
byte are transmitted to the 24XX512 in the same way
as in a byte write. But instead of generating a Stop
condition, the master transmits up to 127 additional
bytes, which are temporarily stored in the on-chip page
buffer and will be written into memory after the master
has transmitted a Stop condition. After receipt of each
word, the seven lower Address Pointer bits are inter-
nally incremented by one. If the master should transmit
more than 128 bytes prior to generating the Stop con-
dition, the address counter will roll over and the previ-
ously received data will be overwritten. As with the byte
write operation, once the Stop condition is received, an
internal write cycle will begin (Figure 6-2). If an attempt
is made to write to the array with the WP pin held high,
the device will acknowledge the command, but no write
cycle will occur, no data will be written and the device
will immediately accept a new command.
Following the Start condition from the master, the
control code (four bits), the Chip Select (three bits) and
the R/W bit (which is a logic low) are clocked onto the
bus by the master transmitter. This indicates to the
addressed slave receiver that the address high byte will
follow after it has generated an Acknowledge bit during
the ninth clock cycle. Therefore, the next byte
transmitted by the master is the high-order byte of the
word address and will be written into the Address
Pointer of the 24XX512. The next byte is the Least
Significant Address Byte. After receiving another
Acknowledge signal from the 24XX512, the master
device will transmit the data word to be written into the
addressed memory location. The 24XX512 acknowl-
edges again and the master generates a Stop
condition. This initiates the internal write cycle and
during this time, the 24XX512 will not generate
Acknowledge signals (Figure 6-1). If an attempt is
made to write to the array with the WP pin held high, the
device will acknowledge the command, but no write
cycle will occur, no data will be written and the device
will immediately accept a new command. After a byte
Write command, the internal address counter will point
to the address location following the one that was just
written.
6.3
Write Protection
The WP pin allows the user to write-protect the entire
array (0000-FFFF) when the pin is tied to VCC. If tied to
VSS the write protection is disabled. The WP pin is
sampled at the Stop bit for every Write command
(Figure 1-1). Toggling the WP pin after the Stop bit will
have no effect on the execution of the write cycle.
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and end at addresses that are
integer multiples of [page size – 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
Note:
When doing a write of less than 128 bytes
the data in the rest of the page is refreshed
along with the data bytes being written.
This will force the entire page to endure a
write cycle, for this reason endurance is
specified per page.
DS21754M-page 10
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
FIGURE 6-1:
BYTE WRITE
S
T
A
R
T
Bus Activity
Master
S
Control
Byte
Address
High Byte
Address
Low Byte
T
O
P
Data
A A A
SDA Line
S 1 0 1 0
0
P
2 1 0
A
C
K
A
C
K
A
C
K
A
C
K
Bus Activity
FIGURE 6-2:
PAGE WRITE
S
T
A
R
T
S
T
O
P
Control
Byte
Address
High Byte
Address
Low Byte
Bus Activity
Master
Data Byte 0
Data Byte 127
A A A
SDA Line
P
S 1 0 1 0
0
2 1 0
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Bus Activity
2010 Microchip Technology Inc.
DS21754M-page 11
24AA512/24LC512/24FC512
FIGURE 7-1:
ACKNOWLEDGE POLLING
FLOW
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition, followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, then the Start bit and control byte
must be re-sent. If the cycle is complete, then the
device will return the ACK and the master can then
proceed with the next Read or Write command. See
Figure 7-1 for flow diagram.
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
No
Yes
Next
Operation
DS21754M-page 12
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
8.3
Sequential Read
8.0
READ OPERATION
Sequential reads are initiated in the same way as a
random read except that after the 24XX512 transmits
the first data byte, the master issues an acknowledge
as opposed to the Stop condition used in a random
read. This acknowledge directs the 24XX512 to
transmit the next sequentially addressed 8-bit word
(Figure 8-3). Following the final byte transmitted to the
master, the master will NOT generate an acknowledge,
but will generate a Stop condition. To provide
sequential reads, the 24XX512 contains an internal
Address Pointer which is incremented by one at the
completion of each operation. This Address Pointer
allows the entire memory contents to be serially read
during one operation. The internal Address Pointer will
automatically roll over from address FFFF to address
0000 if the master acknowledges the byte received
from the array address FFFF.
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
control byte is set to ‘1’. There are three basic types of
read operations: current address read, random read
and sequential read.
8.1
Current Address Read
The 24XX512 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by ‘1’. Therefore, if the previous read
access was to address ‘n’ (n is any legal address), the
next current address read operation would access data
from address n + 1.
Upon receipt of the control byte with R/W bit set to ‘1’,
the 24XX512 issues an acknowledge and transmits the
8-bit data word. The master will not acknowledge the
transfer but does generate a Stop condition and the
24XX512 discontinues transmission (Figure 8-1).
FIGURE 8-1:
CURRENT ADDRESS
READ
S
T
A
R
T
S
T
O
P
Bus Activity
Master
Control
Byte
Data
Byte
A A A
2 1 0
SDA Line
S 1 0 1 0
1
P
A
C
K
N
O
Bus Activity
A
C
K
8.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24XX512 as part of a write operation (R/W bit set to
‘0’). After the word address is sent, the master
generates a Start condition following the acknowledge.
This terminates the write operation, but not before the
internal Address Pointer is set. Then, the master issues
the control byte again but with the R/W bit set to a one.
The 24XX512 will then issue an acknowledge and
transmit the 8-bit data word. The master will not
acknowledge the transfer but does generate a Stop
condition which causes the 24XX512 to discontinue
transmission (Figure 8-2). After
a random Read
command, the internal address counter will point to the
address location following the one that was just read.
2010 Microchip Technology Inc.
DS21754M-page 13
24AA512/24LC512/24FC512
FIGURE 8-2:
RANDOM READ
S
T
A
R
T
S
T
A
R
T
Bus Activity
Master
S
T
O
P
Control
Byte
Address
High Byte
Address
Low Byte
Control
Byte
Data
Byte
A A A
2 1 0
A A A
2 1 0
SDA Line
S 1 0 1 0
0
S 1 0 1 0
1
P
N
O
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Bus Activity
x = “don’t care” bit
FIGURE 8-3:
SEQUENTIAL READ
S
Control
Byte
Bus Activity
Master
T
Data (n)
Data (n + 1)
Data (n + x)
Data (n + 2)
O
P
P
SDA Line
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
Bus Activity
DS21754M-page 14
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
9.0
9.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil)
Example:
24AA512
I/P 017
XXXXXXXX
T/XXXNNN
YYWW
e
3
0510
8-Lead SOIJ (5.28 mm)
Example:
24LC512
I/SM
0510017
XXXXXXXX
T/XXXXXX
YYWWNNN
e
3
8-Lead DFN-S
Example:
24LC512
XXXXXXX
T/XXXXX
YYWW
e
3
I/MF
0510
017
NNN
Legend: XX...X Customer-specific information*
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
e
3
*
This package is Pb-free. The Pb-free JEDEC designator (
)
e3
can be found on the outer packaging for this package.
T
Temperature
Commercial
Industrial
Blank
I
E
Extended
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
*Standard device marking consists of Microchip part number, year code, week code, and traceability code. For
device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.
2010 Microchip Technology Inc.
DS21754M-page 15
24AA512/24LC512/24FC512
Package Marking Information (Continued)
8-Lead SOIC (3.90 mm)
Example:
XXXXXXXT
XXXXYYWW
24LC512I
SNM
e
3
0510
NNN
017
8-Lead TSSOP
Example
XXXX
TYWW
NNN
4LE
I510
017
Example
14-Lead TSSOP
XXXXXXXT
YYWW
4L512I
0510
017
NNN
8-Lead Chip Scale
Example:
XXXXXXX
24AA512
0810017
YYWWNNN
First Line Marking Codes
Part No.
24AA512
8- Lead TSSOP Package Codes
4AE
4LE
4FE
24LC512
24FC512
DS21754M-page 16
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
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2010 Microchip Technology Inc.
DS21754M-page 17
24AA512/24LC512/24FC512
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ꢔꢃꢌꢉꢋꢌꢍꢃꢓ ꢙꢈꢌꢍꢄꢋꢇꢋꢑꢊ ꢒꢉꢆ*ꢃꢄꢑ ,ꢕꢖꢞꢕꢘꢜ1
DS21754M-page 18
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ ꢕꢄꢈꢈꢆ!ꢎꢊꢈꢋꢐꢃꢆꢑ ꢛꢒꢆMꢆꢛꢄ""ꢗ#$ꢆꢓ%&ꢔꢆꢕꢕꢆꢖꢗꢅꢘꢆꢙ !ꢏ'ꢚ
ꢛꢗꢊꢃꢜ 3ꢋꢉꢅ&ꢍꢈꢅ'ꢋ!&ꢅꢌ"ꢉꢉꢈꢄ&ꢅꢓꢆꢌ4ꢆꢑꢈꢅ#ꢉꢆ*ꢃꢄꢑ!(ꢅꢓꢇꢈꢆ!ꢈꢅ!ꢈꢈꢅ&ꢍꢈꢅꢔꢃꢌꢉꢋꢌꢍꢃꢓꢅꢂꢆꢌ4ꢆꢑꢃꢄꢑꢅꢐꢓꢈꢌꢃ%ꢃꢌꢆ&ꢃꢋꢄꢅꢇꢋꢌꢆ&ꢈ#ꢅꢆ&ꢅ
ꢍ&&ꢓ255***ꢁ'ꢃꢌꢉꢋꢌꢍꢃꢓꢁꢌꢋ'5ꢓꢆꢌ4ꢆꢑꢃꢄꢑ
2010 Microchip Technology Inc.
DS21754M-page 19
24AA512/24LC512/24FC512
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ ꢕꢄꢈꢈꢆ!ꢎꢊꢈꢋꢐꢃꢆꢑ (ꢒꢆMꢆ(ꢃꢅꢋꢎꢕ$ꢆ)%*ꢀꢆꢕꢕꢆꢖꢗꢅꢘꢆꢙ !ꢏ+ꢚ
ꢛꢗꢊꢃꢜ 3ꢋꢉꢅ&ꢍꢈꢅ'ꢋ!&ꢅꢌ"ꢉꢉꢈꢄ&ꢅꢓꢆꢌ4ꢆꢑꢈꢅ#ꢉꢆ*ꢃꢄꢑ!(ꢅꢓꢇꢈꢆ!ꢈꢅ!ꢈꢈꢅ&ꢍꢈꢅꢔꢃꢌꢉꢋꢌꢍꢃꢓꢅꢂꢆꢌ4ꢆꢑꢃꢄꢑꢅꢐꢓꢈꢌꢃ%ꢃꢌꢆ&ꢃꢋꢄꢅꢇꢋꢌꢆ&ꢈ#ꢅꢆ&ꢅ
ꢍ&&ꢓ255***ꢁ'ꢃꢌꢉꢋꢌꢍꢃꢓꢁꢌꢋ'5ꢓꢆꢌ4ꢆꢑꢃꢄꢑ
D
N
E
E1
1
2
e
b
α
c
φ
A2
A
β
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L
6ꢄꢃ&!
ꢔꢚ99ꢚꢔ.ꢙ.ꢝꢐ
ꢒꢃ'ꢈꢄ!ꢃꢋꢄꢅ9ꢃ'ꢃ&!
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ꢂꢃ&ꢌꢍ
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ꢔꢋꢇ#ꢈ#ꢅꢂꢆꢌ4ꢆꢑꢈꢅꢙꢍꢃꢌ4ꢄꢈ!!
ꢐ&ꢆꢄ#ꢋ%%ꢅꢅꢏ
: ꢈꢉꢆꢇꢇꢅ>ꢃ#&ꢍ
ꢔꢋꢇ#ꢈ#ꢅꢂꢆꢌ4ꢆꢑꢈꢅ>ꢃ#&ꢍ
: ꢈꢉꢆꢇꢇꢅ9ꢈꢄꢑ&ꢍ
3ꢋꢋ&ꢅ9ꢈꢄꢑ&ꢍ
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ꢔꢋꢇ#ꢅꢒꢉꢆ%&ꢅꢗꢄꢑꢇꢈꢅꢙꢋꢓ
ꢔꢋꢇ#ꢅꢒꢉꢆ%&ꢅꢗꢄꢑꢇꢈꢅ1ꢋ&&ꢋ'
ꢗ
ꢀꢁꢜꢜ
ꢀꢁꢜꢘ
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ꢜꢁ?ꢎ
ꢘꢁꢀꢀ
ꢘꢁꢀ-
ꢕꢁꢘꢀ
ꢕꢟ
M
M
M
M
M
M
M
M
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M
M
M
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ꢀꢁ ꢐ:ꢚC(ꢅC.ꢚꢙꢗ5.ꢚꢗCꢅꢐ&ꢆꢄ#ꢆꢉ#(ꢅ%ꢋꢉ'ꢈꢉꢇꢊꢅꢌꢆꢇꢇꢈ#ꢅꢐ:ꢚ,ꢁ
ꢎꢁ ꢏꢅꢐꢃꢑꢄꢃ%ꢃꢌꢆꢄ&ꢅ,ꢍꢆꢉꢆꢌ&ꢈꢉꢃ!&ꢃꢌꢁ
-ꢁ ꢒꢃ'ꢈꢄ!ꢃꢋꢄ!ꢅꢒꢅꢆꢄ#ꢅ.ꢀꢅ#ꢋꢅꢄꢋ&ꢅꢃꢄꢌꢇ"#ꢈꢅ'ꢋꢇ#ꢅ%ꢇꢆ!ꢍꢅꢋꢉꢅꢓꢉꢋ&ꢉ"!ꢃꢋꢄ!ꢁꢅꢔꢋꢇ#ꢅ%ꢇꢆ!ꢍꢅꢋꢉꢅꢓꢉꢋ&ꢉ"!ꢃꢋꢄ!ꢅ!ꢍꢆꢇꢇꢅꢄꢋ&ꢅꢈ$ꢌꢈꢈ#ꢅꢕꢁꢎꢘꢅ''ꢅꢓꢈꢉꢅ!ꢃ#ꢈꢁ
ꢔꢃꢌꢉꢋꢌꢍꢃꢓ ꢙꢈꢌꢍꢄꢋꢇꢋꢑꢊ ꢒꢉꢆ*ꢃꢄꢑ ,ꢕꢖꢞꢕꢘ?1
DS21754M-page 20
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2010 Microchip Technology Inc.
DS21754M-page 21
24AA512/24LC512/24FC512
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ,-ꢋꢐꢆ -"ꢋꢐ.ꢆ ꢕꢄꢈꢈꢆ!ꢎꢊꢈꢋꢐꢃꢆꢑ ,ꢒꢆMꢆ/%/ꢆꢕꢕꢆꢖꢗꢅꢘꢆꢙ, !ꢇꢚ
ꢛꢗꢊꢃꢜ 3ꢋꢉꢅ&ꢍꢈꢅ'ꢋ!&ꢅꢌ"ꢉꢉꢈꢄ&ꢅꢓꢆꢌ4ꢆꢑꢈꢅ#ꢉꢆ*ꢃꢄꢑ!(ꢅꢓꢇꢈꢆ!ꢈꢅ!ꢈꢈꢅ&ꢍꢈꢅꢔꢃꢌꢉꢋꢌꢍꢃꢓꢅꢂꢆꢌ4ꢆꢑꢃꢄꢑꢅꢐꢓꢈꢌꢃ%ꢃꢌꢆ&ꢃꢋꢄꢅꢇꢋꢌꢆ&ꢈ#ꢅꢆ&ꢅ
ꢍ&&ꢓ255***ꢁ'ꢃꢌꢉꢋꢌꢍꢃꢓꢁꢌꢋ'5ꢓꢆꢌ4ꢆꢑꢃꢄꢑ
D
N
E
E1
NOTE 1
1
2
b
e
c
φ
A
A2
A1
L
L1
6ꢄꢃ&!
ꢔꢚ99ꢚꢔ.ꢙ.ꢝꢐ
ꢒꢃ'ꢈꢄ!ꢃꢋꢄꢅ9ꢃ'ꢃ&!
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ꢔꢋꢇ#ꢈ#ꢅꢂꢆꢌ4ꢆꢑꢈꢅ9ꢈꢄꢑ&ꢍ
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9ꢈꢆ#ꢅꢙꢍꢃꢌ4ꢄꢈ!!
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9ꢀ
ꢀ
ꢀꢁꢕꢕꢅꢝ.3
ꢕꢟ
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ꢕꢁ-ꢕ
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ꢀꢁ ꢂꢃꢄꢅꢀꢅ ꢃ!"ꢆꢇꢅꢃꢄ#ꢈ$ꢅ%ꢈꢆ&"ꢉꢈꢅ'ꢆꢊꢅ ꢆꢉꢊ(ꢅ)"&ꢅ'"!&ꢅ)ꢈꢅꢇꢋꢌꢆ&ꢈ#ꢅ*ꢃ&ꢍꢃꢄꢅ&ꢍꢈꢅꢍꢆ&ꢌꢍꢈ#ꢅꢆꢉꢈꢆꢁ
ꢎꢁ ꢒꢃ'ꢈꢄ!ꢃꢋꢄ!ꢅꢒꢅꢆꢄ#ꢅ.ꢀꢅ#ꢋꢅꢄꢋ&ꢅꢃꢄꢌꢇ"#ꢈꢅ'ꢋꢇ#ꢅ%ꢇꢆ!ꢍꢅꢋꢉꢅꢓꢉꢋ&ꢉ"!ꢃꢋꢄ!ꢁꢅꢔꢋꢇ#ꢅ%ꢇꢆ!ꢍꢅꢋꢉꢅꢓꢉꢋ&ꢉ"!ꢃꢋꢄ!ꢅ!ꢍꢆꢇꢇꢅꢄꢋ&ꢅꢈ$ꢌꢈꢈ#ꢅꢕꢁꢀꢘꢅ''ꢅꢓꢈꢉꢅ!ꢃ#ꢈꢁ
-ꢁ ꢒꢃ'ꢈꢄ!ꢃꢋꢄꢃꢄꢑꢅꢆꢄ#ꢅ&ꢋꢇꢈꢉꢆꢄꢌꢃꢄꢑꢅꢓꢈꢉꢅꢗꢐꢔ.ꢅ0ꢀꢖꢁꢘꢔꢁ
1ꢐ,2 1ꢆ!ꢃꢌꢅꢒꢃ'ꢈꢄ!ꢃꢋꢄꢁꢅꢙꢍꢈꢋꢉꢈ&ꢃꢌꢆꢇꢇꢊꢅꢈ$ꢆꢌ&ꢅ ꢆꢇ"ꢈꢅ!ꢍꢋ*ꢄꢅ*ꢃ&ꢍꢋ"&ꢅ&ꢋꢇꢈꢉꢆꢄꢌꢈ!ꢁ
ꢝ.32 ꢝꢈ%ꢈꢉꢈꢄꢌꢈꢅꢒꢃ'ꢈꢄ!ꢃꢋꢄ(ꢅ"!"ꢆꢇꢇꢊꢅ*ꢃ&ꢍꢋ"&ꢅ&ꢋꢇꢈꢉꢆꢄꢌꢈ(ꢅ%ꢋꢉꢅꢃꢄ%ꢋꢉ'ꢆ&ꢃꢋꢄꢅꢓ"ꢉꢓꢋ!ꢈ!ꢅꢋꢄꢇꢊꢁ
ꢔꢃꢌꢉꢋꢌꢍꢃꢓ ꢙꢈꢌꢍꢄꢋꢇꢋꢑꢊ ꢒꢉꢆ*ꢃꢄꢑ ,ꢕꢖꢞꢕ<?1
DS21754M-page 22
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
0/ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ,-ꢋꢐꢆ -"ꢋꢐ.ꢆ ꢕꢄꢈꢈꢆ!ꢎꢊꢈꢋꢐꢃꢆꢑ ,ꢒꢆMꢆ/%/ꢆꢕꢕꢆꢖꢗꢅꢘꢆꢙ, !ꢇꢚ
ꢛꢗꢊꢃꢜ 3ꢋꢉꢅ&ꢍꢈꢅ'ꢋ!&ꢅꢌ"ꢉꢉꢈꢄ&ꢅꢓꢆꢌ4ꢆꢑꢈꢅ#ꢉꢆ*ꢃꢄꢑ!(ꢅꢓꢇꢈꢆ!ꢈꢅ!ꢈꢈꢅ&ꢍꢈꢅꢔꢃꢌꢉꢋꢌꢍꢃꢓꢅꢂꢆꢌ4ꢆꢑꢃꢄꢑꢅꢐꢓꢈꢌꢃ%ꢃꢌꢆ&ꢃꢋꢄꢅꢇꢋꢌꢆ&ꢈ#ꢅꢆ&ꢅ
ꢍ&&ꢓ255***ꢁ'ꢃꢌꢉꢋꢌꢍꢃꢓꢁꢌꢋ'5ꢓꢆꢌ4ꢆꢑꢃꢄꢑ
D
N
E
E1
NOTE 1
1
2
e
b
c
φ
A2
A
A1
L
L1
6ꢄꢃ&!
ꢔꢚ99ꢚꢔ.ꢙ.ꢝꢐ
ꢒꢃ'ꢈꢄ!ꢃꢋꢄꢅ9ꢃ'ꢃ&!
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3ꢋꢋ&ꢅ9ꢈꢄꢑ&ꢍ
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ꢀꢁ ꢂꢃꢄꢅꢀꢅ ꢃ!"ꢆꢇꢅꢃꢄ#ꢈ$ꢅ%ꢈꢆ&"ꢉꢈꢅ'ꢆꢊꢅ ꢆꢉꢊ(ꢅ)"&ꢅ'"!&ꢅ)ꢈꢅꢇꢋꢌꢆ&ꢈ#ꢅ*ꢃ&ꢍꢃꢄꢅ&ꢍꢈꢅꢍꢆ&ꢌꢍꢈ#ꢅꢆꢉꢈꢆꢁ
ꢎꢁ ꢒꢃ'ꢈꢄ!ꢃꢋꢄ!ꢅꢒꢅꢆꢄ#ꢅ.ꢀꢅ#ꢋꢅꢄꢋ&ꢅꢃꢄꢌꢇ"#ꢈꢅ'ꢋꢇ#ꢅ%ꢇꢆ!ꢍꢅꢋꢉꢅꢓꢉꢋ&ꢉ"!ꢃꢋꢄ!ꢁꢅꢔꢋꢇ#ꢅ%ꢇꢆ!ꢍꢅꢋꢉꢅꢓꢉꢋ&ꢉ"!ꢃꢋꢄ!ꢅ!ꢍꢆꢇꢇꢅꢄꢋ&ꢅꢈ$ꢌꢈꢈ#ꢅꢕꢁꢀꢘꢅ''ꢅꢓꢈꢉꢅ!ꢃ#ꢈꢁ
-ꢁ ꢒꢃ'ꢈꢄ!ꢃꢋꢄꢃꢄꢑꢅꢆꢄ#ꢅ&ꢋꢇꢈꢉꢆꢄꢌꢃꢄꢑꢅꢓꢈꢉꢅꢗꢐꢔ.ꢅ0ꢀꢖꢁꢘꢔꢁ
1ꢐ,2 1ꢆ!ꢃꢌꢅꢒꢃ'ꢈꢄ!ꢃꢋꢄꢁꢅꢙꢍꢈꢋꢉꢈ&ꢃꢌꢆꢇꢇꢊꢅꢈ$ꢆꢌ&ꢅ ꢆꢇ"ꢈꢅ!ꢍꢋ*ꢄꢅ*ꢃ&ꢍꢋ"&ꢅ&ꢋꢇꢈꢉꢆꢄꢌꢈ!ꢁ
ꢝ.32 ꢝꢈ%ꢈꢉꢈꢄꢌꢈꢅꢒꢃ'ꢈꢄ!ꢃꢋꢄ(ꢅ"!"ꢆꢇꢇꢊꢅ*ꢃ&ꢍꢋ"&ꢅ&ꢋꢇꢈꢉꢆꢄꢌꢈ(ꢅ%ꢋꢉꢅꢃꢄ%ꢋꢉ'ꢆ&ꢃꢋꢄꢅꢓ"ꢉꢓꢋ!ꢈ!ꢅꢋꢄꢇꢊꢁ
ꢔꢃꢌꢉꢋꢌꢍꢃꢓ ꢙꢈꢌꢍꢄꢋꢇꢋꢑꢊ ꢒꢉꢆ*ꢃꢄꢑ ,ꢕꢖꢞꢕ<ꢜ1
2010 Microchip Technology Inc.
DS21754M-page 23
24AA512/24LC512/24FC512
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ꢔꢃꢌꢉꢋꢌꢍꢃꢓ ꢙꢈꢌꢍꢄꢋꢇꢋꢑꢊ ꢒꢉꢆ*ꢃꢄꢑ ,ꢕꢖꢞꢀꢎꢎ1
DS21754M-page 24
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
ꢛꢗꢊꢃꢜ 3ꢋꢉꢅ&ꢍꢈꢅ'ꢋ!&ꢅꢌ"ꢉꢉꢈꢄ&ꢅꢓꢆꢌ4ꢆꢑꢈꢅ#ꢉꢆ*ꢃꢄꢑ!(ꢅꢓꢇꢈꢆ!ꢈꢅ!ꢈꢈꢅ&ꢍꢈꢅꢔꢃꢌꢉꢋꢌꢍꢃꢓꢅꢂꢆꢌ4ꢆꢑꢃꢄꢑꢅꢐꢓꢈꢌꢃ%ꢃꢌꢆ&ꢃꢋꢄꢅꢇꢋꢌꢆ&ꢈ#ꢅꢆ&ꢅ
ꢍ&&ꢓ255***ꢁ'ꢃꢌꢉꢋꢌꢍꢃꢓꢁꢌꢋ'5ꢓꢆꢌ4ꢆꢑꢃꢄꢑ
2010 Microchip Technology Inc.
DS21754M-page 25
24AA512/24LC512/24FC512
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21754M-page 26
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2010 Microchip Technology Inc.
DS21754M-page 27
24AA512/24LC512/24FC512
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21754M-page 28
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
APPENDIX A: REVISION HISTORY
Revision D
Correction to Section 1.0, Electrical Characteristics.
Revision E
Correction to Section 1.0., Ambient Temperature
Correction to Section 6.2, Page Write
Revision F
Add E3 (Pb-free) to marking examples.
Updated Marking Legend and On-line Support.
Revision G
Revised Sections 2.1, 2.4 and 6.3.
Revision H
Revised Features section; Revised 1.8V voltage to
1.7V; Replaced Package Drawings; Revised Product
ID System; Removed 14 Lead TSSOP.
Revision J
Revised Table 1-2, AC Characteristics; Updated
Packaging.
Revision K (06/2009)
Removed CMOS from title; Revised Table 1-2, Para.
18; Added SOIC and TSSOP packaging; Updated Pin
Descriptions; Updated Product ID.
Revision L (12/2009)
Added note to Section 6.1.
Revision M (03/2010)
Added 8-Lead Chip Scale package.
2010 Microchip Technology Inc.
DS21754M-page 29
24AA512/24LC512/24FC512
NOTES:
DS21754M-page 30
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• Development Systems Information Line
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
Technical support is available through the web site
at: http://support.microchip.com
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com, click on Customer Change
Notification and follow the registration instructions.
2010 Microchip Technology Inc.
DS21754M-page 31
24AA512/24LC512/24FC512
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
Reader Response
Total Pages Sent ________
RE:
From:
Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
24AA512/24LC512/24FC512
DS21754M
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21754M-page 32
2010 Microchip Technology Inc.
24AA512/24LC512/24FC512
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
X
/XX
a) 24AA512-I/P:
Industrial Temp.,
Temperature
Range
Package
1.7V, PDIP package.
b) 24AA512T-I/SM: Tape and Reel,
Industrial Temp., 1.7V, SOIJ
package.
Device:
24AA512:
512 Kbit 1.8V I2C Serial
EEPROM
c) 24AA512-I/MF: Industrial Temp.,
1.7V, DFN package.
24AA512T: 512 Kbit 1.8V I2C Serial
EEPROM (Tape and Reel)
24LC512:
512 Kbit 2.5V I2C Serial
EEPROM
d) 24LC512-E/P:
Extended Temp.,
2.5V, PDIP package.
24LC512T: 512 Kbit 2.5V I2C Serial
EEPROM (Tape and Reel)
24FC512:
e) 24LC512-I/SN: Industrial Temp.,
2.5V, SOIC package.
512 Kbit 1 MHz I2C Serial
EEPROM
f) 24LC512T-I/SM: Tape and Reel,
Industrial Temp., 2.5V, SOIJ
package.
24FC512T: 512 Kbit 1 MHz I2C Serial
EEPROM (Tape and Reel)
g) 24LC512-I/ST:
2.5V, TSSOP package.
h) 24FC512-I/P: Industrial Temp.,
Industrial Temp.,
Temperature
Range:
I
E
=
=
-40C to +85C
-40C to +125C
1.7V, High Speed, PDIP package.
i) 24FC512-I/SM: Industrial Temp.,
1.7V, High Speed, SOIJ package.
Package:
P
= Plastic DIP (300 mil body), 8-lead
SM = Plastic SOIJ (5.28 mm body), 8-lead
MF = Micro Lead Frame (6x5 mm body),
8-lead
j) 24FC512T-I/SN: Tape and Reel,
Industrial Temp., 1.7V, High Speed,
SOIC package.
SN = Plastic SOIC (3.90 mm body), 8-lead
ST = Plastic TSSOP (4.4 mm), 8-lead
ST14 = Plastic TSSOP (4.4 mm), 14-lead
CS17K(1) = Chip Scale (CS), 8-lead (I-temp,
"AA", Tape and Reel only)
k) 24AA512T-I/CS17K: Industrial
Temp., 1.7V, CS package, Tape
and Reel
Note 1: "17K" indicates 160K technology.
2010 Microchip Technology Inc.
DS21754M-page33
24AA512/24LC512/24FC512
NOTES:
DS21754M-page34
2010 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
32
PIC logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-60932-073-7
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
2010 Microchip Technology Inc.
DS21754M-page 35
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Boston
China - Chengdu
Tel: 86-28-8665-5511
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Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Cleveland
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-6578-300
Fax: 886-3-6578-370
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Santa Clara
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
01/05/10
DS21754M-page 36
2010 Microchip Technology Inc.
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