24C01CT-I/P [MICROCHIP]
1K 5.0V I2C ⑩ Serial EEPROM; 1K 5.0V ⑩ I2C串行EEPROM型号: | 24C01CT-I/P |
厂家: | MICROCHIP |
描述: | 1K 5.0V I2C ⑩ Serial EEPROM |
文件: | 总24页 (文件大小:371K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
24C01C
1K 5.0V I2C™ Serial EEPROM
Features:
Package Types
SOIC, TSSOP
• Single supply with operation from 4.5 to 5.5V
• Low-power CMOS technology:
PDIP, MSOP
A0
1
8
VCC
1
2
8
7
A0
A1
VCC
Test
SCL
SDA
- Read current 1 mA, typical
A1
A2
2
3
7
6
Test
SCL
- Standby current 10 μA, typical
• 2-wire serial interface, I2C™ compatible
• Cascadable up to eight devices
• Schmitt Trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz and 400 kHz clock compatibility
• Fast page and byte write time 1 ms, typical
• Self-timed erase/write cycle
3
4
6
5
A2
VSS
4
5
SDA
VSS
DFN
1
VCC
Test
SCL
SDA
A0
A1
8
7
6
5
2
3
4
A2
VSS
• 16-byte page write buffer
• ESD protection > 4,000V
• More than 1 million erase/write cycles
• Data retention > 200 years
Block Diagram
• Factory programming available
A0 A1 A2
HV Generator
• Packages include 8-lead PDIP, SOIC, TSSOP,
DFN and MSOP
I/O
Control
Logic
Memory
Control
Logic
• Pb-free and RoHS compliant
• Temperature ranges:
EEPROM
Array
XDEC
- Industrial (I):
-40°C to +85°C
- Automotive (E): -40°C to +125°C
SDA
SCL
Description:
VCC
VSS
YDEC
The Microchip Technology Inc. 24C01C is a 1K bit
Serial Electrically Erasable PROM with a voltage range
of 4.5V to 5.5V. The device is organized as a single
block of 128 x 8-bit memory with a 2-wire serial
interface. Low-current design permits operation with
typical standby and active currents of only 10 μA and 1
mA, respectively. The device has a page write capabil-
ity for up to 16 bytes of data and has fast write cycle
times of only 1 ms for both byte and page writes. Func-
tional address lines allow the connection of up to eight
24C01C devices on the same bus for up to 8K bits of
contiguous EEPROM memory. The device is available
in the standard 8-pin PDIP, 8-pin SOIC (3.90 mm), 8-
pin 2x3 DFN, 8-pin MSOP and TSSOP packages.
Sense Amp.
R/W Control
Pin Function Table
Name
Function
VSS
Ground
SDA
Serial Data
Serial Clock
SCL
VCC
+4.5V to 5.5V Power Supply
Chip Selects
A0, A1, A2
Test
Test Pin: may be tied high, low or
left floating
2
I C is a trademark of Philips Corporation.
© 2007 Microchip Technology Inc.
DS21201G-page 1
24C01C
1.0
ELECTRICAL CHARACTERISTICS
(†)
Absolute Maximum Ratings
VCC.............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
All parameters apply across the
specified operating ranges unless
otherwise noted.
VCC = +4.5V to +5.5V
Industrial (I):
Automotive (E):
TA = -40°C to +85°C
TA = -40°C to +125°C
Parameter
Symbol
Min.
Max.
Units
Conditions
SCL and SDA pins:
VIH
0.7 VCC
—
V
High-level input voltage
Low-level input voltage
VIL
.3 VCC
—
V
V
Hysteresis of Schmitt Trigger
inputs
VHYS
0.05 VCC
(Note)
Low-level output voltage
Input leakage current
VOL
.40
±1
±1
10
V
IOL = 3.0 mA, VCC = 4.5V
VIN = VSS or VCC, WP = Vss
VOUT = VSS or VCC
ILI
—
—
—
μA
μA
pF
Output leakage current
ILO
Pin capacitance (all inputs/outputs)
CIN, COUT
VCC = 5.0V (Note)
TA = 25°C, f = 1 MHz
Operating current
Standby current
ICC Read
ICC Write
ICCS
—
—
—
1
3
mA
mA
μA
VCC = 5.5V, SCL = 400 kHz
VCC = 5.5V
50
VCC = 5.5V, SDA = SCL = VCC
WP = VSS
Note:
This parameter is periodically sampled and not 100% tested.
DS21201G-page 2
© 2007 Microchip Technology Inc.
24C01C
TABLE 1-2:
AC CHARACTERISTICS
All parameters apply across the specified
operating ranges unless otherwise noted.
Vcc = 4.5V to 5.5V
Industrial (I):
Automotive (E):
TA- = -40°C to +85°C
TA- = -40°C to +125°C
Tamb > +85°C -40°C ≤ Tamb ≤ +85°C
Parameter
Clock frequency
Symbol
Units
Remarks
Min.
Max.
Min.
Max.
FCLK
THIGH
TLOW
TR
—
4000
4700
—
100
—
—
600
1300
—
400
—
kHz
ns
Clock high time
Clock low time
—
—
ns
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
1000
300
—
300
300
—
ns
(Note 1)
(Note 1)
TF
—
—
ns
THD:STA
4000
600
ns
After this period the first
clock pulse is generated
Start condition setup time
TSU:STA
4700
—
600
—
ns
Only relevant for repeated
Start condition
Data input hold time
Data input setup time
Stop condition setup time
Output valid from clock
Bus free time
THD:DAT
TSU:DAT
TSU:STO
TAA
0
—
—
0
—
—
ns
ns
ns
ns
ns
(Note 2)
250
4000
—
100
600
—
—
—
3500
—
900
—
(Note 2)
TBUF
4700
1300
Time the bus must be free
before a new transmission
can start
Output fall time from VIH
minimum to VIL maximum
TOF
—
—
250 20 +0.1 CB
250
50
ns
ns
(Note 1), CB ≤ 100 pF
Input filter spike suppression TSP
(SDA and SCL pins)
50
—
(Note 3)
Write cycle time
Endurance
TWR
—
1.5
—
—
1
ms Byte or Page mode
1M
1M
—
cycles 25°C, VCC = 5.0V, Block
mode (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
FIGURE 1-1:
BUS TIMING DATA
THIGH
TF
TR
SCL
TSU:STA
TLOW
THD:DAT
TSU:DAT
TSU:STO
SDA
IN
THD:STA
TSP
TBUF
TAA
SDA
OUT
© 2007 Microchip Technology Inc.
DS21201G-page 3
24C01C
2.0
2.1
PIN DESCRIPTIONS
3.0
FUNCTIONAL DESCRIPTION
The 24C01C supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, and a device
receiving data as receiver. The bus has to be controlled
by a master device which generates the Serial Clock
(SCL), controls the bus access, and generates the Start
and Stop conditions, while the 24C01C works as slave.
Both master and slave can operate as transmitter or
receiver, but the master device determines which mode
is activated.
SDA Serial Data
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for
400 kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2.2
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
2.3
A0, A1, A2
The levels on these inputs are compared with the
corresponding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 24C01C devices may be connected to the
same bus by using different Chip Select bit combina-
tions. These inputs must be connected to either VCC or
VSS.
2.4
Test
This pin is utilized for testing purposes only. It may be
tied high, tied low or left floating.
2.5
Noise Protection
The 24C01C employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 3.8 volts at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
DS21201G-page 4
© 2007 Microchip Technology Inc.
24C01C
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
4.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is
theoretically unlimited, although only the last sixteen
will be stored when doing a write operation. When an
overwrite does occur it will replace data in a first-in first-
out fashion.
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.5
Acknowledge
4.1
Bus Not Busy (A)
Each receiving device, when addressed, is required to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
Both data and clock lines remain high.
4.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
Note:
The 24C01C does not generate any
Acknowledge bits if an internal program-
ming cycle is in progress.
The device that acknowledges has to pull down the
SDA line during the Acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an Acknowledge bit on the last
byte that has been clocked out of the slave. In this case,
the slave must leave the data line high to enable the
master to generate the Stop condition (Figure 4-2).
4.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
4.4
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
FIGURE 4-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS CHARACTERISTICS
(A)
(B)
(C)
(D)
(C) (A)
SCL
SDA
Start
Condition
Stop
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
FIGURE 4-2:
ACKNOWLEDGE TIMING
Acknowledge
Bit
1
2
3
4
5
6
7
8
9
1
2
3
SCL
SDA
Data from transmitter
Data from transmitter
Receiver must release the SDA line at this
point so the Transmitter can continue send-
ing data.
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
© 2007 Microchip Technology Inc.
DS21201G-page 5
24C01C
FIGURE 5-1:
CONTROL BYTE FORMAT
5.0
DEVICE ADDRESSING
Read/Write Bit
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
The control byte consists of a four-bit control code; for
the 24C01C this is set as ‘1010’ binary for read and
write operations. The next three bits of the control byte
are the Chip Select bits (A2, A1, A0). The Chip Select
bits allow the use of up to eight 24C01C devices on the
same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are in effect the three Most Significant bits of the word
address.
Chip Select
Control Code
Bits
S
1
0
1
0
A2 A1 A0 R/W ACK
Slave Address
Acknowledge Bit
Start Bit
5.1
Contiguous Addressing Across
Multiple Devices
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’ a read operation is
selected, and when set to a ‘0’ a write operation is
selected. Following the Start condition, the 24C01C
monitors the SDA bus checking the control byte being
transmitted. Upon receiving a ‘1010’ code and appro-
priate Chip Select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24C01C will select a read or
write operation.
The Chip Select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 8K bits by
adding up to eight 24C01C devices on the same bus.
In this case, software can use A0 of the control byte as
address bit A8, A1 as address bit A9, and A2 as
address bit A10. It is not possible to write or read
across device boundaries.
DS21201G-page 6
© 2007 Microchip Technology Inc.
24C01C
After the receipt of each word, the four lower order
Address Pointer bits are internally incremented by one.
The higher order four bits of the word address remains
constant. If the master should transmit more than 16
bytes prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received an
internal write cycle will begin (Figure 6-2).
6.0
6.1
WRITE OPERATIONS
Byte Write
Following the Start signal from the master, the device
code(4 bits), the Chip Select bits (3 bits), and the R/W
bit, which is a logic low, is placed onto the bus by the
master transmitter. The device will acknowledge this
control byte during the ninth clock pulse. The next byte
transmitted by the master is the word address and will
be written into the Address Pointer of the 24C01C.
After receiving another Acknowledge signal from the
24C01C the master device will transmit the data word
to be written into the addressed memory location. The
24C01C acknowledges again and the master gener-
ates a Stop condition. This initiates the internal write
cycle, and during this time the 24C01C will not
generate Acknowledge signals (Figure 6-1).
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes actually
being written. Physical page boundaries
start at addresses that are integer
multiples of the page buffer size (or ‘page
size’) and end at addresses that are
integer multiples of [page size – 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
6.2
Page Write
The write control byte, word address and the first data
byte are transmitted to the 24C01C in the same way as
in a byte write. But instead of generating a Stop
condition, the master transmits up to 15 additional data
bytes to the 24C01C which are temporarily stored in
the on-chip page buffer and will be written into the
memory after the master has transmitted a Stop
condition.
FIGURE 6-1:
BYTE WRITE
S
T
A
R
T
S
T
Bus Activity
Master
Control
Byte
Word
Address
Data
O
P
SDA Line
S
P
A
C
K
A
C
K
A
C
K
Bus Activity
FIGURE 6-2:
PAGE WRITE
S
T
A
R
T
S
T
O
P
Bus Activity
Master
Control
Byte
Word
Address (n)
Data n
Data n +1
Data n + 15
SDA Line
S
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Bus Activity
© 2007 Microchip Technology Inc.
DS21201G-page 7
24C01C
FIGURE 7-1:
ACKNOWLEDGE
POLLING FLOW
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, then the Start bit and control byte
must be re-sent. If the cycle is complete, then the
device will return the ACK and the master can then
proceed with the next Read or Write command. See
Figure 7-1 for flow diagram.
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
No
Yes
Next
Operation
DS21201G-page 8
© 2007 Microchip Technology Inc.
24C01C
After the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the
internal Address Pointer is set. Then the master issues
the control byte again but with the R/W bit set to a one.
The 24C01C will then issue an acknowledge and trans-
mits the eight bit data word. The master will not
acknowledge the transfer, but does generate a Stop
condition and the 24C01C discontinues transmission
(Figure 8-2). After this command, the internal address
counter will point to the address location following the
one that was just read.
8.0
READ OPERATIONS
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1
Current Address Read
The 24C01C contains an address counter that main-
tains the address of the last word accessed, internally
incremented by one. Therefore, if the previous read
access was to address n, the next current address read
operation would access data from address n + 1. Upon
receipt of the slave address with the R/W bit set to one,
the 24C01C issues an acknowledge and transmits the
eight-bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24C01C discontinues transmission (Figure 8-1).
8.3
Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the 24C01C transmits
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24C01C to transmit the next sequentially
addressed 8-bit word (Figure 8-3).
8.2
Random Read
To provide sequential reads the 24C01C contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation. The internal Address
Pointer will automatically roll over from address 7F to
address 00.
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24C01C as part of a write operation.
FIGURE 8-1:
CURRENT ADDRESS READ
S
T
S
Bus Activity
Master
Control
Byte
A
R
T
T
Data
O
P
P
SDA Line
S
A
C
K
N
O
Bus Activity
A
C
K
FIGURE 8-2:
RANDOM READ
S
T
A
R
T
S
T
A
R
T
S
T
O
P
Bus Activity
Master
Control
Byte
Word
Address (n)
Control
Byte
Data (n)
S
P
S
SDA Line
A
C
K
A
C
K
A
C
K
N
O
Bus Activity
A
C
K
© 2007 Microchip Technology Inc.
DS21201G-page 9
24C01C
FIGURE 8-3:
SEQUENTIAL READ
S
T
O
P
Bus Activity
Master
Control
Data n
Byte
Data n + 1
Data n + 2
Data n + X
P
SDA Line
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
Bus Activity
DS21201G-page 10
© 2007 Microchip Technology Inc.
24C01C
9.0
9.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil)
Example:
24C01C
XXXXXXXX
T/XXXNNN
I/P
13F
e
3
YYWW
0527
8-Lead SOIC (3.90 mm)
Example:
24C01CI
XXXXXXXT
e
3
XXXXYYWW
SN
0527
NNN
13F
Example:
Example:
8-Lead TSSOP
4C1C
I527
13F
XXXX
TYWW
NNN
8-Lead MSOP
XXXXT
4C1CI
YWWNNN
52713F
8-Lead 2x3 DFN
Example:
XXX
YWW
NN
2N7
527
13
© 2007 Microchip Technology Inc.
DS21201G-page 11
24C01C
1st Line Marking Codes
Part Number
DFN
TSSOP
MSOP
I Temp.
E Temp.
24C01C
4C1C
4C1CT
2N7
2N8
Note:
T = Temperature grade (I, E)
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
e
3
Note: For very small packages with no room for the Pb-free JEDEC designator
e
3
, the marking will only appear on the outer carton or reel label.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
DS21201G-page 12
© 2007 Microchip Technology Inc.
24C01C
8-Lead Plastic Dual In-Line (P or PA) – 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
N
NOTE 1
E1
3
1
2
D
E
A2
A
L
A1
c
e
eB
b1
b
Units
INCHES
Dimension Limits
MIN
NOM
8
MAX
Number of Pins
Pitch
N
e
.100 BSC
–
Top to Seating Plane
A
–
.210
.195
–
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A2
A1
E
.115
.015
.290
.240
.348
.115
.008
.040
.014
–
.130
–
.310
.250
.365
.130
.010
.060
.018
–
.325
.280
.400
.150
.015
.070
.022
.430
E1
D
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
b1
b
Lower Lead Width
Overall Row Spacing §
eB
Notes:
1. Pin 1 visual index feature may vary, but must be located with the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-018B
© 2007 Microchip Technology Inc.
DS21201G-page 13
24C01C
8-Lead Plastic Small Outline (SN or OA) – Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
e
N
E
E1
NOTE 1
1
2
3
α
h
b
h
c
φ
A2
A
L
A1
L1
β
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
Overall Height
A
–
–
1.75
–
Molded Package Thickness
Standoff
A2
A1
E
1.25
0.10
–
§
–
0.25
Overall Width
6.00 BSC
Molded Package Width
Overall Length
Chamfer (optional)
Foot Length
E1
D
h
3.90 BSC
4.90 BSC
0.25
0.40
–
0.50
1.27
L
–
Footprint
L1
φ
1.04 REF
Foot Angle
0°
0.17
0.31
5°
–
–
–
–
–
8°
Lead Thickness
Lead Width
c
0.25
0.51
15°
b
Mold Draft Angle Top
Mold Draft Angle Bottom
α
β
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-057B
DS21201G-page 14
© 2007 Microchip Technology Inc.
24C01C
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
1
2
b
e
c
φ
A
A2
A1
L
L1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
0.65 BSC
Overall Height
A
–
–
1.20
1.05
0.15
Molded Package Thickness
Standoff
A2
A1
E
0.80
0.05
1.00
–
Overall Width
6.40 BSC
Molded Package Width
Molded Package Length
Foot Length
E1
D
4.30
2.90
0.45
4.40
4.50
3.10
0.75
3.00
L
0.60
Footprint
L1
φ
1.00 REF
Foot Angle
0°
–
–
–
8°
Lead Thickness
Lead Width
c
0.09
0.20
0.30
b
0.19
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-086B
© 2007 Microchip Technology Inc.
DS21201G-page 15
24C01C
8-Lead Plastic Micro Small Outline Package (MS or UA) [MSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
2
b
1
e
c
φ
A2
A
L
L1
A1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
0.65 BSC
Overall Height
A
–
–
1.10
0.95
0.15
Molded Package Thickness
Standoff
A2
A1
E
0.75
0.00
0.85
–
4.90 BSC
3.00 BSC
3.00 BSC
0.60
Overall Width
Molded Package Width
Overall Length
Foot Length
E1
D
L
0.40
0.80
Footprint
L1
φ
0.95 REF
–
Foot Angle
0°
8°
Lead Thickness
c
0.08
–
0.23
0.40
Lead Width
b
0.22
–
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-111B
DS21201G-page 16
© 2007 Microchip Technology Inc.
24C01C
8-Lead Plastic Dual Flat, No Lead Package (MC) – 2x3x0.9 mm Body [DFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
e
D
b
N
N
L
K
E2
E
EXPOSED PAD
NOTE 1
NOTE 1
2
1
1
2
D2
BOTTOM VIEW
TOP VIEW
A
NOTE 2
A3
A1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
8
MAX
Number of Pins
Pitch
N
e
0.50 BSC
0.90
Overall Height
Standoff
A
0.80
0.00
1.00
0.05
A1
A3
D
0.02
Contact Thickness
Overall Length
Overall Width
0.20 REF
2.00 BSC
3.00 BSC
–
E
Exposed Pad Length
Exposed Pad Width
Contact Width
Contact Length
Contact-to-Exposed Pad
D2
E2
b
1.30
1.50
0.18
0.30
0.20
1.75
1.90
0.30
0.50
–
–
0.25
L
0.40
K
–
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. Package is saw singulated.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-123B
© 2007 Microchip Technology Inc.
DS21201G-page 17
24C01C
APPENDIX A: REVISION HISTORY
Revision D
Corrections to Section 1.0, Electrical Characteristics.
Revision E
Added DFN package.
Revision F (01/2007)
Revised Features Section; Deleted Commercial Temp;
Replaced Package Drawings; Replaced On-Line
Support page; Revised Product ID System.
Revision G (03/2007)
Replaced Package Drawings (Rev. AM).
DS21201G-page 18
© 2007 Microchip Technology Inc.
24C01C
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata,
application notes and sample programs, design
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• Development Systems Information Line
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
Technical support is available through the web site
at: http://support.microchip.com
• Business of Microchip – Product selector and
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CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
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specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com, click on Customer Change
Notification and follow the registration instructions.
© 2007 Microchip Technology Inc.
DS21201G-page 19
24C01C
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
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Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
24C01C
DS21201G
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21201G-page 20
© 2007 Microchip Technology Inc.
24C01C
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Package
Device:
24C01C 1K I2C Serial EEPROM
24C01CT 1K I2C Serial EEPROM (Tape and Reel)
Temperature
Range:
I
E
=
=
-40°C to +85°C
-40°C to +125°C
Package:
P
=
=
=
=
=
Plastic DIP (300 mil Body), 8-lead
Plastic SOIC, (3.90 mm Body), 8-lead
TSSOP (4.4 mm Body), 8-lead
Plastic Micro Small Outline (MSOP), 8-lead
2x3 DFN, 8-lead
SN
ST
MS
MC
© 2007 Microchip Technology Inc.
DS21201G-page 21
24C01C
NOTES:
DS21201G-page 22
© 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC,
PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and
SmartShunt are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Linear Active Thermistor, Migratable
Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor
and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi,
MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit,
PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel, Total
Endurance, UNI/O, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2007, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona, Gresham, Oregon and Mountain View, California. The
Company’s quality system processes and procedures are for its PIC®
MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial
EEPROMs, microperipherals, nonvolatile memory and analog
products. In addition, Microchip’s quality system for the design and
manufacture of development systems is ISO 9001:2000 certified.
© 2007 Microchip Technology Inc.
DS21201G-page 23
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
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Technical Support:
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Web Address:
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Tel: 86-29-8833-7250
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12/08/06
DS21201G-page 24
© 2007 Microchip Technology Inc.
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