24C02C-C/STG_技术文档

24AA00/24LC00/24C00

24AA014/24LC014

24AA02/24LC02B

24AA024/24LC024

24AA04/24LC04B

24AA16/24LC16B

24AA64/24LC64

24AA01/24LC01B

24C01C

24C02C

24AA025/24LC025

24AA08/24LC08B

24AA32A/24LC32A

24AA128/24LC128/24FC128

24AA256/24LC256/24FC256 24AA512/24LC512/24FC512

2

™

I C Serial EEPROM Family Data Sheet

Features:

Description:

• 128-bit through 512 Kbit devices

The Microchip Technology Inc. 24CXX, 24LCXX,

24AAXX and 24FCXX (24XX*) devices are a family of

128-bit through 512 Kbit Electrically Erased PROMs.

The devices are organized in blocks of x8-bit memory

with 2-wire serial interfaces. Low voltage design

permits operation down to 1.8V (for 24AAXX devices),

with standby and active currents of only 1 μA and 1

mA, respectively. Devices 1 Kbit and larger have page

write capability. Parts having functional address lines

allow connection of up to 8 devices on the same bus.

The 24XX family is available in the standard 8-pin

PDIP, surface mount SOIC, TSSOP and MSOP pack-

ages. Most 128-bit through 16 Kbit devices are also

available in the 5-lead SOT-23 package. DFN

packages (2x3mm or 5x6mm) are also available. All

packages are available in a Pb-free (Matte Tin) finish.

• Single-supply with operation down to 1.8V for

24AAXX devices

• Low-power CMOS technology:

- 1 mA active current typical

- 1 μA standby current typical (I-temp)

2

• 2-wire serial interface bus, I C™ compatible

• Schmitt Trigger inputs for noise suppression

• Output slope control to eliminate ground bounce

• 100 kHz (1.8V) and 400 kHz (≥ 2.5V) compatibility

• 1 MHz for 24FCXX products

• Self-timed write cycle (including auto-erase)

• Page write buffer

• Hardware write-protect available on most devices

• Factory programming (QTP) available

• ESD protection > 4,000V

• 1 million erase/write cycles

• Data retention > 200 years

• 8-lead PDIP, SOIC, TSSOP and MSOP packages

• 5-lead SOT-23 package (most 1-16 Kbit devices)

• 8-lead 2x3mm and 5x6mm DFN packages

available

• Available for extended temperature ranges:

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C

(1)

Package Types

(2)

SOT-23-5

TSSOP

PDIP/SOIC

TSSOP/MSOP

(24XX00)

14

13

12

11

10

9

1

2

3

4

5

6

7

V^CC

A0

A1

A0

A1

1

2

3

4

8

7

6

5

VCC

(3)

WP

1

2

3

4

8

7

6

5

A0

A1

V^CC

WP

NC

VCC

1

2

5

SCL

V^SS

(3)

NC

A2

WP

A2

SCL

SDA

A2

SCL

SDA

SCL

SDA

V^SS

VSS

3

NC

4

8

V^SS

SOT-23-5

Note 1: Pins A0, A1, A2 and WP are not used by some

devices (no internal connections). See Table 1-1,

Device Selection Table, for details.

DFN

(all except 24XX00)

1

A0

8

7

6

5

VCC

(3)

WP

1

5

SCL

2

3

4

A1

A2

2: Pins A0 and A1 are no-connects for the 24XX128

and 24XX256 MSOP devices.

SCL

SDA

2

3

V^SS

3: Pin 7 is “not used” for 24XX00, 24XX025 and

V^SS

4

24C01C.

V^CC

SDA

*24XX is used in this document as a generic part number for 24 series devices in this data sheet. 24XX64, for example,

represents all voltages of the 64 Kbit device.

DS21930A-page 1

24AAXX/24LCXX/24FCXX

TABLE 1-1:

DEVICE SELECTION TABLE

Write-

Protect

Scheme

Functional

Address

Pins

VCC

Max Clock

Frequency

Page

Size

Temp

(5)

Part Number

Packages

Range

128-bit devices

24AA00

(1)

C, I

P, SN, ST, OT, MC

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

4.5-5.5V 400 kHz

(1)

—

None

24LC00

C, I, E

24C00

1 Kb devices

(2)

I

P, SN, ST, MS, OT, MC

24AA01

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

4.5V-5.5V 400 kHz

8 bytes

Entire Array

None

24LC01B

24AA014

24LC014

24C01C

I, E

(2)

I

P, SN, ST, MS, MC

16 bytes Entire Array A0, A1, A2

16 bytes

None

A0, A1, A2

C, I, E P, SN, ST, MC

2 Kb devices

24AA02

(2)

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

I

P, SN, ST, MS, OT, MC

8 bytes

Entire Array

None

24LC02B

24AA024

24LC024

24AA025

24LC025

I, E

(2)

I

P, SN, ST, MS, MC

P, SN, ST,MS, MC

16 bytes Entire Array A0, A1, A2

16 bytes

None

A0, A1, A2

Upper Half

of Array

C, I, E P, SN, ST, MC

24C02C

4.5-5.5V 400 kHz

4 Kb devices

24AA04

(2)

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

16 bytes Entire Array

None

I

P, SN, ST, MS, OT, MC

24LC04B

I, E

8 Kb devices

24AA08

(2)

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

I

P, SN, ST, MS, OT, MC

P, SN, SM, ST, MS, MC

16 bytes Entire Array

None

24LC08B

I, E

16 Kb devices

24AA16

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

I

16 bytes Entire Array

None

24LC16B

I, E

32 Kb devices

24AA32A

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

I

32 bytes Entire Array A0, A1, A2

24LC32A

I, E

64 Kb devices

24AA64

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

I

32 bytes Entire Array A0, A1, A2

24LC64

I, E

Note 1: 100 kHz for V^CC<4.5V.

2: 100 kHz for V^CC<2.5V.

3: 400 kHz for V^CC<2.5V

4: Pins A0 and A1 are no-connects for the 24XX128 and 24XX256 in the MSOP package.

5: P = 8-PDIP, SN = 8-SOIC (150 mil JEDEC), ST = 8-TSSOP, OT = 5 or 6-SOT23, MC = 2x3mm DFN,

MS = 8-MSOP, SM = 8-SOIC (200 mil EIAJ), MF = 5x6mm DFN, ST14 = 14-TSSOP.

DS21930A-page 2

24AAXX/24LCXX/24FCXX

TABLE 1-1:

DEVICE SELECTION TABLE (CONTINUED)

Write-

Protect

Scheme

Functional

Address

Pins

VCC

Max Clock

Frequency

Page

Size

Temp

(5)

Part Number

Packages

Range

128 Kb devices

24AA128

(2)

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

I

I, E

I

P, SN, SM, ST, MS, MF,

ST14

A0, A1,

24LC128

64 bytes Entire Array

(4)

A2

(3)

24FC128

1.8-5.5V 1 MHz

256 Kb devices

24AA256

(2)

1.8-5.5V 400 kHz

2.5-5.5V 400 kHz

I

I, E

I

P, SN, SM, ST, MS, MF,

ST14

A0, A1,

24LC256

64 bytes Entire Array

(4)

A2

(3)

24FC256

1.8-5.5V 1 MHz

512 Kb devices

24AA512

(2)

1.8-5.5V 400 kHz

I

I, E

I

P, SM, MF, ST14

128

bytes

24LC512

2.5-5.5V 400 kHz

Entire Array A0, A1, A2

(3)

24FC512

1.8-5.5V

1 MHz

Note 1: 100 kHz for VCC <4.5V.

2: 100 kHz for V^CC<2.5V.

3: 400 kHz for V^CC<2.5V

4: Pins A0 and A1 are no-connects for the 24XX128 and 24XX256 in the MSOP package.

5: P = 8-PDIP, SN = 8-SOIC (150 mil JEDEC), ST = 8-TSSOP, OT = 5 or 6-SOT23, MC = 2x3mm DFN,

MS = 8-MSOP, SM = 8-SOIC (200 mil EIAJ), MF = 5x6mm DFN, ST14 = 14-TSSOP.

DS21930A-page 3

24AAXX/24LCXX/24FCXX

2.0

ELECTRICAL CHARACTERISTICS

(†)

Absolute Maximum Ratings

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. V^SS......................................................................................................... -0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins ......................................................................................................................................................≥ 4 kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to

the device. This is a stress rating only and functional operation of the device at those or any other conditions

above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating

conditions for extended periods may affect device reliability.

TABLE 2-1:

DC CHARACTERISTICS

Electrical Characteristics:

Commercial (C): V^CC= +1.8V to 5.5V TA = 0°C to +70°C

Industrial (I): V^CC= +1.8V to 5.5V TA = -40°C to +85°C

Automotive (E): V^CC= +2.5V to 5.5V TA = -40°C to 125°C

DC CHARACTERISTICS

Param.

Sym.

No.

Characteristic

Min.

Max.

Units

Conditions

D1

—

A0, A1, A2, SCL, SDA and

WP pins:

—

D2

D3

V^IH

V^IL

High-level input voltage

Low-level input voltage

0.7 VCC

—

V

—

0.3 VCC

0.2 VCC

V

VCC ≥ 2.5V

V^CC< 2.5V

D4

V^HYS

Hysteresis of Schmitt Trigger 0.05 VCC

inputs (SDA, SCL pins)

—

V

(Note 1)

D5

D6

D7

D8

V^OL

I^LI

Low-level output voltage

Input leakage current

Output leakage current

—

0.40

1

V

IOL = 3.0 mA @ VCC = 2.5V

VIN = VSS or VCC

μA

pF

ILO

1

VOUT = VSS or VCC

CIN,

Pin capacitance

10

VCC = 5.0V (Note 1)

C^OUT

(all inputs/outputs)

T^A= 25°C, FCLK = 1 MHz

D9

I^CCRead Operating current

—

400

1

μA

24XX128, 256, 512: VCC = 5.5V,

SCL = 400 kHz

mA

All except 24XX128, 256, 512:

V^CC= 5.5V, SCL = 400 kHz

I^CCWrite

—

3

5

mA

VCC = 5.5V, All except 24XX512

V^CC= 5.5V, 24XX512

D10

I^CCS

Standby current

1

μA

TA = -40°C to +85°C

SCL = SDA = V^CC= 5.5V

A0, A1, A2, WP = V^SSor VCC

—

5

TA = -40°C to 125°C

SCL = SDA = V^CC= 5.5V

A0, A1, A2, WP = V^SSor VCC

50

24C01C and 24C02C only

SCL = SDA = V^CC= 5.5V

A0, A1, A2, WP = V^SSor VCC

Note 1: This parameter is periodically sampled and not 100% tested.

DS21930A-page 4

24AAXX/24LCXX/24FCXX

TABLE 2-2:

AC CHARACTERISTICS – ALL EXCEPT 24XX00, 24C01C

AND 24C02C

Electrical Characteristics:

Industrial (I): VCC = +1.8V to 5.5V TA = -40°C to +85°C

Automotive (E): V^CC= +2.5V to 5.5V TA = -40°C to 125°C

AC CHARACTERISTICS

Param.

Sym.

No.

Characteristic

Clock frequency

Min.

Max.

Units

Conditions

1

2

3

4

F^CLK

—

100

400

kHz 1.8V ≤ V^CC< 2.5V

2.5V ≤ V^CC≤ 5.5V

400

1.8V ≤ V^CC< 2.5V 24FCXXX

2.5V ≤ V^CC≤ 5.5V 24FCXXX

1000

T^HIGH

Clock high time

4000

600

500

—

ns

1.8V ≤ V^CC< 2.5V

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC< 2.5V 24FCXXX

2.5V ≤ V^CC≤ 5.5V 24FCXXX

T^LOW

Clock low time

4700

1300

500

—

1.8V ≤ VCC < 2.5V

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC< 2.5V 24FCXXX

2.5V ≤ V^CC≤ 5.5V 24FCXXX

T^R

SDA and SCL rise time

—

1000

300

1.8V ≤ VCC < 2.5V

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC≤ 5.5V 24FCXXX

All except 24FCXXX

(Note 1)

300

5

6

T^F

SDA and SCL fall time

—

300

100

ns

(Note 1)

1.8V ≤ V^CC≤ 5.5V 24FCXXX

T^HD:STA Start condition hold time

4000

600

250

—

1.8V ≤ V^CC< 2.5V

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC< 2.5V 24FCXXX

2.5V ≤ V^CC≤ 5.5V 24FCXXX

7

T^SU:STA Start condition setup time

4700

600

250

—

ns

1.8V ≤ V^CC< 2.5V

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC< 2.5V 24FCXXX

2.5V ≤ V^CC≤ 5.5V 24FCXXX

(Note 2)

8

9

T^HD:DAT Data input hold time

T^SU:DAT Data input setup time

0

—

ns

250

100

—

1.8V ≤ VCC < 2.5V

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC≤ 5.5V 24FCXXX

10

T^SU:STO Stop condition setup time

4000

600

250

—

ns

1.8 V ≤ V^CC< 2.5V

2.5 V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC< 2.5V 24FCXXX

2.5 V ≤ V^CC≤ 5.5V 24FCXXX

11

12

T^SU:WP WP setup time

4000

600

—

ns

1.8V ≤ VCC < 2.5V

2.5V ≤ V^CC≤ 5.5V

600

1.8V ≤ V^CC≤ 5.5V 24FCXXX

T^HD:WP WP hold time

4700

1300

—

1.8V ≤ V^CC< 2.5V

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC≤ 5.5V 24FCXXX

Note 1: Not 100% tested. C^B= total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site:

www.microchip.com.

4: 24FCXXX denotes the 24FC128, 24FC256 and 24FC512 devices.

DS21930A-page 5

24AAXX/24LCXX/24FCXX

TABLE 2-2:

AC CHARACTERISTICS – ALL EXCEPT 24XX00, 24C01C

AND 24C02C (CONTINUED)

Electrical Characteristics:

Industrial (I): VCC = +1.8V to 5.5V TA = -40°C to +85°C

Automotive (E): V^CC= +2.5V to 5.5V TA = -40°C to 125°C

AC CHARACTERISTICS

Param.

Sym.

No.

Characteristic

Min.

Max.

Units

Conditions

13

14

15

TAA

Output valid from clock

—

3500

900

400

ns

1.8V ≤ V^CC< 2.5V

(Note 2)

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC< 2.5V 24FCXXX

2.5V ≤ V^CC≤ 5.5V 24FCXXX

T^BUF

Bus free time: Time the bus

must be free before a new

transmission can start

4700

1300

500

—

ns

1.8V ≤ V^CC< 2.5V

2.5V ≤ V^CC≤ 5.5V

1.8V ≤ V^CC< 2.5V 24FCXXX

2.5V ≤ V^CC≤ 5.5V 24FCXXX

All except 24FCXXX (Note 1)

T^OF

Output fall time from VIH

minimum to VIL maximum

C^B≤ 100 pF

10 + 0.1C^B

250

ns

24FCXXX (Note 1)

16

17

18

T^SP

T^WC

—

Input filter spike suppression

—

50

5

ns

All except 24FCXXX (Note 1)

(SDA and SCL pins)

Write cycle time (byte or

page)

ms

Endurance

1,000,000

—

cycles 25°C (Note 3)

Note 1: Not 100% tested. C^B= total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site:

www.microchip.com.

4: 24FCXXX denotes the 24FC128, 24FC256 and 24FC512 devices.

DS21930A-page 6

24AAXX/24LCXX/24FCXX

TABLE 2-3:

AC CHARACTERISTICS – 24XX00, 24C01C AND 24C02C

All Parameters apply across all

Commercial (C):

TA = 0°C to +70°C, VCC = 1.8V to 5.5V

T^A= -40°C to +85°C, VCC = 1.8V to 5.5V

T^A= -40°C to +125°C, VCC = 4.5V to 5.5V

recommended operating ranges Industrial (I):

unless otherwise noted

Automotive (E):

Parameter

Symbol

Min

Max

Units

Conditions

Clock frequency

F^CLK

—

100

400

kHz

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Clock high time

T^HIGH

T^LOW

T^R

4000

600

—

ns

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Clock low time

4700

1300

—

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

SDA and SCL rise time

—

1000

300

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

(Note 1)

SDA and SCL fall time

Start condition hold time

T^F

—

300

ns

T^HD:STA

4000

600

—

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Start condition setup time

T^SU:STA

4700

600

—

ns

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

(Note 2)

Data input hold time

Data input setup time

T^HD:DAT

T^SU:DAT

0

—

ns

250

100

—

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Stop condition setup time

T^SU:STO

4000

600

—

ns

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Output valid from clock

T^AA

—

3500

900

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

(Note 2)

Bus free time: Time the bus must T^BUF

be free before a new transmis-

sion can start

4700

1300

—

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.8V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Output fall time from V^IH

T^OF

T^SP

T^WC

20+0.1

CB

250

ns

(Note 1), CB ≤ 100 pF

minimum to VIL maximum

Input filter spike suppression

(SDA and SCL pins)

—

50

(Note 1)

Write cycle time

—

4

ms

24XX00

1.5

24C01C, 24C02C

Endurance

1,000,000

—

cycles (Note 3)

Note 1: Not 100% tested. C^B= total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained at www.microchip.com.

DS21930A-page 7

24AAXX/24LCXX/24FCXX

FIGURE 2-1:

BUS TIMING DATA

5

4

D4

2

SCL

7

3

10

8

9

SDA

IN

6

16

14

13

SDA

OUT

(protected)

WP

12

11

(unprotected)

DS21930A-page 8

24AAXX/24LCXX/24FCXX

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

8-Pin

5-PinSOT-23

All except

24XX00

8-Pin

5-Pin SOT-23

14-Pin

PDIPand TSSOPand

5x6 DFN and

2x3 DFN

Function

Name

24XX00

TSSOP

SOIC

MSOP

(1)

1

(3)

A0

1

2

—

2

—

2

1

2

6

7

8

9

1

2

User configurable Chip Select

Ground

(1)

2

A1

A2

3

4

3

VSS

SDA

SCL

(NC)

4

5

3

5

Serial Data

6

1

6

Serial Clock

—

4

—

3, 4, 5,

—

Not Connected

10, 11, 12

(2)

WP

7

—

5

4

13

14

7

8

Write-Protect Input

Power Supply

V^CC

8

Note 1: Pins 1 and 2 are not connected for the 24XX128 and 24XX256 MSOP packages.

2: Pin 7 is not used for 24XX00, 24XX025 and 24C01C.

3: Pins A0, A1 and A2 are not used by some devices (no internal connections). See Table 1-1 for details.

3.1

A0, A1, A2 Chip Address Inputs

3.3

Serial Clock (SCL)

The A0, A1 and A2 pins are not used by the 24XX01

through 24XX16 devices.

This input is used to synchronize the data transfer to

and from the device.

The A0, A1 and A2 inputs are used by the 24C01C,

24C02C, 24XX014, 24XX024, 24XX025 and the

24XX32 through 24XX512 for multiple device opera-

tions. The levels on these inputs are compared with the

corresponding bits in the slave address. The chip is

selected if the compare is true.

3.4

Write-Protect (WP)

This pin must be connected to either VSS or VCC. If tied

to V^SS, write operations are enabled. If tied to VCC,

write operations are inhibited but read operations are

not affected. See Table 1-1 for the write-protect

scheme of each device.

For the 24XX128 and 24XX256 in the MSOP package

only, pins A0 and A1 are not connected.

3.5

Power Supply (VCC)

Up to eight devices (two for the 24XX128 and

24XX256 MSOP package) may be connected to the

same bus by using different Chip Select bit

combinations.

A VCC threshold detect circuit is employed which

disables the internal erase/write logic if V^CCis below

1.5V at nominal conditions. For the 24C00, 24C01C

and 24C02C devices, the erase/write logic is disabled

below 3.8V at nominal conditions.

In most applications, the chip address inputs A0, A1

and A2 are hard-wired to logic ‘0’ or logic ‘1’. For

applications in which these pins are controlled by a

microcontroller or other programmable device, the chip

address pins must be driven to logic ‘0’ or logic ‘1’

before normal device operation can proceed.

3.2

Serial Data (SDA)

This is a bidirectional pin used to transfer addresses

and data into and out of the device. It is an open drain

terminal. Therefore, the SDA bus requires a pull-up

resistor to V^CC(typical 10 kΩ for 100 kHz, 2 kΩ for

400 kHz and 1 MHz).

For normal data transfer, SDA is allowed to change

only during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

DS21930A-page 9

24AAXX/24LCXX/24FCXX

4.0

FUNCTIONAL DESCRIPTION

Each 24XX device supports a bidirectional, 2-wire bus

and data transmission protocol. A device that sends

data onto the bus is defined as a transmitter, while a

device receiving data is defined as a receiver. The bus

has to be controlled by a master device which gener-

ates the Serial Clock (SCL), controls the bus access

and generates the Start and Stop conditions, while the

24XX works as slave. Both master and slave can

operate as transmitter or receiver, but the master

device determines which mode is activated.

Block Diagram

A0*A1*A2* WP*

HV Generator

I/O

M

emory

ontrol

Logic

EEPROM

Array

C

ontrol

ogic

C

XDEC

L

Page Latches*

I/O

SCL

YDEC

SDA

V

CC

SS

Sense Amp.

R/W Control

V

* A0, A1, A2, WP and page latches are not used by some

devices.

See Table 1-1, Device Selection Table, for details.

DS21930A-page 10

24AAXX/24LCXX/24FCXX

5.0

BUS CHARACTERISTICS

The following bus protocol has been defined:

• Data transfer may be initiated only when the bus

is not busy.

• During data transfer, the data line must remain

stable whenever the clock line is high. Changes in

the data line while the clock line is high will be

interpreted as a Start or Stop condition.

Accordingly, the following bus conditions have been

defined (Figure 5-1).

5.1

Bus Not Busy (A)

Both data and clock lines remain high.

5.2

Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock

(SCL) is high determines a Start condition. All

commands must be preceded by a Start condition.

5.3

Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock

(SCL) is high determines a Stop condition. All

operations must be ended with a Stop condition.

5.4

Data Valid (D)

The state of the data line represents valid data when,

after a Start condition, the data line is stable for the

duration of the high period of the clock signal.

The data on the line must be changed during the low

period of the clock signal. There is one clock pulse per

bit of data.

Each data transfer is initiated with a Start condition and

terminated with a Stop condition. The number of data

bytes transferred between Start and Stop conditions is

determined by the master device.

DS21930A-page 11

24AAXX/24LCXX/24FCXX

The device that acknowledges has to pull down the

SDA line during the acknowledge clock pulse in such a

way that the SDA line is stable low during the high

period of the acknowledge related clock pulse. Of

course, setup and hold times must be taken into

account. During reads, a master must signal an end-of-

data to the slave by not generating an Acknowledge bit

on the last byte that has been clocked out of the slave.

In this case, the slave (24XX) will leave the data line

high to enable the master to generate the Stop

condition (Figure 5-2).

5.5

Acknowledge

Each receiving device, when addressed, is obliged to

generate an acknowledge after the reception of each

byte. The master device must generate an extra clock

pulse which is associated with this Acknowledge bit.

Note:

During a write cycle, the 24XX will not

acknowledge commands.

FIGURE 5-1:

DATA TRANSFER SEQUENCE ON THE SERIAL BUS

(A)

(B)

(D)

(C) (A)

SCL

SDA

Start

Stop

Address or

Acknowledge

Valid

Data

Condition

Allowed

to Change

FIGURE 5-2:

ACKNOWLEDGE TIMING

Acknowledge

bit

1

2

3

4

5

6

7

8

9

1

2

3

SCL

SDA

Data from transmitter

Transmitter must release the SDA line at this point,

allowing the Receiver to pull the SDA line low to

acknowledge the previous eight bits of data.

Receiver must release the SDA line

at this point so the Transmitter can

continue sending data.

DS21930A-page 12

24AAXX/24LCXX/24FCXX

The last bit of the control byte defines the operation to

be performed. When set to ‘1’, a read operation is

selected. When set to ‘0’ a write operation is selected.

Following the Start condition, the 24XX monitors the

SDA bus. Upon receiving a ‘1010’ code, the block

select bits and the R/W bit, the slave device outputs an

Acknowledge signal on the SDA line. The address byte

follows the acknowledge.

5.6

Device Addressing For Devices

Without Functional Address Pins

A control byte is the first byte received following the

Start condition from the master device (Figure 5-3).

The control byte begins with a four-bit control code. For

the 24XX, this is set as ‘1010’ binary for read and write

operations. The next three bits of the control byte are

the block-select bits (B2, B1, B0). They are used by the

master device to select which of the 256-word blocks of

memory are to be accessed. These bits are in effect the

three Most Significant bits of the word address. Note

that B2, B1 and B0 are “don’t care” for the 24XX00, the

24XX01 and 24XX02. B2 and B1 are “don’t care” for

the 24XX04. B2 is “don’t care” for the 24XX08.

FIGURE 5-3:

CONTROL AND ADDRESS BYTE ASSIGNMENTS FOR

DEVICES WITHOUT ADDRESS PINS

Address Byte

Control Byte

24XX00

24XX01

x

.

x

.

A3

.

A0

S

1

0

1

0

x

R/W ACK

x

A6

.

A7

.

24XX02

24XX04

24XX08

24XX016

.

B0 R/W ACK

.

B1 B0 R/W ACK

.

B2 B1 B0 R/W ACK

Acknowledge

bit

Control Code

Start bit

Block Select bits

Read/Write bit (read = 1, write = 0)

x= “don’t care” bit

DS21930A-page 13

24AAXX/24LCXX/24FCXX

The last bit of the control byte defines the operation to

be performed. When set to a ‘1’, a read operation is

selected. When set to a ‘0’, a write operation is

selected.

5.7

Device Addressing For Devices

With Functional Address Pins

A control byte is the first byte received following the

Start condition from the master device (Figure 5-4).

The control byte begins with a 4-bit control code. For

the 24XX, this is set as ‘1010’ binary for read and write

operations. The next three bits of the control byte are

the Chip Select bits (A2, A1, A0). The Chip Select bits

allow the use of up to eight 24XX devices on the same

bus and are used to select which device is accessed.

The Chip Select bits in the control byte must corre-

spond to the logic levels on the corresponding A2, A1

and A0 pins for the device to respond. These bits are,

in effect, the three Most Significant bits of the word

address.

For higher density devices (24XX32 through

24XX512), the next two bytes received define the

address of the first data byte. Depending on the prod-

uct density, not all bits in the address high byte are

used. A15, A14, A13 and A12 are “don’t care” for

24XX32. A15, A14 and A13 are “don’t care” for

24XX64. A15 and A14 are “don’t care” for 24XX128.

A15 is “don’t care” for 24XX256. All address bits are

used for the 24XX512. The upper address bits are

transferred first, followed by the Less Significant bits.

Following the Start condition, the 24XX monitors the

SDA bus. Upon receiving a ‘1010’ code, appropriate

device select bits and the R/W bit, the slave device out-

puts an Acknowledge signal on the SDA line. The

address byte(s) follow the acknowledge.

For 24XX128 and 24XX256 in the MSOP package, the

A0 and A1 pins are not connected. During device

addressing, the A0 and A1 Chip Select bits (Figure 5-4)

should be set to ‘0’. Only two 24XX128 or 24XX256

MSOP packages can be connected to the same bus.

FIGURE 5-4:

CONTROL AND ADDRESS BYTE ASSIGNMENTS FOR

DEVICES WITH ADDRESS PINS

Control Byte

Address Byte

24C01C

24C02C

S

1

0

1

0

A2 A1 A0

R/W

ACK

x

A6

.

A0

A7

.

24XX024/025

Address High Byte

Address Low Byte

Control Byte

S

1

0

1

0

A2 A1 A0 R/W ACK

x

A11 A10 A9 A8

A7

.

A0

24XX32

S

x

A12 A11 A10 A9 A8

A7

24XX64

S

24XX128

24XX256

24XX512

A13 A12 A11 A10 A9 A8

A14 A13 A12 A11 A10 A9 A8

A15 A14 A13 A12 A11 A10 A9 A8

Acknowledge

bit

Chip Select bits*

Control Code

Start bit

Read/Write bit

(Read = 1, Write = 0)

x= “don’t care” bit

* Chip Select bits A1 and A0 must be set to ‘0’ for 24XX128/256 devices in the MSOP package.

DS21930A-page 14

24AAXX/24LCXX/24FCXX

5.7.1

CONTIGUOUS ADDRESSING

ACROSS MULTIPLE DEVICES

Chip Select bits A2, A1 and A0 can be used to expand

the contiguous address space by adding up to eight

24XXs on the same bus. Software can use the three

address bits of the control byte as the three Most

Significant bits of the address byte. For example, in the

24XX32 devices, software can use A0 of the control

byte as address bit A12; A1 as address bit A13; and A2

as address bit A14 (Table 5-1). It is not possible to

sequentially read across device boundaries.

TABLE 5-1:

CONTROL BYTE ADDRESS BITS

Maximum

Contiguous

Chip Select Bit Chip Select Bit Chip Select Bit

Devices

A2

A1

A0

Address Space

1K (24C01C)

8

8 Kb

A10

A14

A15

A16*

A17*

A18

A9

A8

1K (24XX014)

2K (24C02C)

8

16 Kb

256 Kb

512 Kb

1 Mb

A9

A8

2K (24XX024/025

32K (24XX32)

64K (24XX64)

128K (24XX128)

256K (24XX256)

512K (24XX512)

8

A9

A8

8

A13

A14

A15*

A16*

A17

A12

A13

A14

A15

A16

8

8*

8

2 Mb

4 Mb

* Up to two 24XX128 or 24XX256 devices in the MSOP package can be added for up to 256 kb or 512 kb of address

space, respectively. Bits A0 and A1 must be set to ‘0’.

DS21930A-page 15

24AAXX/24LCXX/24FCXX

For the 24XX00 devices, only the lower four address

bits are used by the device. The upper four bits are

“don’t cares.”

6.0

WRITE OPERATIONS

6.1

Byte Write

After receiving the ACK from the 24XX acknowledging

the final address byte, the master device transmits the

data word to be written into the addressed memory

location. The 24XX acknowledges again and the

master generates a Stop condition, which initiates the

internal write cycle.

A byte write operation begins with a Start condition

from the master followed by the four-bit control code

(see Figure 6-1 and Figure 6-2). The next 3 bits are

either the Block Address bits (for devices without

address pins) or the Chip Select bits (for devices with

address pins). Then the master transmitter clocks the

R/W bit (which is a logic low) onto the bus. The slave

then generates an Acknowledge bit during the ninth

clock cycle.

If an attempt is made to write to an array with the WP

pin held high, the device will acknowledge the

command, but no write cycle will occur, no data will be

written, and the device will immediately accept a new

command. After a byte Write command, the internal

address counter will increment to the next address

location. During a write cycle, the 24XX will not

acknowledge commands.

The next byte transmitted by the master is the address

byte (for 128-bit to 16 Kbit devices) or the high-order

address byte (for 32-512 Kbit devices). For 32 through

512 Kbit devices, the high-order address byte is

followed by the low-order address byte. In either case,

each address byte is acknowledged by the 24XX and

the address bits are latched into the internal address

counter of the 24XX.

FIGURE 6-1:

BYTE WRITE: 128-BIT TO 16 KBIT DEVICES

S

T

A

R

T

S

Bus Activity

Master

Control

Byte

Address

Byte

Data

Byte

T

O

P

SDA Line

S

P

A

C

K

A

C

K

A

C

K

Bus Activity

FIGURE 6-2:

BYTE WRITE: 32 TO 512 KBIT DEVICES

S

Bus Activity

Master

T

A

R

T

S

T

High Order

Address Byte

Control

Byte

Low Order

Address Byte

Data

Byte

O

P

SDA Line

S

P

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

DS21930A-page 16

24AAXX/24LCXX/24FCXX

6.2

Page Write

6.3

Write-Protection

The write control byte, word address byte(s), and the

first data byte are transmitted to the 24XX in much the

same way as in a byte write (see Figure 6-3 and

Figure 6-4 ). The exception is that instead of generating

a Stop condition, the master transmits up to one page

The WP pin allows the user to write-protect the array

when the pin is tied to V^CC. See Device Selection

Table 1-1 for the write-protect scheme of each device.

If tied to V^SS, the write protection is disabled. The WP

pin is sampled prior to the Stop bit for every Write

command (Figure 2-1). Toggling the WP pin after the

Stop bit will have no effect on the execution of the write

cycle.

(1)

of bytes , which is temporarily stored in the on-chip

page buffer. This data is then written into memory once

the master has transmitted a Stop condition. Upon

receipt of each word, the internal address counter is

incremented by one. If the master should transmit more

than one page of data prior to generating the Stop con-

dition, the address counter will roll over and the previ-

ously received data will be overwritten. As with the byte

write operation, once the Stop condition is received, an

internal write cycle begins. During the write cycle, the

24XX will not acknowledge commands.

Note: Page write operations are limited to

writing bytes within a single physical

page, regardless of the number of

bytes actually being written. Physical

page boundaries start at addresses

that are integer multiples of the page

buffer size (or ‘page size’) and end at

addresses that are integer multiples of

[page size – 1]. If a Page Write

command attempts to write across a

physical page boundary, the result is

that the data wraps around to the

beginning of the current page (over-

writing data previously stored there),

instead of being written to the next

page, as might be expected. It is there-

fore necessary for the application soft-

ware to prevent page write operations

that would attempt to cross a page

boundary.

Page writes can be any number of bytes within a page

(up to the page size), starting at any address. Only the

data bytes being addressed will be changed within the

page.

If an attempt is made to write to the array with the WP

pin held high, the device will acknowledge the

command, but no write cycle will occur, no data will be

written and the device will immediately accept a new

command.

Note 1: See Device Selection Table 1-1 for the

page size of each device.

FIGURE 6-3:

PAGE WRITE: 1 KB TO 16 KBIT DEVICES

S

T

A

R

T

S

T

Bus Activity

Master

Control

Byte

Address

Byte

Second

Final

Data Byte*

Initial

Data Byte

O

P

Data Byte

SDA Line

S

P

A

C

K

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

FIGURE 6-4:

PAGE WRITE: 32 TO 512 KBIT DEVICES

S

T

A

R

T

S

Final

Data Byte*

Initial

Control

Byte

High Order

Address Byte

Low Order

Address Byte

Bus Activity

Master

T

Data Byte

O

P

SDA Line

P

S

A

C

K

A

C

K

A

C

K

Bus Activity

C

K

* See Table 1-1 for maximum number of data bytes in a page.

DS21930A-page 17

24AAXX/24LCXX/24FCXX

FIGURE 7-1:

ACKNOWLEDGE

POLLING FLOW

7.0

ACKNOWLEDGE POLLING

Since the device will not acknowledge commands

during a write cycle, this can be used to determine

when the cycle is complete (This feature can be used

to maximize bus throughput). Once the Stop condition

for a Write command has been issued from the master,

the device initiates the internally timed write cycle. ACK

polling can be initiated immediately. This involves the

master sending a Start condition, followed by the con-

trol byte for a Write command (R/W = 0). If the device

is still busy with the write cycle, then no ACK will be

returned. If no ACK is returned, the Start bit and control

byte must be re-sent. If the cycle is complete, then the

device will return the ACK and the master can then pro-

ceed with the next Read or Write command. See

Figure 7-1 for flow diagram.

Send

Write Command

Send Stop

Condition to

Initiate Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

No

Yes

DS21930A-page 18

24AAXX/24LCXX/24FCXX

8.2

Random Read

8.0

READ OPERATION

Random read operations allow the master to access

any memory location in a random manner. To perform

this type of read operation, the byte address must first

be set. This is done by sending the byte address to the

24XX as part of a write operation (R/W bit set to ‘0’).

Once the byte address is sent, the master generates a

Start condition following the acknowledge. This termi-

nates the write operation, but not before the internal

address counter is set. The master then issues the

control byte again, but with the R/W bit set to a ‘1’. The

24XX will then issue an acknowledge and transmit the

8-bit data byte. The master will not acknowledge the

transfer but does generate a Stop condition, which

causes the 24XX to discontinue transmission

(Figure 8-2 and Figure 8-3). After a random Read

command, the internal address counter will increment

to the next address location.

Read operations are initiated in much the same way as

write operations with the exception that the R/W bit of

the control byte is set to ‘1’. There are three basic types

of read operations: current address read, random read

and sequential read.

8.1

Current Address Read

The 24XX contains an address counter that maintains

the address of the last byte accessed, internally incre-

mented by ‘1’. Therefore, if the previous read or write

operation was to address ‘n’ (n is any legal address),

the next current address read operation would access

data from address n + 1.

Upon receipt of the control byte with R/W bit set to ‘1’,

the 24XX issues an acknowledge and transmits the

8-bit data byte. The master will not acknowledge the

transfer, but does generate a Stop condition and the

24XX discontinues transmission (Figure 8-1).

FIGURE 8-1:

CURRENT ADDRESS

READ

S

T

A

R

T

S

T

Bus Activity

Master

Control

Byte

Data

Byte

O

P

SDA Line

S

P

A

C

K

N

O

Bus Activity

A

C

K

FIGURE 8-2:

RANDOM READ: 128-BIT TO 16 KBIT DEVICES

S

T

A

R

T

S

T

S

T

Bus Activity

Master

Control

Byte

Address

Byte (n)

Control

Byte

Data

Byte

A

R

T

O

P

S

P

S

SDA Line

A

C

K

A

C

K

A

C

K

N

O

Bus Activity

A

C

K

FIGURE 8-3:

RANDOM READ: 32 TO 512 KBIT DEVICES

S

T

A

R

T

Bus Activity

Master

T

A

R

T

S

T

Control

Byte

High Order

Address Byte

Low Order

Address Byte

Control

Byte

Data

Byte

O

P

SDA Line

S

P

A

C

K

N

O

A

C

K

A

C

K

A

Bus Activity

C

K

A

C

K

DS21930A-page 19

24AAXX/24LCXX/24FCXX

8.3

Sequential Read

Sequential reads are initiated in the same way as a

random read except that after the 24XX transmits the

first data byte, the master issues an acknowledge as

opposed to the Stop condition used in a random read.

This acknowledge directs the 24XX to transmit the next

sequentially addressed data byte (Figure 8-4). Follow-

ing the final byte transmitted to the master, the master

will NOT generate an acknowledge but will generate a

Stop condition. To provide sequential reads, the 24XX

contains an internal address pointer which is incre-

mented by one at the completion of each operation.

This address pointer allows the entire memory contents

to be serially read during one operation. If the last

address byte in the array is acknowledged, the address

pointer will roll over to address 0x00.

FIGURE 8-4:

SEQUENTIAL READ

S

T

Control

Initial

Final

Data Byte

Second

Data Byte

Third

Data Byte

Bus Activity

Master

Byte

Data Byte

O

P

SDA Line

N

O

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

A

C

K

DS21930A-page 20

24AAXX/24LCXX/24FCXX

APPENDIX A: REVISION HISTORY

Revision A

Original release of document. Combined Serial

EEPROM 24XXX device data sheets.

DS21930A-page 21

24AAXX/24LCXX/24FCXX

9.0

PACKAGING INFORMATION

9.1

Package Marking Information

Example: Pb-free

8-Lead PDIP

Example: Sn/Pb

24LC01B

I/P 1L7

0528

XXXXXXXX

XXXXXNNN

24LC01B

I/P 1L7

e

3

YYWW

0528

8-Lead PDIP Package Marking (Pb-free)

Line 1

Device

24LC00

Device

24C00

Device

Marking

24AA00

24AA01

24AA014

24AA00

24AA01

24LC00

24LC01B

24LC014

24C00

24LC01B

24AA014 24LC014

24C01C

24AA02

24LC02B

24LC024

24LC025

24AA024

24AA025

24AA024 24LC024

24AA025 24LC025

24C02C

24AA04

24AA08

24AA16

24AA32A

24AA64

24AA128

24AA256

24AA512

24AA04

24AA08

24AA16

24LC04B

24LC08B

24LC16B

24LC04B

24LC08B

24LC16B

24LC32A

24LC64

24AA32A 24LC32A

24AA64 24LC64

24AA128 24LC128

24AA256 24LC256

24AA512 24LC512

24LC128

24LC256

24LC512

24FC128

24FC256

24FC512

24FC128

24FC256

24FC512

Legend: XX...X Part number or part number code

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn) plated devices

YY

WW

NNN

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

Note:

Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.

DS21930A-page 22

24AAXX/24LCXX/24FCXX

Example: Sn/Pb

8-Lead SOIC

Example: Pb-free

24LC01B

I/SN 0528

XXXXXXXX

XXXXXNNN

24LC01BI

SN

e

3

0528

1L7

YYWW

1L7

8-Lead SOIC Package Marking (Pb-free)

Line 1

Marking

Line 1

Device

24AA00

Device

24C00

Device

Marking

24AA00T 24LC00

24AA01T 24LC01B

24AA014T 24LC014

24LC00T

24LC01BT

24LC014T

24C00T

24AA01

24AA014

24C01C

24C01CT

24AA02

24AA02T 24LC02B

24AA024T 24LC024

24AA025T 24LC025

24LC02BT

24LC024T

24LC025T

24AA024

24AA025

24C02C

24C02CT

24AA04

24AA08

24AA16

24AA32A

24AA64

24AA128

24AA256

24AA512

Note:

24AA04T 24LC04B

24AA08T 24LC08B

24AA16T 24LC16B

24AA32AT 24LC32A

24AA64T 24LC64

24AA128T 24LC128

24AA256T 24LC256

24AA512T 24LC512

24LC04BT

24LC08BT

24LC16BT

24LC32AT

24LC64T

24LC128T

24LC256T

24LC512T

24FC128

24FC256

24FC512

24FC128T

24FC256T

24FC512T

T = Temperature range: I = Industrial, E = Extended, (blank) = Commercial

Legend: XX...X Part number or part number code

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

YY

WW

NNN

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn) plated devices

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

Note:

Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.

DS21930A-page 23

24AAXX/24LCXX/24FCXX

Example:

8-Lead 2x3 DFN

244

506

L7

XXX

YWW

NN

8-Lead 2x3mm DFN Package Marking (Pb-free)

Industrial

Line 1

E-Temp

Line 1

Industrial

Line 1

E-Temp

Line 1

Device

Line 1

Device

Marking

24AA00

24AA01

24AA014

201

211

2N1

24LC00

204

214

2N4

205

215

2N5

24C00

207

208

24LC01B

24LC014

24C01C

2N7

2N8

24AA02

221

2P1

2R1

24LC02B

24LC024

24LC025

224

2P4

2R4

225

2P5

2R5

24AA024

24AA025

24C02C

2P7

2P8

24AA04

24AA08

24AA16

24AA32A

24AA64

231

241

251

261

271

24LC04B

24LC08B

24LC16B

24LC32A

24LC64

234

244

254

264

274

235

245

255

265

275

Legend: XX...X Part number or part number code

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

YY

WW

NNN

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn) plated devices

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21930A-page 24

24AAXX/24LCXX/24FCXX

8-Lead DFN

Example: Pb-free

24AA128

Example: Sn/Pb

24AA128

I/MF

XXXXXXX

T/XXXXX

YYWW

e

3

I/MF

0528

1L7

0528

1L7

NNN

8-Lead 5x6mm DFN Package Marking (Pb-free)

Line 1

Device

24LC128

Device

Marking

24AA128

24AA256

24AA512

Note:

24AA128

24AA256

24AA512

24LC128

24LC256

24LC512

24FC128

24FC256

24FC512

24FC128

24FC256

24FC512

24LC256

24LC512

Temperature range (T) listed on second line. I = Industrial, E = Extended

Legend: XX...X Part number or part number code

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

YY

WW

NNN

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn) plated devices

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21930A-page 25

24AAXX/24LCXX/24FCXX

Example:

5-Lead SOT-23

5EL7

XXNN

5-Lead SOT-23 Package Marking (Pb-free)

Comm. Indust.

Marking Marking

Comm.

Indust. E-Temp

Comm. Indust. E-Temp

Marking Marking Marking

Device

Marking Marking Marking

24AA00

24AA01

24AA02

24AA04

24AA08

24AA16

A0NN

A1NN

A2NN

A3NN

A4NN

A5NN

B0NN 24LC00

B1NN 24LC01B

B2NN 24LC02B

B3NN 24LC04B

B4NN 24LC08B

B5NN 24LC16B

L0NN

L1NN

L2NN

L3NN

L4NN

L5NN

M0NN

M1NN

M2NN

M3NN

M4NN

M5NN

N0NN 24C00

N1NN

C0NN

D0NN

E0NN

N2NN

N3NN

N4NN

N5NN

Legend: XX...X Part number or part number code

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

YY

WW

NNN

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn) plated devices

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21930A-page 26

24AAXX/24LCXX/24FCXX

8-Lead MSOP (150 mil)

Example:

4L8BI

XXXXXXT

YWWNNN

2281L7

8-Lead MSOP Package Marking (Pb-free)

Line 1

Device

Marking

Line 1

Device

Marking

24AA01

4A01T

4A14T

24LC01B

24LC014

4L1BT

4L14T

24AA014

24C01C

4C1CT

24AA02

4A02T

4A24T

4A25T

24LC02B

24LC024

24LC025

4L2BT

4L24T

4L25T

24AA024

24AA025

24C02C

4C2CT

24AA04

24AA08

24AA16

24AA32A

24AA64

24AA128

24AA256

4A04T

4A08T

4A16T

4A32AT

4A64T

4A128T

4A256T

24LC04B

24LC08B

24LC16B

24LC32A

24LC64

4L4BT

4L8BT

4L16T

4L32AT

4L64T

24LC128

24LC256

4L128T

4L256T

24FC128

24FC256

4F128T

4F256T

Note:

T = Temperature range: I = Industrial, E = Extended, (blank) = Commercial

Legend: XX...X Part number or part number code

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

YY

WW

NNN

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn) plated devices

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21930A-page 27

24AAXX/24LCXX/24FCXX

Example:

8-Lead TSSOP

4L08

I228

1L7

XXXX

TYWW

NNN

8-Lead TSSOP Package Marking (Pb-free)

Line 1

Device

24LC00

Device

24C00

Device

Marking

24AA00

24AA01

24AA014

4A00

4A01

4A14

4L00

4L1B

4L14

4C00

24LC01B

24LC014

24C01C

4C1C

24AA02

4A02

4A24

4A25

24LC02B

24LC024

24LC025

4L02

4L24

4L25

24AA024

24AA025

24C02C

4C2C

24AA04

24AA08

24AA16

24AA32A

24AA64

24AA128

24AA256

4A04

4A08

4A16

4AA

24LC04B

24LC08B

24LC16B

24LC32A

24LC64

4L04

4L08

4L16

4LA

4AB

4LB

4AC

4AD

24LC128

24LC256

4LC

4LD

24FC128

24FC256

4FC

4FD

Note:

T = Temperature range: I = Industrial, E = Extended, (blank) = Commercial

Legend: XX...X Part number or part number code

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

YY

WW

NNN

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn) plated devices

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21930A-page 28

14-Lead TSSOP

Example:

XXXXXXXT

YYWW

4A256I

0528

1L7

NNN

14-Lead TSSOP Package Marking (Pb-free)

Line 1

Device

24LC128

Device

Marking

24AA128

24AA256

24AA512

4A128T

4A256T

4A512T

4L128T

4L256T

4L512T

24FC128

24FC256

24FC512

4F128T

4F256T

4F512T

24LC256

24LC512

Note:

T = Temperature range: I = Industrial, E = Extended

Legend: XX...X Part number or part number code

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

YY

WW

NNN

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn) plated devices

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21930A-page 29

24AAXX/24LCXX/24FCXX

8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

E1

D

2

n

1

α

E

A2

A

L

c

A1

β

B1

B

p

eB

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

MAX

n

p

Number of Pins

Pitch

Top to Seating Plane

8

.100

.155

.130

2.54

A

.140

.170

3.56

2.92

3.94

3.30

4.32

Molded Package Thickness

Base to Seating Plane

Shoulder to Shoulder Width

Molded Package Width

Overall Length

A2

A1

E

.115

.015

.300

.240

.360

.125

.008

.045

.014

.310

5

.145

3.68

0.38

7.62

6.10

9.14

3.18

0.20

1.14

0.36

7.87

5

.313

.250

.373

.130

.012

.058

.018

.370

10

.325

.260

.385

.135

.015

.070

.022

.430

15

7.94

6.35

9.46

3.30

0.29

1.46

0.46

9.40

10

8.26

6.60

9.78

3.43

0.38

1.78

0.56

10.92

15

E1

D

Tip to Seating Plane

Lead Thickness

L

c

Upper Lead Width

B1

B

Lower Lead Width

Overall Row Spacing

Mold Draft Angle Top

Mold Draft Angle Bottom

§

eB

α

β

5

10

15

5

10

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-001

Drawing No. C04-018

DS21930A-page 30

24AAXX/24LCXX/24FCXX

8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)

E

E1

p

D

2

1

B

n

h

α

45°

c

A2

A

φ

β

L

A1

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

MAX

n

p

Number of Pins

Pitch

8

.050

.061

.056

.007

.237

.154

.193

.015

.025

4

1.27

Overall Height

A

.053

.069

1.35

1.32

1.55

1.42

0.18

6.02

3.91

4.90

0.38

0.62

4

1.75

Molded Package Thickness

Standoff

A2

A1

E

.052

.004

.228

.146

.189

.010

.019

0

.061

.010

.244

.157

.197

.020

.030

8

1.55

0.25

6.20

3.99

5.00

0.51

0.76

8

§

0.10

5.79

3.71

4.80

0.25

0.48

0

Overall Width

Molded Package Width

Overall Length

E1

D

Chamfer Distance

Foot Length

h

L

φ

c

Foot Angle

Lead Thickness

Lead Width

.008

.013

0

.009

.017

12

.010

.020

15

0.20

0.33

0

0.23

0.42

12

0.25

0.51

15

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

12

15

0

12

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-012

Drawing No. C04-057

DS21930A-page 31

24AAXX/24LCXX/24FCXX

8-Lead Plastic Dual Flat No Lead Package (MC) 2x3x0.9 mm Body (DFN) – Saw Singulated

p

D

b

n

L

E

E2

EXPOSED

METAL

PAD

2

1

PIN 1

ID INDEX

AREA

D2

(NOTE 2)

BOTTOM VIEW

TOP VIEW

A

A1

A3

EXPOSED

TIE BAR

(NOTE 1)

Units

Dimension Limits

INCHES

NOM

8

MILLIMETERS*

NOM

MIN

MAX

MIN

MAX

n

p

Number of Pins

Pitch

8

.020 BSC

0.50 BSC

0.90

Overall Height

Standoff

A

A1

A3

D

.031

.035

.001

.008 REF.

.039

.002

0.80

0.00

1.00

.000

0.02

0.05

Contact Thickness

Overall Length

0.20 REF.

2.00 BSC

--

.079 BSC

--

(Note 3)

Exposed Pad Length

Overall Width

D2

E

.055

.064

1.39

1.62

.118 BSC

--

3.00 BSC

--

(Note 3)

Exposed Pad Width

Contact Width

E2

b

.047

.008

.012

.071

.012

.020

1.20

0.20

0.30

1.80

0.30

0.50

.010

0.25

Contact Length

L

.016

0.40

*Controlling Parameter

Notes:

1. Package may have one or more exposed tie bars at ends.

2. Pin 1 visual index feature may vary, but must be located within the hatched area.

3. Exposed pad dimensions vary with paddle size.

4. JEDEC equivalent: MO-229

Drawing No. C04-123

Revised 05/24/04

DS21930A-page 32

24AAXX/24LCXX/24FCXX

8-Lead Plastic Dual Flat No Lead Package (MF) 6x5 mm Body (DFN-S) – Saw Singulated

DS21930A-page 33

24AAXX/24LCXX/24FCXX

5-Lead Plastic Small Outline Transistor (OT) (SOT-23)

E

E1

p

B

p1

D

n

1

α

c

A

A2

φ

A1

L

β

Units

Dimension Limits

INCHES*

NOM

5

MILLIMETERS

NOM

5

MIN

MAX

MIN

MAX

n

p

Number of Pins

Pitch

.038

0.95

1.90

1.18

1.10

0.08

2.80

1.63

2.95

0.45

5

p1

Outside lead pitch (basic)

Overall Height

.075

.046

.043

.003

.110

.064

.116

.018

5

A

A2

A1

E

.035

.000

.102

.059

.110

.014

0

.057

0.90

1.45

Molded Package Thickness

Standoff

.051

.006

.118

.069

.122

.022

10

0.90

0.00

2.60

1.50

2.80

0.35

0

1.30

0.15

3.00

1.75

3.10

0.55

10

Overall Width

Molded Package Width

Overall Length

Foot Length

E1

D

L

φ

Foot Angle

c

Lead Thickness

Lead Width

.004

.014

0

.006

.017

5

.008

.020

10

0.09

0.35

0

0.15

0.43

5

0.20

0.50

10

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

*Controlling Parameter

Notes:

0

5

10

0

5

10

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

exceed .005" (0.127mm) per side.

EIAJ Equivalent: SC-74A

Drawing No. C04-091

DS21930A-page 34

24AAXX/24LCXX/24FCXX

8-Lead Plastic Micro Small Outline Package (MS) (MSOP)

E

E1

p

D

2

1

B

n

α

A2

A

c

φ

A1

(F)

L

β

Units

Dimension Limits

INCHES

NOM

MILLIMETERS*

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.026 BSC

0.65 BSC

Overall Height

A

A2

A1

E

-

.043

-

0.85

-

1.10

Molded Package Thickness

Standoff

.030

.033

.037

0.75

0.95

0.15

.000

-

.006

0.00

Overall Width

.193 TYP.

4.90 BSC

Molded Package Width

Overall Length

E1

D

.118 BSC

3.00 BSC

Foot Length

L

.016

.024

.037 REF

.031

0.40

0.60

0.95 REF

0.80

Footprint (Reference)

Foot Angle

F

φ

c

0°

.003

.009

5°

-

8°

.009

.016

15°

0°

0.08

0.22

5°

-

8°

0.23

0.40

15°

Lead Thickness

Lead Width

.006

B

α

β

.012

Mold Draft Angle Top

Mold Draft Angle Bottom

*Controlling Parameter

Notes:

-

5°

15°

5°

15°

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

exceed .010" (0.254mm) per side.

JEDEC Equivalent: MO-187

Drawing No. C04-111

DS21930A-page 35

24AAXX/24LCXX/24FCXX

8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)

E

E1

p

D

2

1

n

B

α

A

c

A1

A2

φ

β

L

Units

INCHES

NOM

MILLIMETERS*

Dimension Limits

MIN

MAX

MIN

NOM

MAX

n

p

Number of Pins

Pitch

8

.026

0.65

Overall Height

A

.043

1.10

0.95

0.15

6.50

4.50

3.10

0.70

8

Molded Package Thickness

Standoff

A2

A1

E

.033

.035

.004

.251

.173

.118

.024

4

.037

.006

.256

.177

.122

.028

8

0.85

0.05

0.90

0.10

6.38

4.40

3.00

0.60

4

§

.002

.246

.169

.114

.020

0

Overall Width

6.25

4.30

2.90

0.50

0

Molded Package Width

Molded Package Length

Foot Length

E1

D

L

φ

c

Foot Angle

Lead Thickness

.004

.007

0

.006

.010

5

.008

.012

10

0.09

0.19

0

0.15

0.25

5

0.20

0.30

10

Lead Width

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

5

10

0

5

10

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.005” (0.127mm) per side.

JEDEC Equivalent: MO-153

Drawing No. C04-086

DS21930A-page 36

24AAXX/24LCXX/24FCXX

14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body (TSSOP)

E

E1

p

D

2

1

n

B

α

A

c

φ

A1

A2

β

L

Units

INCHES

NOM

14

MILLIMETERS*

Dimension Limits

MIN

MAX

MIN

NOM

14

MAX

n

p

Number of Pins

Pitch

.026

0.65

Overall Height

A

.043

1.10

0.95

0.15

6.50

4.50

5.10

0.70

8

Molded Package Thickness

Standoff

A2

A1

E

.033

.002

.246

.169

.193

.020

0

.035

.004

.251

.173

.197

.024

4

.037

.006

.256

.177

.201

.028

8

0.85

0.05

0.90

0.10

6.38

4.40

5.00

0.60

4

§

Overall Width

6.25

4.30

4.90

0.50

0

Molded Package Width

Molded Package Length

Foot Length

E1

D

L

φ

c

Foot Angle

Lead Thickness

.004

.007

0

.006

.010

5

.008

.012

10

0.09

0.19

0

0.15

0.25

5

0.20

0.30

10

Lead Width

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

5

10

0

5

10

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.005” (0.127mm) per side.

JEDEC Equivalent: MO-153

Drawing No. C04-087

DS21930A-page 37

24AAXX/24LCXX/24FCXX

NOTES:

DS21930A-page 38

24AAXX/24LCXX/24FCXX

THE MICROCHIP WEB SITE

CUSTOMER SUPPORT

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

• Development Systems Information Line

Customers

should

contact

their

distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

• General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

Technical support is available through the web site

at: http://support.microchip.com

• Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

In addition, there is

a

Development Systems

Information Line which lists the latest versions of

Microchip’s development systems software products.

This line also provides information on how customers

can receive currently available upgrade kits.

The Development Systems Information Line

numbers are:

CUSTOMER CHANGE NOTIFICATION

SERVICE

1-800-755-2345 – United States and most of Canada

1-480-792-7302 – Other International Locations

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com, click on Customer Change

Notification and follow the registration instructions.

DS21930A-page 39

24AAXX/24LCXX/24FCXX

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-

uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

To:

Technical Publications Manager

Reader Response

Total Pages Sent ________

RE:

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Application (optional):

Would you like a reply?

Y

N

24AAXX/24LCXX/24FCXX

DS21930A

Literature Number:

Device:

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21930A-page 40

24AAXX/24LCXX/24FCXX

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

X

/XX

X

PART NO.

Examples:

a) 24C00/P: 128-bit, Commercial Temper-

Packaging

Medium

Lead Finish

Device Part

Number

Temperature Package

Range

ature, 5V, PDIP package

(Table 1-1)

b) 24AA014-I/SN:

1

Kbit, Industrial

Temperature, 1.8V, SOIC package

c) 24AA02T-I/OT:

2

Kbit, Industrial

Temperature, 1.8V, SOT-23 package,

Tape and Reel

Device:

See Table 1-1

d)

e)

f)

24LC16B-I/P: 16 Kbit, Industrial Tempera-

ture, 2.5V, PDIP package

Temperature

Range:

I

=

-40°C to +85°C

24LC32A-E/MS: 32 Kbit, Extended

Temperature, 2.5V, MSOP package

E

C

-40°C to +125°C

0°C to +70°C

24LC64T-I/MC: 64

Temperature, 2.5V 2x3 mm DFN package,

Tape and Reel

Kbit, Industrial

Packaging

Medium:

T

=

Tape and Reel

Blank = Tube

g) 24LC256-E/STG: 256 Kbit, Extended

Temperature, 2.5V, TSSOP package,

Pb-free

Package:

P

=

Plastic DIP (300 mil body), 8-lead

h)

24FC512T-I/SM: 512 Kbit, Industrial

Temperature, MHz, SOIC package,

Tape and Reel

SN

SM

ST

Plastic SOIC (150 mil body), 8-lead

Plastic SOIC (208 mil body), 8-lead

Plastic TSSOP (4.4 mm), 8-lead

1

ST14 = Plastic TSSOP (4.4 mm), 14-lead

MS

OT

MC

MF

=

Plastic Micro Small Outline (MSOP), 8-lead

SOT-23, 5-lead (Tape and Reel only)

2x3 mm DFN, 8-lead

5x6 mm DFN, 8-lead

Lead finish: Blank = Pb-free – Matte Tin (see Note 1)

Pb-free – Matte Tin only

G

=

Note 1: Most products manufactured after January 2005 have a Matte Tin (Pb-free) finish.

Most products manufactured before January 2005 have a finish of approximately 63% Sn and 37% Pb (Sn/Pb).

Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion, including conversion date codes.

Sales and Support

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-

mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

DS21930A-page41

24AAXX/24LCXX/24FCXX

NOTES:

DS21930A-page 42

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR WAR-

RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,

WRITTEN OR ORAL, STATUTORY OR OTHERWISE,

RELATED TO THE INFORMATION, INCLUDING BUT NOT

LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,

MERCHANTABILITY OR FITNESS FOR PURPOSE.

Microchip disclaims all liability arising from this information and

its use. Use of Microchip’s products as critical components in

life support systems is not authorized except with express

written approval by Microchip. No licenses are conveyed,

implicitly or otherwise, under any Microchip intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, K^EELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,

PRO MATE, PowerSmart, rfPIC, and SmartShunt are

registered trademarks of Microchip Technology Incorporated

in the U.S.A. and other countries.

AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,

PICMASTER, SEEVAL, SmartSensor and The Embedded

Control Solutions Company are registered trademarks of

Microchip Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM,

dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,

FanSense, FlexROM, fuzzyLAB, In-Circuit Serial

Programming, ICSP, ICEPIC, Linear Active Thermistor,

MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM,

PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo,

PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode,

Smart Serial, SmartTel, Total Endurance and WiperLock are

trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in

Chandler and Tempe, Arizona and Mountain View, California in

October 2003. The Company’s quality system processes and

procedures are for its PICmicro^®8-bit MCUs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS21930A-page 43

WORLDWIDE SALES AND SERVICE

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

India - Bangalore

Austria - Weis

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Tel: 91-80-2229-0061

Fax: 91-80-2229-0062

Tel: 43-7242-2244-399

Fax: 43-7242-2244-393

China - Beijing

Denmark - Ballerup

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Fax: 480-792-7277

Technical Support:

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Tel: 91-11-5160-8631

Fax: 91-11-5160-8632

http://support.microchip.com

Web Address:

China - Chengdu

France - Massy

Japan - Kanagawa

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

Tel: 86-28-8676-6200

Fax: 86-28-8676-6599

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

www.microchip.com

Atlanta

China - Fuzhou

Germany - Ismaning

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Korea - Seoul

Alpharetta, GA

Tel: 770-640-0034

Fax: 770-640-0307

Tel: 86-591-8750-3506

Fax: 86-591-8750-3521

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Italy - Milan

China - Hong Kong SAR

Tel: 852-2401-1200

Boston

Tel: 39-0331-742611

Fax: 39-0331-466781

Malaysia - Penang

Tel:011-604-646-8870

Fax:011-604-646-5086

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Fax: 852-2401-3431

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Philippines - Manila

Tel: 011-632-634-9065

Fax: 011-632-634-9069

Chicago

Itasca, IL

England - Berkshire

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Tel: 630-285-0071

Fax: 630-285-0075

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Dallas

China - Shenzhen

Addison, TX

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Tel: 972-818-7423

Fax: 972-818-2924

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

China - Shunde

Detroit

Tel: 86-757-2839-5507

Fax: 86-757-2839-5571

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

China - Qingdao

Tel: 86-532-502-7355

Fax: 86-532-502-7205

Kokomo

Taiwan - Hsinchu

Tel: 886-3-572-9526

Fax: 886-3-572-6459

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

San Jose

Mountain View, CA

Tel: 650-215-1444

Fax: 650-961-0286

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

04/20/05

DS21930A-page 44


型号：	24C02C-C/STG
厂家：	MICROCHIP
描述：	256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8, 4.40 MM, LEAD FREE, PLASTIC, MO-153, TSSOP-8 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管
文件：	总44页 (文件大小：876K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

24C02C-C/STG [MICROCHIP]

相关型号：

24C02C-E/MC

24C02C-E/MCG

24C02C-E/MNY

24C02C-E/MS

24C02C-E/P

24C02C-E/PG

24C02C-E/SN

24C02C-E/SNG

24C02C-E/ST

24C02C-E/STG

24C02C-EP

24C02C-ESN