24FC02T-E/MUY [MICROCHIP]
EEPROM;
| 型号： | 24FC02T-E/MUY |
| 厂家： | 
MICROCHIP |
| 描述： | EEPROM 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 |
| 文件： | 总46页 (文件大小：711K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
24AA02/24LC02B/24FC02
2K I2C Serial EEPROM
Device Selection Table
Part Number
VCC Range
Max. Clock Frequency Temp. Ranges
Available Packages
24AA02
24LC02B
24FC02
1.7V-5.5V
2.5V-5.5V
1.7V-5.5V
400 kHz(1)
400 kHz
1 MHz
I
P, SN, MS, ST, MC, LT, MNY, OT
P, SN, MS, ST, MC, LT, MNY, OT
P, SN, MS, ST, MUY, OT
I, E
I, E
Note 1: 100 kHz for VCC < 2.5V
Features
Description
• Single Supply with Operation down to 1.7V for
24AA02 and 24FC02 Devices, 2.5V for 24LC02B
Devices
The Microchip Technology Inc. 24XX02(1) is a 2-Kbit
Electrically Erasable PROM. The device is organized
as one block of 256 x 8-bit memory with a 2-wire serial
interface. Its low-voltage design permits operation
down to 1.7V with standby and active currents of only
1 μA and 1 mA, respectively. The 24XX02 also has a
page write capability for up to 8 bytes of data.
• Low-Power CMOS Technology:
- Read current 1 mA, maximum
- Standby current 1 μA, maximum (I-temp.)
• 2-Wire Serial Interface, I2C Compatible
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz, 400 kHz and 1 MHz Compatibility
• Page Write Time: 5 ms, Maximum
• Self-Timed Erase/Write Cycle
• 8-Byte Page Write Buffer
Note 1: 24XX02 is used in this document as a
generic
part
number
for
the
24AA02/24LC02B/24FC02 devices.
Package Types
• Hardware Write-Protect
PDIP, MSOP
(Top View)
DFN/TDFN/UDFN
(Top View)
• ESD Protection >4,000V
(1)
A0
VCC
• More than 1 Million Erase/Write Cycles
• Data Retention >200 Years
(1)
8
7
A0
VCC
WP
1
2
(1)
WP
A1
(1)
A1
• Factory Programming Available
• RoHS Compliant
(1)
SCL
SDA
(1)
A2
6
5
3
4
A2
SCL
SDA
VSS
VSS
• Temperature Ranges:
- Industrial (I): -40°C to +85°C
SOIC, TSSOP
(Top View)
- Extended (E): -40°C to +125°C
• Automotive AEC-Q100 Qualified
SOT-23/SC-70
(Top View)
(1)
1
2
3
4
8
7
6
5
A0
A1
A2
VCC
1
5
WP
Vcc
SCL
Vss
(1)
(1)
WP
Packages
2
3
SCL
SDA
• 8-Lead DFN, 8-Lead MSOP, 8-Lead PDIP,
8-Lead SOIC, 8-Lead TDFN, 8-Lead TSSOP,
8-Lead UDFN, 5-Lead SOT-23 and 5-Lead SC-70
VSS
SDA
4
Note 1: Pins A0, A1 and A2 are not used by the
24XX02 (no internal connections).
2007-2019 Microchip Technology Inc.
DS20001709L-page 1
24AA02/24LC02B/24FC02
Block Diagram
WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
EEPROM
Array
XDEC
Page Latches
I/O
SCL
YDEC
SDA
VCC
Sense Amp.
R/W Control
VSS
2007-2019 Microchip Technology Inc.
DS20001709L-page 2
24AA02/24LC02B/24FC02
1.0
ELECTRICAL CHARACTERISTICS
(†)
Absolute Maximum Ratings
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
DC CHARACTERISTICS
Extended (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V (24LC02B)
Extended (E): TA = -40°C to +125°C, VCC = +1.7V to +5.5V (24FC02)
Param.
Symbol
No.
Characteristic
Min.
Typ.
Max.
Units
Conditions
D1
D2
D3
VIH
VIL
High-Level Input Voltage 0.7 VCC
—
—
—
—
0.3 VCC
—
V
V
V
Low-Level Input Voltage
—
VHYS
Hysteresis of Schmitt
Trigger Inputs
0.05 VCC
Note
D4
VOL
Low-Level Output
Voltage
—
—
0.40
V
IOL = 3.0 mA, VCC = 2.5V
D5
D6
D7
ILI
Input Leakage Current
Output Leakage Current
—
—
—
—
—
—
±1
±1
10
μA
μA
pF
VIN = VSS or VCC
ILO
VOUT = VSS or VCC
CIN,
Pin Capacitance
VCC = 5.0V (Note)
COUT
(all inputs/outputs)
TA = 25°C, FCLK = 1 MHz
D8
ICCWRITE Operating Current
ICCREAD
—
—
—
—
—
—
3
1
1
mA
mA
μA
VCC = 5.5V, SCL = 400 kHz
VCC = 5.5V, SCL = 400 kHz
D9
D10
ICCS
Standby Current
SDA = SCL = VCC
WP = VSS, I-Temp.
—
—
—
—
3
5
μA
μA
SDA = SCL = VCC
WP = VSS, E-Temp. (24FC02)
SDA = SCL = VCC
WP = VSS, E-Temp. (24LC02B)
Note:
This parameter is periodically sampled and not 100% tested.
2007-2019 Microchip Technology Inc.
DS20001709L-page 3
24AA02/24LC02B/24FC02
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
AC CHARACTERISTICS
Extended (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V (24LC02B)
Extended (E): TA = -40°C to +125°C, VCC = +1.7V to +5.5V (24FC02)
Param.
No.
Symbol
Characteristic
Clock Frequency
Min.
Typ.
Max.
Units
Conditions
2.5V ≤ VCC ≤ 5.5V
1
2
3
4
FCLK
—
—
—
—
—
—
—
—
—
—
—
—
—
400
100
1000
—
kHz
kHz
kHz
ns
1.7V ≤ VCC < 2.5V (24AA02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
2.5V ≤ VCC ≤ 5.5V
—
THIGH Clock High Time
TLOW Clock Low Time
600
4000
260
1300
4700
500
—
—
ns
1.7V ≤ VCC < 2.5V (24AA02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
2.5V ≤ VCC ≤ 5.5V
—
ns
—
ns
—
ns
1.7V ≤ VCC < 2.5V (24AA02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
2.5V ≤ VCC ≤ 5.5V (Note 1)
—
ns
TR
SDA and SCL Rise Time
300
1000
ns
—
ns
1.7V ≤ VCC < 2.5V (24AA02)
(Note 1)
—
—
1000
ns
1.7V ≤ VCC ≤ 5.5V (24FC02)
(Note 1)
5
6
TF
SDA and SCL Fall Time
—
600
4000
250
600
4700
250
0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
300
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1
THD:STA Start Condition Hold
Time
2.5V ≤ VCC ≤ 5.5V
—
1.7V ≤ VCC < 2.5V (24AA02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
2.5V ≤ VCC ≤ 5.5V
—
7
TSU:STA Start Condition Setup
Time
—
—
1.7V ≤ VCC < 2.5V (24AA02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
Note 2
—
8
9
THD:DAT Data Input Hold Time
TSU:DAT Data Input Setup Time
—
100
250
50
—
2.5V ≤ VCC ≤ 5.5V
—
1.7V ≤ VCC < 2.5V (24AA02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
2.5V ≤ VCC ≤ 5.5V
—
10
TSU:STO Stop Condition Setup
Time
600
4000
250
0
—
—
1.7V ≤ VCC < 2.5V (24AA02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
2.5V ≤ VCC ≤ 5.5V (Note 2)
—
11
12
13
TSU:WP WP Setup Time
THD:WP WP Hold Time
—
1000
—
—
TAA
Output Valid from Clock
900
3500
—
1.7V ≤ VCC < 2.5V (24AA02)
(Note 2)
—
—
450
ns
1.7V ≤ VCC ≤ 5.5V (24FC02)
(Note 2)
Note 1: Characterized but not 100% tested.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: CB = total capacitance of one bus line in pF.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s website at
www.microchip.com.
2007-2019 Microchip Technology Inc.
DS20001709L-page 4
24AA02/24LC02B/24FC02
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
AC CHARACTERISTICS (Continued)
Extended (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V (24LC02B)
Extended (E): TA = -40°C to +125°C, VCC = +1.7V to +5.5V (24FC02)
Param.
Symbol
Characteristic
Min.
Typ.
Max.
Units
Conditions
2.5V ≤ VCC ≤ 5.5V
No.
14
TBUF
Bus Free Time: The time
the bus must be free
before a new transmis-
sion can start
1300
4700
500
—
—
—
—
—
—
ns
ns
ns
1.7V ≤ VCC < 2.5V (24AA02)
1.7V ≤ VCC ≤ 5.5V (24FC02)
15
16
TOF
Output Fall Time from VIH 20+0.1CB
Minimum to VIL Maximum
—
—
—
250
250
50
ns
ns
ns
2.5V ≤ VCC ≤ 5.5V (24LC02B)
(Notes 1 and 3)
—
1.7V ≤ VCC < 2.5V (24AA02)
(Note 1)
TSP
Input Filter Spike
Suppression
—
Note 1
(SDA and SCL pins)
17
18
TWC
Write Cycle Time
(byte or page)
—
—
—
5
ms
Endurance
1,000,000
—
cycles 25°C, 5.5V, Page Mode
(Note 4)
Note 1: Characterized but not 100% tested.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: CB = total capacitance of one bus line in pF.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s website at
www.microchip.com.
FIGURE 1-1:
BUS TIMING DATA
5
4
D3
2
SCL
7
3
10
8
9
SDA
IN
6
16
14
12
13
SDA
OUT
(protected)
WP
11
(unprotected)
2007-2019 Microchip Technology Inc.
DS20001709L-page 5
24AA02/24LC02B/24FC02
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Name DFN MSOP PDIP SC-70 SOIC SOT-23 TDFN(1) TSSOP UDFN(1)
Description
Not Connected
A0
A1
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
—
—
—
2
1
2
3
4
5
6
7
8
—
—
—
2
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Not Connected
Not Connected
Ground
A2
VSS
SDA
SCL
WP
VCC
3
3
Serial Address/Data I/O
Serial Clock
1
1
5
5
Write-Protect Input
Power Supply
4
4
Note 1: The exposed pad on the TDFN/UDFN package can be connected to VSS or left floating.
2.1
A0, A1, A2
2.3
Serial Clock (SCL)
The A0, A1 and A2 pins are not used by the 24XX02.
They may be left floating or tied to either VSS or VCC.
The SCL input is used to synchronize the data transfer
to and from the device.
2.2
Serial Address/Data Input/Output
(SDA)
2.4
Write-Protect (WP)
This pin must be connected to either VSS or VCC.
The SDA input is a bidirectional pin used to transfer
addresses and data into and out of the device. Since
it is an open-drain terminal, the SDA bus requires a
pull-up resistor to VCC (typical 10 kΩ for 100 kHz,
2 kΩ for 400 kHz and 1 MHz).
If tied to VSS, normal memory operation is enabled
(read/write the entire memory 00-FF).
If tied to VCC, write operations are inhibited. The entire
memory will be write-protected. Read operations are
not affected.
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
2007-2019 Microchip Technology Inc.
DS20001709L-page 6
24AA02/24LC02B/24FC02
4.4
Data Valid (D)
3.0
FUNCTIONAL DESCRIPTION
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The 24XX02 supports a bidirectional, 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, while defining a
device receiving data as a receiver. The bus has to be
controlled by a master device which generates the
Serial Clock (SCL), controls the bus access and
generates the Start and Stop conditions, while the
24XX02 works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is activated.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of data
bytes transferred between the Start and Stop
conditions is determined by the master device and is,
theoretically, unlimited (although only the last eight will
be stored when doing a write operation). When an
overwrite does occur, it will replace data based on the
first-in first-out (FIFO) principle.
4.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
4.5
Acknowledge
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
Note:
The 24XX02 does not generate any
Acknowledge bits if an internal
programming cycle is in progress.
4.1
Bus Not Busy (A)
Both data and clock lines remain high.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable-low during the high
period of the acknowledge-related clock pulse.
Moreover, setup and hold times must be taken into
account. During reads, a master must signal an end of
data to the slave by not generating an Acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (24XX02) will leave the data line
high to enable the master to generate the Stop
condition.
4.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
FIGURE 4-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(A)
(B)
(D)
(D)
(C) (A)
SCL
SDA
Start
Condition
Stop
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
2007-2019 Microchip Technology Inc.
DS20001709L-page 7
24AA02/24LC02B/24FC02
FIGURE 5-1:
CONTROL BYTE
ALLOCATION
5.0
DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device. The control byte
consists of a four-bit control code. For the 24XX02, this
is set as ‘1010’ binary for read and write operations.
The next three bits of the control byte are “don’t cares”
for the 24XX02. The combination of the 4-bit control
code and the next three bits are called the slave
address.
Read/Write Bit
Block
Select
Bits
Control Code
S
1
0
1
0
x
x
x
R/W ACK
The last bit of the control byte is the Read/Write (R/W)
bit and it defines the operation to be performed. When
set to ‘1’, a read operation is selected. When set to ‘0’,
a write operation is selected. Following the Start
condition, the 24XX02 monitors the SDA bus, checking
the device type identifier being transmitted. Upon
receiving a valid slave address and the R/W bit, the
slave device outputs an Acknowledge signal on the
SDA line. Depending on the state of the R/W bit, the
24XX02 will select a read or write operation.
Slave Address
Acknowledge Bit
Start Bit
x = “don’t care”
The next byte received defines the address of the first
data byte within the selected block (Figure 5-2). The
word address byte uses all eight bits.
Control
Code
Operation
Block Select
R/W
Read
Write
1010
1010
Block Address
Block Address
1
0
FIGURE 5-2:
ADDRESS SEQUENCE BIT ASSIGNMENTS
Control Byte
Word Address Byte
A
0
A
7
x
x
1
0
1
0
x R/W
•
•
•
•
•
•
Control
Code
Block
Select
bits
x = “don’t care”
2007-2019 Microchip Technology Inc.
DS20001709L-page 8
24AA02/24LC02B/24FC02
6.2
Page Write
6.0
6.1
WRITE OPERATION
Byte Write
The write control byte, word address and first data byte
are transmitted to the 24XX02 in the same way as in a
byte write. However, instead of generating a Stop
condition, the master transmits up to eight data bytes to
the 24XX02, which are temporarily stored in the
on-chip page buffer and will be written into the memory
once the master has transmitted a Stop condition.
Upon receipt of each word, the three lower-order
Address Pointer bits, which form the byte counter, are
internally incremented by one. The higher-order five
bits of the word address remain constant. If the master
should transmit more than eight words prior to generat-
ing the Stop condition, the Address Pointer will roll over
and the previously received data will be overwritten. As
with the byte write operation, once the Stop condition is
received, an internal write cycle will begin (Figure 6-2).
Following the Start condition from the master, the
device code (4 bits), the block address (3 bits, “don’t
cares”) and the R/W bit, which is a logic-low, is placed
onto the bus by the master transmitter. This indicates to
the addressed slave receiver that a byte with a word
address will follow after it has generated an
Acknowledge bit during the ninth clock cycle.
Therefore, the next byte transmitted by the master is
the word address and will be written into the Address
Pointer of the 24XX02. After receiving another
Acknowledge signal from the 24XX02, the master
device will transmit the data word to be written into the
addressed
memory
location.
The
24XX02
acknowledges again and the master generates a Stop
condition. This initiates the internal write cycle, and,
during this time, the 24XX02 will not generate
Acknowledge signals (Figure 6-1).
Note:
Page write operations are limited to writ-
ing bytes within a single physical page
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size
(or ‘page size’) and end at addresses that
are integer multiples of page size – 1. If a
page write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
6.3
Write Protection
The WP pin allows the user to write-protect the entire
array (00-FF) when the pin is tied to VCC. If tied to VSS,
the write protection is disabled.
FIGURE 6-1:
BYTE WRITE
S
T
A
R
T
S
Bus Activity
Master
Control
Byte
Word
Address
T
O
P
Data
x
x x
0
0
0
SDA Line
1
1
S
P
A
C
K
A
C
K
A
C
K
Block
Select
Bits
Bus Activity
x= “don’t care”
2007-2019 Microchip Technology Inc.
DS20001709L-page 9
24AA02/24LC02B/24FC02
FIGURE 6-2:
PAGE WRITE
S
S
T
Bus Activity
Master
Control
Byte
Word
Address (n)
T
A
O
P
Data (n)
Data (n + 1)
Data (n + 7)
R
T
x
x x
SDA Line
10 10
0
S
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Block
Select
Bits
Bus Activity
x= “don’t care”
2007-2019 Microchip Technology Inc.
DS20001709L-page 10
24AA02/24LC02B/24FC02
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a write
command has been issued from the master, the device
initiates the internally-timed write cycle. ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a write command (R/W = 0). If the device is still
busy with the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next read or write
operation. See Figure 7-1 for a flow diagram of this
operation.
FIGURE 7-1:
ACKNOWLEDGE
POLLING FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
No
Yes
Next
Operation
2007-2019 Microchip Technology Inc.
DS20001709L-page 11
24AA02/24LC02B/24FC02
8.3
Sequential Read
8.0
READ OPERATION
Sequential reads are initiated in the same way as a
random read, except that once the 24XX02 transmits
the first data byte, the master issues an acknowledge
(as opposed to a Stop condition in a random read). This
directs the 24XX02 to transmit the next sequentially
addressed 8-bit word (Figure 8-3).
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1
Current Address Read
To provide sequential reads the 24XX02 contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation.
The 24XX02 contains an Address Pointer that
maintains the address of the last word accessed,
internally incremented by one. Therefore, if the previ-
ous access (either a read or write operation) was to
address n, the next current address read operation
would access data from address n + 1. Upon receipt of
the slave address with R/W bit set to ‘1’, the 24XX02
issues an acknowledge and transmits the 8-bit data
word. The master will not acknowledge the transfer, but
does generate a Stop condition and the 24XX02
discontinues transmission (Figure 8-1).
8.4
Noise Protection
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
8.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is accomplished by sending the word
address to the 24XX02 as part of a write operation.
Once the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the inter-
nal Address Pointer is set. The master then issues the
control byte again, but with the R/W bit set to a ‘1’. The
24XX02 will then issue an acknowledge and transmits
the 8-bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24XX02 discontinues transmission (Figure 8-2).
FIGURE 8-1:
CURRENT ADDRESS READ
S
Bus Activity
Master
T
A
R
Control
Byte
S
T
Data (n)
O
P
T
x x
1 0 1 0
x
1
SDA Line
S
P
A
C
K
N
o
Bus Activity
Block
Select
Bits
A
C
K
x= “don’t care”
2007-2019 Microchip Technology Inc.
DS20001709L-page 12
24AA02/24LC02B/24FC02
FIGURE 8-2:
RANDOM READ
S
S
T
A
R
T
T
A
R
T
S
T
Bus Activity
Master
Control
Byte
Word
Address (n)
Control
Byte
Data (n)
O
P
xxx
xxx
1
1010
S 1010
P
0
S
SDA Line
A
C
K
A
C
K
A
C
K
N
o
Block
Select
Bits
Block
Select
Bits
Bus Activity
A
C
K
x = “don’t care”
FIGURE 8-3:
SEQUENTIAL READ
S
T
Bus Activity
Master
Control
Byte
O
P
Data (n)
Data (n + 1)
Data (n + 2)
Data (n + x)
SDA Line
P
1
A
C
K
A
C
K
A
C
K
A
C
K
N
o
Bus Activity
A
C
K
2007-2019 Microchip Technology Inc.
DS20001709L-page 13
24AA02/24LC02B/24FC02
9.0
9.1
PACKAGING INFORMATION
Package Marking Information*
8-Lead 2x3 DFN
Example
224
922
13
XXX
YWW
NN
Example
8-Lead MSOP
XXXXXX
4L2BI
YWWNNN
92213F
8-Lead PDIP (300 mil)
Example
24LC02B
XXXXXXXX
T/XXXNNN
I/P
13F
e
3
YYWW
1922
5-Lead SC-70
XXNN
Example
B413
8-Lead SOIC (3.90 mm)
Example
24LC02BI
XXXXXXXX
SN
1922
e
3
XXXXYYWW
13F
NNN
2007-2019 Microchip Technology Inc.
DS20001709L-page 14
24AA02/24LC02B/24FC02
5-Lead SOT-23 (1-Line Marking)
Example
M213
XXNN
5-Lead SOT-23 (2-Line Marking)
Example
XXXXYY
WWNNN
AAEV19
2213F
8-Lead 2x3 TDFN
Example
A24
922
13
XXX
YWW
NN
Example
8-Lead TSSOP
4L02
I922
13F
XXXX
TYWW
NNN
8-Lead 2x3 UDFN
Example
ADN
922
13
XXX
YWW
NN
2007-2019 Microchip Technology Inc.
DS20001709L-page 15
24AA02/24LC02B/24FC02
st
1
Line Marking Codes
DFN
SOT-23
TDFN
SC-70
TSSOP
MSOP UDFN
I-Temp.
E-Temp.
I-Temp. E-Temp. I-Temp. E-Temp. I-Temp. E-Temp.
(1)
(2,3)
(2)
(2)
24AA02
24LC02B
24FC02
4A02
4L02
4A02T
4L2BT
—
—
B2NN
M2NN
—
221
224
—
—
225
—
A21
A24
—
—
A25
—
B5NN
B4NN
—
—
B6NN
—
(1)
(2,3)
(4)
(2,3)
(2)
N2NN
(4)
AADQ
24FC02 ADN AAEVYY
AAEVYY
Note 1: T = Temperature grade (I, E)
2: NN = Alphanumeric traceability code
3: These parts use the 1-line SOT-23 marking format
4: These parts use the 2-line SOT-23 marking format
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
JEDEC® designator for Matte Tin (Sn)
e
3
* Standard OTP marking consists of Microchip part number, year code, week code,
and traceability code.
Note:
Note:
For very small packages with no room for the JEDEC® designator
, the marking will only appear on the outer carton or reel label.
e
3
In the event the full Microchip part number cannot be marked on one line, it
will be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
2007-2019 Microchip Technology Inc.
DS20001709L-page 16
24AA02/24LC02B/24FC02
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2007-2019 Microchip Technology Inc.
DS20001709L-page 17
24AA02/24LC02B/24FC02
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2007-2019 Microchip Technology Inc.
DS20001709L-page 18
24AA02/24LC02B/24FC02
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2007-2019 Microchip Technology Inc.
DS20001709L-page 19
24AA02/24LC02B/24FC02
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2007-2019 Microchip Technology Inc.
DS20001709L-page 20
24AA02/24LC02B/24FC02
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2007-2019 Microchip Technology Inc.
DS20001709L-page 21
24AA02/24LC02B/24FC02
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
N
B
E1
NOTE 1
1
2
TOP VIEW
E
A2
A
C
PLANE
L
c
A1
e
eB
8X b1
8X b
.010
C
SIDE VIEW
END VIEW
Microchip Technology Drawing No. C04-018D Sheet 1 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 22
24AA02/24LC02B/24FC02
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
ALTERNATE LEAD DESIGN
(VENDOR DEPENDENT)
DATUM A
DATUM A
b
b
e
2
e
2
e
e
Units
Dimension Limits
INCHES
NOM
8
.100 BSC
-
MIN
MAX
Number of Pins
Pitch
N
e
A
Top to Seating Plane
-
.210
.195
-
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
A2
A1
E
E1
D
L
c
b1
b
eB
.115
.015
.290
.240
.348
.115
.008
.040
.014
-
.130
-
.310
.250
.365
.130
.010
.060
.018
-
.325
.280
.400
.150
.015
.070
.022
.430
Lower Lead Width
Overall Row Spacing
§
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-018D Sheet 2 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 23
24AA02/24LC02B/24FC02
5-Lead Plastic Small Outline Transistor (LT) [SC70]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
e
e
B
E
3
1
E1
2X
0.15 C
4
N
5X TIPS
0.30 C
NOTE 1
2X
0.15 C
5X b
0.10
C A B
TOP VIEW
c
A2
A
C
SEATING
PLANE
A1
L
SIDE VIEW
END VIEW
Microchip Technology Drawing C04-061D Sheet 1 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 24
24AA02/24LC02B/24FC02
5-Lead Plastic Small Outline Transistor (LT) [SC70]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
5
0.65 BSC
Overall Height
Standoff
Molded Package Thickness
Overall Length
Exposed Pad Length
Overall Width
Exposed Pad Width
Terminal Width
A
A1
A2
D
D2
E
E1
b
L
c
0.80
0.00
0.80
-
-
1.10
0.10
1.00
-
2.00 BSC
2.60
2.10 BSC
1.25 BSC
-
2.50
2.70
0.15
0.10
0.08
0.40
0.46
0.26
Terminal Length
Lead Thickness
0.20
-
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-061D Sheet 2 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 25
24AA02/24LC02B/24FC02
5-Lead Plastic Small Outline Transistor (LT) [SC70]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
E
Gx
SILK SCREEN
3
4
2
1
5
C
G
Y
X
RECOMMENDED LAND PATTERN
Units
MILLIMETERS
Dimension Limits
MIN
NOM
0.65 BSC
2.20
MAX
Contact Pitch
E
C
Contact Pad Spacing
Contact Pad Width
Contact Pad Length
Distance Between Pads
Distance Between Pads
X
Y
G
Gx
0.45
0.95
1.25
0.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-2061B
2007-2019 Microchip Technology Inc.
DS20001709L-page 26
24AA02/24LC02B/24FC02
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A
D
NOTE 5
N
E
2
E1
2
E1
E
1
2
NOTE 1
e
NX b
0.25
C A–B D
B
NOTE 5
TOP VIEW
0.10 C
0.10 C
C
A2
A
SEATING
PLANE
8X
SIDE VIEW
A1
h
R0.13
R0.13
h
H
0.23
L
SEE VIEW C
(L1)
VIEW A–A
VIEW C
Microchip Technology Drawing No. C04-057-SN Rev D Sheet 1 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 27
24AA02/24LC02B/24FC02
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
Overall Height
Molded Package Thickness
Standoff
Overall Width
A
-
-
-
-
1.75
-
0.25
A2
A1
E
1.25
0.10
§
6.00 BSC
Molded Package Width
Overall Length
E1
D
3.90 BSC
4.90 BSC
Chamfer (Optional)
Foot Length
h
L
0.25
0.40
-
-
0.50
1.27
Footprint
L1
1.04 REF
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
0°
0.17
0.31
5°
-
-
-
-
-
8°
c
b
0.25
0.51
15°
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Microchip Technology Drawing No. C04-057-SN Rev D Sheet 2 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 28
24AA02/24LC02B/24FC02
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
C
Y1
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Contact Pitch
E
C
X1
Y1
1.27 BSC
5.40
Contact Pad Spacing
Contact Pad Width (X8)
Contact Pad Length (X8)
0.60
1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2057-SN Rev B
2007-2019 Microchip Technology Inc.
DS20001709L-page 29
24AA02/24LC02B/24FC02
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
0.20 C 2X
D
e1
A
D
N
E/2
E1/2
E1
E
(DATUM D)
(DATUM A-B)
0.15 C D
2X
NOTE 1
1
2
e
B
NX b
0.20
C A-B D
TOP VIEW
A
A2
A1
A
0.20 C
SEATING PLANE
A
SEE SHEET 2
C
SIDE VIEW
Microchip Technology Drawing C04-028D [OT] Sheet 1 ofꢀꢁ
2007-2019 Microchip Technology Inc.
DS20001709L-page 30
24AA02/24LC02B/24FC02
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
c
T
L
L1
VIEW A-A
SHEET 1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
6
0.95 BSC
Outside lead pitch
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length
e1
A
A2
A1
E
E1
D
L
1.90 BSC
0.90
0.89
-
-
-
-
1.45
1.30
0.15
2.80 BSC
1.60 BSC
2.90 BSC
0.30
-
0.60
Footprint
Foot Angle
Lead Thickness
Lead Width
L1
0.60 REF
I
0°
0.08
0.20
-
-
-
10°
0.26
0.51
c
b
Notes:
1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.25mm per side.
2. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-091D [OT] Sheet 2 ofꢀꢁ
2007-2019 Microchip Technology Inc.
DS20001709L-page 31
24AA02/24LC02B/24FC02
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X
SILK SCREEN
5
Y
Z
C
G
1
2
E
GX
RECOMMENDED LAND PATTERN
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Contact Pitch
E
C
X
0.95 BSC
2.80
Contact Pad Spacing
Contact Pad Width (X5)
Contact Pad Length (X5)
Distance Between Pads
Distance Between Pads
Overall Width
0.60
1.10
Y
G
GX
Z
1.70
0.35
3.90
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-2091A [OT]
2007-2019 Microchip Technology Inc.
DS20001709L-page 32
24AA02/24LC02B/24FC02
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E
N
(DATUM A)
(DATUM B)
NOTE 1
2X
0.15 C
2X
1
2
0.15 C
TOP VIEW
0.10 C
(A3)
C
A
SEATING
PLANE
8X
A1
L
0.08 C
C A B
SIDE VIEW
0.10
D2
1
2
0.10
C A B
NOTE 1
E2
K
N
8X b
0.10
0.05
C A B
C
e
BOTTOM VIEW
Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 1 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 33
24AA02/24LC02B/24FC02
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of Pins
Pitch
Overall Height
Standoff
Contact Thickness
Overall Length
Overall Width
Exposed Pad Length
Exposed Pad Width
Contact Width
Contact Length
N
8
e
0.50 BSC
0.75
A
A1
A3
D
0.70
0.00
0.80
0.05
0.02
0.20 REF
2.00 BSC
3.00 BSC
1.40
E
D2
E2
b
L
K
1.35
1.25
0.20
0.25
0.20
1.45
1.35
0.30
0.45
-
1.30
0.25
0.30
-
Contact-to-Exposed Pad
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. Package is saw singulated
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 2 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 34
24AA02/24LC02B/24FC02
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X2
EV
8
ØV
C
Y2
EV
Y1
1
2
SILK SCREEN
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
MILLIMETERS
NOM
0.50 BSC
MIN
MAX
Contact Pitch
Optional Center Pad Width
Optional Center Pad Length
Contact Pad Spacing
X2
Y2
C
1.60
1.50
2.90
Contact Pad Width (X8)
Contact Pad Length (X8)
Thermal Via Diameter
Thermal Via Pitch
X1
Y1
V
0.25
0.85
0.30
1.00
EV
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing No. C04-129-MNY Rev. B
2007-2019 Microchip Technology Inc.
DS20001709L-page 35
24AA02/24LC02B/24FC02
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2007-2019 Microchip Technology Inc.
DS20001709L-page 36
24AA02/24LC02B/24FC02
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2007-2019 Microchip Technology Inc.
DS20001709L-page 37
24AA02/24LC02B/24FC02
8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]
Atmel Legacy YNZ Package
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E
N
(DATUM A)
(DATUM B)
NOTE 1
2X
0.10 C
1
2
2X
TOP VIEW
0.10 C
A1
0.10 C
0.08 C
C
A
SEATING
PLANE
8X
(A3)
SIDE VIEW
0.10
C A B
D2
e
2
1
2
0.10
K
C A B
E2
N
L
8X b
0.10
0.05
C A B
C
e
BOTTOM VIEW
Microchip Technology Drawing C04-21355-Q4B Rev A Sheet 1 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 38
24AA02/24LC02B/24FC02
8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]
Atmel Legacy YNZ Package
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of Terminals
Pitch
Overall Height
Standoff
Terminal Thickness
Overall Length
Exposed Pad Length
Overall Width
Exposed Pad Width
Terminal Width
Terminal Length
N
8
e
0.50 BSC
0.55
0.02
0.152 REF
2.00 BSC
1.50
3.00 BSC
1.30
A
A1
A3
D
D2
E
E2
b
L
0.50
0.00
0.60
0.05
1.40
1.60
1.20
0.18
0.35
0.20
1.40
0.30
0.45
-
0.25
0.40
-
Terminal-to-Exposed-Pad
K
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-21355-Q4B Rev A Sheet 2 of 2
2007-2019 Microchip Technology Inc.
DS20001709L-page 39
24AA02/24LC02B/24FC02
8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]
Atmel Legacy YNZ Package
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X2
EV
G2
8
ØV
C
Y2
G1
Y1
1
2
SILK SCREEN
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
MILLIMETERS
NOM
0.50 BSC
MIN
MAX
Contact Pitch
Optional Center Pad Width
Optional Center Pad Length
Contact Pad Spacing
X2
Y2
C
1.60
1.40
2.90
Contact Pad Width (X8)
Contact Pad Length (X8)
Contact Pad to Center Pad (X8)
Contact Pad to Contact Pad (X6)
Thermal Via Diameter
X1
Y1
G1
G2
V
0.30
0.85
0.20
0.33
0.30
1.00
Thermal Via Pitch
EV
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-21355-Q4B Rev A
2007-2019 Microchip Technology Inc.
DS20001709L-page 40
24AA02/24LC02B/24FC02
APPENDIX A: REVISION HISTORY
Revision L (05/2019)
Corrected Part Marking for UDFN package. Added
note about exposed pad on the TDFN and UDFN
packages.
Revision K (11/2018)
Added the 24FC02 device.
Revision J (02/2009)
Added TDFN Package; Updated Package Drawings.
Revision H (08/2008)
Added SC-70 Package; Updated Package Drawings.
Revision G (03/2007)
Replaced Package Drawings (Rev. AM).
Revision F (01/2007)
Revised Features section; Changed 1.8V to 1.7V in
Tables and text; Revised Ambient Temperature,
Section 1.0; Replaced Package Drawings; Revised
Product ID section.
Revision E
Revised Figure 3-2 Control Byte Allocation; Figure 4-1
Byte Write; Figure 4-2 Page Write; Section 6.0 Write
Protection; Figure 7-1 Current Address Read; Figure
7-2 Random Read; Figure 7-3 Sequential Read.
Revision D
Added DFN package.
Revision C
Corrections to Section 1.0, Electrical Characteristics.
2007-2019 Microchip Technology Inc.
DS20001709L-page 41
24AA02/24LC02B/24FC02
NOTES:
2007-2019 Microchip Technology Inc.
DS20001709L-page 42
24AA02/24LC02B/24FC02
THE MICROCHIP WEBSITE
CUSTOMER SUPPORT
Microchip provides online support via our website at
www.microchip.com. This website is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the website contains the following information:
Users of Microchip products can receive assistance
through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata, appli-
cation notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
Customers should contact their distributor, representa-
tive or Field Application Engineer (FAE) for support.
Local sales offices are also available to help custom-
ers. A listing of sales offices and locations is included in
the back of this document.
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
Technical support is available through the website
at: http://microchip.com/support
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of Micro-
chip sales offices, distributors and factory repre-
sentatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a spec-
ified product family or development tool of interest.
To register, access the Microchip website at
www.microchip.com. Under “Support”, click on “Cus-
tomer Change Notification” and follow the registra-
tion instructions.
2007-2019 Microchip Technology Inc.
DS20001709L-page 43
24AA02/24LC02B/24FC02
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
(1)
–X
/XX
[X]
PART NO.
Device
Examples:
a) 24LC02BT-I/MC: Tape and Reel, Industrial
Temperature, 2.5V, DFN package.
Temperature Package
Range
Tape and Reel
Option
b) 24LC02BT-I/MS: Tape and Reel, Industrial
Temperature, 2.5V, MSOP package.
2
Device:
24AA02:
24LC02B:
24FC02:
=
=
=
1.7V, 2-Kbit I C Serial EEPROM
2
2.5V, 2-Kbit I C Serial EEPROM
c) 24AA02-I/P: Industrial Temperature, 1.7V,
PDIP package.
2
1.7V, High Speed, 2-Kbit I C Serial EEPROM
d) 24LC02BT-I/LT: Tape and Reel, Industrial
Temperature, 2.5V, SC-70 package.
Tape and
Reel Option:
Blank = Standard packaging (tube or tray)
(1)
e) 24AA02-I/SN: Industrial Temperature,
1.7V, SOIC package.
T
= Tape and Reel
f) 24AA02T-I/OT: Tape and Reel, Industrial
Temperature, 1.7V, SOT-23 package.
Temperature
Range:
I
E
= -40°C to +85°C (Industrial)
= -40°C to +125°C (Extended)
g) 24AA02T-I/MNY: Tape and Reel, Industrial
Temperature, 1.7V, TDFN package.
Package:
MC = Plastic Dual Flat, No Lead Package –
2x3x0.9 mm Body, 8-lead (DFN)
MS = Plastic Micro Small Outline Package, 8-lead (MSOP)
P
LT
h) 24AA02T-I/ST: Tape and Reel, Industrial
Temperature, 1.7V, TSSOP package.
i) 24FC02-I/P: Industrial Temperature, 1.7V,
PDIP package.
= Plastic Dual In-Line – 300 mil Body, 8-lead (PDIP)
= Plastic Small Outline Transistor, 5-lead (SC-70)
(Tape and Reel only)
= Plastic Small Outline - Narrow, 3.90 mm Body, 8-lead
(SOIC)
j) 24FC02T-I/MUY: Tape and Reel, Industrial
Temperature, 1.7V, UDFN package.
SN
OT
= Plastic Small Outline Transistor, 5-lead (SOT-23)
(Tape and Reel only)
Note 1: Tape and Reel identifier only
appears in the catalog part number
description. This identifier is used
for ordering purposes and is not
printed on the device package.
Check with your Microchip Sales
Office for package availability with
the Tape and Reel option.
MNY = Plastic Dual Flat, No Lead Package - 2x3x0.8 mm
Body, 8-lead (TDFN)
ST
= Plastic Thin Shrink Small Outline – 4.4 mm, 8-lead
(TSSOP)
MUY = Plastic Dual Flat, No Lead Package - 2x3x0.6 mm
Body, 8-lead (UDFN)
2: Contact Microchip for Automotive
grade ordering part numbers.
2007-2019 Microchip Technology Inc.
DS20001709L-page 44
24AA02/24LC02B/24FC02
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
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Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo,
CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo,
JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo,
SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity,
JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation,
PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon,
QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O,
SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
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SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2019, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-4476-3
2007-2019 Microchip Technology Inc.
DS20001709L-page 45
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DS20001709L-page 46
08/15/18
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