25LC256T-E/STG [MICROCHIP]
32K X 8 SPI BUS SERIAL EEPROM, PDSO8, 4.40 MM, PLASTIC, MO-153, TSSOP-8;型号: | 25LC256T-E/STG |
厂家: | MICROCHIP |
描述: | 32K X 8 SPI BUS SERIAL EEPROM, PDSO8, 4.40 MM, PLASTIC, MO-153, TSSOP-8 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 |
文件: | 总26页 (文件大小:580K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
25AA256/25LC256
256K SPI Bus Serial EEPROM
Device Selection Table
Part Number
VCC Range
Page Size
Temp. Ranges
Packages
25LC256
25AA256
2.5-5.5V
1.8-5.5V
64 Byte
64 Byte
I, E
I
P, SN, SM, ST, MF
P, SN, SM, ST, MF
Features:
Description:
• Max. Clock 10 MHz
The Microchip Technology Inc. 25AA256/25LC256
(25XX256*) are 256 Kbit Serial Electrically Erasable
PROMs. The memory is accessed via a simple Serial
Peripheral Interface (SPI) compatible serial bus. The
bus signals required are a clock input (SCK) plus sep-
arate data in (SI) and data out (SO) lines. Access to the
device is controlled through a Chip Select (CS) input.
• Low-Power CMOS Technology:
- Max. Write Current: 5 mA at 5.5V, 10 MHz
- Read Current: 6 mA at 5.5V, 10 MHz
- Standby Current: 1 μA at 5.5V
• 32,768 x 8-bit Organization
• 64-Byte Page
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused,
transitions on its inputs will be ignored, with the
exception of Chip Select, allowing the host to service
higher priority interrupts.
• Self-Timed Erase and Write Cycles (5 ms max.)
• Block Write Protection:
- Protect none, 1/4, 1/2 or all of array
• Built-In Write Protection:
The 25XX256 is available in standard packages
including 8-lead PDIP and SOIC, and advanced
packaging including 8-lead DFN and 8-lead TSSOP.
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• Sequential Read
Package Types (not to scale)
• High Reliability:
DFN
PDIP/SOIC
(P, SN, SM)
(MF)
- Endurance: 1,000,000 erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4000V
1
2
3
4
CS
SO
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
WP
VCC
1
2
3
4
8
7
6
5
HOLD
SCK
SI
• Temperature Ranges Supported:
- Industrial (I):
- Automotive (E):
WP
VSS
-40°C to +85°C
VSS
-40°C to +125°C
• Pb-Free and RoHS Compliant
Rotated TSSOP
(ST)
Pin Function Table
8
1
2
3
4
SCK
SI
HOLD
Name
Function
7
VCC
CS
SO
Chip Select Input
Serial Data Output
Write-Protect
CS
SO
6
5
VSS
WP
WP
TSSOP
(ST)
VSS
SI
Ground
Serial Data Input
Serial Clock Input
Hold Input
8
7
1
2
3
4
V
CC
CS
SO
WP
SCK
HOLD
VCC
HOLD
6
5
SCK
SI
Supply Voltage
VSS
* 25XX256 is used in this document as a generic part number for the 25AA256, 25LC256 devices.
© 2007 Microchip Technology Inc.
DS21822F-page 1
25AA256/25LC256
1.0
ELECTRICAL CHARACTERISTICS
(†)
Absolute Maximum Ratings
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature .................................................................................................................................-65°C to 150°C
Ambient temperature under bias...............................................................................................................-40°C to 125°C
ESD protection on all pins..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an
extended period of time may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Industrial (I):
Automotive (E): TA = -40°C to +125°C
TA = -40°C to +85°C
VCC = 1.8V to 5.5V
VCC = 2.5V to 5.5V
DC CHARACTERISTICS
Param.
No.
Sym.
Characteristic
Min.
Typ.(2) Max.
Units
Test Conditions
D001
VIH
High-level input
voltage
.7 VCC
—
VCC +1
V
D002
D003
D004
D005
D006
VIL
Low-level input
voltage
-0.3
-0.3
—
—
—
—
—
0.3 VCC
0.2 VCC
0.4
V
V
V
V
V
VCC ≥ 2.5V
VIL
VCC < 2.5V
VOL
VOL
VOH
Low-level output
voltage
—
IOL = 2.1 mA, VCC = 4.5V
IOL = 1.0 mA, VCC = 2.5V
IOH = -400 μA
—
0.2
High-level output
voltage
VCC -0.5
—
D007
D008
ILI
Input leakage current
—
—
—
—
±1
±1
μA
μA
CS = VCC, VIN = VSS OR VCC
CS = VCC, VOUT = VSS OR VCC
ILO
Output leakage
current
D009
D010
CINT
Internal Capacitance
(all inputs and
outputs)
—
—
7
pF TA = 25°C, FCLK = 1.0 MHz,
VCC = 5.0V (Note 1)
ICC Read
—
—
2.5
0.5
6
mA VCC = 5.5V; FCLK = 10.0 MHz;
SO = Open
mA VCC = 2.5V; FCLK = 5.0 MHz;
SO = Open
Operating Current
2.5
D011
D012
ICC Write
ICCS
—
—
0.6
0.15
5
3
mA VCC = 5.5V
mA VCC = 2.5V
—
0.1
5
μA CS = VCC = 5.5V, Inputs tied to VCC
or VSS, 125°C
Standby Current
—
1
μA CS = VCC = 5.5V, Inputs tied to VCC
or VSS, 85°C
Note 1: This parameter is periodically sampled and not 100% tested.
2: Typical measurements taken at room temperature (25°C).
DS21822F-page 2
© 2007 Microchip Technology Inc.
25AA256/25LC256
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
Automotive (E): TA = -40°C to +125°C
TA = -40°C to +85°C
VCC = 1.8V to 5.5V
VCC = 2.5V to 5.5V
AC CHARACTERISTICS
Param.
Sym.
Characteristic
Min.
Max.
Units
Test Conditions
No.
1
2
3
FCLK Clock Frequency
—
—
—
10
5
3
MHz 4.5V ≤ Vcc ≤ 5.5V
MHz 2.5V ≤ Vcc < 4.5V
MHz 1.8V ≤ Vcc < 2.5V
TCSS CS Setup Time
TCSH CS Hold Time
TCSD CS Disable Time
50
100
150
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
100
200
250
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
4
5
50
—
ns
—
Tsu
Data Setup Time
10
20
30
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
6
THD
Data Hold Time
20
40
50
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
7
8
9
TR
TF
CLK Rise Time
CLK Fall Time
Clock High Time
—
—
100
100
ns
ns
(Note 1)
(Note 1)
THI
50
100
150
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
10
TLO
Clock Low Time
50
100
150
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
11
12
13
TCLD Clock Delay Time
50
50
—
—
ns
ns
—
—
TCLE
TV
Clock Enable Time
Output Valid from Clock
Low
—
—
—
50
100
160
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
14
15
THO
TDIS
Output Hold Time
0
—
ns
(Note 1)
Output Disable Time
—
—
—
40
80
160
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V (Note 1)
2.5V ≤ Vcc ≤ 4.5V (Note 1)
1.8V ≤ Vcc ≤ 2.5V (Note 1)
16
17
THS
THH
HOLD Setup Time
HOLD Hold Time
20
40
80
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
20
40
80
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
Note 1: This parameter is periodically sampled and not 100% tested.
2: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle
is complete.
3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
© 2007 Microchip Technology Inc.
DS21822F-page 3
25AA256/25LC256
TABLE 1-2:
AC CHARACTERISTICS (CONTINUED)
Industrial (I):
Automotive (E): TA = -40°C to +125°C
TA = -40°C to +85°C
VCC = 1.8V to 5.5V
VCC = 2.5V to 5.5V
AC CHARACTERISTICS
Param.
Sym.
Characteristic
Min.
Max.
Units
Test Conditions
No.
18
THZ
HOLD Low to Output
High-Z
30
60
160
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V (Note 1)
2.5V ≤ Vcc < 4.5V (Note 1)
1.8V ≤ Vcc < 2.5V (Note 1)
19
THV
HOLD High to Output
Valid
30
60
160
—
—
—
ns
ns
ns
4.5V ≤ Vcc ≤ 5.5V
2.5V ≤ Vcc < 4.5V
1.8V ≤ Vcc < 2.5V
20
21
TWC
—
Internal Write Cycle
Time
—
5
ms
(NOTE 2)
Endurance
1M
—
E/W (NOTE 3)
Cycles
Note 1: This parameter is periodically sampled and not 100% tested.
2: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle
is complete.
3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
TABLE 1-3:
AC Waveform:
VLO = 0.2V
AC TEST CONDITIONS
—
VHI = VCC – 0.2V
(Note 1)
(Note 2)
—
VHI = 4.0V
CL = 50 pF
Timing Measurement Reference Level
Input
0.5 VCC
0.5 VCC
Output
Note 1: For VCC ≤ 4.0V
2: For VCC > 4.0V
DS21822F-page 4
© 2007 Microchip Technology Inc.
25AA256/25LC256
FIGURE 1-1: HOLD TIMING
CS
17
17
16
16
SCK
18
19
High-Impedance
n
SO
n + 2
n + 2
n + 1
n
n - 1
5
Don’t Care
n
n + 1
n
n - 1
SI
HOLD
FIGURE 1-2: SERIAL INPUT TIMING
4
CS
12
11
2
7
3
8
Mode 1,1
Mode 0,0
SCK
SI
5
6
MSB in
LSB in
High-Impedance
SO
FIGURE 1-3: SERIAL OUTPUT TIMING
CS
3
9
10
Mode 1,1
SCK
Mode 0,0
13
15
ISB out
14
MSB out
SO
SI
Don’t Care
© 2007 Microchip Technology Inc.
DS21822F-page 5
25AA256/25LC256
2.0
2.1
FUNCTIONAL DESCRIPTION
Principles of Operation
2.3
Write Sequence
The 25XX256 is a 32,768-byte Serial EEPROM
designed to interface directly with the Serial Peripheral
Interface (SPI) port of many of today’s popular
microcontroller families, including Microchip’s PIC®
microcontrollers. It may also interface with microcon-
trollers that do not have a built-in SPI port by using
discrete I/O lines programmed properly in firmware to
match the SPI protocol.
Prior to any attempt to write data to the 25XX256, the
write enable latch must be set by issuing the WREN
instruction (Figure 2-4). This is done by setting CS low
and then clocking out the proper instruction into the
25XX256. After all eight bits of the instruction are
transmitted, the CS must be brought high to set the
write enable latch. If the write operation is initiated
immediately after the WREN instruction without CS
being brought high, the data will not be written to the
array because the write enable latch will not have been
properly set.
The 25XX256 contains an 8-bit instruction register. The
device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low and the HOLD pin must be high for the entire
operation.
Once the write enable latch is set, the user may
proceed by setting the CS low, issuing a WRITE
instruction, followed by the 16-bit address, with the first
MSB of the address being a “don’t care” bit, and then
the data to be written. Up to 64 bytes of data can be
sent to the device before a write cycle is necessary.
The only restriction is that all of the bytes must reside
in the same page.
Table 2-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses, and data are transferred MSB first, LSB
last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
the HOLD input and place the 25XX256 in ‘HOLD’
mode. After releasing the HOLD pin, operation will
resume from the point when the HOLD was asserted.
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and, end at addresses that are
integer multiples of page size – 1. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
2.2
Read Sequence
The device is selected by pulling CS low. The 8-bit
READ instruction is transmitted to the 25XX256
followed by the 16-bit address, with the first MSB of the
address being a “don’t care” bit. After the correct READ
instruction and address are sent, the data stored in the
memory at the selected address is shifted out on the
SO pin. The data stored in the memory at the next
address can be read sequentially by continuing to
provide clock pulses. The internal Address Pointer is
automatically incremented to the next higher address
after each byte of data is shifted out. When the highest
address is reached (7FFFh), the address counter rolls
over to address 0000h allowing the read cycle to be
continued indefinitely. The read operation is terminated
by raising the CS pin (Figure 2-1).
For the data to be actually written to the array, the CS
must be brought high after the Least Significant bit (D0)
of the nth data byte has been clocked in. If CS is
brought high at any other time, the write operation will
not be completed. Refer to Figure 2-2 and Figure 2-3
for more detailed illustrations on the byte write
sequence and the page write sequence, respectively.
While the write is in progress, the STATUS register may
be read to check the status of the WPEN, WIP, WEL,
BP1 and BP0 bits (Figure 2-6). A read attempt of a
memory array location will not be possible during a
write cycle. When the write cycle is completed, the
write enable latch is reset.
DS21822F-page 6
© 2007 Microchip Technology Inc.
25AA256/25LC256
BLOCK DIAGRAM
STATUS
Register
HV Generator
EEPROM
Array
Memory
Control
Logic
X
I/O Control
Logic
Dec
Page Latches
Y Decoder
SI
SO
CS
SCK
Sense Amp.
R/W Control
HOLD
WP
VCC
VSS
TABLE 2-1:
INSTRUCTION SET
Instruction Name
READ
Instruction Format
Description
Read data from memory array beginning at selected address
Write data to memory array beginning at selected address
Reset the write enable latch (disable write operations)
Set the write enable latch (enable write operations)
Read STATUS register
0000 0011
0000 0010
0000 0100
0000 0110
0000 0101
0000 0001
WRITE
WRDI
WREN
RDSR
WRSR
Write STATUS register
FIGURE 2-1: READ SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9 10 11
21 22 23 24 25 26 27 28 29 30 31
SCK
SI
Instruction
16-bit Address
1 15 14 13 12
0
0
0
0
0
0
1
2
1
0
Data Out
High-Impedance
7
6
5
4
3
2
1
0
SO
© 2007 Microchip Technology Inc.
DS21822F-page 7
25AA256/25LC256
FIGURE 2-2: BYTE WRITE SEQUENCE
CS
Twc
0
1
2
3
4
5
6
7
8
9 10 11
21 22 23 24 25 26 27 28 29 30 31
Data Byte
SCK
SI
Instruction
16-bit Address
15 14 13 12
0
0
0
0
0
0
1
0
2
1
0
7
6
5
4
3
2
1
0
High-Impedance
SO
FIGURE 2-3: PAGE WRITE SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9
10 11
21 22 23 24 25 26 27 28 29 30 31
Data Byte 1
SCK
SI
Instruction
16-bit Address
0
0
0
0
0
0
1
0 15 14 13 12
2
1
0
7
6
5
4
3
2
1
0
CS
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
SCK
SI
Data Byte 2
Data Byte 3
Data Byte n (64 max)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
DS21822F-page 8
© 2007 Microchip Technology Inc.
25AA256/25LC256
The following is a list of conditions under which the
write enable latch will be reset:
2.4
Write Enable (WREN) and Write
Disable (WRDI)
• Power-up
The 25XX256 contains a write enable latch.
See
• WRDIinstruction successfully executed
• WRSRinstruction successfully executed
• WRITEinstruction successfully executed
Table 2-1 for the Write-Protect Functionality Matrix.
This latch must be set before any write operation will be
completed internally. The WRENinstruction will set the
latch, and the WRDIwill reset the latch.
FIGURE 2-4: WRITE ENABLE SEQUENCE (WREN)
CS
0
1
2
3
4
5
6
7
SCK
SI
0
0
0
0
0
1
1
0
High-Impedance
SO
FIGURE 2-5: WRITE DISABLE SEQUENCE (WRDI)
CS
0
1
2
3
4
5
6
7
SCK
SI
0
0
0
0
0
0
1
0
High-Impedance
SO
© 2007 Microchip Technology Inc.
DS21822F-page 9
25AA256/25LC256
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch and is read-only. When set to
a ‘1’, the latch allows writes to the array, when set to a
‘0’, the latch prohibits writes to the array. The state of
this bit can always be updated via the WREN or WRDI
commands, regardless of the state of write protection
on the STATUS register. These commands are shown
in Figure 2-4 and Figure 2-5.
2.5
Read Status Register Instruction
(RDSR)
The Read Status Register instruction (RDSR) provides
access to the STATUS register. The STATUS register
may be read at any time, even during a write cycle. The
STATUS register is formatted as follows:
TABLE 2-2:
STATUS REGISTER
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSRinstruction. These
bits are nonvolatile, and are shown in Table 2-3.
7
6
-
5
-
4
-
3
2
1
0
W/R
W/R W/R
R
R
WPEN
x
x
x
BP1 BP0 WEL WIP
See Figure 2-6 for the RDSRtiming sequence.
W/R = writable/readable. R = read-only.
The Write-In-Process (WIP) bit indicates whether the
25XX256 is busy with a write operation. When set to a
‘1’, a write is in progress, when set to a ‘0’, no write is
in progress. This bit is read-only.
FIGURE 2-6: READ STATUS REGISTER TIMING SEQUENCE (RDSR)
CS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
Instruction
0
0
0
0
0
1
0
1
SI
Data from STATUS Register
High-Impedance
7
6
5
4
3
2
1
0
SO
DS21822F-page 10
© 2007 Microchip Technology Inc.
25AA256/25LC256
See Figure 2-7 for the WRSRtiming sequence.
2.6
Write Status Register Instruction
(WRSR)
TABLE 2-3:
BP1
ARRAY PROTECTION
The Write Status Register instruction (WRSR) allows the
user to write to the nonvolatile bits in the STATUS
register as shown in Table 2-2. The user is able to
select one of four levels of protection for the array by
writing to the appropriate bits in the STATUS register.
The array is divided up into four segments. The user
has the ability to write-protect none, one, two, or all four
of the segments of the array. The partitioning is
controlled as shown in Table 2-3.
Array Addresses
Write-Protected
BP0
none
0
0
0
1
upper 1/4
(6000h-7FFFh)
upper 1/2
(4000h-7FFFh)
1
1
0
1
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write-Protect (WP) pin and the Write-Protect Enable
(WPEN) bit in the STATUS register control the
programmable hardware write-protect feature. Hard-
ware write protection is enabled when WP pin is low
and the WPEN bit is high. Hardware write protection is
disabled when either the WP pin is high or the WPEN
bit is low. When the chip is hardware write-protected,
only writes to nonvolatile bits in the STATUS register
are disabled. See Table 2-1 for a matrix of functionality
on the WPEN bit.
all
(0000h-7FFFh)
FIGURE 2-7: WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)
CS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
15
0
SCK
SI
Instruction
Data to STATUS Register
7
6
5
4
3
2
0
0
0
0
0
0
0
1
High-Impedance
SO
Note:
An internal write cycle (TWC) is initiated on the rising edge of CS after a valid write STATUS register
sequence.
© 2007 Microchip Technology Inc.
DS21822F-page 11
25AA256/25LC256
2.7
Data Protection
2.8
Power-On State
The following protection has been implemented to
prevent inadvertent writes to the array:
The 25XX256 powers on in the following state:
• The device is in low-power Standby mode
(CS= 1)
• The write enable latch is reset
• SO is in high-impedance state
• A high-to-low-level transition on CS is required to
enter active state
• The write enable latch is reset on power-up
• A write enable instruction must be issued to set
the write enable latch
• After a byte write, page write or STATUS register
write, the write enable latch is reset
• CS must be set high after the proper number of
clock cycles to start an internal write cycle
• Access to the array during an internal write cycle
is ignored and programming is continued
TABLE 2-1:
WRITE-PROTECT FUNCTIONALITY MATRIX
WEL
(SR bit 1)
WPEN
(SR bit 7)
WP pin
Protected Blocks
Unprotected Blocks
STATUS Register
0
x
0
1
1
x
Protected
Protected
Protected
Protected
Protected
Writable
Writable
Writable
Protected
Writable
Protected
Writable
1
x
1
0(low)
1(high)
1
x = don’t care
DS21822F-page 12
© 2007 Microchip Technology Inc.
25AA256/25LC256
The WP pin function is blocked when the WPEN bit in
the STATUS register is low. This allows the user to
install the 25XX256 in a system with WP pin grounded
and still be able to write to the STATUS register. The
WP pin functions will be enabled when the WPEN bit is
set high.
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
PDIP/SOIC Rotated
TSSOP/DFN TSSOP
Name
Function
3.4
Serial Input (SI)
CS
SO
1
2
3
4
5
6
7
8
3
4
5
6
7
8
1
2
Chip Select Input
Serial Data Output
Write-Protect Pin
Ground
The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.
WP
VSS
SI
3.5
Serial Clock (SCK)
Serial Data Input
Serial Clock Input
Hold Input
The SCK is used to synchronize the communication
between a master and the 25XX256. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
SCK
HOLD
VCC
Supply Voltage
3.1
Chip Select (CS)
3.6
Hold (HOLD)
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already
initiated or in progress will be completed, regardless of
the CS input signal. If CS is brought high during a
program cycle, the device will go into Standby mode as
soon as the programming cycle is complete. When the
device is deselected, SO goes to the high-impedance
state, allowing multiple parts to share the same SPI
bus. A low-to-high transition on CS after a valid write
sequence initiates an internal write cycle. After power-
up, a low level on CS is required prior to any sequence
being initiated.
The HOLD pin is used to suspend transmission to the
25XX256 while in the middle of a serial sequence with-
out having to retransmit the entire sequence again. It
must be held high any time this function is not being
used. Once the device is selected and a serial
sequence is underway, the HOLD pin may be pulled
low to pause further serial communication without
resetting the serial sequence. The HOLD pin must be
brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK high-to-
low transition. The 25XX256 must remain selected
during this sequence. The SI, SCK and SO pins are in
a high-impedance state during the time the device is
paused and transitions on these pins will be ignored. To
resume serial communication, HOLD must be brought
high while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.
3.2
Serial Output (SO)
The SO pin is used to transfer data out of the 25XX256.
During a read cycle, data is shifted out on this pin after
the falling edge of the serial clock.
3.3
Write-Protect (WP)
This pin is used in conjunction with the WPEN bit in the
STATUS register to prohibit writes to the nonvolatile
bits in the STATUS register. When WP is low and
WPEN is high, writing to the nonvolatile bits in the
STATUS register is disabled. All other operations
function normally. When WP is high, all functions,
including writes to the nonvolatile bits in the STATUS
register, operate normally. If the WPEN bit is set, WP
low during a STATUS register write sequence will
disable writing to the STATUS register. If an internal
write cycle has already begun, WP going low will have
no effect on the write.
© 2007 Microchip Technology Inc.
DS21822F-page 13
25AA256/25LC256
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
8-Lead DFN
Example:
XXXXXXX
T/XXXXX
YYWW
25LC256
e
3
I/MF
0528
1L7
NNN
Example:
25LC256
8-Lead PDIP
XXXXXXXX
T/XXXNNN
I/P
1L7
e
3
0528
YYWW
Example:
Example:
25LC256I
8-Lead SOIC (208 mil)
XXXXXXXX
XXXXXXXX
YYWWNNN
8-Lead SOIC (3.90 mm)
25LC256
I/SM
XXXXXXXT
XXXXYYWW
e
3
SN
0528
e
3
05281L7
1L7
NNN
Example:
8-Lead TSSOP
TSSOP 1st Line Marking Codes
5LE
I528
1L7
XXXX
TYWW
NNN
Device
25AA256
25LC256
Standard
5AE
Rotated
5AEX
5LE
5LEX
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
YY
WW
NNN
e
3
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
DS21822F-page 14
© 2007 Microchip Technology Inc.
25AA256/25LC256
8-Lead Plastic Dual Flat, No Lead Package (MF) – 6x5 mm Body [DFN-S]
PUNCH SINGULATED
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
e
L
D1
b
N
N
K
E
E2
E1
EXPOSED
PAD
NOTE 1
1
2
2
1
NOTE 1
D2
TOP VIEW
BOTTOM VIEW
φ
A2
A
A3
A1
NOTE 2
Units
MILLIMETERS
NOM
Dimension Limits
MIN
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
0.85
Overall Height
A
–
–
1.00
0.80
0.05
Molded Package Thickness
Standoff
A2
A1
A3
D
0.65
0.00
0.01
Base Thickness
0.20 REF
4.92 BSC
4.67 BSC
4.00
Overall Length
Molded Package Length
Exposed Pad Length
Overall Width
D1
D2
E
3.85
4.15
5.99 BSC
5.74 BSC
2.31
Molded Package Width
Exposed Pad Width
Contact Width
E1
E2
b
2.16
0.35
0.50
0.20
–
2.46
0.47
0.75
–
0.40
Contact Length
L
0.60
Contact-to-Exposed Pad
Model Draft Angle Top
K
–
φ
–
12°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-113B
© 2007 Microchip Technology Inc.
DS21822F-page 15
25AA256/25LC256
8-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
N
NOTE 1
E1
3
1
2
D
E
A2
A
L
A1
c
e
eB
b1
b
Units
INCHES
Dimension Limits
MIN
NOM
8
MAX
Number of Pins
Pitch
N
e
.100 BSC
–
Top to Seating Plane
A
–
.210
.195
–
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A2
A1
E
.115
.015
.290
.240
.348
.115
.008
.040
.014
–
.130
–
.310
.250
.365
.130
.010
.060
.018
–
.325
.280
.400
.150
.015
.070
.022
.430
E1
D
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
b1
b
Lower Lead Width
Overall Row Spacing §
eB
Notes:
1. Pin 1 visual index feature may vary, but must be located with the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-018B
DS21822F-page 16
© 2007 Microchip Technology Inc.
25AA256/25LC256
8-Lead Plastic Small Outline (SN) – Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
e
N
E
E1
NOTE 1
1
2
3
α
h
b
h
c
φ
A2
A
L
A1
L1
β
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
Overall Height
A
–
–
1.75
–
Molded Package Thickness
Standoff
A2
A1
E
1.25
0.10
–
§
–
0.25
Overall Width
6.00 BSC
Molded Package Width
Overall Length
Chamfer (optional)
Foot Length
E1
D
h
3.90 BSC
4.90 BSC
0.25
0.40
–
0.50
1.27
L
–
Footprint
L1
φ
1.04 REF
Foot Angle
0°
0.17
0.31
5°
–
–
–
–
–
8°
Lead Thickness
Lead Width
c
0.25
0.51
15°
b
Mold Draft Angle Top
Mold Draft Angle Bottom
α
β
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-057B
© 2007 Microchip Technology Inc.
DS21822F-page 17
25AA256/25LC256
(JEITA/EIAJ Standard, Formerly called SOIC)
8-Lead Plastic Small Outline (SM) – Medium, 5.28 mm Body [SOIJ]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
1
2
e
b
α
c
φ
A2
A
β
A1
L
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
Overall Height
A
1.77
1.75
0.05
7.62
5.11
5.13
0.51
0°
–
–
–
–
–
–
–
–
–
–
–
–
2.03
1.98
0.25
8.26
5.38
5.33
0.76
8°
Molded Package Thickness
Standoff §
A2
A1
E
Overall Width
Molded Package Width
Overall Length
E1
D
L
Foot Length
Foot Angle
φ
c
Lead Thickness
Lead Width
0.15
0.36
–
0.25
0.51
15°
b
Mold Draft Angle Top
Mold Draft Angle Bottom
α
β
–
15°
Notes:
1. SOIJ, JEITA/EIAJ Standard, formerly called SOIC.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.25 mm per side.
Microchip Technology Drawing C04-056B
DS21822F-page 18
© 2007 Microchip Technology Inc.
25AA256/25LC256
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
1
2
b
e
c
φ
A
A2
A1
L
L1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
0.65 BSC
Overall Height
A
–
–
1.20
1.05
0.15
Molded Package Thickness
Standoff
A2
A1
E
0.80
0.05
1.00
–
Overall Width
6.40 BSC
Molded Package Width
Molded Package Length
Foot Length
E1
D
4.30
2.90
0.45
4.40
4.50
3.10
0.75
3.00
L
0.60
Footprint
L1
φ
1.00 REF
Foot Angle
0°
–
–
–
8°
Lead Thickness
Lead Width
c
0.09
0.20
0.30
b
0.19
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-086B
© 2007 Microchip Technology Inc.
DS21822F-page 19
25AA256/25LC256
APPENDIX A: REVISION HISTORY
Revision C (11/03)
Corrections to Section 1.0, Electrical Characteristics.
Revision D (06/05)
Update package information
Revision E (08/05)
Remove Preliminary status. Revise Table 1-1, Params.
D011 and D012.
Revision F (05/07)
Update Pb-free; Replace Package Drawings (Rev. AP);
Update Product ID section.
DS21822F-page 20
© 2007 Microchip Technology Inc.
25AA256/25LC256
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• Development Systems Information Line
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
Technical support is available through the web site
at: http://support.microchip.com
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com, click on Customer Change
Notification and follow the registration instructions.
© 2007 Microchip Technology Inc.
DS21822F-page 21
25AA256/25LC256
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
Reader Response
Total Pages Sent ________
RE:
From:
Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
25AA256/25LC256
DS21822F
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21822F-page 22
© 2007 Microchip Technology Inc.
25AA256/25LC256
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
X
–
Examples:
Tape & Reel
Package
Temp Range
a)
25AA256T-I/SN = 256k-bit, 1.8V Serial
EEPROM, Industrial temp., Tape & Reel, SOIC
package
b)
25AA256T-I/ST = 256k-bit, 1.8V Serial
EEPROM, Industrial temp., Tape & Reel,
TSSOP package
Device:
25AA256
25LC256
256k-bit, 1.8V, 64-Byte Page, SPI Serial EEPROM
256k-bit, 2.5V, 64-Byte Page, SPI Serial EEPROM
c)
d)
25LC256-I/P = 256k-bit, 2.5V Serial EEPROM,
Industrial temp., P-DIP package
25AA256X 256k-bit, 1.8V, 64-Byte Page, SPI Serial EEPROM,
rotated pinout (ST only)
25LC256X 256k-bit, 2.5V, 64-Byte Page, SPI Serial EEPROM,
rotated pinout (ST only)
25LC256T-E/ST
=
256k-bit, 2.5V Serial
EEPROM, Extended temp., Tape
TSSOP package
& Reel,
Tape & Reel:
Blank
T
=
=
Standard packaging (tube)
Tape & Reel
e)
25LC256XT-I/ST
=
256k-bit, 2.5V Serial
EEPROM, Industrial temp., Tape and Reel,
Rotated TSSOP package
Temperature
Range:
I
E
=
=
-40°C to+85°C
-40°C to+125°C
Package:
MF
P
SN
ST
SM
=
=
=
=
=
Micro Lead Frame (6 x 5 mm body), 8-lead
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (3.90 mml body), 8-lead
TSSOP, 8-lead
Plastic SOIC (5.28 mm body), 8-lead
© 2007 Microchip Technology Inc.
DS21822F-page 23
25AA256/25LC256
NOTES:
DS21822F-page 24
© 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC,
PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Linear Active Thermistor, Migratable
Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The
Embedded Control Solutions Company are registered
trademarks of Microchip Technology Incorporated in the
U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi,
MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit,
PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select
Mode, Smart Serial, SmartTel, Total Endurance, UNI/O,
WiperLock and ZENA are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2007, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2007 Microchip Technology Inc.
DS21822F-page 25
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-4182-8400
Fax: 91-80-4182-8422
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Gumi
Tel: 82-54-473-4301
Fax: 82-54-473-4302
Boston
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Fuzhou
Tel: 86-591-8750-3506
Fax: 86-591-8750-3521
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Penang
Tel: 60-4-646-8870
Fax: 60-4-646-5086
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Shunde
Tel: 86-757-2839-5507
Fax: 86-757-2839-5571
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
China - Xian
Tel: 86-29-8833-7250
Fax: 86-29-8833-7256
12/08/06
DS21822F-page 26
© 2007 Microchip Technology Inc.
相关型号:
©2020 ICPDF网 联系我们和版权申明