25LC640XT_技术文档

Not recommended for new designs –

Please use 25AA640A or 25LC640A.

25AA640/25LC640

64K SPI Bus Serial EEPROM

Description:

Device Selection Table

Part

Number

VCC

Range

Max Clock

Frequency

Temp

Ranges

The Microchip Technology Inc. 25AA640/25LC640

(25XX640^*) is a 64 Kbit Serial Electrically Erasable

PROM [EEPROM]. The memory is accessed via a

simple Serial Peripheral Interface (SPI) compatible

serial bus. The bus signals required are a clock input

(SCK) plus separate data in (SI) and data out (SO)

lines. Access to the device is controlled through a Chip

Select (CS) input.

25AA640

25LC640

1.8-5.5V

2.5-5.5V

4.5-5.5V

1 MHz

2 MHz

I

3/2.5 MHz

I, E

Features:

Communication to the device can be paused via the

hold pin (HOLD). While the device is paused,

transitions on its inputs will be ignored, with the

exception of Chip Select, allowing the host to service

higher priority interrupts.

• Low-Power CMOS Technology

- Write current: 3 mA, typical

- Read current: 500 μA, typical

- Standby current: 500 nA, typical

• 8192 x 8 Bit Organization

• 32 Byte Page

Block Diagram

• Write Cycle Time: 5 ms max.

• Self-Timed Erase and Write Cycles

• Block Write Protection

STATUS

HV Generator

Register

- Protect none, 1/4, 1/2 or all of array

• Built-in Write Protection

EEPROM

- Power on/off data protection circuitry

- Write enable latch

Memory

Control

Logic

I/O Control

Logic

Array

XDEC

- Write-protect pin

• Sequential Read

Page

Latches

• High Reliability

- Data retention: > 200 years

- ESD protection: > 4000V

• 8-pin PDIP, SOIC and TSSOP Packages

• Temperature Ranges Supported:

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C

SI

SO

Y Decoder

CS

SCK

Sense Amp.

R/W Control

HOLD

WP

VCC

VSS

Package Types

PDIP/SOIC

TSSOP

VCC

HOLD

SCK

SI

CS

SO

1

2

3

4

8

7

6

5

8

7

6

5

1

2

3

4

SCK

SI

VSS

WP

HOLD

VCC

CS

WP

VSS

SO

*25XX640 is used in this document as a generic part number for the 25AA640/25LC640 devices.

DS21223H-page 1

25AA640/25LC640

1.0

ELECTRICAL CHARACTERISTICS

(†)

Absolute Maximum Ratings

VCC.............................................................................................................................................................................7.0V

All inputs and outputs w.r.t. VSS ........................................................................................................ -0.6V to VCC + 1.0V

Storage temperature .................................................................................................................................-65°C to 150°C

Ambient temperature under bias...............................................................................................................-65°C to 125°C

ESD protection on all pins..........................................................................................................................................4 kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an

extended period of time may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

Industrial (I):

TA = -40°C to +85°C VCC = 1.8V to 5.5V

Automotive (E): TA = -40°C to +125°C VCC = 4.5V to 5.5V

DC CHARACTERISTICS

Param.

Sym

VIH1

Characteristics

Min

Max

Units

Conditions

VCC ≥ 2.7V (Note 1)

No.

D1

High-level input

voltage

2.0

0.7 VCC

-0.3

VCC + 1

0.8

V

D2

D3

D4

D5

VIH2

VIL1

VIL2

VOL

VCC < 2.7V (Note 1)

VCC ≥ 2.7V (Note 1)

VCC < 2.7V (Note 1)

IOL = 2.1 mA

Low-level input

voltage

-0.3

0.2 VCC

0.4

Low-level output

voltage

—

0.2

IOL = 1.0 mA, VCC = < 2.5V

IOH = -400 μA

D6

VOH

High-level output

voltage

VCC - 0.5

—

D7

D8

ILI

Input leakage current

—

±1

μA

CS = VCC, VIN = VSS TO VCC

CS = VCC, VOUT = VSS TO VCC

ILO

Output leakage

current

D9

CINT

Internal Capacitance

(all inputs and

outputs)

—

7

pF

TA = 25°C, CLK = 1.0 MHz,

VCC = 5.0V (Note 1)

D10

ICC Read Operating Current

—

1

500

mA

μA

VCC = 5.5V; FCLK = 3.0 MHz;

SO = Open

VCC = 2.5V; FCLK = 2.0 MHz;

SO = Open

D11

D12

ICC Write

—

5

3

mA

VCC = 5.5V

VCC = 2.5V

ICCS

Standby Current

—

5

1

μA

CS = VCC = 5.5V, Inputs tied to VCC or

VSS

CS = VCC = 2.5V, Inputs tied to VCC or

VSS

Note 1: This parameter is periodically sampled and not 100% tested.

DS21223H-page 2

25AA640/25LC640

TABLE 1-2:

AC CHARACTERISTICS

Industrial (I):

Automotive (E): TA = -40°C to +125°C

TA = -40°C to +85°C

VCC = 1.8V to 5.5V

VCC = 4.5V to 5.5V

AC CHARACTERISTICS

Param.

Sym

Characteristic

Min

Max

Units

Conditions

No.

1

2

3

FCLK

TCSS

TCSH

Clock Frequency

CS Setup Time

CS Hold Time

—

3

2

1

MHz

VCC = 4.5V to 5.5V (Note 2)

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

100

250

500

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

150

250

475

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

4

5

TCSD

TSU

CS Disable Time

Data Setup Time

500

—

ns

30

50

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

6

THD

Data Hold Time

50

100

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

7

8

9

TR

TF

CLK Rise Time

CLK Fall Time

Clock High Time

—

2

μs

(Note 1)

THI

150

230

475

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

10

TLO

Clock Low Time

150

230

475

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

11

12

13

TCLD

TCLE

TV

Clock Delay Time

Clock Enable Time

50

—

ns

Output Valid from

Clock Low

—

150

230

475

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

14

15

THO

TDIS

Output Hold Time

0

—

ns

(Note 1)

Output Disable Time

—

200

250

500

ns

VCC = 4.5V to 5.5V (Note 1)

VCC = 2.5V to 5.5V (Note 1)

VCC = 1.8V to 5.5V (Note 1)

16

17

18

19

THS

THH

THZ

THV

HOLD Setup Time

HOLD Hold Time

100

200

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

100

200

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

HOLD Low to Output

High-Z

100

150

200

—

ns

VCC = 4.5V to 5.5V (Note 1)

VCC = 2.5V to 5.5V (Note 1)

VCC = 1.8V to 5.5V (Note 1)

HOLD High to Output

Valid

100

150

200

—

ns

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

VCC = 1.8V to 5.5V

20

21

TWC

—

Internal Write Cycle

Time

—

5

ms

Endurance

1M

—

E/W

(Note 3)

Cycles

Note 1: This parameter is periodically sampled and not 100% tested.

2: FCLK max. = 2.5 MHz for TA > 85°C.

3: This parameter is not tested but established by characterization. For endurance estimates in a specific application,

please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at: www.microchip.com.

DS21223H-page 3

25AA640/25LC640

FIGURE 1-1:

HOLD TIMING

CS

17

16

17

SCK

SO

18

19

High-Impedance

Don’t Care

n

n + 2

n + 1

n

n - 1

5

n

n + 1

n

n - 1

SI

HOLD

FIGURE 1-2:

SERIAL INPUT TIMING

4

CS

12

2

11

7

3

8

Mode 1,1

Mode 0,0

SCK

SI

5

6

MSB In

LSB In

High-Impedance

SO

FIGURE 1-3:

SERIAL OUTPUT TIMING

CS

3

9

10

Mode 1,1

Mode 0,0

SCK

13

15

LSB Out

14

MSB Out

SO

SI

Don’t Care

DS21223H-page 4

25AA640/25LC640

TABLE 1-3:

AC Waveform:

VLO = 0.2V

AC TEST CONDITIONS

FIGURE 1-4:

AC TEST CIRCUIT

VCC

VHI = VCC – 0.2V

(Note 1)

2.25 kΩ

1.8 kΩ

VHI = 4.0V

(Note 2)

Timing Measurement Reference Level

Input

SO

0.5 VCC

100 pF

Output

Note 1: For VCC ≤ 4.0V

2: For VCC > 4.0V

DS21223H-page 5

25AA640/25LC640

The WP pin function is blocked when the WPEN bit in

the STATUS register is low. This allows the user to

install the 25XX640 in a system with WP pin grounded

and still be able to write to the STATUS register. The

WP pin functions will be enabled when the WPEN bit is

set high.

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

Name PDIP

SOIC

TSSOP

Description

2.4

Serial Input (SI)

CS

SO

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

3

4

5

6

7

8

1

2

Chip Select Input

Serial Data Output

Write-Protect Pin

Ground

The SI pin is used to transfer data into the device. It

receives instructions, addresses, and data. Data is

latched on the rising edge of the serial clock.

WP

VSS

SI

2.5

Serial Clock (SCK)

Serial Data Input

Serial Clock Input

Hold Input

The SCK is used to synchronize the communication

between a master and the 25XX640. Instructions,

addresses, or data present on the SI pin are latched on

the rising edge of the clock input, while data on the SO

pin is updated after the falling edge of the clock input.

SCK

HOLD

VCC

Supply Voltage

2.1

Chip Select (CS)

2.6

Hold (HOLD)

A low level on this pin selects the device. A high level

deselects the device and forces it into Standby mode.

However, a programming cycle which is already

initiated or in progress will be completed, regardless of

the CS input signal. If CS is brought high, or remains

high during a program cycle, the device will go into

Standby mode when the programming cycle is

complete. When the device is deselected, SO goes to

the high-impedance state, allowing multiple parts to

share the same SPI bus. A low-to-high transition on CS

after a valid write sequence initiates an internal write

cycle. After power-up, a high-to-low transition on CS is

required prior to any sequence being initiated.

The HOLD pin is used to suspend transmission to the

25XX640 while in the middle of a serial sequence with-

out having to retransmit the entire sequence over

again. It must be held high any time this function is not

being used. Once the device is selected and a serial

sequence is underway, the HOLD pin may be pulled

low to pause further serial communication without

resetting the serial sequence. The HOLD pin must be

brought low while SCK is low, otherwise the HOLD

function will not be invoked until the next SCK high-to-

low transition. The 25XX640 must remain selected

during this sequence. The SI, SCK, and SO pins are in

a high-impedance state during the time the device is

paused and transitions on these pins will be ignored. To

resume serial communication, HOLD must be brought

high while the SCK pin is low, otherwise serial

communication will not resume. Lowering the HOLD

line at any time will tri-state the SO line.

2.2

Serial Output (SO)

The SO pin is used to transfer data out of the 25XX640.

During a read cycle, data is shifted out on this pin after

the falling edge of the serial clock.

2.3

Write-Protect (WP)

This pin is used in conjunction with the WPEN bit in the

STATUS register to prohibit writes to the nonvolatile

bits in the STATUS register. When WP is low and

WPEN is high, writing to the nonvolatile bits in the STA-

TUS register is disabled. All other operations function

normally. When WP is high, all functions, including

writes to the nonvolatile bits in the STATUS register

operate normally. If the WPEN bit is set, WP low during

a STATUS register write sequence will disable writing

to the STATUS register. If an internal write cycle has

already begun, WP going low will have no effect on the

write.

DS21223H-page 6

25AA640/25LC640

3.3

Write Sequence

3.0

FUNCTIONAL DESCRIPTION

Prior to any attempt to write data to the 25XX640 array

or STATUS register, the write enable latch must be set

by issuing the WREN instruction (Figure 3-4). This is

done by setting CS low and then clocking out the

proper instruction into the 25XX640. After all eight bits

of the instruction are transmitted, the CS must be

brought high to set the write enable latch. If the write

operation is initiated immediately after the WREN

instruction without CS being brought high, the data will

not be written to the array because the write enable

latch will not have been properly set.

3.1

Principles Of Operation

The 25XX640 is a 8192 byte Serial EEPROM designed

to interface directly with the Serial Peripheral Interface

(SPI) port of many of today’s popular microcontroller

families, including Microchip’s PIC16C6X/7X micro-

controllers. It may also interface with microcontrollers

that do not have a built-in SPI port by using discrete

I/O lines programmed properly with the software.

The 25XX640 contains an 8-bit instruction register. The

device is accessed via the SI pin, with data being

clocked in on the rising edge of SCK. The CS pin must

be low and the HOLD pin must be high for the entire

operation.

Once the write enable latch is set, the user may

proceed by setting the CS low, issuing a WRITE

instruction, followed by the address, and then the data

to be written. Up to 32 bytes of data can be sent to the

25XX640 before a write cycle is necessary. The only

restriction is that all of the bytes must reside in the

same page. A page address begins with XXX0 0000

and ends with XXX1 1111. If the internal address

counter reaches XXX1 1111and the clock continues,

the counter will roll back to the first address of the page

and overwrite any data in the page that may have been

written.

Table 3-1 contains a list of the possible instruction

bytes and format for device operation. All instructions,

addresses, and data are transferred MSB first, LSB

last.

Data is sampled on the first rising edge of SCK after CS

goes low. If the clock line is shared with other

peripheral devices on the SPI bus, the user can assert

the HOLD input and place the 25XX640 in ‘HOLD’

mode. After releasing the HOLD pin, operation will

resume from the point when the HOLD was asserted.

For the data to be actually written to the array, the CS

must be brought high after the Least Significant bit (D0)

of the n^thdata byte has been clocked in. If CS is

brought high at any other time, the write operation will

not be completed. Refer to Figure 3-2 and Figure 3-3

for more detailed illustrations on the byte write

sequence and the page write sequence, respectively.

While the write is in progress, the STATUS register may

be read to check the status of the WPEN, WIP, WEL,

BP1, and BP0 bits (Figure 3-6). A read attempt of a

memory array location will not be possible during a

write cycle. When the write cycle is completed, the

write enable latch is reset.

3.2

Read Sequence

The device is selected by pulling CS low. The 8-bit

READ instruction is transmitted to the 25XX640 fol-

lowed by the 16-bit address with the three MSBs of the

address being “don’t care” bits. After the correct READ

instruction and address are sent, the data stored in the

memory at the selected address is shifted out on the

SO pin. The data stored in the memory at the next

address can be read sequentially by continuing to pro-

vide clock pulses. The internal Address Pointer is auto-

matically incremented to the next higher address after

each byte of data is shifted out. When the highest

address is reached (1FFFh), the address counter rolls

over to address 0000h allowing the read cycle to be

continued indefinitely. The read operation is terminated

by raising the CS pin (Figure 3-1).

TABLE 3-1:

INSTRUCTION SET

Instruction Name

Instruction Format

Description

READ

WRITE

WREN

WRDI

RDSR

WRSR

0000 0011

0000 0010

0000 0110

0000 0100

0000 0101

0000 0001

Read data from memory array beginning at selected address

Write data to memory array beginning at selected address

Set the write enable latch (enable write operations)

Reset the write enable latch (disable write operations)

Read STATUS register

Write STATUS register

DS21223H-page 7

25AA640/25LC640

FIGURE 3-1:

READ SEQUENCE

CS

0

1

2

3

4

5

6

7

8

9 10 11

21 22 23 24 25 26 27 28 29 30 31

SCK

SI

Instruction

16-bit Address

1 15 14 13 12

0

1

2

1

0

Data Out

High-Impedance

7

6

5

4

3

2

1

0

SO

FIGURE 3-2:

BYTE WRITE SEQUENCE

CS

Twc

Instruction

16-bit Address

0 15 14 13 12

Data Byte

0

1

2

1

0

7

6

5

4

3

2

1

0

SI

High-Impedance

SO

FIGURE 3-3:

PAGE WRITE SEQUENCE

CS

0

1

2

3

4

5

6

7

8

9 10 11

21 22 23 24 25 26 27 28 29 30 31

Data Byte 1

SCK

Instruction

16-bit Address

0 15 14 13 12

0

1

2

1

0

7

6

5

4

3

2

1

0

SI

CS

32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

SCK

SI

Data Byte 2

Data Byte 3

Data Byte n (32 max)

7

6

5

4

3

2

1

0

7

6

5

4

3

2

1

0

7

6

5

4

3

2

1

0

DS21223H-page 8

25AA640/25LC640

The following is a list of conditions under which the

write enable latch will be reset:

3.4

Write Enable (WREN) and

Write Disable (WRDI)

• Power-up

The 25XX640 contains a write enable latch. See

Table 3-3 for the Write-Protect Functionality Matrix.

This latch must be set before any write operation will be

completed internally. The WRENinstruction will set the

latch, and the WRDIwill reset the latch.

• WRDIinstruction successfully executed

• WRSRinstruction successfully executed

• WRITEinstruction successfully executed

FIGURE 3-4:

WRITE ENABLE SEQUENCE

CS

0

1

2

3

4

5

6

7

SCK

0

1

0

SI

High-Impedance

SO

FIGURE 3-5:

WRITE DISABLE SEQUENCE

CS

0

1

2

3

4

5

6

7

SCK

0

1

0

1

0

SI

High-Impedance

SO

DS21223H-page 9

25AA640/25LC640

The Write Enable Latch (WEL) bit indicates the status

of the write enable latch. When set to a ‘1’, the latch

allows writes to the array and STATUS register, when

set to a ‘0’, the latch prohibits writes to the array and

STATUS register. The state of this bit can always be

updated via the WREN or WRDI commands regardless

of the state of write protection on the STATUS register.

This bit is read-only.

3.5

Read Status Register Instruction

(RDSR)

The Read Status Register instruction (RDSR) provides

access to the STATUS register. The STATUS register

may be read at any time, even during a write cycle. The

STATUS register is formatted as follows:

7

6

5

4

3

2

1

0

The Block Protection (BP0 and BP1) bits indicate

which blocks are currently write-protected. These bits

are set by the user issuing the WRSRinstruction. These

bits are nonvolatile.

WPEN

X

BP1 BP0 WEL WIP

The Write-In-Process (WIP) bit indicates whether the

25XX640 is busy with a write operation. When set to a

‘1’, a write is in progress, when set to a ‘0’, no write is

in progress. This bit is read-only.

See Figure 3-6 for RDSR timing sequence.

FIGURE 3-6:

READ STATUS REGISTER TIMING SEQUENCE

CS

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

SCK

SI

Instruction

0

1

0

1

Data from STATUS Register

High-Impedance

SO

7

6

5

4

3

2

1

0

DS21223H-page 10

25AA640/25LC640

TABLE 3-2:

ARRAY PROTECTION

3.6

Write Status Register Instruction

(WRSR)

Array Addresses

Write-Protected

BP1

BP0

The Write Status Register instruction (WRSR) allows the

user to select one of four levels of protection for the

array by writing to the appropriate bits in the STATUS

register. The array is divided up into four segments.

The user has the ability to write-protect none, one, two,

or all four of the segments of the array. The partitioning

is controlled as shown in Table 3-2.

0

1

none

upper 1/4

(1800h-1FFFh)

1

0

1

upper 1/2

(1000h-1FFFh)

The Write-Protect Enable (WPEN) bit is a nonvolatile

bit that is available as an enable bit for the WP pin. The

Write-Protect (WP) pin and the Write-Protect Enable

(WPEN) bit in the STATUS register control the pro-

grammable hardware write-protect feature. Hardware

write protection is enabled when the WP pin is low and

the WPEN bit is high. Hardware write protection is dis-

abled when either the WP pin is high or the WPEN bit

is low. When the chip is hardware write-protected, only

writes to nonvolatile bits in the STATUS register are dis-

abled. See Table 3-3 for a matrix of functionality on the

WPEN bit.

all

(0000h-1FFFh)

See Figure 3-7 for WRSR timing sequence.

FIGURE 3-7:

WRITE STATUS REGISTER TIMING SEQUENCE

CS

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

1

15

0

SCK

SI

Instruction

Data to STATUS Register

7

6

5

4

3

2

0

1

High-Impedance

SO

DS21223H-page 11

25AA640/25LC640

3.7

Data Protection

3.8

Power-On-State

The following protection has been implemented to

prevent inadvertent writes to the array:

The 25XX640 powers on in the following state:

• The device is in low-power Standby mode

(CS= 1)

• The write enable latch is reset

• SO is in high-impedance state

• A high-to-low transition on CS is required to enter

the active state

• The write enable latch is reset on power-up

• A write enable instruction must be issued to set

the write enable latch

• After a byte write, page write, or STATUS register

write, the write enable latch is reset

• CS must be set high after the proper number of

clock cycles to start an internal write cycle

• Access to the array during an internal write cycle

is ignored and programming is continued

.

TABLE 3-3:

WPEN

WRITE-PROTECT FUNCTIONALITY MATRIX

WP

WEL

Protected Blocks

Unprotected Blocks

STATUS Register

X

0

1

X

0

1

Protected

Writable

Protected

Writable

Protected

Writable

X

Low

High

DS21223H-page 12

25AA640/25LC640

4.0

4.1

PACKAGING INFORMATION

Package Marking Information

8-Lead PDIP (300 mil)

Example:

XXXXXXXX

XXXXXNNN

25LC640

/P017

YYWW

0410

8-Lead SOIC (150 mil)

Example:

XXXXXXXX

XXXXYYWW

25LC640

I/SN0410

NNN

017

Example:

8-Lead TSSOP

XXXX

YYWW

5LCX

0410

NNN

017

Legend: XX...X Customer-specific information

Y

Year code (last digit of calendar year)

YY

Year code (last 2 digits of calendar year)

WW

NNN

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

e

3

Pb-free JEDEC designator for Matte Tin (Sn)

This package is Pb-free. The Pb-free JEDEC designator (

can be found on the outer packaging for this package.

*

)

3

e

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

*

Standard marking consists of Microchip part number, year code, week code, traceability code (facility

code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please

check with your Microchip Sales Office.

DS21223H-page 13

25AA640/25LC640

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DS21223H-page 14

25AA640/25LC640

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ ꢕꢄꢈꢈꢆ!ꢎꢊꢈꢋꢐꢃꢆꢑ ꢛꢒꢆMꢆꢛꢄ""ꢗ#$ꢆꢓ%&ꢔꢆꢕꢕꢆꢖꢗꢅꢘꢆꢙ !ꢏ'ꢚ

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DS21223H-page 15

25AA640/25LC640

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DS21223H-page 16

25AA640/25LC640

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ()ꢋꢐꢆ )"ꢋꢐ*ꢆ ꢕꢄꢈꢈꢆ!ꢎꢊꢈꢋꢐꢃꢆꢑ (ꢒꢆMꢆ+%+ꢆꢕꢕꢆꢖꢗꢅꢘꢆꢙ( !ꢇꢚ

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DS21223H-page 17

25AA640/25LC640

APPENDIX A: REVISION HISTORY

Revision F

Corrections to Section 1.0, Electrical Characteristics.

Revision G

Product ID System, Example C: Corrected part

number, added “Alternate Pinout” and corrected part

number in Header.

Updated Trademark and Sales List pages.

Revision H (June 2008)

Added “Not Recommended” note; Updated Packaging;

General updates.

DS21223H-page 18

25AA640/25LC640

THE MICROCHIP WEB SITE

CUSTOMER SUPPORT

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

• Development Systems Information Line

Customers

should

contact

their

distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

• General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

Technical support is available through the web site

at: http://support.microchip.com

• Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com, click on Customer Change

Notification and follow the registration instructions.

DS21223H-page 19

25AA640/25LC640

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-

uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

To:

Technical Publications Manager

Reader Response

Total Pages Sent ________

RE:

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Application (optional):

Would you like a reply?

Y

N

25AA640/25LC640

DS21223H

Literature Number:

Device:

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21223H-page 20

25AA640/25LC640

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO.

Device

X

/XX

XXX

Examples:

Temperature

Range

Package

Pattern

a) 25AA640-I/SN: Industrial Temp.,

SOIC package

b) 25AA640T-I/SN: Tape and Reel,

Industrial Temp., SOIC package

c) 25AA640X-I/ST: Alternate Pinout

Industrial Temp., TSSOP package

d) 25LC640-I/SN: Industrial Temp.,

SOIC package

Device

25AA640:

64K bit 1.8V SPI Serial EEPROM

25AA640T: 64K bit 1.8V SPI Serial EEPROM

(Tape and Reel)

25AA640X: 64K bit 1.8V SPI Serial EEPROM

in alternate pinout (ST only)

25AA640XT: 64K bit 1.8V SPI Serial EEPROM

in alternate pinout Tape and Reel (ST only)

25LC640:

25LC640T: 64K bit 2.5V SPI Serial EEPROM

(Tape and Reel)

25LC640X: 64K bit 2.5V SPI Serial EEPROM

in alternate pinout (ST only)

e) 25LC640T-I/SN: Tape and Reel,

Industrial Temp., SOIC package

64K bit 2.5V SPI Serial EEPROM

f)

25LC640X-I/ST: Alternate Pinout,

Industrial Temp., TSSOP package

25LC640XT: 64K bit 2.5V SPI Serial EEPROM

in alternate pinout Tape and Reel (ST only)

Temperature Range

Package

I

E

=

-40°C to +85°C

-40°C to +125°C

P

SN

ST

=

Plastic DIP (300 mil Body), 8-lead

Plastic SOIC (150 mil Body), 8-lead

Plastic TSSOP (4.4 mm Body), 8-lead

DS21223H-page 21

25AA640/25LC640

NOTES:

DS21223H-page 22

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,

PICSTART, PRO MATE, rfPIC and SmartShunt are registered

trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

FilterLab, Linear Active Thermistor, MXDEV, MXLAB,

SEEVAL, SmartSensor and The Embedded Control Solutions

Company are registered trademarks of Microchip Technology

Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard,

dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,

ECONOMONITOR, FanSense, In-Circuit Serial

Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB

Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,

32

PICDEM.net, PICtail, PIC logo, PowerCal, PowerInfo,

PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total

Endurance, UNI/O, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC^®MCUs and dsPIC^®DSCs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS21223H-page 23

WORLDWIDE SALES AND SERVICE

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

India - Bangalore

Tel: 91-80-4182-8400

Fax: 91-80-4182-8422

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://support.microchip.com

Web Address:

www.microchip.com

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

China - Beijing

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

Boston

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Korea - Seoul

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

Detroit

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

Kokomo

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Taiwan - Hsin Chu

Tel: 886-3-572-9526

Fax: 886-3-572-6459

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

Santa Clara

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

China - Xiamen

Tel: 86-592-2388138

Fax: 86-592-2388130

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

01/02/08

DS21223H-page 24


型号：	25LC640XT
厂家：	MICROCHIP
描述：	64K SPI Bus Serial EEPROM 64K SPI总线串行EEPROM 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总24页 (文件大小：361K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

25LC640XT [MICROCHIP]

相关型号：

25LC640XT-E/P

25LC640XT-E/SN

25LC640XT-E/ST

25LC640XT-E/STG

25LC640XT-I/P

25LC640XT-I/SN

25LC640XT-I/ST

25LC640XT-I/STG

25LCW

25LET

25LEW

25LEWI