27C512A-15ISO [MICROCHIP]
512K (64K x 8) CMOS EPROM; 512K ( 64K ×8 ) CMOS EPROM型号: | 27C512A-15ISO |
厂家: | MICROCHIP |
描述: | 512K (64K x 8) CMOS EPROM |
文件: | 总12页 (文件大小:73K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
27C512A
512K (64K x 8) CMOS EPROM
FEATURES
PACKAGE TYPES
TSOP
• High speed performance
OE/VPP
A11
A9
1
2
3
4
5
6
7
28 A10
27 CE
26 D7
25 D6
24 D5
23 D4
22 D3
• CMOS Technology for low power consumption
- 25 mA Active current
A8
A13
A14
VCC
- 30 µA Standby current
• Factory programming available
• Auto-insertion-compatible plastic packages
• Auto ID aids automated programming
• High speed express programming algorithm
• Organized 64K x 8: JEDEC standard pinouts
- 28-pin Dual-in-line package
- 32-pin PLCC Package
27C512A
A15
A12
8
9
21 VSS
20 D2
19 D1
18 D0
17 A0
16 A1
15 A2
A7 10
A6 11
A5 12
A4 13
A3 14
PLCC
5
29
28
27
26
25
24
23
22
21
A6
A5
A4
A3
A2
A1
A0
NC
O0
A8
A9
- 28-pin SOIC package
6
7
A11
NC
OE/VPP
A10
CE
- 28-pin TSOP package
8
9
- 28-pin VSOP package
10
11
12
13
- Tape and reel
O7
O6
• Data Retention > 200 years
• Available for the following temperature ranges
- Commercial:
- Industrial:
0˚C to +70˚C
DIP/SOIC
-40˚C to +85˚C
-40˚C to +125˚C
- Automotive:
A15
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
VSS
2
3
DESCRIPTION
4
5
A9
The Microchip Technology Inc. 27C512A is a CMOS
512K bit electrically Programmable Read Only Memory
(EPROM). The device is organized into 64K words by
8 bits (64K bytes). Accessing individual bytes from an
address transition or from power-up (chip enable pin
going low) is accomplished in less than 90 ns. This
very high speed device allows the most sophisticated
microprocessors to run at full speed without the need
for WAIT states. CMOS design and processing enables
this part to be used in systems where reduced power
consumption and high reliability are requirements.
6
A11
OE/VPP
A10
CE
7
8
9
10
11
12
13
14
O7
O6
O5
O4
O3
VSOP
A complete family of packages is offered to provide the
most flexibility in applications. For surface mount appli-
cations, PLCC, VSOP, TSOP or SOIC packaging is
available. Tape or reel packaging is also available for
PLCC or SOIC packages.
OE/VPP
A11
A9
A8
A13
A14
22
23
24
25
26
27
A10
CE
O7
O6
O5
O4
O3
VSS
O2
O1
O0
A0
21
20
19
18
17
16
15
14
13
12
11
10
9
28
1
VCC
A15
27C512A
2
3
4
5
6
7
A12
A7
A6
A5
A4
A3
A1
A2
8
1996 Microchip Technology Inc.
DS11173E-page 1
27C512A
TABLE 1-1:
Name
PIN FUNCTION TABLE
Function
1.0
ELECTRICAL CHARACTERISTICS
1.1
Maximum Ratings*
VCC and input voltages w.r.t. VSS........-0.6V to +7.25V
A0-A15
CE
Address Inputs
VPP voltage w.r.t. VSS during
programming .........................................-0.6V to +14V
Chip Enable
OE/VPP
O0 - O7
VCC
Output Enable/Programming Voltage
Data Output
Voltage on A9 w.r.t. VSS ......................-0.6V to +13.5V
Output voltage w.r.t. VSS ............... -0.6V to VCC +1.0V
Storage temperature .......................... -65˚C to +150˚C
Ambient temp. with power applied ..... -65˚C to +125˚C
+5V Power Supply
Ground
VSS
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating con-
ditions for extended periods may affect device reliability.
NC
No Connection; No Internal Connec-
tion
NU
Not Used; No External Connection is
Allowed
TABLE 1-2:
READ OPERATION DC CHARACTERISTICS
VCC = +5V ±10%
Commercial:
Industrial:
Tamb = 0˚C to +70˚C
Tamb = -40˚C to +85˚C
Extended (Automotive):
Tamb = -40˚C to +125˚C
Parameter
Part*
Status
Symbol
Min
Max
Units Conditions
Input Voltages
all
Logic "1"
Logic "0"
VIH
VIL
2.0
-0.5
VCC+1
0.8
V
V
Input Leakage
all
all
ILI
-10
2.4
10
µA VIN = 0 to VCC
Output Voltages
Logic "1"
Logic "0"
VOH
VOL
V
V
IOH = - 400 µA
IOL = 2.1 mA
0.45
10
6
Output Leakage
all
all
—
—
ILO
-10
—
µA VOUT = 0V to VCC
Input Capacitance
CIN
pF VIN = 0V; Tamb = 25°C;
f = 1 MHz
Output Capacitance
all
—
COUT
—
12
pF VOUT = 0V; Tamb = 25°C;
f = 1 MHz
Power Supply Current,
Active
C
I, E
TTL input
TTL input
ICC
ICC
—
—
25
35
mA VCC = 5.5V
mA f = 1 MHz;
OE/VPP = CE = VIL;
IOUT = 0 mA;
VIL = -0.1 to 0.8V;
VIH = 2.0 to VCC;
Note 1
Power Supply Current,
Standby
C
I, E
all
TTL input
TTL input
CMOS input ICC(S)CMOS
ICC(S)TLL
ICC(S)TLL
—
—
—
1
2
30
mA
mA
µA CE = Vcc±0.2V
* Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges
Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.
DS11173E-page 2
1996 Microchip Technology Inc.
27C512A
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
VIH = 2.4V and VIL = .45V; VOH = 2.0V and VOL = 0.8V
1 TTL Load + 100 pF
Input Rise and Fall Times: 10 ns
Ambient Temperature:
Commercial:
Tamb = 0˚C to +70˚C
Industrial:
Extended (Automotive):
Tamb = -40˚C to +85˚C
Tamb = -40˚C to +125˚C
27C512-90*
Sym
27C512-10*
27C512-12
27C512-15
Parameter
Units Conditions
Min
Max
Min
Max
Min
Max
Min
Max
Address to Output
Delay
tACC
tCE
—
90
—
100
—
120
—
150
ns
ns
CE = OE/
VPP = VIL
CE to Output Delay
—
90
—
100
—
120
—
150
OE/VPP =
VIL
OE to Output Delay
tOE
—
0
40
35
—
0
40
35
—
0
50
40
—
0
60
45
ns
ns
CE = VIL
OE to Output High
Impedance
tOFF
Output Hold from
Address, CE or OE/
VPP, whichever
occurred first
tOH
0
—
0
—
0
—
0
—
ns
*90/10 AC Testing Waveforms: VIH = 3.0V and VIL = 0V; VOH = 1.5V and VOL = 1.5V
Output Load: 1 TTL Load + 30 pF
FIGURE 1-1: READ WAVEFORMS
VIH
Address Valid
Address
CE
VIL
VIH
VIL
tCE(2)
VIH
VIL
OE
tOFF(1,3)
tOH
tOE(2)
VOH
VOL
Outputs
O0 - O7
High Z
High Z
Valid Output
tACC
Notes: (1) tOFF is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE
(3) This parameter is sampled and is not 100% tested.
1996 Microchip Technology Inc.
DS11173E-page 3
27C512A
TABLE 1-4:
PROGRAMMING DC CHARACTERISTICS
Ambient Temperature: Tamb = 25°C ± 5°C
VCC = 6.5V ± 0.25V, OE/VPP = VH = 13.0V ± 0.25V
Parameter
Status
Symbol
Min.
Max.
Units
Conditions (See Note 1)
Input Voltages
Logic “1”
Logic “0”
VIH
VIL
2.0
-0.1
VCC+1
0.8
V
V
Input Leakage
—
ILI
-10
10
µA
VIN = 0V to VCC
Output Voltages
Logic “1”
Logic “0”
VOH
VOL
2.4
—
V
V
IOH = -400 µA
IOL = 2.1 mA
0.45
35
VCC Current, program & verify
OE/VPP Current, program
A9 Product Identification
—
—
—
ICC2
IPP2
VID
—
—
mA
mA
V
CE = VIL
25
11.5
12.5
Note 1: VCC must be applied simultaneously or before VPP voltage on OE/VPP and removed simultaneously or after
the VPP voltage on OE/VPP.
TABLE 1-5:
PROGRAMMING AC CHARACTERISTICS
for Program, Program Verify
and Program Inhibit Modes
AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V
Ambient Temperature: 25°C ±5°C
VCC = 6.5V ± 0.25V, OE/VPP = VH = 13.0V ± 0.25 V
Parameter
Symbol
Min. Max. Units
Remarks
Address Set-Up Time
Data Set-Up Time
tAS
tDS
2
2
—
—
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
µs
ns
Data Hold Time
tDH
2
—
Address Hold Time
Float Delay (2)
tAH
0
—
tDF
0
130
—
VCC Set-Up Time
tVCS
tPW
tCES
tOES
tOEH
tOR
2
Program Pulse Width (1)
CE Set-Up Time
95
2
105
—
100 µs typical
OE Set-Up Time
2
—
OE Hold Time
2
—
OE Recovery Time
OE /VPP Rise Time During Programming
2
—
tPRT
50
—
Note 1: For express algorithm, initial programming width tolerance is 100 µs ±5%.
2: This parameter is only sampled and not 100% teted. Output float is defined as the point where data is no
longer driven (see timing diagram).
DS11173E-page 4
1996 Microchip Technology Inc.
27C512A
FIGURE 1-2: PROGRAMMING WAVEFORMS (1)
Program
Verify
VIH
Address Stable
Address VIL
tAH
tAS
VIH
Data In Stable
Data Out Valid
Data VIL
tDF
(2)
tDH
tDS
6.5 V (3)
VCC 5.0V
VIH
tCE
(2)
tVCS
tOES
tPW
CE VIL
tCES
tOEH
tOR
13.0 V (3)
OE/VPP
tOPW
VIL
tPRT
Notes: (1) The input timing reference level is 0.8V for VIL and 2.0V for VIH.
(2) tDF and tOE are characteristics of the device but must be accommodated by the programmer.
(3) VCC = 6.5V ±0.25V, VPP = VH = 13.0V ±0.5V for express programming algorithm.
TABLE 1-6:
MODES
Operation Mode
CE
OE/VPP
A9
O0 - O7
Read
VIL
VIL
VIL
VIH
VIH
VIL
VIL
VIL
VH
VIL
VH
X
X
X
DOUT
DIN
Program
Program Verify
Program Inhibit
Standby
X
DOUT
X
High Z
X
High Z
Output Disable
Identity
VIH
VIL
X
High Z
VH
Identity Code
X = Don’t Care
For Read operations, if the addresses are stable, the
address access time (tACC) is equal to the delay from
CE to output (tCE). Data is transferred to the output
after a delay (tOE) from the falling edge of OE/VPP.
1.2
Read Mode
(See Timing Diagrams and AC Characteristics)
Read Mode is accessed when
a) the CE pin is low to power up (enable) the chip
b) the OE/VPP pin is low to gate the data to the
output pins
1996 Microchip Technology Inc.
DS11173E-page 5
27C512A
Since the erased state is “1” in the array, programming
of “0” is required. The address to be programmed is set
via pinsA0 -A15 and the data to be programmed is pre-
sented to pins O0 - O7. When data and address are
stable, a low going pulse on the CE line programs that
location.
1.3
Standby Mode
The standby mode is entered when the CE pin is high,
and the program mode is not identified.
When this conditions are met, the supply current will
drop from 25 mA to 30 µA.
1.7
Verify
1.4
Output Enable OE/VPP
After the array has been programmed it must be verified
to ensure all the bits have been correctly programmed.
This mode is entered when all the following conditions
are met:
This multifunction pin eliminates bus connection in mul-
tiple bus microprocessor systems and the outputs go to
high impedance when:
• the OE/VPP pin is high (VIH).
a) VCC is at the proper level,
b) the OE/VPP pin is low, and
c) the CE line is low.
When a VH input is applied to this pin, it supplies the
programming voltage (VPP) to the device.
1.5
Erase Mode (UV Windowed Versions)
1.8
Inhibit
Windowed products offer the ability to erase the mem-
ory array. The memory matrix is erased to the all “1's”
state as a result of being exposed to ultraviolet light. To
ensure complete erasure, a dose of 15 watt-second/
When programming multiple devices in parallel with dif-
ferent data, only CE needs to be under separate control
to each device. By pulsing the CE line low on a partic-
ular device, that device will be programmed; all other
devices with CE held high will not be programmed with
the data (although address and data will be available on
their input pins).
2
cm is required. This means that the device window
must be placed within one inch and directly underneath
an ultraviolet lamp with a wavelength of 2537 Ang-
2
stroms, intensity of 12,000 mW/cm for approximately
40 minutes.
1.9
Identity Mode
1.6
Programming Mode
In this mode specific data is output which identifies the
manufacturer as Microchip Technology Inc. and the
device type. This mode is entered when PinA9 is taken
to VH (11.5V to 12.5V). The CE and OE/VPP lines must
be at VIL. A0 is used to access any of the two non-eras-
able bytes whose data appears on O0 through O7.
The Express algorithm must be used for best results. It
has been developed to improve programming yields
and throughput times in a production environment. Up
to 10 100-microsecond pulses are applied until the byte
is verified. A flowchart of the Express algorithm is
shown in Figure 1-3.
Programming takes place when:
Pin
Identity
Input
A0
Output
a) VCC is brought to the proper voltage,
b) OE/VPP is brought to the proper VH level, and
c) CE line is low.
H
e
x
0 O O O O O O O
7
6
5
4
3
2
1
0
Manufacturer
Device Type*
VIL
VIH
0
1
0
0
1
0
0
0
1
1
0
1
0
0
1
0
29
0D
* Code subject to change
DS11173E-page 6
1996 Microchip Technology Inc.
27C512A
FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM
Conditions:
Start
Tamb = 25˚C ±5˚C
VCC = 6.5 ±0.25V
VPP = 13.0 ±0.25V
ADDR = First Location
VCC = 6.5V
VPP = 13.0V
X = 0
Program one 100 µs pulse
Increment X
Verify
Byte
Pass
Fail
No
Yes
Device
Failed
X = 10 ?
Last
Address?
Yes
No
Increment Address
VCC = VPP = 4.5V, 5.5V
All
Yes
No
bytes
= original
data?
Device
Passed
Device
Failed
1996 Microchip Technology Inc.
DS11173E-page 7
27C512A
NOTES:
DS11173E-page 8
1996 Microchip Technology Inc.
27C512A
NOTES:
1996 Microchip Technology Inc.
DS11173E-page 9
27C512A
NOTES:
DS11173E-page 10
1996 Microchip Technology Inc.
27C512A
27C512A Product Identification System
To order or to obtain information (e.g., on pricing or delivery),, please use listed part numbers, and refer to factory or listed sales offices.
27C512A – 70
I
/P
Package:
L = Plastic Leaded Chip Carrier
P = Plastic DIP (600 Mil)
SO = Plastic SOIC (300 Mil)
TS = Thin Small Outline Package(TSOP) 8x20mm
VS = Very Small Outline Package(VSOP) 8x13.4mm
Temperature
Range:
Blank = 0˚C to +70˚C
I = -40˚C to +85˚C
E = -40˚C to +125˚C
Access
Time:
90 = 90 ns
10 = 100 ns
12 = 120 ns
15 = 150 ns
Device:
27C512A
512K (64K x 8) CMOS EPROM
1996 Microchip Technology Inc.
DS11173E-page 11
WORLDWIDE SALES & SERVICE
AMERICAS
Corporate Office
ASIA/PACIFIC
China
EUROPE
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Microchip Technology Inc.
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JAPAN
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9/3/96
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Microchip Technology Inc.
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Microchip Technology Inc.
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Tel: 905 405-6279 Fax: 905 405-6253
All rights reserved. 1996, Microchip Technology Incorporated, USA. 9/96
Printed on recycled paper.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. No repre-
sentation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement
of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not autho-
rized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and
name are registered trademarks of Microchip Technology Inc. All rights reserved. All other trademarks mentioned herein are the property of their respective companies.
DS11173E-page 12
1996 Microchip Technology Inc.
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