5962-9317704VNC [MICROCHIP]
FIFO, 16KX9, 15ns, Asynchronous, CMOS, FP-28;
| 型号： | 5962-9317704VNC |
| 厂家： | 
MICROCHIP |
| 描述： | FIFO, 16KX9, 15ns, Asynchronous, CMOS, FP-28 先进先出芯片 |
| 文件： | 总20页 (文件大小：1591K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• First-in First-out Dual Port Memory
• 16384 bits x 9 Organization
• Fast Flag and Access Times: 15, 30 ns
• Wide Temperature Range: - 55°C to + 125°C
• Fully Expandable by Word Width or Depth
• Asynchronous Read/Write Operations
• Empty, Full and Half Flags in Single Device Mode
• Retransmit Capability
• Bi-directional Applications
• Battery Back-up Operation: 2V Data Retention
• TTL Compatible
• Single 5V ± 10% Power Supply
Rad. Tolerant
High Speed
16 Kb x 9
• QML Q and V with SMD 5962-93177
Description
Parallel FIFO
The M67206F implements a first-in first-out algorithm, featuring asynchronous
read/write operations. The FULL and EMPTY flags prevent data overflow and under-
flow. The Expansion logic allows unlimited expansion in word size and depth with no
timing penalties. Twin address pointers automatically generate internal read and write
addresses, and no external address information is required. Address pointers are
automatically incremented with the write pin and read pin. The 9 bits wide data are
used in data communications applications where a parity bit for error checking is nec-
essary. The Retransmit pin resets the Read pointer to zero without affecting the write
pointer. This is very useful for retransmitting data when an error is detected in the
system.
M67206F
Using an array of eight transistors (8T) memory cell, the M67206F combines an
extremely low standby supply current (typ = 0.1 µA) with a fast access time at 15 ns
over the full temperature range. All versions offer battery backup data retention capa-
bility with a typical power consumption at less than 2 µW.
The M67206F is processed according to the methods of the latest revision of the MIL
PRF 38535 (Q and V) or ESA SCC 9000.
Rev. 4143F–AERO–06/02
1
Block Diagram
Pin Configuration
DIL ceramic 28-pin 300 mils
FP 28-pin 400 mils
2
M67206F
4143F–AERO–06/02
M67206F
Pin Description
Names
I0-8
Q0-8
W
Description
Inputs
Outputs
Write Enable
Read Enable
Reset
R
RS
EF
Empty Flag
FF
Full Flag
XO/HF
XI
Expansion Out/Half-Full Flag
Expansion IN
First Load/Retransmit
Power Supply
Ground
FL/RT
VCC
GND
Data In (I0 - I8)
Reset (RS)
Data inputs for 9-bit data
Reset occurs whenever the Reset (RS) input is taken to a low state. Reset returns both
internal read and write pointers to the first location. A reset is required after power-up
before a write operation can be enabled. Both the Read Enable (R) and Write Enable
(W) inputs must be in the high state during the period shown in Figure 1 (i.e. tRSS before
the rising edge of RS) and should not change until tRSR after the rising edge of RS. The
Half-Full Flag (HF) will be reset to high After Reset (RS)
Figure 1. Reset
Notes: 1. EF, FF and HF may change status during reset, but flags will be valid at tRSC
2. W and R = VIH around the rising edge of RS.
.
3
4143F–AERO–06/02
Write Enable (W)
A write cycle is initiated on the falling edge of this input if the Full Flag (FF) is not set.
Data set-up and hold times must be maintained in the rise time of the leading edge of
the Write Enable (W). Data is stored sequentially in the Ram array, regardless of any
current read operation.
Once half the memory is filled, and during the falling edge of the next write operation,
the Half-Full Flag (HF) will be set to low and remain in this state until the difference
between the write and read pointers is less than or equal to half of the total available
memory in the device. The Half-Full Flag (HF) is then reset by the rising edge of the
read operation.
To prevent data overflow, the Full Flag (FF) will go low, inhibiting further write opera-
tions. On completion of a valid read operation, the Full Flag (FF) will go high after TRFF,
allowing a valid write to begin. When the FIFO stack is full, the internal write pointer is
blocked from W, so that external changes to W will have no effect on the full FIFO stack.
Read Enable (R)
A read cycle is initiated on the falling edge of the Read Enable (R) provided that the
Empty Flag (EF) is not set. The data is accessed on a first-in/first-out basis, not includ-
ing any current write operations. After Read Enable (R) goes high, the Data Outputs (Q0
- Q8) will return to a high impedance state until the next Read operation. When all the
data in the FIFO stack has been read, the Empty Flag (EF) will go low, allowing the
“final” read cycle, but inhibiting further read operations while the data outputs remain in
a high impedance state. Once a valid write operation has been completed, the Empty
Flag (EF) will go high after tWEF and a valid read may then be initiated. When the FIFO
stack is empty, the internal read pointer is blocked from R, so that external changes to R
will have no effect on the empty FIFO stack.
First Load/Retransmit
(FL/RT)
This pin is a dual-purpose input. In the Depth Expansion Mode, this pin is connected to
ground to indicate that it is the first loaded (see Operating Modes). In the Single Device
Mode, this pin acts as the retransmit input. The Single Device Mode is initiated by con-
necting the Expansion In (XI) to ground.
The M67206F can be set to retransmit data when the Retransmit Enable Control (RT)
input is pulsed low. A retransmit operation will set the internal read point to the first loca-
tion and will not affect the write pointer. Read Enable (R) and Write Enable (W) must be
in the high state during retransmit. The retransmit feature is intended for use when a
number of writes are equal to or less than the depth of the FIFO has occurred since the
last RS cycle. The retransmit feature is not compatible with the Depth Expansion Mode
and will affect the Half-Full Flag (HF), in accordance with the relative locations of the
read and write pointers.
Expansion In (XI)
Full Flag (FF)
The XI input is a dual-purpose pin. Expansion In (XI) is connected to GND to indicate an
operation in the single device mode. Expansion In (XI) is connected to Expansion Out
(XO) of the previous device in the Depth Expansion or Daisy Chain modes.
The Full Flag (FF) will go low, inhibiting further write operations when the write pointer is
one location less than the read pointer, indicating that the device is full. If the read
pointer is not moved after Reset (RS), the Full Flag (FF) will go low after 16384 writes.
Empty Flag (EF)
The Empty Flag (EF) will go low, inhibiting further read operations when the read pointer
is equal to the write pointer, indicating that the device is empty.
4
M67206F
4143F–AERO–06/02
M67206F
Expansion Out/Half-Full
Flag (XO/HF)
The XO/HF pin is a dual-purpose output. In the single device mode, when Expansion In
(XI) is connected to ground, this output acts as an indication of a half-full memory.
After half the memory is filled and on the falling edge of the next write operation, the
Half-Full Flag (HF) will be set to low and will remain set until the difference between the
write and read pointers is less than or equal to half of the total memory of the device.
The Half-Full Flag (HF) is then reset by the rising edge of the read operation.
In the Depth Expansion Mode, Expansion In (XI) is connected to Expansion Out (XO) of
the previous device. This output acts as a signal to the next device in the Daisy Chain by
providing a pulse to the next device when the previous device reaches the last memory
location.
Data Output (Q0 - Q8)
DATA output for 9-bit wide data. This data is in a high impedance condition whenever
Read (R) is in a high state.
5
4143F–AERO–06/02
Functional Description
Single Device Mode
A single M67206F may be used when the application requirements are for 16384 words
or less. The M67206F is in a Single Device Configuration when the Expansion In (XI) control
input is grounded (see Figure 2). In this mode the Half-Full Flag (HF), which is an active low
output, is shared with Expansion Out (XO).
Figure 2. Block Diagram of Single 16384 bits × 9
HF
(HALF-FULL FLAG)
(W)
(R)
(Q)
READ
WRITE
HF
9
9
DATAOUT
DATAIN
(I)
(EF)
(RT)
EMPTY FLAG
RETRANSMIT
FULL FLAG (FF)
(RS)
RESET
EXPANSION IN (XI)
M67206F
Width Expansion Mode
Word width may be increased simply by connecting the corresponding input control sig-
nals of multiple devices. Status flags (EF, FF and HF) can be detected from any device.
Figure 3 demonstrates an 18-bit word width by using two M67206F. Any word width can be
attained by adding additional M67206F.
Figure 3. Block Diagram of 16384 bits x 18 FIFO Memory Used in Width Expansion Mode
Note:
Flag detection is accomplished by monitoring the FF, EF and the HF signals on either (any) device used in the width expansion
configuration. Do not connect any output control signals together.
6
M67206F
4143F–AERO–06/02
M67206F
Table 1. Reset and Retransmit
Single Device Configuration/Width Expansion Mode
Inputs
Internal Status
Write Pointer
Outputs
Mode
RS
0
RT
X
XI
0
Read Pointer
Location Zero
Location Zero
Increment(1)
EF
0
FF
1
HF
1
Reset
Location Zero
Unchanged
Increment(1)
1
0
0
X
X
X
Retransmit
Read/Write
1
1
0
X
X
X
Note:
1. Pointer will increment if flag is high.
Table 2. Reset and First Load Truth Table
Depth Expansion/Compound Expansion Mode
Inputs
Internal Status
Outputs
Mode
RS
FL
XI
Read Pointer
Write Pointer
EF
FF
0
0
(1)
0
1
1
Reset First Device
Location Zero
Location Zero
Reset All Other
Devices
0
1
1
(1)
(1)
Location Zero
X
Location Zero
X
0
X
X
X
Read/Write
Note:
1. XI is connected to XO of previous device.
See Figure 4.
Depth Expansion (Daisy The M67206F can be easily adapted for applications which require more than 16384
words. Figure 4 demonstrates Depth Expansion using three M67206Fs. Any depth can
be achieved by adding an additional M67206F.
Chain) Mode
The M67206F operates in the Depth Expansion configuration if the following conditions
are met:
1. The first device must be designated by connecting the First Load (FL) control
input to ground.
2. All other devices must have FL in the high state.
3. The Expansion Out (XO) pin of each device must be connected to the Expansion In
(XI) pin of the next device. See Figure 4
4. External logic is needed to generate a composite Full Flag (FF) and Empty Flag
(EF). This requires that all EF’s and all FFs be ORed (i.e. all must be set to generate the
correct composite FF or EF). See Figure 4.
5. The Retransmit (RT) function and Half-Full Flag (HF) are not available in the Depth
Expansion Mode.
Compound Expansion
Module
It is quite simple to apply the two expansion techniques described above together to cre-
ate large FIFO arrays (see Figure 5).
7
4143F–AERO–06/02
Bi-directional Mode
Applications which require data buffering between two systems (each system being
capable of Read and Write operations) can be created by coupling M67206F as shown
in Figure 6. Care must be taken to ensure that the appropriate flag is monitored by each
system (i.e. FF is monitored on the device on which W is in use; EF is monitored on the device
on which R is in use). Both Depth Expansion and Width Expansion may be used in this mode.
Data Flow – Through
Modes
Two types of flow-through modes are permitted: a read flow-through and a write flow-
through mode. In the read flow-through mode (Figure 17) the FIFO stack allows a single
word to be read after one word has been written to an empty FIFO stack. The data is
enabled on the bus at (tWEF + tA) ns after the leading edge of W which is known as the
first write edge and remains on the bus until the R line is raised from low to high, after which the
bus will go into a three-state mode after tRHZ ns. The EF line will show a pulse indicating tem-
porary reset and then will be set. In the interval in which R is low, more words may be written to
the FIFO stack (the subsequent writes after the first write edge will reset the Empty Flag); how-
ever, the same word (written on the first write edge) presented to the output bus as the read
pointer will not be incremented if R is low. On toggling R, the remaining words written to the
FIFO will appear on the output bus in accordance with the read cycle timings.
In the write flow-through mode (Figure 18), the FIFO stack allows a single word of data
to be written immediately after a single word of data has been read from a full FIFO
stack. The R line causes the FF to be reset, but the W line, being low, causes it to be set again
in anticipation of a new data word. The new word is loaded into the FIFO stack on the leading
edge of W. The W line must be toggled when FF is not set in order to write new data into the
FIFO stack and to increment the write pointer.
Figure 4. Block Diagram of 49152 bits × 9 FIFO Memory (Depth Expansion)
8
M67206F
4143F–AERO–06/02
M67206F
Figure 5. Compound FIFO Expansion
Notes: 1. For depth expansion block see section on Depth Expansion and Figure 4.
2. For Flag detection see section on Width Expansion and Figure 3.
Figure 6. Bi-directional FIFO Mode
9
4143F–AERO–06/02
Electrical Characteristics
Absolute Maximum Ratings
*NOTICE:
Stresses beyond those listed under "Absolute Maxi-
mum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional oper-
ation of the device at these or any other conditions
beyond those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect device reliability.
Supply voltage (VCC - GND): .............................- 0.5V to 7.0V
Input or Output voltage applied: (GND - 0.3V) to (Vcc + 0.3V)
Storage temperature:................................. - 65 °C to + 150 °C
DC Parameters
DC Test Conditions
TA = -55°C to + 125°C; Vss = 0V; Vcc = 4.5V to 5.5V
Parameter
Description
M67206F-30
M67206F-15
Unit
Value
Operating
supply current
(1)
ICCOP
110
120
5
mA
Max
Standby
supply current
(2)
ICCSB
5
mA
µA
Max
Max
Power down
current
(3)
ICCPD
400
400
1.
2.
3.
Icc measurements are made with outputs open.
R = W = RS = FL/RT = VIH.
All input = Vcc.
Parameter
ILI (1)
Description
M67206F
Unit
µA
µA
V
Value
Input leakage current
Output leakage current
Input low voltage
Input high voltage
Output low voltage
Output high voltage
Input capacitance
Output capacitance
1
1
Max
Max
Max
Min
ILO (2)
VIL (3)
0.8
2.2
0.4
2.4
8
VIH(3)
V
VOL (4)
V
Max
Min
VOH(4)
V
C IN (5)
pF
pF
Max
Max
C OUT(5)
8
1.
2.
3.
4.
5.
0.4 ≤ Vin ≤ Vcc.
R = VIH, 0.4 ≤ VOUT ≤ VCC.
VIH max = Vcc + 0.3 V. VIL min = -0.3V or -1V pulse width 50 ns. For XI input, VIH = 2.8V
Vcc min, IOL = 8 mA, IOH = -2 mA.
Guaranteed but not tested.
10
M67206F
4143F–AERO–06/02
M67206F
AC Test Conditions
Input pulse levels: Gnd to 3.0V
Input rise/Fall times: 5 ns
Output reference levels: 1.5V
Output load: See Figure 7
Input timing reference levels: 1.5V
Figure 7. Output Load
Table 3. AC Test Conditions
M67206F- 15
M67206F- 30
Unit
(4)
Symbol (1)
Read Cycle
TRLRL
Symbol (2)
Parameter (3)
Min
Max
Min
Max
tRC
tA
25
–
–
15
–
40
–
–
30
–
ns
ns
ns
ns
ns
ns
ns
ns
Read cycle time
TRLQV
Access time
TRHRL
tRR
10
15
0
10
30
5
Read recovery time
Read pulse width (5)
Read low to data low Z (6)
Write low to data low Z (6) (7)
Data valid from read high
Read high to data high Z(6)
TRLRH
tRPW
tRLZ
tWLZ
tDV
–
–
TRLQX
–
–
TWHQX
3
–
5
–
TRHQX
5
–
5
–
TRHQZ
tRHZ
–
15
–
20
Write Cycle
TWLWL
tWC
tWPW
tWR
tDS
25
15
10
9
–
–
–
–
–
40
30
10
18
0
–
–
–
–
–
ns
ns
ns
ns
ns
Write cycle time
Write pulse width(5)
Write recovery time
Data set-up time
Data hold time
TWLWH
TWHWL
TDVWH
TWHDX
tDH
0
Reset Cycle
TRSLWL
TRSLRSH
tRSC
tRS
25
15
–
–
40
30
–
–
ns
ns
Reset cycle time
Reset pulse width (5)
11
4143F–AERO–06/02
Table 3. AC Test Conditions (Continued)
M67206F- 15
M67206F- 30
Unit
(4)
Symbol (1)
TWHRSH
TRSHWL
Retransmit Cycle
TRTLWL
Symbol (2)
tRSS
Parameter (3)
Min
20
Max
Min
30
Max
–
–
–
–
ns
ns
Reset set-up time
tRSR
Reset recovery time
10
10
tRTC
tRT
25
15
15
10
–
–
–
–
40
30
30
10
–
–
–
–
ns
ns
ns
ns
Retransmit cycle time
TRTLRTH
TWHRTH
TRTHWL
Flags
Retransmit pulse width(5)
Retransmit set-up time(6)
Retransmit recovery time
tRTS
tRTR
TRSLEFL
TRSLFFH
TRLEFL
tEFL
tHFH, tFFH
tREF
–
–
25
25
15
25
–
–
–
30
30
30
30
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Reset to EF low
Reset to HF/FF high
Read low to EF low
Read high to FF high
Read width after EF high
Write high to EF high
Write low to FF low
Write low to HF low
Read high to HF high
Write width after FF high
–
–
TRHFFH
TEFHRH
TWHEFH
TWLFFL
tRFF
–
–
tRPE
15
–
30
–
tWEF
15
20
30
30
–
30
30
30
30
–
tWFF
–
–
TWLHFL
TRHHFH
TFFHWH
Expansion
TWLXOL
TWHXOH
TXILXIH
tWHF
–
–
tRHF
–
–
tWPF
15
30
tXOL
tXOH
tXI
–
15
15
–
–
30
30
–
ns
ns
ns
ns
ns
Read/Write to XO low
Read/Write to XO high
XI pulse width
–
–
15
10
10
30
10
10
TXIHXIL
tXIR
tXIS
–
–
XI recovery time
XI set-up time
TXILRL
–
–
1.
STD symbol.
ALT symbol.
Timings referenced as in AC test conditions.
All parameters tested only.
Pulse widths less than minimum value are not allowed.
Values guaranteed by design, not currently tested.
Only applies to read data flow-through mode.
2.
3.
4.
5.
6.
7.
12
M67206F
4143F–AERO–06/02
M67206F
Figure 8. Asynchronous Write and Read Operation
Figure 9. Full Flag from Last Write to First Read
Figure 10. Empty Flag from Last Read to First Write
13
4143F–AERO–06/02
Figure 11. Retransmit
Figure 12. Empty Flag Timing
W
tWEF
EF
R
tRPE
Figure 13. Full Flag Timing
Figure 14. Half Full Flag Timing
14
M67206F
4143F–AERO–06/02
M67206F
Figure 15. Expansion Out
Figure 16. Expansion In
Figure 17. Read Data Flow – Through Mode
15
4143F–AERO–06/02
Figure 18. Write Data Flow – Through Mode
16
M67206F
4143F–AERO–06/02
M67206F
Ordering Information
Temperature
Range
Part Number
Speed
15 ns
15 ns
30 ns
15 ns
30 ns
15 ns
30 ns
15 ns
30 ns
15 ns
15 ns
30 ns
15 ns
30 ns
15 ns
30 ns
15 ns
30 ns
15 ns
15 ns
15 ns
Package
SB28.3
SB28.3
SB28.3
SB28.3
SB28.3
SB28.3
SB28.3
SB28.3
SB28.3
FP28.4
FP28.4
FP28.4
FP28.4
FP28.4
FP28.4
FP28.4
FP28.4
FP28.4
Die
Quality Flow
Engineering Samples
Mil.
MMCP-67206FV-15-E(1)
MMCP-67206FV-15
MMCP-67206FV-30
SMCP-67206FV-15SB
SMCP-67206FV-30SB
5962-9317704QTC
5962-9317702QTC
5962-9317704VTC
5962-9317702VTC
MMDP-67206FV-15-E
MMDP-67206FV-15
MMDP-67206FV-30
SMDP-67206FV-15SB
SMDP-67206FV-30SB
5962-9317704QNC
5962-9317702QNC
5962-9317704VNC
5962-9317702VNC
MM0-67206FV-15-E
5962-9317704Q9A
5962-9317704V9A
25°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
25°C
Mil.
SCC B
SCC B
QML Q
QML Q
QML V
QML V
Engineering Samples
Mil.
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
-55 to +125°C
25°C
Mil.
SCC B
SCC B
QML Q
QML Q
QML V
QML V
Engineering Samples
QML Q
-55 to +125°C
-55 to +125°C
Die
Die
QML V
Note:
1. Contact Atmel for availability.
17
4143F–AERO–06/02
Package Drawings
28-lead Side Braze (300 Mils)
18
M67206F
4143F–AERO–06/02
Package Drawings
28-lead Flat Pack (400 Mils)
19
M67206F
4143F–AERO–06/02
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© Atmel Corporation 2002.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty
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Printed on recycled paper.
4143F–AERO–06/02
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