93C86-E/P [MICROCHIP]

8K/16K 5.0V Microwire Serial EEPROM; 8K / 16K 5.0V Microwire串行EEPROM
93C86-E/P
型号: 93C86-E/P
厂家: MICROCHIP    MICROCHIP
描述:

8K/16K 5.0V Microwire Serial EEPROM
8K / 16K 5.0V Microwire串行EEPROM

存储 内存集成电路 光电二极管 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟
文件: 总20页 (文件大小:270K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Not recommended for new designs –  
Please use 93LC76C or 93LC86C.  
93C76/86  
8K/16K 5.0V Microwire Serial EEPROM  
Features:  
Package Types  
• Single 5.0V supply  
PDIP Package  
• Low-power CMOS technology  
- 1 mA active current typical  
• ORG pin selectable memory configuration  
1024 x 8- or 512 x 16-bit organization (93C76)  
2048 x 8- or 1024 x 16-bit organization (93C86)  
8
1
VCC  
PE  
CS  
7
6
5
2
3
4
CLK  
DI  
ORG  
VSS  
• Self-timed erase and write cycles  
(including auto-erase)  
DO  
• Automatic ERAL before WRAL  
• Power on/off data protection circuitry  
• Industry standard 3-wire serial I/O  
• Device status signal during erase/write cycles  
• Sequential read function  
SOIC Package  
8
1
CS  
CLK  
DI  
VCC  
PE  
ORG  
VSS  
7
6
5
2
3
4
• 1,000,000 erase/write cycles ensured  
• Data retention > 200 years  
DO  
• 8-pin PDIP/SOIC package  
Temperature ranges supported  
- Commercial (C):  
- Industrial (I):  
- Automotive (E)  
0°C to +70°C  
-40°C to +85°C  
-40°C to +125°C  
Block Diagram  
VCC VSS  
Description:  
The Microchip Technology Inc. 93C76/86 are 8K and  
16K low voltage serial Electrically Erasable PROMs.  
The device memory is configured as x8 or x16 bits  
depending on the ORG pin setup. Advanced CMOS  
technology makes these devices ideal for low power  
nonvolatile memory applications. These devices also  
have a Program Enable (PE) pin to allow the user to  
write protect the entire contents of the memory array.  
The 93C76/86 is available in standard 8-pin PDIP and  
8-pin surface mount SOIC packages.  
Address  
Decoder  
Memory  
Array  
Address  
Counter  
Data  
Register  
Output  
Buffer  
DO  
DI  
Mode  
Decode  
Logic  
PE  
CS  
Clock  
Generator  
CLK  
2004 Microchip Technology Inc.  
DS21132E-page 1  
93C76/86  
1.0  
ELECTRICAL CHARACTERISTICS  
(†)  
Absolute Maximum Ratings  
VCC.............................................................................................................................................................................7.0V  
All inputs and outputs w.r.t. VSS ........................................................................................................-0.6V to Vcc + 1.0V  
Storage temperature ...............................................................................................................................-65°C to +150°C  
Ambient temperature with power applied................................................................................................-40°C to +125°C  
Soldering temperature of leads (10 seconds) .......................................................................................................+300°C  
ESD protection on all pins..........................................................................................................................................4 kV  
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the  
device. This is a stress rating only and functional operation of the device at these or any other conditions above those  
indicated in the operational listings of this specification is not implied. Exposure to Absolute Maximum Rating  
conditions for extended periods may affect device reliability.  
1.1  
AC Test Conditions  
AC Waveform:  
VLO = 2.0V  
VHI = Vcc - 0.2V  
VHI = 4.0V for  
(Note 1)  
(Note 2)  
Timing Measurement Reference Level  
Input  
0.5 VCC  
0.5 VCC  
Output  
Note 1: For VCC 4.0V  
2: For VCC > 4.0V  
DS21132E-page 2  
2004 Microchip Technology Inc.  
93C76/86  
TABLE 1-1:  
DC CHARACTERISTICS  
Applicable over recommended operating ranges shown below unless otherwise noted:  
VCC = +4.5V to +5.5V  
DC CHARACTERISTICS Commercial (C): TA = 0°C to -40°C  
Industrial  
(I): TA = -40°C to +85°C  
Automotive  
(E): TA = -40°C to +125°C  
Parameter  
Symbol  
Min.  
Max.  
Units  
Conditions  
High-level input voltage  
Low-level input voltage  
Low-level output voltage  
VIH1  
VIL1  
VOL1  
VOL2  
VOH1  
VOH2  
ILI  
2.0  
-0.3  
VCC +1  
0.8  
0.4  
0.2  
V
V
V
IOL = 2.1 mA; VCC = 4.5V  
IOL =100 µA; VCC = 4.5V  
IOH = -400 µA; VCC = 4.5V  
IOH = -100 µA; VCC = 4.5V.  
VIN = 0.1V to VCC  
V
High-level output voltage  
2.4  
V
VCC-0.2  
-10  
V
Input leakage current  
Output leakage current  
10  
µA  
µA  
pF  
ILO  
-10  
10  
VOUT = 0.1V to VCC  
Pin capacitance  
CINT  
7
(Note 1)  
(all inputs/outputs)  
TA = +25°C, FCLK = 1 MHz  
Operating current  
Standby current  
ICC write  
ICC read  
ICCS  
3
mA  
mA  
µA  
FCLK = 2 MHz; VCC = 5.5V  
FCLK = 2 MHz; VCC = 5.5V  
1.5  
100  
CLK = CS = 0V; VCC = 5.5V  
DI = PE = VSS  
ORG = VSS or VCC  
Note 1: This parameter is periodically sampled and not 100% tested.  
TABLE 1-2: AC CHARACTERISTICS  
Applicable over recommended operating ranges shown below unless otherwise noted:  
VCC = +4.5V to +5.5V  
AC CHARACTERISTICS Commercial (C): TA = 0°C to -40°C  
Industrial  
(I): TA = -40°C to +85°C  
Automotive  
(E): TA = -40°C to +125°C  
Parameter  
Clock frequency  
Symbol  
Min.  
Max.  
Units  
Conditions  
FCLK  
TCKH  
TCKL  
TCSS  
TCSH  
TCSL  
TDIS  
TDIH  
TPD  
300  
200  
50  
2
MHz  
ns  
Vcc 4.5V  
Clock high time  
Clock low time  
ns  
Chip select setup time  
Chip select hold time  
Chip select low time  
Data input setup time  
Data input hold time  
Data output delay time  
Data output disable time  
Status valid time  
ns  
Relative to CLK  
0
ns  
250  
100  
100  
ns  
Relative to CLK  
Relative to CLK  
Relative to CLK  
CL = 100 pF  
ns  
ns  
400  
100  
500  
10  
15  
30  
ns  
TCZ  
ns  
(Note 1)  
TSV  
ns  
CL = 100 pF  
Program cycle time  
TWC  
TEC  
ms  
ms  
ms  
Erase/Write mode (Note 2)  
ERAL mode  
TWL  
WRAL mode  
Endurance  
1M  
cycles 25°C, VCC = 5.0V, Block mode  
(Note 3)  
Note 1: This parameter is periodically sampled and not 100% tested.  
2: Typical program cycle is 4 ms per word.  
3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific  
application, please consult the Total EnduranceModel which can be obtained from Microchip’s web site  
at www.microchip.com.  
2004 Microchip Technology Inc.  
DS21132E-page 3  
93C76/86  
TABLE 1-3:  
INSTRUCTION SET FOR 93C76: ORG=1 (X16 ORGANIZATION)  
Instruction SB Opcode  
Address  
Data In  
Data Out  
Req. CLK Cycles  
READ  
EWEN  
ERASE  
ERAL  
WRITE  
WRAL  
EWDS  
1
1
1
1
1
1
1
10  
00  
11  
00  
01  
00  
00  
X A8 A7 A6 A5 A4 A3 A2 A1 A0  
1 1 X X X X X X X X  
X A8 A7 A6 A5 A4 A3 A2 A1 A0  
1 0 X X X X X X X X  
X A8 A7 A6 A5 A4 A3 A2 A1 A0  
0 1 X X X X X X X X  
0 0 X X X X X X X X  
D15 - D0  
High-Z  
29  
13  
13  
13  
29  
29  
13  
(RDY/BSY)  
(RDY/BSY)  
D15 - D0 (RDY/BSY)  
D15 - D0 (RDY/BSY)  
High-Z  
TABLE 1-4:  
INSTRUCTION SET FOR 93C76: ORG=0 (X8 ORGANIZATION)  
Req. CLK  
Cycles  
Instruction SB Opcode  
Address  
Data In  
Data Out  
READ  
EWEN  
ERASE  
ERAL  
WRITE  
WRAL  
EWDS  
1
1
1
1
1
1
1
10  
00  
11  
00  
01  
00  
00  
X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
1 1 X X X X X X X X X  
X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
1 0 X X X X X X X X X  
X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
0 1 X X X X X X X X X  
0 0 X X X X X X X X X  
D7 - D0  
High-Z  
22  
14  
14  
14  
22  
22  
14  
(RDY/BSY)  
(RDY/BSY)  
D7 - D0 (RDY/BSY)  
D7 - D0 (RDY/BSY)  
High-Z  
TABLE 1-5:  
INSTRUCTION SET FOR 93C86: ORG=1 (X16 ORGANIZATION)  
Instruction SB Opcode  
Address  
Data In  
Data Out  
Req. CLK Cycles  
READ  
EWEN  
ERASE  
ERAL  
WRITE  
WRAL  
EWDS  
1
1
1
1
1
1
1
10  
00  
11  
00  
01  
00  
00  
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
1 1 X X X X X X X X  
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
1 0 X X X X X X X X  
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
0 1 X X X X X X X X  
0 0 X X X X X X X X  
D15 - D0  
High-Z  
29  
13  
13  
13  
29  
29  
13  
(RDY/BSY)  
(RDY/BSY)  
D15 - D0 (RDY/BSY)  
D15 - D0 (RDY/BSY)  
High-Z  
TABLE 1-6:  
INSTRUCTION SET FOR 93C86: ORG=0 (X8 ORGANIZATION)  
Instruction SB Opcode  
Address  
Data In  
Data Out Req. CLK Cycles  
READ  
EWEN  
ERASE  
ERAL  
WRITE  
WRAL  
EWDS  
1
1
1
1
1
1
1
10  
00  
11  
00  
01  
00  
00  
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
1 1 X X X X X X X X X  
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
1 0 X X X X X X X X X  
D7 - D0  
High-Z  
22  
14  
14  
14  
22  
22  
14  
(RDY/BSY)  
(RDY/BSY)  
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 - D0 (RDY/BSY)  
0 1 X X X X X X X X X  
0 0 X X X X X X X X X  
D7 - D0 (RDY/BSY)  
High-Z  
DS21132E-page 4  
2004 Microchip Technology Inc.  
93C76/86  
2.3  
Erase/Write Enable and Disable  
(EWEN, EWDS)  
2.0  
PRINCIPLES OF OPERATION  
When the ORG pin is connected to VCC, the x16 orga-  
nization is selected. When it is connected to ground,  
the x8 organization is selected. Instructions, addresses  
and write data are clocked into the DI pin on the rising  
edge of the clock (CLK). The DO pin is normally held in  
a high-Z state except when reading data from the  
device, or when checking the Ready/Busy status  
during a programming operation. The Ready/Busy  
status can be verified during an erase/write operation  
by polling the DO pin; DO low indicates that program-  
ming is still in progress, while DO high indicates the  
device is ready. The DO will enter the high-impedance  
state on the falling edge of the CS.  
The 93C76/86 powers up in the Erase/Write Disable  
(EWDS) state. All programming modes must be  
preceded by an Erase/Write Enable (EWEN) instruction.  
Once the EWEN instruction is executed, programming  
remains enabled until an EWDS instruction is executed  
or VCC is removed from the device. To protect against  
accidental data disturb, the EWDS instruction can be  
used to disable all erase/write functions and should  
follow all programming operations. Execution of a READ  
instruction is independent of both the EWEN and EWDS  
instructions.  
2.4  
Data Protection  
2.1  
Start Condition  
During power-up, all programming modes of operation  
are inhibited until VCC has reached a level greater than  
1.4V. During power-down, the source data protection  
circuitry acts to inhibit all programming modes when  
VCC has fallen below 1.4V.  
The Start bit is detected by the device if CS and DI are  
both high with respect to the positive edge of CLK for  
the first time.  
Before a Start condition is detected, CS, CLK and DI  
may change in any combination (except to that of a  
Start condition), without resulting in any device opera-  
tion (Read, Write, Erase, EWEN, EWDS, ERAL and  
WRAL). As soon as CS is high, the device is no longer  
in the Standby mode.  
The EWEN and EWDS commands give additional  
protection against accidentally programming during  
normal operation.  
After power-up, the device is automatically in the  
EWDS mode. Therefore, an EWEN instruction must be  
performed before any ERASE or WRITE instruction can  
be executed.  
An instruction following a Start condition will only be  
executed if the required amount of opcode, address  
and data bits for any particular instruction are clocked  
in.  
After execution of an instruction (i.e., clock in or out of  
the last required address or data bit) CLK and DI  
become “don't care” bits until a new Start condition is  
detected.  
2.2  
DI/DO  
It is possible to connect the Data In and Data Out pins  
together. However, with this configuration it is possible  
for a “bus conflict” to occur during the “dummy zero”  
that precedes the read operation, if A0 is a logic high  
level. Under such a condition the voltage level seen at  
Data Out is undefined and will depend upon the relative  
impedances of Data Out and the signal source driving  
A0. The higher the current sourcing capability of A0,  
the higher the voltage at the Data Out pin.  
2004 Microchip Technology Inc.  
DS21132E-page 5  
93C76/86  
3.4  
Erase All (ERAL)  
3.0  
3.1  
DEVICE OPERATION  
The ERAL instruction will erase the entire memory array  
to the logical “1” state. The ERAL cycle is identical to  
the erase cycle except for the different opcode. The  
ERAL cycle is completely self-timed and commences  
on the rising edge of the last address bit (A0). Note that  
the Least Significant 8 or 9 address bits are "don’t care"  
bits, depending on selection of x16 or x8 mode. Clock-  
ing of the CLK pin is not necessary after the device has  
entered the self clocking mode. The ERAL instruction is  
ensured at Vcc = +4.5V to +5.5V.  
Read  
The READ instruction outputs the serial data of the  
addressed memory location on the DO pin. A dummy  
zero bit precedes the 16-bit (x16 organization) or 8-bit  
(x8 organization) output string. The output data bits will  
toggle on the rising edge of the CLK and are stable  
after the specified time delay (TPD). Sequential read is  
possible when CS is held high and clock transitions  
continue. The memory address pointer will automati-  
cally increment and output data sequentially.  
The DO pin indicates the Ready/Busy status of the  
device if the CS is high. The Ready/Busy status will be  
displayed on the DO pin until the next Start bit is  
received as long as CS is high. Bringing the CS low will  
place the device in Standby mode and cause the DO  
pin to enter the high-impedance state. DO at logical “0”  
indicates that programming is still in progress. DO at  
logical “1” indicates that the entire device has been  
erased and is ready for another instruction.  
3.2  
Erase  
The ERASE instruction forces all data bits of the  
specified address to the logical “1” state. The self-timed  
programming cycle is initiated on the rising edge of  
CLK as the last address bit (A0) is clocked in. At this  
point, the CLK, CS and DI inputs become “don’t cares”.  
The DO pin indicates the Ready/Busy status of the  
device if the CS is high. The Ready/Busy status will be  
displayed on the DO pin until the next Start bit is  
received as long as CS is high. Bringing the CS low will  
place the device in Standby mode and cause the DO  
pin to enter the high-impedance state. DO at logical “0”  
indicates that programming is still in progress. DO at  
logical “1” indicates that the register at the specified  
address has been erased and the device is ready for  
another instruction.  
The ERAL cycle takes 15 ms maximum (8 ms typical).  
3.5  
Write All (WRAL)  
The WRAL instruction will write the entire memory array  
with the data specified in the command. The WRAL  
cycle is completely self-timed and commences on the  
rising edge of the last address bit (A0). Note that the  
Least Significant 8 or 9 address bits are “don’t cares”,  
depending on selection of x16 or x8 mode. Clocking of  
the CLK pin is not necessary after the device has  
entered the self clocking mode. The WRAL command  
does include an automatic ERAL cycle for the device.  
Therefore, the WRAL instruction does not require an  
ERAL instruction but the chip must be in the EWEN  
status. The WRAL instruction is ensured at Vcc = +4.5V  
to +5.5V.  
The erase cycle takes 3 ms per word (typical).  
3.3  
Write  
The WRITE instruction is followed by 16 bits (or by 8  
bits) of data to be written into the specified address.  
The self-timed programming cycle is initiated on the  
rising edge of CLK as the last data bit (D0) is clocked  
in. At this point, the CLK, CS and DI inputs become  
“don’t cares”.  
The DO pin indicates the Ready/Busy status of the  
device if the CS is high. The Ready/Busy status will be  
displayed on the DO pin until the next Start bit is  
received as long as CS is high. Bringing the CS low will  
place the device in Standby mode and cause the DO  
pin to enter the high-impedance state. DO at logical “0”  
indicates that programming is still in progress. DO at  
logical “1” indicates that the entire device has been  
written and is ready for another instruction.  
The DO pin indicates the Ready/Busy status of the  
device if the CS is high. The Ready/Busy status will be  
displayed on the DO pin until the next Start bit is  
received as long as CS is high. Bringing the CS low will  
place the device in Standby mode and cause the DO  
pin to enter the high-impedance state. DO at logical “0”  
indicates that programming is still in progress. DO at  
logical “1” indicates that the register at the specified  
address has been written and the device is ready for  
another instruction.  
The WRAL cycle takes 30 ms maximum (16 ms  
typical).  
The write cycle takes 3 ms per word (typical).  
DS21132E-page 6  
2004 Microchip Technology Inc.  
93C76/86  
FIGURE 3-1:  
SYNCHRONOUS DATA TIMING  
VIH  
CS  
CLK  
DI  
TCSS  
TCKH  
TCKL  
VIL  
VIH  
TCSH  
TDIH  
VIL  
TDIS  
VIH  
VIL  
TCZ  
TPD  
TPD  
VOH  
DO  
(Read)  
VOL  
VOH  
VOL  
TCZ  
TSV  
DO  
(Program)  
Status Valid  
The memory automatically cycles to the next register.  
FIGURE 3-2:  
READ  
TCSL  
CS  
CLK  
DI  
...  
1
1
0
AN  
A0  
High-impedance  
...  
...  
0
DO  
DN  
D0  
DN  
D0  
FIGURE 3-3:  
EWEN  
EWEN  
TCSL  
CS  
CLK  
DI  
...  
1
0
0
1
1
x
x
ORG = VCC, 8 X’S  
ORG = VSS, 9 X’S  
2004 Microchip Technology Inc.  
DS21132E-page 7  
93C76/86  
FIGURE 3-4:  
EWDS  
TCSL  
CS  
CLK  
DI  
...  
1
0
0
0
0
x
x
ORG = VCC, 8 X’s  
ORG = VSS, 9 X’S  
FIGURE 3-5:  
WRITE  
CS  
Standby  
CLK  
DI  
...  
...  
1
0
1
AN  
A0  
DN  
D0  
TCZ  
High-impedance  
Busy  
Ready  
DO  
TWC  
FIGURE 3-6:  
WRAL  
Standby  
CS  
CLK  
DI  
...  
...  
1
0
0
0
1
x
x
DN  
D0  
TCZ  
High-impedance  
Busy  
Ready  
DO  
TWL  
ORG = VCC, 8 X’s  
ORG = VSS, 9 X’s  
Ensure at Vcc = +4.5V to +5.5V.  
DS21132E-page 8  
2004 Microchip Technology Inc.  
93C76/86  
FIGURE 3-7:  
ERASE  
CS  
Standby  
CLK  
DI  
...  
...  
1
1
1
AN  
A0  
TCZ  
High-impedance  
DO  
Busy  
Ready  
TWC  
FIGURE 3-8:  
ERAL  
Standby  
CS  
CLK  
DI  
...  
1
0
0
1
0
x
x
TCZ  
High-impedance  
Busy  
Ready  
DO  
TEC  
ORG = VCC, 8 X’s  
ORG = VSS, 9 X’s  
Ensure at VCC = +4.5V to +5.5V.  
2004 Microchip Technology Inc.  
DS21132E-page 9  
93C76/86  
After detection of a Start condition the specified number  
of clock cycles (respectively low-to-high transitions of  
CLK) must be provided. These clock cycles are  
required to clock in all opcode, address, and data bits  
before an instruction is executed (see Table 1-3  
through Table 1-6 for more details). CLK and DI then  
become don't care inputs waiting for a new Start  
condition to be detected.  
4.0  
PIN DESCRIPTIONS  
TABLE 4-1:  
Name  
PIN FUNCTION TABLE  
Function  
CS  
CLK  
DI  
Chip Select  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
Ground  
DO  
Note:  
CS must go low between consecutive  
instructions, except when performing a  
sequential read (Refer to Section 3.1  
“Read” for more detail on sequential  
reads).  
VSS  
ORG  
PE  
Memory Configuration  
Program Enable  
Power Supply  
VCC  
4.3  
Data In (DI)  
4.1  
Chip Select (CS)  
Data In is used to clock in a Start bit, opcode, address  
and data synchronously with the CLK input.  
A high level selects the device. A low level deselects  
the device and forces it into Standby mode. However, a  
programming cycle which is already initiated will be  
completed, regardless of the CS input signal. If CS is  
brought low during a program cycle, the device will go  
into Standby mode as soon as the programming cycle  
is completed.  
4.4  
Data Out (DO)  
Data Out is used in the Read mode to output data  
synchronously with the CLK input (TPD after the  
positive edge of CLK).  
This pin also provides Ready/Busy status information  
during erase and write cycles. Ready/Busy status  
information is available when CS is high. It will be  
displayed until the next Start bit occurs as long as CS  
stays high.  
CS must be low for 250 ns minimum (TCSL) between  
consecutive instructions. If CS is low, the internal  
control logic is held in a RESET status.  
4.2  
Serial Clock (CLK)  
The Serial Clock is used to synchronize the communi-  
cation between a master device and the 93C76/86.  
Opcode, address and data bits are clocked in on the  
positive edge of CLK. Data bits are also clocked out on  
the positive edge of CLK.  
4.5  
Organization (ORG)  
When ORG is connected to VCC, the x16 memory  
organization is selected. When ORG is tied to VSS, the  
x8 memory organization is selected. There is an  
internal pull-up resistor on the ORG pin that will select  
x16 organization when left unconnected.  
CLK can be stopped anywhere in the transmission  
sequence (at high or low level) and can be continued  
anytime with respect to clock high time (TCKH) and  
clock low time (TCKL). This gives the controlling master  
freedom in preparing opcode, address and data.  
4.6  
Program Enable (PE)  
This pin allows the user to enable or disable the ability  
to write data to the memory array. If the PE pin is  
floated or tied to VCC, the device can be programmed.  
If the PE pin is tied to VSS, programming will be  
inhibited. There is an internal pull-up on this device that  
enables programming if this pin is left floating.  
CLK is a “don't care” if CS is low (device deselected). If  
CS is high, but Start condition has not been detected,  
any number of clock cycles can be received by the  
device without changing its status (i.e., waiting for Start  
condition).  
CLK cycles are not required during the self-timed write  
(i.e., auto erase/write) cycle.  
DS21132E-page 10  
2004 Microchip Technology Inc.  
93C76/86  
5.0  
5.1  
PACKAGING INFORMATION  
Package Marking Information  
8-Lead PDIP  
Example  
XXXXXXXX  
XXXXXNNN  
YYWW  
93C76  
017  
0410  
Example  
93C86  
8-Lead SOIC (.150”)  
XXXXXXXX  
XXXXYYWW  
/SN0410  
017  
NNN  
2004 Microchip Technology Inc.  
DS21132E-page 11  
93C76/86  
8-Lead Plastic Dual In-line (P) – 300 mil Body (PDIP)  
E1  
D
2
n
1
α
E
A2  
A
L
c
A1  
β
B1  
B
p
eB  
Units  
INCHES*  
NOM  
8
MILLIMETERS  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
.100  
2.54  
Top to Seating Plane  
A
.140  
.155  
.130  
.170  
3.56  
2.92  
3.94  
3.30  
4.32  
Molded Package Thickness  
Base to Seating Plane  
Shoulder to Shoulder Width  
Molded Package Width  
Overall Length  
A2  
A1  
E
.115  
.015  
.300  
.240  
.360  
.125  
.008  
.045  
.014  
.310  
5
.145  
3.68  
0.38  
7.62  
6.10  
9.14  
3.18  
0.20  
1.14  
0.36  
7.87  
5
.313  
.250  
.373  
.130  
.012  
.058  
.018  
.370  
10  
.325  
.260  
.385  
.135  
.015  
.070  
.022  
.430  
15  
7.94  
6.35  
9.46  
3.30  
0.29  
1.46  
0.46  
9.40  
10  
8.26  
6.60  
9.78  
3.43  
0.38  
1.78  
0.56  
10.92  
15  
E1  
D
Tip to Seating Plane  
Lead Thickness  
L
c
Upper Lead Width  
B1  
B
Lower Lead Width  
Overall Row Spacing  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
§
eB  
α
β
5
10  
15  
5
10  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-001  
Drawing No. C04-018  
DS21132E-page 12  
2004 Microchip Technology Inc.  
93C76/86  
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil Body (SOIC)  
E
E1  
p
D
2
B
n
1
h
α
45°  
c
A2  
A
φ
β
L
A1  
Units  
INCHES*  
MILLIMETERS  
Dimension Limits  
MIN  
NOM  
8
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
.050  
1.27  
Overall Height  
A
.053  
.061  
.056  
.007  
.237  
.154  
.193  
.015  
.025  
4
.069  
1.35  
1.55  
1.42  
0.18  
6.02  
3.91  
4.90  
0.38  
0.62  
4
1.75  
Molded Package Thickness  
Standoff  
A2  
A1  
E
.052  
.004  
.228  
.146  
.189  
.010  
.019  
0
.061  
.010  
.244  
.157  
.197  
.020  
.030  
8
1.32  
0.10  
5.79  
3.71  
4.80  
0.25  
0.48  
0
1.55  
0.25  
6.20  
3.99  
5.00  
0.51  
0.76  
8
§
Overall Width  
Molded Package Width  
Overall Length  
E1  
D
Chamfer Distance  
Foot Length  
h
L
φ
Foot Angle  
c
Lead Thickness  
Lead Width  
.008  
.013  
0
.009  
.017  
12  
.010  
.020  
15  
0.20  
0.33  
0
0.23  
0.42  
12  
0.25  
0.51  
15  
B
α
Mold Draft Angle Top  
Mold Draft Angle Bottom  
β
0
12  
15  
0
12  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-012  
Drawing No. C04-057  
2004 Microchip Technology Inc.  
DS21132E-page 13  
93C76/86  
APPENDIX A: REVISION HISTORY  
Revision E  
Added note to page 1 header (Not recommended for  
new designs).  
Added Section 5.0: Package Marking Information.  
Added On-line Support page.  
Updated document format.  
DS21132E-page 14  
2004 Microchip Technology Inc.  
93C76/86  
ON-LINE SUPPORT  
SYSTEMS INFORMATION AND  
UPGRADE HOT LINE  
Microchip provides on-line support on the Microchip  
World Wide Web site.  
The Systems Information and Upgrade Line provides  
system users a listing of the latest versions of all of  
Microchip's development systems software products.  
Plus, this line provides information on how customers  
can receive the most current upgrade kits. The Hot Line  
Numbers are:  
The web site is used by Microchip as a means to make  
files and information easily available to customers. To  
view the site, the user must have access to the Internet  
and a web browser, such as Netscape® or Microsoft®  
Internet Explorer. Files are also available for FTP  
download from our FTP site.  
1-800-755-2345 for U.S. and most of Canada, and  
1-480-792-7302 for the rest of the world.  
Connecting to the Microchip Internet  
Web Site  
042003  
The Microchip web site is available at the following  
URL:  
www.microchip.com  
The file transfer site is available by using an FTP  
service to connect to:  
ftp://ftp.microchip.com  
The web site and file transfer site provide a variety of  
services. Users may download files for the latest  
Development Tools, Data Sheets, Application Notes,  
User's Guides, Articles and Sample Programs. A vari-  
ety of Microchip specific business information is also  
available, including listings of Microchip sales offices,  
distributors and factory representatives. Other data  
available for consideration is:  
• Latest Microchip Press Releases  
Technical Support Section with Frequently Asked  
Questions  
• Design Tips  
• Device Errata  
• Job Postings  
• Microchip Consultant Program Member Listing  
• Links to other useful web sites related to  
Microchip Products  
• Conferences for products, Development Systems,  
technical information and more  
• Listing of seminars and events  
2004 Microchip Technology Inc.  
DS21132E-page 15  
93C76/86  
READER RESPONSE  
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-  
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation  
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.  
Please list the following information, and use this outline to provide us with your comments about this document.  
To:  
Technical Publications Manager  
Reader Response  
Total Pages Sent ________  
RE:  
From:  
Name  
Company  
Address  
City / State / ZIP / Country  
Telephone: (_______) _________ - _________  
FAX: (______) _________ - _________  
Application (optional):  
Would you like a reply?  
Y
N
93C76/86  
DS21132E  
Literature Number:  
Device:  
Questions:  
1. What are the best features of this document?  
2. How does this document meet your hardware and software development needs?  
3. Do you find the organization of this document easy to follow? If not, why?  
4. What additions to the document do you think would enhance the structure and subject?  
5. What deletions from the document could be made without affecting the overall usefulness?  
6. Is there any incorrect or misleading information (what and where)?  
7. How would you improve this document?  
DS21132E-page 16  
2004 Microchip Technology Inc.  
93C76/86  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
PART NO.  
Device  
X
/XX  
XXX  
Temperature  
Range  
Package  
Pattern  
Device  
93C76/86: Microwire Serial EEPROM  
93C76T/86T: Microwire Serial EEPROM (Tape and Reel)  
Temperature Range Blank  
=
=
=
0°C to +70°C  
-40°C to +85°C  
-40°C to +125°C  
I
E
Package  
P
SN  
=
=
Plastic DIP (300 mil Body), 8-lead  
Plastic SOIC (150 mil Body), 8-lead  
Sales and Support  
Data Sheets  
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and  
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:  
1. Your local Microchip sales office  
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277  
3. The Microchip Worldwide Site (www.microchip.com)  
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.  
New Customer Notification System  
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  
2004 Microchip Technology Inc.  
DS21132E-page 17  
93C76/86  
NOTES:  
DS21132E-page 18  
2004 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is intended through suggestion only  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
No representation or warranty is given and no liability is  
assumed by Microchip Technology Incorporated with respect  
to the accuracy or use of such information, or infringement of  
patents or other intellectual property rights arising from such  
use or otherwise. Use of Microchip’s products as critical  
components in life support systems is not authorized except  
with express written approval by Microchip. No licenses are  
conveyed, implicitly or otherwise, under any intellectual  
property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, Accuron,  
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,  
PRO MATE, PowerSmart, rfPIC, and SmartShunt are  
registered trademarks of Microchip Technology Incorporated  
in the U.S.A. and other countries.  
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,  
SmartSensor and The Embedded Control Solutions Company  
are registered trademarks of Microchip Technology  
Incorporated in the U.S.A.  
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,  
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,  
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial  
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,  
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,  
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,  
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,  
SmartTel and Total Endurance are trademarks of Microchip  
Technology Incorporated in the U.S.A. and other countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2004, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received ISO/TS-16949:2002 quality system certification for  
its worldwide headquarters, design and wafer fabrication facilities in  
Chandler and Tempe, Arizona and Mountain View, California in  
October 2003. The Company’s quality system processes and  
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
2004 Microchip Technology Inc.  
DS21132E-page 19  
WORLDWIDE SALES AND SERVICE  
China - Beijing  
Korea  
AMERICAS  
Corporate Office  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7200  
Fax: 480-792-7277  
Technical Support: 480-792-7627  
Web Address: www.microchip.com  
Unit 706B  
168-1, Youngbo Bldg. 3 Floor  
Samsung-Dong, Kangnam-Ku  
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Wan Tai Bei Hai Bldg.  
No. 6 Chaoyangmen Bei Str.  
Beijing, 100027, China  
Tel: 86-10-85282100  
Fax: 86-10-85282104  
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or  
82-2-558-5934  
Singapore  
200 Middle Road  
#07-02 Prime Centre  
Singapore, 188980  
Tel: 65-6334-8870 Fax: 65-6334-8850  
China - Chengdu  
Rm. 2401-2402, 24th Floor,  
Ming Xing Financial Tower  
No. 88 TIDU Street  
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Tel: 86-28-86766200  
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Italy  
India  
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Milan, Italy  
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Tel: 91-80-22290061 Fax: 91-80-22290062  
Japan  
Fax: 650-961-0286  
Toronto  
Tel: 39-0331-742611  
Fax: 39-0331-466781  
Netherlands  
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ASIA/PACIFIC  
Australia  
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Tel: 44-118-921-5869  
Fax: 44-118-921-5820  
05/28/04  
DS21132E-page 20  
2004 Microchip Technology Inc.  

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