93LC56BT-I/SNROC_技术文档

93AA56A/B/C, 93LC56A/B/C,

93C56A/B/C

2K Microwire Compatible Serial EEPROM

Device Selection Table

Part Number

VCC Range

ORG Pin

Word Size

Temp Ranges

Packages

93AA56A

93AA56B

93LC56A

93LC56B

93C56A

1.8-5.5

1.8-5-5

2.5-5.5

4.5-5.5

1.8-5.5

2.5-5.5

4.5-5.5

No

8-bit

16-bit

I

P, SN, ST, MS, OT, MC, MN

P, SN, ST, MS, MC, MN

I

No

8-bit

I, E

I

No

16-bit

No

8-bit

93C56B

No

16-bit

93AA56C

93LC56C

93C56C

Yes

8- or 16-bit

I, E

P, SN, ST, MS, MC, MN

Features:

Pin Function Table

Name

Function

• Low-Power CMOS Technology

• ORG Pin to Select Word Size for ‘56C’ Version

• 256 x 8-bit Organization ‘A’ Version (no ORG)

• 128 x 16-bit Organization ‘B’ Version (no ORG)

CS

Chip Select

CLK

DI

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

• Self-Timed Erase/Write Cycles (including

Auto-Erase)

DO

VSS

NC

• Automatic Erase All (ERAL) before Write All

(WRAL)

No internal connection

Memory Configuration

Power Supply

ORG

VCC

• Power-On/Off Data Protection Circuitry

• Industry Standard 3-Wire Serial I/O

• Device Status Signal (Ready/Busy)

• Sequential Read Function

Description:

• 1,000,000 Erase/write Cycles

• Data Retention > 200 Years

The Microchip Technology Inc. 93XX56A/B/C devices

are 2Kbit low-voltage serial Electrically Erasable

PROMs (EEPROM). Word-selectable devices such as

the 93AA56C, 93LC56C or 93C56C are dependent

upon external logic levels driving the ORG pin to set

word size. For dedicated 8-bit communication, the

93XX56A devices are available, while the 93XX56B

devices provide dedicated 16-bit communication.

Advanced CMOS technology makes these devices

ideal for low-power, nonvolatile memory applications.

The entire 93XX Series is available in standard

packages including 8-lead PDIP and SOIC, and

advanced packaging including 8-lead MSOP, 6-lead

SOT-23, 8-lead 2x3 DFN/TDFN and 8-lead TSSOP. All

packages are Pb-free (Matte Tin) finish.

• Pb-free and RoHS Compliant

• Temperature Ranges Supported:

- Industrial (I)

-40°C to +85°C

- Automotive (E) -40°C to +125°C

 2003-2011 Microchip Technology Inc.

DS21794G-page 1

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Package Types (not to scale)

ROTATED SOIC

PDIP/SOIC

(ex: 93LC46BX)

(P, SN)

NC

1

2

3

4

8

7

6

5

ORG*

CS

CLK

DI

VCC

NC

ORG

1

2

3

4

8

7

6

5

VCC

VSS

CS

DO

DI

*

CLK

DO

VSS

TSSOP/MSOP

(ST, MS)

SOT-23

(OT)

1

2

3

4

8

7

6

5

CS

CLK

DI

1

6

V

CC

NC

DO

V

CC

2

5

ORG*

VSS

CS

DO

VSS

3

4

DI

CLK

DFN/TDFN

(MC, MN)

CS 1

VCC

8

7 NC

2

3

4

CLK

DI

DO

ORG*

6

5

VSS

*ORG pin is NC on A/B devices.

DS21794G-page 2

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

1.0

ELECTRICAL CHARACTERISTICS

(†)

Absolute Maximum Ratings

VCC.............................................................................................................................................................................7.0V

All inputs and outputs w.r.t. VSS ..........................................................................................................-0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins  4 kV

†NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

All parameters apply over the specified

ranges unless otherwise noted.

Industrial (I):

TA = -40°C to +85°C, VCC = +1.8V to +5.5V

Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V

Param.

No.

Symbol

Parameter

Min

Typ

Max

Units

Conditions

VCC 2.7V

D1

VIH1

VIH2

High-level input voltage

2.0

0.7 VCC

—

VCC +1

V

VCC < 2.7V

D2

D3

D4

VIL1

VIL2

Low-level input voltage

Low-level output voltage

High-level output voltage

-0.3

—

0.8

0.2 VCC

V

VCC 2.7V

VCC < 2.7V

Vol1

Vol2

—

0.4

0.2

V

IOL = 2.1 mA, VCC = 4.5V

IOL = 100 A, VCC = 2.5V

VOH1

VOH2

2.4

VCC - 0.2

—

V

IOH = -400 A, VCC = 4.5V

IOH = -100 A, VCC = 2.5V

D5

D6

D7

ILI

Input leakage current

Output leakage current

—

±1

7

A

pF

VIN = VSS or VCC

ILO

VOUT = VSS or VCC

CIN,

COUT

Pin capacitance (all inputs/

outputs)

VIN/VOUT = 0V (Note 1)

TA = 25°C, FCLK = 1 MHz

D8

D9

ICC write Write current

—

500

2

—

mA FCLK = 3 MHz, Vcc = 5.5V

A FCLK = 2 MHz, Vcc = 2.5V

mA FCLK = 3 MHz, VCC = 5.5V

ICC read Read current

—

100

1

500

—

A

FCLK = 2 MHz, VCC = 3.0V

FCLK = 2 MHz, VCC = 2.5V

D10

D11

ICCS

Standby current

—

1

5

A

I – Temp

E – Temp

CLK = CS = 0V

ORG = DI = VSS or VCC

(Note 2) (Note 3)

VPOR

VCC voltage detect

—

1.5

3.8

—

V

93AA56A/B/C, 93LC56A/B/C

(Note 1)

93C56A/B/C

Note 1: This parameter is periodically sampled and not 100% tested.

2: ORG pin not available on ‘A’ or ‘B’ versions.

3: Ready/Busy status must be cleared from DO; see Section 3.4 "Data Out (DO)".

 2003-2011 Microchip Technology Inc.

DS21794G-page 3

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

TABLE 1-2:

AC CHARACTERISTICS

All parameters apply over the specified

ranges unless otherwise noted.

Industrial (I):

TA = -40°C to +85°C, VCC = +1.8V TO +5.5V

Automotive (E): TA = -40°C to +125°C, VCC = +2.5V TO +5.5V

Param.

No.

Symbol

Parameter

Clock frequency

Min

Max

Units

Conditions

A1

FCLK

—

3

2

1

MHz 4.5V VCC < 5.5V, 93XX56C only

MHz 2.5V VCC < 5.5V

MHz 1.8V VCC < 2.5V

A2

A3

A4

TCKH

TCKL

TCSS

Clock high time

200

250

450

—

ns

4.5V VCC < 5.5V, 93XX56C only

2.5V VCC < 5.5V

1.8V VCC < 2.5V

Clock low time

100

200

450

ns

4.5V VCC < 5.5V, 93XX56C only

2.5V VCC < 5.5V

1.8V VCC < 2.5V

Chip Select setup time

50

100

250

ns

4.5V VCC < 5.5V

2.5V VCC < 4.5V

1.8V VCC < 2.5V

A5

A6

A7

TCSH

TCSL

TDIS

Chip Select hold time

Chip Select low time

Data input setup time

0

—

ns

1.8V VCC < 5.5V

250

50

100

250

ns

4.5V VCC < 5.5V, 93XX56C only

2.5V VCC < 5.5V

1.8V VCC < 2.5V

A8

A9

TDIH

TPD

Data input hold time

50

100

250

—

ns

4.5V VCC < 5.5V, 93XX56C only

2.5V VCC < 5.5V

1.8V VCC < 2.5V

Data output delay time

—

200

250

400

ns

4.5V VCC < 5.5V, CL = 100 pF

2.5V VCC < 4.5V, CL = 100 pF

1.8V VCC < 2.5V, CL = 100 pF

A10

A11

TCZ

TSV

Data output disable time

Status valid time

—

100

200

ns

4.5V VCC < 5.5V, (Note 1)

1.8V VCC < 4.5V, (Note 1)

200

300

500

ns

4.5V VCC < 5.5V, CL = 100 pF

2.5V VCC < 4.5V, CL = 100 pF

1.8V VCC < 2.5V, CL = 100 pF

A12

A13

TWC

Program cycle time

—

6

ms

Erase/Write mode (AA and LC

versions)

2

ms

Erase/Write mode

(93C versions)

A14

A15

A16

TEC

TWL

—

6

ms

ERAL mode, 4.5V VCC 5.5V

WRAL mode, 4.5V VCC 5.5V

15

—

Endurance

1M

cycles 25°C, VCC = 5.0V, (Note 2)

Note 1: This parameter is periodically sampled and not 100% tested.

2: This application is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model, which may be obtained from Microchip’s web

site at www.microchip.com.

DS21794G-page 4

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

FIGURE 1-1:

SYNCHRONOUS DATA TIMING

VIH

VIL

VIH

CS

TCSS

TCKH

TCKL

TCSH

CLK

VIL

TDIS

TDIH

VIH

VIL

DI

TCZ

TPD

VOH

DO

(Read)

VOL

VOH

TSV

DO

(Program)

Status Valid

VOL

Note: TSV is relative to CS.

TABLE 1-3: INSTRUCTION SET FOR X16 ORGANIZATION (93XX56B OR 93XX56C WITH ORG = 1)

Instruction

SB Opcode

Address

Data In

Data Out Req. CLK Cycles

ERASE

ERAL

EWDS

EWEN

READ

WRITE

WRAL

1

11

00

10

01

00

X

1

0

1

X

0

A6 A5 A4 A3 A2 A1 A0

—

(RDY/BSY)

High-Z

11

27

0

1

X

High-Z

A6 A5 A4 A3 A2 A1 A0

D15 – D0

A6 A5 A4 A3 A2 A1 A0 D15 – D0 (RDY/BSY)

D15 – D0 (RDY/BSY)

1

X

TABLE 1-4: INSTRUCTION SET FOR X8 ORGANIZATION (93XX56A OR 93XX56C WITH ORG = 0)

Req. CLK

Cycles

Instruction

SB Opcode

Address

Data In

Data Out

ERASE

ERAL

EWDS

EWEN

READ

WRITE

WRAL

1

11

00

10

01

00

X

1

0

1

X

0

A7 A6 A5 A4 A3 A2 A1 A0

—

(RDY/BSY)

High-Z

12

20

0

1

X

High-Z

A7 A6 A5 A4 A3 A2 A1 A0

D7 – D0

A7 A6 A5 A4 A3 A2 A1 A0 D7 – D0

D7 – D0

(RDY/BSY)

1

X

 2003-2011 Microchip Technology Inc.

DS21794G-page 5

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

2.3

Data Protection

2.0

FUNCTIONAL DESCRIPTION

All modes of operation are inhibited when VCC is below

a typical voltage of 1.5V for ‘93AA’ and ‘93LC’ devices

or 3.8V for ‘93C’ devices.

When the ORG pin (93XX56C) pin is connected to

VCC, the (x16) organization is selected. When it is

connected to ground, the (x8) organization is selected.

Instructions, addresses and write data are clocked into

the DI pin on the rising edge of the clock (CLK). The DO

pin is normally held in a High-Z state except when read-

ing data from the device, or when checking the Ready/

Busy status during a programming operation. The

Ready/Busy status can be verified during an Erase/

Write operation by polling the DO pin; DO low indicates

that programming is still in progress, while DO high

indicates the device is ready. DO will enter the High-Z

state on the falling edge of CS.

The EWEN and EWDS commands give additional

protection against accidentally programming during

normal operation.

Note:

For added protection, an EWDS command

should be performed after every write

operation and an external 10 kpull-down

protection resistor should be added to the

CS pin.

After power-up, the device is automatically in the

EWDS mode. Therefore, an EWENinstruction must be

performed before the initial ERASEor WRITEinstruction

can be executed.

2.1

Start Condition

The Start bit is detected by the device if CS and DI are

both high with respect to the positive edge of CLK for

the first time.

Block Diagram

VCC

VSS

Before a Start condition is detected, CS, CLK and DI

may change in any combination (except to that of a

Start condition), without resulting in any device

operation (Read, Write, Erase, EWEN, EWDS, ERAL

or WRAL). As soon as CS is high, the device is no

longer in Standby mode.

Memory

Array

Address

Decoder

Address

Counter

An instruction following a Start condition will only be

executed if the required opcode, address and data bits

for any particular instruction are clocked in.

DO

Output

Buffer

Data Register

Note:

When preparing to transmit an instruction,

either the CLK or DI signal levels must be

at a logic low as CS is toggled active high.

DI

Mode

Decode

Logic

ORG*

CS

2.2

Data In/Data Out (DI/DO)

It is possible to connect the Data In and Data Out pins

together. However, with this configuration it is possible

for a “bus conflict” to occur during the “dummy zero”

that precedes the read operation if A0 is a logic high

level. Under such a condition the voltage level seen at

Data Out is undefined and will depend upon the relative

impedances of Data Out and the signal source driving

A0. The higher the current sourcing capability of A0,

the higher the voltage at the Data Out pin. In order to

limit this current, a resistor should be connected

between DI and DO.

Clock

Register

CLK

*ORG input is not available on A/B devices

DS21794G-page 6

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

2.4

Erase

The ERASEinstruction forces all data bits of the speci-

fied address to the logical ‘1’ state. CS is brought low

following the loading of the last address bit. This falling

edge of the CS pin initiates the self-timed program-

ming cycle, except on ‘93C’ devices where the rising

edge of CLK before the last address bit initiates the

write cycle.

low (TCSL). DO at logical ‘0’ indicates that programming

is still in progress. DO at logical ‘1’ indicates that the

register at the specified address has been erased and

the device is ready for another instruction.

Note:

After the Erase cycle is complete, issuing

a Start bit and then taking CS low will clear

the Ready/Busy status from DO.

FIGURE 2-1:

ERASE TIMING FOR 93AA AND 93LC DEVICES

TCSL

CS

Check Status

CLK

DI

1

AN

AN-1 AN-2 •••

A0

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TWC

FIGURE 2-2:

ERASE TIMING FOR 93C DEVICES

TCSL

CS

Check Status

CLK

DI

1

AN

AN-1 AN-2

A0

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TWC

 2003-2011 Microchip Technology Inc.

DS21794G-page 7

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

The DO pin indicates the Ready/Busy status of the

device, if CS is brought high after a minimum of 250 ns

low (TCSL).

2.5

Erase All (ERAL)

The Erase All (ERAL) instruction will erase the entire

memory array to the logical ‘1’ state. The ERAL cycle

is identical to the erase cycle, except for the different

opcode. The ERAL cycle is completely self-timed and

commences at the falling edge of the CS, except on

‘93C’ devices where the rising edge of CLK before the

last data bit initiates the write cycle. Clocking of the

CLK pin is not necessary after the device has entered

the ERAL cycle.

Note:

After the ERAL command is complete,

issuing a Start bit and then taking CS low

will clear the Ready/Busy status from DO.

VCC must be 4.5V for proper operation of ERAL.

FIGURE 2-3:

ERAL TIMING FOR 93AA AND 93LC DEVICES

TCSL

CS

Check Status

CLK

DI

1

0

1

0

x

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TEC

VCC must be 4.5V for proper operation of ERAL.

FIGURE 2-4:

ERAL TIMING FOR 93C DEVICES

TCSL

CS

Check Status

CLK

DI

1

0

1

0

x

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TEC

DS21794G-page 8

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Once the EWEN instruction is executed, programming

remains enabled until an EWDSinstruction is executed

or Vcc is removed from the device.

2.6

Erase/Write Disable and Enable

(EWDS/EWEN)

The 93XX56A/B/C powers up in the Erase/Write

Disable (EWDS) state. All programming modes must be

preceded by an Erase/Write Enable (EWEN) instruction.

To protect against accidental data disturbance, the

EWDSinstruction can be used to disable all erase/write

functions and should follow all programming opera-

tions. Execution of a READinstruction is independent of

both the EWENand EWDSinstructions.

FIGURE 2-5:

EWDS TIMING

TCSL

CS

CLK

DI

•••

1

0

x

FIGURE 2-6:

EWEN TIMING

TCSL

CS

CLK

•••

1

0

1

x

DI

devices) output string. The output data bits will toggle on

the rising edge of the CLK and are stable after the spec-

ified time delay (TPD). Sequential read is possible when

CS is held high. The memory data will automatically cycle

to the next register and output sequentially.

2.7

Read

The READ instruction outputs the serial data of the

addressed memory location on the DO pin. A dummy

zero bit precedes the 8-bit (if ORG pin is low or A-version

devices) or 16-bit (if ORG pin is high or B-version

FIGURE 2-7:

READ TIMING

CS

CLK

DI

•••

A0

AN

1

0

High-Z

DO

0

Dx

D0

Dx

D0

Dx

D0

•••

 2003-2011 Microchip Technology Inc.

DS21794G-page 9

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

The DO pin indicates the Ready/Busy status of the

2.8

Write

device, if CS is brought high after a minimum of 250 ns

low (TCSL). DO at logical ‘0’ indicates that programming

is still in progress. DO at logical ‘1’ indicates that the

register at the specified address has been written with

the data specified and the device is ready for another

instruction.

The WRITE instruction is followed by 8 bits (if ORG is

low or A-version devices) or 16 bits (if ORG pin is high

or B-version devices) of data which are written into the

specified address. For 93AA56A/B/C and 93LC56A/B/C

devices, after the last data bit is clocked into DI, the

falling edge of CS initiates the self-timed auto-erase and

programming cycle. For 93C56A/B/C devices, the self-

timed auto-erase and programming cycle is initiated by

the rising edge of CLK on the last data bit.

Note:

After the Write cycle is complete, issuing a

Start bit and then taking CS low will clear

the Ready/Busy status from DO.

FIGURE 2-8:

WRITE TIMING FOR 93AA AND 93LC DEVICES

TCSL

CS

CLK

DI

0

1

AN

A0

Dx

D0

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TWC

FIGURE 2-9:

WRITE TIMING FOR 93C DEVICES

TCSL

CS

CLK

DI

0

1

AN

A0

Dx

D0

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TWC

DS21794G-page 10

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

2.9

Write All (WRAL)

The Write All (WRAL) instruction will write the entire

memory array with the data specified in the command.

For 93AA56A/B/C and 93LC56A/B/C devices, after the

last data bit is clocked into DI, the falling edge of CS

initiates the self-timed auto-erase and programming

cycle. For 93C56A/B/C devices, the self-timed auto-

erase and programming cycle is initiated by the rising

edge of CLK on the last data bit. Clocking of the CLK

pin is not necessary after the device has entered the

WRAL cycle. The WRAL command does include an

automatic ERAL cycle for the device. Therefore, the

WRALinstruction does not require an ERALinstruction,

but the chip must be in the EWEN status.

low (TCSL).

Note:

After the Write All cycle is complete,

issuing a Start bit and then taking CS low

will clear the Ready/Busy status from DO.

VCC must be 4.5V for proper operation of WRAL.

FIGURE 2-10:

WRAL TIMING FOR 93AA AND 93LC DEVICES

TCSL

CS

CLK

0

1

x

1

0

•••

Dx

•••

DI

x

D0

TSV

TCZ

High-Z

Busy

Ready

DO

HIGH-Z

TWL

VCC must be 4.5V for proper operation of WRAL.

FIGURE 2-11:

WRAL TIMING FOR 93C DEVICES

TCSL

CS

CLK

0

1

x

1

0

•••

Dx

•••

DI

x

D0

TSV

TCZ

High-Z

Busy Ready

DO

HIGH-Z

TWL

 2003-2011 Microchip Technology Inc.

DS21794G-page 11

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

3.0

PIN DESCRIPTIONS

TABLE 3-1:

Name

PIN DESCRIPTIONS

SOIC TSSOP MSOP DFN⁽¹⁾TDFN⁽¹⁾SOT-23

Rotated

SOIC

PDIP

Function

Chip Select

CS

1

2

3

4

5

6

1

2

3

4

5

6

1

2

3

4

5

6

1

2

3

4

5

6

1

2

3

4

5

6

1

2

3

4

5

6

5

4

3

4

5

6

7

8

CLK

DI

Serial Clock

Data In

3

DO

1

Data Out

Ground

VSS

2

ORG/NC

—

Organization/93XX56C

No Internal Connection/

93XX56A/B

NC

7

8

7

8

7

8

7

8

7

8

7

8

—

6

1

2

No Internal Connection

Power Supply

VCC

Note 1: The exposed pad on the DFN/TDFN packages may be connected to VSS or left floating.

data bits before an instruction is executed. CLK and DI

then become “don’t care” inputs waiting for a new Start

condition to be detected.

3.1

Chip Select (CS)

A high level selects the device; a low level deselects

the device and forces it into Standby mode. However, a

programming cycle that is already in progress will be

completed, regardless of the Chip Select (CS) input

signal. If CS is brought low during a program cycle, the

device will go into Standby mode as soon as the

programming cycle is completed.

3.3

Data In (DI)

Data In (DI) is used to clock in a Start bit, opcode,

address and data synchronously with the CLK input.

3.4

Data Out (DO)

CS must be low for 250 ns minimum (TCSL) between

consecutive instructions. If CS is low, the internal

control logic is held in a Reset status.

Data Out (DO) is used in the Read mode to output data

synchronously with the CLK input (TPD after the

positive edge of CLK).

3.2

Serial Clock (CLK)

This pin also provides Ready/Busy status information

during erase and write cycles. Ready/Busy status infor-

mation is available on the DO pin if CS is brought high

after being low for minimum Chip Select low time (TCSL)

and an erase or write operation has been initiated.

The Serial Clock is used to synchronize the communi-

cation between a master device and the 93XX series

device. Opcodes, address and data bits are clocked in

on the positive edge of CLK. Data bits are also clocked

out on the positive edge of CLK.

The Status signal is not available on DO if CS is held

low during the entire erase or write cycle. In this case,

DO is in the High-Z mode. If status is checked after the

erase/write cycle, the data line will be high to indicate

the device is ready.

CLK can be stopped anywhere in the transmission

sequence (at high or low level) and can be continued

anytime with respect to Clock High Time (TCKH) and

Clock Low Time (TCKL). This gives the controlling

master freedom in preparing opcode, address and

data.

Note:

After a programming cycle is complete,

issuing a Start bit and then taking CS low

will clear the Ready/Busy status from DO.

CLK is a “don’t care” if CS is low (device deselected). If

CS is high, but the Start condition has not been

detected (DI = 0), any number of clock cycles can be

received by the device without changing its status (i.e.,

waiting for a Start condition).

3.5

Organization (ORG)

When the ORG pin is connected to VCC or Logic HI, the

(x16) memory organization is selected. When the ORG

pin is tied to VSS or Logic LO, the (x8) memory

organization is selected. For proper operation, ORG

must be tied to a valid logic level.

CLK cycles are not required during the self-timed write

(i.e., auto erase/write) cycle.

After detection of a Start condition the specified number

of clock cycles (respectively low-to-high transitions of

CLK) must be provided. These clock cycles are

required to clock in all required opcode, address and

93XX56A devices are always (x8) organization and

93XX56B devices are always (x16) organization.

DS21794G-page 12

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

4.0

4.1

PACKAGING INFORMATION

Package Marking Information

8-Lead MSOP (150 mil)

Example:

3L56BI

5281L7

XXXXXXT

YWWNNN

Example:

2EL7

6-Lead SOT-23

XXNN

Example:

93LC56B

8-Lead PDIP

XXXXXXXX

T/XXXNNN

I/P

1L7

e

3

0528

YYWW

Example:

93LC56BI

8-Lead SOIC

XXXXXXXT

SN

0528

XXXXYYWW

e

3

1L7

NNN

Example:

8-Lead TSSOP

L56B

I528

1L7

XXXX

TYWW

NNN

Example:

8-Lead 2x3 DFN

344

528

L7

XXX

YWW

NN

Example:

8-Lead 2x3 TDFN

E44

528

L7

XXX

YWW

NN

 2003-2011 Microchip Technology Inc.

DS21794G-page 13

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

1st Line Marking Codes

Part Number

SOT-23

DFN

TDFN

TSSOP

MSOP

I Temp.

E Temp.

—

I Temp.

331

E Temp.

—

I Temp.

E Temp.

—

93AA56A

93AA56B

93AA56C

93LC56A

93LC56B

93LC56C

93C56A

A56A

A56B

A56C

L56A

L56B

L56C

C56A

C56B

C56C

3A56AT

3A56BT

3A56CT

3L56AT

3L56BT

3L56CT

3C56AT

3C56BT

3C56CT

2BNN

2LNN

—

E31

E41

E51

E34

E44

E54

E37

E47

E57

—

341

—

351

—

2ENN

2PNN

—

2FNN

2RNN

—

334

—

E35

E45

E55

E38

E48

E58

344

—

354

355

—

2HNN

2TNN

—

2JNN

2UNN

—

337

93C56B

347

—

93C56C

357

—

Note:

T = Temperature grade (I, E)

NN = Alphanumeric traceability code

Legend: XX...X Part number or part number code

T

Temperature (I, E)

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn)

YY

WW

NNN

e

3

Note: For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

3

e

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21794G-page 14

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢋꢌꢎꢏꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢇꢄꢌꢕꢄꢖꢃꢆꢗꢍꢐꢘꢆꢙꢍꢐꢒꢇꢚ

ꢛꢏꢊꢃꢜ ꢫꢕꢐꢅꢏꢘꢌꢅꢑꢕꢇꢏꢅꢖꢈꢐꢐꢌꢄꢏꢅꢜꢉꢖꢬꢉꢡꢌꢅꢋꢐꢉꢗꢃꢄꢡꢇꢓꢅꢜꢊꢌꢉꢇꢌꢅꢇꢌꢌꢅꢏꢘꢌꢅꢝꢃꢖꢐꢕꢖꢘꢃꢜꢅꢂꢉꢖꢬꢉꢡꢃꢄꢡꢅꢣꢜꢌꢖꢃꢎꢃꢖꢉꢏꢃꢕꢄꢅꢊꢕꢖꢉꢏꢌꢋꢅꢉꢏꢅ

ꢘꢏꢏꢜꢨꢭꢭꢗꢗꢗꢁꢑꢃꢖꢐꢕꢖꢘꢃꢜꢁꢖꢕꢑꢭꢜꢉꢖꢬꢉꢡꢃꢄꢡ

D

N

E

E1

NOTE 1

2

b

1

e

c

φ

A2

A

L

L1

A1

ꢮꢄꢃꢏꢇꢝꢯꢰꢰꢯꢝꢛꢩꢛꢪꢣ

ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢅꢰꢃꢑꢃꢏꢇ

ꢝꢯꢱ

ꢱꢲꢝ

ꢝꢢꢳ

ꢱꢈꢑꢔꢌꢐꢅꢕꢎꢅꢂꢃꢄꢇꢱ

ꢂꢃꢏꢖꢘ

ꢴ

ꢌ

ꢞꢁꢵꢟꢅꢦꢣꢧ

ꢲꢆꢌꢐꢉꢊꢊꢅꢶꢌꢃꢡꢘꢏ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢣꢏꢉꢄꢋꢕꢎꢎꢅ

ꢲꢆꢌꢐꢉꢊꢊꢅꢺꢃꢋꢏꢘ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢺꢃꢋꢏꢘ

ꢲꢆꢌꢐꢉꢊꢊꢅꢰꢌꢄꢡꢏꢘ

ꢫꢕꢕꢏꢅꢰꢌꢄꢡꢏꢘ

ꢢ

ꢷ

ꢞꢁꢸꢟ

ꢞꢁꢞꢞ

ꢷ

ꢞꢁꢴꢟ

ꢀꢁꢀꢞ

ꢞꢁꢹꢟ

ꢞꢁꢀꢟ

ꢢꢙ

ꢢꢀ

ꢛ

ꢛꢀ

ꢚ

ꢰ

ꢷ

ꢥꢁꢹꢞꢅꢦꢣꢧ

ꢠꢁꢞꢞꢅꢦꢣꢧ

ꢞꢁꢵꢞ

ꢞꢁꢥꢞ

ꢞꢁꢴꢞ

ꢫꢕꢕꢏꢜꢐꢃꢄꢏ

ꢫꢕꢕꢏꢅꢢꢄꢡꢊꢌ

ꢰꢀ

ꢀ

ꢞꢁꢹꢟꢅꢪꢛꢫ

ꢷ

ꢞꢻ

ꢴꢻ

ꢰꢌꢉꢋꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢰꢌꢉꢋꢅꢺꢃꢋꢏꢘ

ꢖ

ꢔ

ꢞꢁꢞꢴ

ꢞꢁꢙꢙ

ꢷ

ꢞꢁꢙꢠ

ꢞꢁꢥꢞ

ꢛꢏꢊꢃꢉꢜ

ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃꢇꢈꢉꢊꢅꢃꢄꢋꢌꢍꢅꢎꢌꢉꢏꢈꢐꢌꢅꢑꢉꢒꢅꢆꢉꢐꢒꢓꢅꢔꢈꢏꢅꢑꢈꢇꢏꢅꢔꢌꢅꢊꢕꢖꢉꢏꢌꢋꢅꢗꢃꢏꢘꢃꢄꢅꢏꢘꢌꢅꢘꢉꢏꢖꢘꢌꢋꢅꢉꢐꢌꢉꢁ

ꢙꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢇꢅꢚꢅꢉꢄꢋꢅꢛꢀꢅꢋꢕꢅꢄꢕꢏꢅꢃꢄꢖꢊꢈꢋꢌꢅꢑꢕꢊꢋꢅꢎꢊꢉꢇꢘꢅꢕꢐꢅꢜꢐꢕꢏꢐꢈꢇꢃꢕꢄꢇꢁꢅꢝꢕꢊꢋꢅꢎꢊꢉꢇꢘꢅꢕꢐꢅꢜꢐꢕꢏꢐꢈꢇꢃꢕꢄꢇꢅꢇꢘꢉꢊꢊꢅꢄꢕꢏꢅꢌꢍꢖꢌꢌꢋꢅꢞꢁꢀꢟꢅꢑꢑꢅꢜꢌꢐꢅꢇꢃꢋꢌꢁ

ꢠꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢃꢄꢡꢅꢉꢄꢋꢅꢏꢕꢊꢌꢐꢉꢄꢖꢃꢄꢡꢅꢜꢌꢐꢅꢢꢣꢝꢛꢅꢤꢀꢥꢁꢟꢝꢁ

ꢦꢣꢧꢨ ꢦꢉꢇꢃꢖꢅꢚꢃꢑꢌꢄꢇꢃꢕꢄꢁꢅꢩꢘꢌꢕꢐꢌꢏꢃꢖꢉꢊꢊꢒꢅꢌꢍꢉꢖꢏꢅꢆꢉꢊꢈꢌꢅꢇꢘꢕꢗꢄꢅꢗꢃꢏꢘꢕꢈꢏꢅꢏꢕꢊꢌꢐꢉꢄꢖꢌꢇꢁ

ꢪꢛꢫꢨ ꢪꢌꢎꢌꢐꢌꢄꢖꢌꢅꢚꢃꢑꢌꢄꢇꢃꢕꢄꢓꢅꢈꢇꢈꢉꢊꢊꢒꢅꢗꢃꢏꢘꢕꢈꢏꢅꢏꢕꢊꢌꢐꢉꢄꢖꢌꢓꢅꢎꢕꢐꢅꢃꢄꢎꢕꢐꢑꢉꢏꢃꢕꢄꢅꢜꢈꢐꢜꢕꢇꢌꢇꢅꢕꢄꢊꢒꢁ

ꢝꢃꢖꢐꢕꢖꢘꢃꢜ ꢩꢌꢖꢘꢄꢕꢊꢕꢡꢒ ꢚꢐꢉꢗꢃꢄꢡ ꢧꢞꢥꢼꢀꢀꢀꢦ

 2003-2011 Microchip Technology Inc.

DS21794G-page 15

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS21794G-page 16

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

ꢝꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢞꢎꢄꢔꢉꢋꢉꢊꢏꢎꢆꢗꢒꢞꢘꢆꢙꢐꢒꢞꢁꢟꢠꢚ

ꢛꢏꢊꢃꢜ ꢫꢕꢐꢅꢏꢘꢌꢅꢑꢕꢇꢏꢅꢖꢈꢐꢐꢌꢄꢏꢅꢜꢉꢖꢬꢉꢡꢌꢅꢋꢐꢉꢗꢃꢄꢡꢇꢓꢅꢜꢊꢌꢉꢇꢌꢅꢇꢌꢌꢅꢏꢘꢌꢅꢝꢃꢖꢐꢕꢖꢘꢃꢜꢅꢂꢉꢖꢬꢉꢡꢃꢄꢡꢅꢣꢜꢌꢖꢃꢎꢃꢖꢉꢏꢃꢕꢄꢅꢊꢕꢖꢉꢏꢌꢋꢅꢉꢏꢅ

ꢘꢏꢏꢜꢨꢭꢭꢗꢗꢗꢁꢑꢃꢖꢐꢕꢖꢘꢃꢜꢁꢖꢕꢑꢭꢜꢉꢖꢬꢉꢡꢃꢄꢡ

b

4

N

E

E1

PIN 1 ID BY

LASER MARK

1

2

3

e

e1

D

c

A

φ

A2

L

A1

L1

ꢮꢄꢃꢏꢇꢝꢯꢰꢰꢯꢝꢛꢩꢛꢪꢣ

ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢅꢰꢃꢑꢃꢏꢇ

ꢝꢯꢱ

ꢱꢲꢝ

ꢝꢢꢳ

ꢱꢈꢑꢔꢌꢐꢅꢕꢎꢅꢂꢃꢄꢇꢱ

ꢂꢃꢏꢖꢘ

ꢲꢈꢏꢇꢃꢋꢌꢅꢰꢌꢉꢋꢅꢂꢃꢏꢖꢘ

ꢲꢆꢌꢐꢉꢊꢊꢅꢶꢌꢃꢡꢘꢏ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢣꢏꢉꢄꢋꢕꢎꢎ

ꢲꢆꢌꢐꢉꢊꢊꢅꢺꢃꢋꢏꢘ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢺꢃꢋꢏꢘ

ꢲꢆꢌꢐꢉꢊꢊꢅꢰꢌꢄꢡꢏꢘ

ꢫꢕꢕꢏꢅꢰꢌꢄꢡꢏꢘ

ꢵ

ꢌ

ꢌꢀ

ꢢ

ꢢꢙ

ꢢꢀ

ꢛ

ꢛꢀ

ꢚ

ꢰ

ꢞꢁꢹꢟꢅꢦꢣꢧ

ꢀꢁꢹꢞꢅꢦꢣꢧ

ꢞꢁꢹꢞ

ꢞꢁꢴꢹ

ꢞꢁꢞꢞ

ꢙꢁꢙꢞ

ꢀꢁꢠꢞ

ꢙꢁꢸꢞ

ꢞꢁꢀꢞ

ꢞꢁꢠꢟ

ꢞꢻ

ꢷ

ꢀꢁꢥꢟ

ꢀꢁꢠꢞ

ꢞꢁꢀꢟ

ꢠꢁꢙꢞ

ꢀꢁꢴꢞ

ꢠꢁꢀꢞ

ꢞꢁꢵꢞ

ꢞꢁꢴꢞ

ꢠꢞꢻ

ꢫꢕꢕꢏꢜꢐꢃꢄꢏ

ꢫꢕꢕꢏꢅꢢꢄꢡꢊꢌ

ꢰꢌꢉꢋꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢰꢌꢉꢋꢅꢺꢃꢋꢏꢘ

ꢰꢀ

ꢀ

ꢖ

ꢔ

ꢞꢁꢞꢴ

ꢞꢁꢙꢞ

ꢞꢁꢙꢵ

ꢞꢁꢟꢀ

ꢛꢏꢊꢃꢉꢜ

ꢀꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢇꢅꢚꢅꢉꢄꢋꢅꢛꢀꢅꢋꢕꢅꢄꢕꢏꢅꢃꢄꢖꢊꢈꢋꢌꢅꢑꢕꢊꢋꢅꢎꢊꢉꢇꢘꢅꢕꢐꢅꢜꢐꢕꢏꢐꢈꢇꢃꢕꢄꢇꢁꢅꢝꢕꢊꢋꢅꢎꢊꢉꢇꢘꢅꢕꢐꢅꢜꢐꢕꢏꢐꢈꢇꢃꢕꢄꢇꢅꢇꢘꢉꢊꢊꢅꢄꢕꢏꢅꢌꢍꢖꢌꢌꢋꢅꢞꢁꢀꢙꢸꢅꢑꢑꢅꢜꢌꢐꢅꢇꢃꢋꢌꢁ

ꢙꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢃꢄꢡꢅꢉꢄꢋꢅꢏꢕꢊꢌꢐꢉꢄꢖꢃꢄꢡꢅꢜꢌꢐꢅꢢꢣꢝꢛꢅꢤꢀꢥꢁꢟꢝꢁ

ꢦꢣꢧꢨ ꢦꢉꢇꢃꢖꢅꢚꢃꢑꢌꢄꢇꢃꢕꢄꢁꢅꢩꢘꢌꢕꢐꢌꢏꢃꢖꢉꢊꢊꢒꢅꢌꢍꢉꢖꢏꢅꢆꢉꢊꢈꢌꢅꢇꢘꢕꢗꢄꢅꢗꢃꢏꢘꢕꢈꢏꢅꢏꢕꢊꢌꢐꢉꢄꢖꢌꢇꢁ

ꢝꢃꢖꢐꢕꢖꢘꢃꢜ ꢩꢌꢖꢘꢄꢕꢊꢕꢡꢒ ꢚꢐꢉꢗꢃꢄꢡ ꢧꢞꢥꢼꢞꢙꢴꢦ

 2003-2011 Microchip Technology Inc.

DS21794G-page 17

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS21794G-page 18

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢡꢓꢄꢈꢆꢢꢔꢁꢂꢋꢔꢃꢆꢗꢇꢘꢆꢣꢆꢠꢤꢤꢆꢑꢋꢈꢆꢥꢏꢅꢦꢆꢙꢇꢡꢢꢇꢚ

ꢛꢏꢊꢃꢜ ꢫꢕꢐꢅꢏꢘꢌꢅꢑꢕꢇꢏꢅꢖꢈꢐꢐꢌꢄꢏꢅꢜꢉꢖꢬꢉꢡꢌꢅꢋꢐꢉꢗꢃꢄꢡꢇꢓꢅꢜꢊꢌꢉꢇꢌꢅꢇꢌꢌꢅꢏꢘꢌꢅꢝꢃꢖꢐꢕꢖꢘꢃꢜꢅꢂꢉꢖꢬꢉꢡꢃꢄꢡꢅꢣꢜꢌꢖꢃꢎꢃꢖꢉꢏꢃꢕꢄꢅꢊꢕꢖꢉꢏꢌꢋꢅꢉꢏꢅ

ꢘꢏꢏꢜꢨꢭꢭꢗꢗꢗꢁꢑꢃꢖꢐꢕꢖꢘꢃꢜꢁꢖꢕꢑꢭꢜꢉꢖꢬꢉꢡꢃꢄꢡ

N

NOTE 1

E1

3

1

2

D

E

A2

A

L

A1

c

e

eB

b1

b

ꢮꢄꢃꢏꢇꢯꢱꢧꢶꢛꢣ

ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢅꢰꢃꢑꢃꢏꢇ

ꢝꢯꢱ

ꢱꢲꢝ

ꢝꢢꢳ

ꢱꢈꢑꢔꢌꢐꢅꢕꢎꢅꢂꢃꢄꢇꢱ

ꢂꢃꢏꢖꢘ

ꢩꢕꢜꢅꢏꢕꢅꢣꢌꢉꢏꢃꢄꢡꢅꢂꢊꢉꢄꢌ

ꢴ

ꢌ

ꢢ

ꢁꢀꢞꢞꢅꢦꢣꢧ

ꢷ

ꢁꢙꢀꢞ

ꢁꢀꢹꢟ

ꢷ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢦꢉꢇꢌꢅꢏꢕꢅꢣꢌꢉꢏꢃꢄꢡꢅꢂꢊꢉꢄꢌ

ꢣꢘꢕꢈꢊꢋꢌꢐꢅꢏꢕꢅꢣꢘꢕꢈꢊꢋꢌꢐꢅꢺꢃꢋꢏꢘ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢺꢃꢋꢏꢘ

ꢲꢆꢌꢐꢉꢊꢊꢅꢰꢌꢄꢡꢏꢘ

ꢩꢃꢜꢅꢏꢕꢅꢣꢌꢉꢏꢃꢄꢡꢅꢂꢊꢉꢄꢌ

ꢰꢌꢉꢋꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢮꢜꢜꢌꢐꢅꢰꢌꢉꢋꢅꢺꢃꢋꢏꢘ

ꢢꢙ

ꢢꢀ

ꢛ

ꢛꢀ

ꢚ

ꢰ

ꢖ

ꢔꢀ

ꢔ

ꢌꢦ

ꢁꢀꢀꢟ

ꢁꢞꢀꢟ

ꢁꢙꢹꢞ

ꢁꢙꢥꢞ

ꢁꢠꢥꢴ

ꢁꢀꢀꢟ

ꢁꢞꢞꢴ

ꢁꢞꢥꢞ

ꢁꢞꢀꢥ

ꢷ

ꢁꢀꢠꢞ

ꢷ

ꢁꢠꢀꢞ

ꢁꢙꢟꢞ

ꢁꢠꢵꢟ

ꢁꢀꢠꢞ

ꢁꢞꢀꢞ

ꢁꢞꢵꢞ

ꢁꢞꢀꢴ

ꢷ

ꢁꢠꢙꢟ

ꢁꢙꢴꢞ

ꢁꢥꢞꢞ

ꢁꢀꢟꢞ

ꢁꢞꢀꢟ

ꢁꢞꢸꢞ

ꢁꢞꢙꢙ

ꢁꢥꢠꢞ

ꢰꢕꢗꢌꢐꢅꢰꢌꢉꢋꢅꢺꢃꢋꢏꢘ

ꢲꢆꢌꢐꢉꢊꢊꢅꢪꢕꢗꢅꢣꢜꢉꢖꢃꢄꢡꢅꢅꢽ

ꢛꢏꢊꢃꢉꢜ

ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃꢇꢈꢉꢊꢅꢃꢄꢋꢌꢍꢅꢎꢌꢉꢏꢈꢐꢌꢅꢑꢉꢒꢅꢆꢉꢐꢒꢓꢅꢔꢈꢏꢅꢑꢈꢇꢏꢅꢔꢌꢅꢊꢕꢖꢉꢏꢌꢋꢅꢗꢃꢏꢘꢅꢏꢘꢌꢅꢘꢉꢏꢖꢘꢌꢋꢅꢉꢐꢌꢉꢁ

ꢙꢁ ꢽꢅꢣꢃꢡꢄꢃꢎꢃꢖꢉꢄꢏꢅꢧꢘꢉꢐꢉꢖꢏꢌꢐꢃꢇꢏꢃꢖꢁ

ꢠꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢇꢅꢚꢅꢉꢄꢋꢅꢛꢀꢅꢋꢕꢅꢄꢕꢏꢅꢃꢄꢖꢊꢈꢋꢌꢅꢑꢕꢊꢋꢅꢎꢊꢉꢇꢘꢅꢕꢐꢅꢜꢐꢕꢏꢐꢈꢇꢃꢕꢄꢇꢁꢅꢝꢕꢊꢋꢅꢎꢊꢉꢇꢘꢅꢕꢐꢅꢜꢐꢕꢏꢐꢈꢇꢃꢕꢄꢇꢅꢇꢘꢉꢊꢊꢅꢄꢕꢏꢅꢌꢍꢖꢌꢌꢋꢅꢁꢞꢀꢞꢾꢅꢜꢌꢐꢅꢇꢃꢋꢌꢁ

ꢥꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢃꢄꢡꢅꢉꢄꢋꢅꢏꢕꢊꢌꢐꢉꢄꢖꢃꢄꢡꢅꢜꢌꢐꢅꢢꢣꢝꢛꢅꢤꢀꢥꢁꢟꢝꢁ

ꢦꢣꢧꢨꢅꢦꢉꢇꢃꢖꢅꢚꢃꢑꢌꢄꢇꢃꢕꢄꢁꢅꢩꢘꢌꢕꢐꢌꢏꢃꢖꢉꢊꢊꢒꢅꢌꢍꢉꢖꢏꢅꢆꢉꢊꢈꢌꢅꢇꢘꢕꢗꢄꢅꢗꢃꢏꢘꢕꢈꢏꢅꢏꢕꢊꢌꢐꢉꢄꢖꢌꢇꢁ

ꢝꢃꢖꢐꢕꢖꢘꢃꢜ ꢩꢌꢖꢘꢄꢕꢊꢕꢡꢒ ꢚꢐꢉꢗꢃꢄꢡ ꢧꢞꢥꢼꢞꢀꢴꢦ

 2003-2011 Microchip Technology Inc.

DS21794G-page 19

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS21794G-page 20

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2003-2011 Microchip Technology Inc.

DS21794G-page 21

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢗꢐꢛꢘꢆꢣꢆꢛꢄꢎꢎꢏꢧꢨꢆꢠꢩꢪꢤꢆꢑꢑꢆꢥꢏꢅꢦꢆꢙꢐꢒꢢꢫꢚ

ꢛꢏꢊꢃꢜ ꢫꢕꢐꢅꢏꢘꢌꢅꢑꢕꢇꢏꢅꢖꢈꢐꢐꢌꢄꢏꢅꢜꢉꢖꢬꢉꢡꢌꢅꢋꢐꢉꢗꢃꢄꢡꢇꢓꢅꢜꢊꢌꢉꢇꢌꢅꢇꢌꢌꢅꢏꢘꢌꢅꢝꢃꢖꢐꢕꢖꢘꢃꢜꢅꢂꢉꢖꢬꢉꢡꢃꢄꢡꢅꢣꢜꢌꢖꢃꢎꢃꢖꢉꢏꢃꢕꢄꢅꢊꢕꢖꢉꢏꢌꢋꢅꢉꢏꢅ

ꢘꢏꢏꢜꢨꢭꢭꢗꢗꢗꢁꢑꢃꢖꢐꢕꢖꢘꢃꢜꢁꢖꢕꢑꢭꢜꢉꢖꢬꢉꢡꢃꢄꢡ

DS21794G-page 22

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢞꢬꢋꢔꢆꢐꢬꢎꢋꢔꢕꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢗꢐꢞꢘꢆꢣꢆꢭꢩꢭꢆꢑꢑꢆꢥꢏꢅꢦꢆꢙꢞꢐꢐꢒꢇꢚ

ꢛꢏꢊꢃꢜ ꢫꢕꢐꢅꢏꢘꢌꢅꢑꢕꢇꢏꢅꢖꢈꢐꢐꢌꢄꢏꢅꢜꢉꢖꢬꢉꢡꢌꢅꢋꢐꢉꢗꢃꢄꢡꢇꢓꢅꢜꢊꢌꢉꢇꢌꢅꢇꢌꢌꢅꢏꢘꢌꢅꢝꢃꢖꢐꢕꢖꢘꢃꢜꢅꢂꢉꢖꢬꢉꢡꢃꢄꢡꢅꢣꢜꢌꢖꢃꢎꢃꢖꢉꢏꢃꢕꢄꢅꢊꢕꢖꢉꢏꢌꢋꢅꢉꢏꢅ

ꢘꢏꢏꢜꢨꢭꢭꢗꢗꢗꢁꢑꢃꢖꢐꢕꢖꢘꢃꢜꢁꢖꢕꢑꢭꢜꢉꢖꢬꢉꢡꢃꢄꢡ

D

N

E

E1

NOTE 1

1

2

b

e

c

φ

A

A2

A1

L

L1

ꢮꢄꢃꢏꢇꢝꢯꢰꢰꢯꢝꢛꢩꢛꢪꢣ

ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢅꢰꢃꢑꢃꢏꢇ

ꢝꢯꢱ

ꢱꢲꢝ

ꢝꢢꢳ

ꢱꢈꢑꢔꢌꢐꢅꢕꢎꢅꢂꢃꢄꢇꢱ

ꢂꢃꢏꢖꢘ

ꢴ

ꢌ

ꢞꢁꢵꢟꢅꢦꢣꢧ

ꢲꢆꢌꢐꢉꢊꢊꢅꢶꢌꢃꢡꢘꢏ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢣꢏꢉꢄꢋꢕꢎꢎꢅ

ꢢ

ꢷ

ꢞꢁꢴꢞ

ꢞꢁꢞꢟ

ꢷ

ꢀꢁꢞꢞ

ꢷ

ꢀꢁꢙꢞ

ꢀꢁꢞꢟ

ꢞꢁꢀꢟ

ꢢꢙ

ꢢꢀ

ꢛ

ꢲꢆꢌꢐꢉꢊꢊꢅꢺꢃꢋꢏꢘ

ꢵꢁꢥꢞꢅꢦꢣꢧ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢺꢃꢋꢏꢘ

ꢝꢕꢊꢋꢌꢋꢅꢂꢉꢖꢬꢉꢡꢌꢅꢰꢌꢄꢡꢏꢘ

ꢫꢕꢕꢏꢅꢰꢌꢄꢡꢏꢘ

ꢛꢀ

ꢚ

ꢰ

ꢥꢁꢠꢞ

ꢙꢁꢹꢞ

ꢞꢁꢥꢟ

ꢥꢁꢥꢞ

ꢠꢁꢞꢞ

ꢞꢁꢵꢞ

ꢥꢁꢟꢞ

ꢠꢁꢀꢞ

ꢞꢁꢸꢟ

ꢫꢕꢕꢏꢜꢐꢃꢄꢏ

ꢫꢕꢕꢏꢅꢢꢄꢡꢊꢌ

ꢰꢌꢉꢋꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢰꢌꢉꢋꢅꢺꢃꢋꢏꢘ

ꢰꢀ

ꢀ

ꢀꢁꢞꢞꢅꢪꢛꢫ

ꢞꢻ

ꢞꢁꢞꢹ

ꢞꢁꢀꢹ

ꢷ

ꢴꢻ

ꢖ

ꢔ

ꢞꢁꢙꢞ

ꢞꢁꢠꢞ

ꢛꢏꢊꢃꢉꢜ

ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃꢇꢈꢉꢊꢅꢃꢄꢋꢌꢍꢅꢎꢌꢉꢏꢈꢐꢌꢅꢑꢉꢒꢅꢆꢉꢐꢒꢓꢅꢔꢈꢏꢅꢑꢈꢇꢏꢅꢔꢌꢅꢊꢕꢖꢉꢏꢌꢋꢅꢗꢃꢏꢘꢃꢄꢅꢏꢘꢌꢅꢘꢉꢏꢖꢘꢌꢋꢅꢉꢐꢌꢉꢁ

ꢙꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢇꢅꢚꢅꢉꢄꢋꢅꢛꢀꢅꢋꢕꢅꢄꢕꢏꢅꢃꢄꢖꢊꢈꢋꢌꢅꢑꢕꢊꢋꢅꢎꢊꢉꢇꢘꢅꢕꢐꢅꢜꢐꢕꢏꢐꢈꢇꢃꢕꢄꢇꢁꢅꢝꢕꢊꢋꢅꢎꢊꢉꢇꢘꢅꢕꢐꢅꢜꢐꢕꢏꢐꢈꢇꢃꢕꢄꢇꢅꢇꢘꢉꢊꢊꢅꢄꢕꢏꢅꢌꢍꢖꢌꢌꢋꢅꢞꢁꢀꢟꢅꢑꢑꢅꢜꢌꢐꢅꢇꢃꢋꢌꢁ

ꢠꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢃꢄꢡꢅꢉꢄꢋꢅꢏꢕꢊꢌꢐꢉꢄꢖꢃꢄꢡꢅꢜꢌꢐꢅꢢꢣꢝꢛꢅꢤꢀꢥꢁꢟꢝꢁ

ꢦꢣꢧꢨ ꢦꢉꢇꢃꢖꢅꢚꢃꢑꢌꢄꢇꢃꢕꢄꢁꢅꢩꢘꢌꢕꢐꢌꢏꢃꢖꢉꢊꢊꢒꢅꢌꢍꢉꢖꢏꢅꢆꢉꢊꢈꢌꢅꢇꢘꢕꢗꢄꢅꢗꢃꢏꢘꢕꢈꢏꢅꢏꢕꢊꢌꢐꢉꢄꢖꢌꢇꢁ

ꢪꢛꢫꢨ ꢪꢌꢎꢌꢐꢌꢄꢖꢌꢅꢚꢃꢑꢌꢄꢇꢃꢕꢄꢓꢅꢈꢇꢈꢉꢊꢊꢒꢅꢗꢃꢏꢘꢕꢈꢏꢅꢏꢕꢊꢌꢐꢉꢄꢖꢌꢓꢅꢎꢕꢐꢅꢃꢄꢎꢕꢐꢑꢉꢏꢃꢕꢄꢅꢜꢈꢐꢜꢕꢇꢌꢇꢅꢕꢄꢊꢒꢁ

ꢝꢃꢖꢐꢕꢖꢘꢃꢜ ꢩꢌꢖꢘꢄꢕꢊꢕꢡꢒ ꢚꢐꢉꢗꢃꢄꢡ ꢧꢞꢥꢼꢞꢴꢵꢦ

 2003-2011 Microchip Technology Inc.

DS21794G-page 23

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS21794G-page 24

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢡꢓꢄꢈꢆꢮꢈꢄꢊꢨꢆꢛꢏꢆꢂꢃꢄꢅꢆꢇꢄꢌꢕꢄꢖꢃꢆꢗꢍꢫꢘꢆꢣꢆꢟꢯꢠꢯꢤꢩꢪꢆꢑꢑꢆꢥꢏꢅꢦꢆꢙꢡꢮꢛꢚ

ꢛꢏꢊꢃꢜ ꢫꢕꢐꢅꢏꢘꢌꢅꢑꢕꢇꢏꢅꢖꢈꢐꢐꢌꢄꢏꢅꢜꢉꢖꢬꢉꢡꢌꢅꢋꢐꢉꢗꢃꢄꢡꢇꢓꢅꢜꢊꢌꢉꢇꢌꢅꢇꢌꢌꢅꢏꢘꢌꢅꢝꢃꢖꢐꢕꢖꢘꢃꢜꢅꢂꢉꢖꢬꢉꢡꢃꢄꢡꢅꢣꢜꢌꢖꢃꢎꢃꢖꢉꢏꢃꢕꢄꢅꢊꢕꢖꢉꢏꢌꢋꢅꢉꢏꢅ

ꢘꢏꢏꢜꢨꢭꢭꢗꢗꢗꢁꢑꢃꢖꢐꢕꢖꢘꢃꢜꢁꢖꢕꢑꢭꢜꢉꢖꢬꢉꢡꢃꢄꢡ

e

D

b

N

L

K

E2

E

EXPOSED PAD

NOTE 1

2

1

2

D2

BOTTOM VIEW

TOP VIEW

A

NOTE 2

ꢮꢄꢃꢏꢇꢝꢯꢰꢰꢯꢝꢛꢩꢛꢪꢣ

A3

A1

ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢅꢰꢃꢑꢃꢏꢇ

ꢝꢯꢱ

ꢱꢲꢝ

ꢝꢢꢳ

ꢱꢈꢑꢔꢌꢐꢅꢕꢎꢅꢂꢃꢄꢇꢱ

ꢂꢃꢏꢖꢘ

ꢲꢆꢌꢐꢉꢊꢊꢅꢶꢌꢃꢡꢘꢏ

ꢣꢏꢉꢄꢋꢕꢎꢎꢅ

ꢧꢕꢄꢏꢉꢖꢏꢅꢩꢘꢃꢖꢬꢄꢌꢇꢇ

ꢲꢆꢌꢐꢉꢊꢊꢅꢰꢌꢄꢡꢏꢘ

ꢲꢆꢌꢐꢉꢊꢊꢅꢺꢃꢋꢏꢘ

ꢛꢍꢜꢕꢇꢌꢋꢅꢂꢉꢋꢅꢰꢌꢄꢡꢏꢘ

ꢛꢍꢜꢕꢇꢌꢋꢅꢂꢉꢋꢅꢺꢃꢋꢏꢘ

ꢧꢕꢄꢏꢉꢖꢏꢅꢺꢃꢋꢏꢘ

ꢴ

ꢌ

ꢢ

ꢢꢀ

ꢢꢠ

ꢚ

ꢞꢁꢟꢞꢅꢦꢣꢧ

ꢞꢁꢹꢞ

ꢞꢁꢞꢙ

ꢞꢁꢙꢞꢅꢪꢛꢫ

ꢙꢁꢞꢞꢅꢦꢣꢧ

ꢠꢁꢞꢞꢅꢦꢣꢧ

ꢷ

ꢞꢁꢙꢟ

ꢞꢁꢥꢞ

ꢷ

ꢞꢁꢴꢞ

ꢞꢁꢞꢞ

ꢀꢁꢞꢞ

ꢞꢁꢞꢟ

ꢛ

ꢚꢙ

ꢛꢙ

ꢔ

ꢰ

U

ꢀꢁꢠꢞ

ꢀꢁꢟꢞ

ꢞꢁꢙꢞ

ꢞꢁꢠꢞ

ꢞꢁꢙꢞ

ꢀꢁꢟꢟ

ꢀꢁꢸꢟ

ꢞꢁꢠꢞ

ꢞꢁꢟꢞ

ꢷ

ꢧꢕꢄꢏꢉꢖꢏꢅꢰꢌꢄꢡꢏꢘ

ꢧꢕꢄꢏꢉꢖꢏꢼꢏꢕꢼꢛꢍꢜꢕꢇꢌꢋꢅꢂꢉꢋ

ꢛꢏꢊꢃꢉꢜ

ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃꢇꢈꢉꢊꢅꢃꢄꢋꢌꢍꢅꢎꢌꢉꢏꢈꢐꢌꢅꢑꢉꢒꢅꢆꢉꢐꢒꢓꢅꢔꢈꢏꢅꢑꢈꢇꢏꢅꢔꢌꢅꢊꢕꢖꢉꢏꢌꢋꢅꢗꢃꢏꢘꢃꢄꢅꢏꢘꢌꢅꢘꢉꢏꢖꢘꢌꢋꢅꢉꢐꢌꢉꢁ

ꢙꢁ ꢂꢉꢖꢬꢉꢡꢌꢅꢑꢉꢒꢅꢘꢉꢆꢌꢅꢕꢄꢌꢅꢕꢐꢅꢑꢕꢐꢌꢅꢌꢍꢜꢕꢇꢌꢋꢅꢏꢃꢌꢅꢔꢉꢐꢇꢅꢉꢏꢅꢌꢄꢋꢇꢁ

ꢠꢁ ꢂꢉꢖꢬꢉꢡꢌꢅꢃꢇꢅꢇꢉꢗꢅꢇꢃꢄꢡꢈꢊꢉꢏꢌꢋꢁ

ꢥꢁ ꢚꢃꢑꢌꢄꢇꢃꢕꢄꢃꢄꢡꢅꢉꢄꢋꢅꢏꢕꢊꢌꢐꢉꢄꢖꢃꢄꢡꢅꢜꢌꢐꢅꢢꢣꢝꢛꢅꢤꢀꢥꢁꢟꢝꢁ

ꢦꢣꢧꢨ ꢦꢉꢇꢃꢖꢅꢚꢃꢑꢌꢄꢇꢃꢕꢄꢁꢅꢩꢘꢌꢕꢐꢌꢏꢃꢖꢉꢊꢊꢒꢅꢌꢍꢉꢖꢏꢅꢆꢉꢊꢈꢌꢅꢇꢘꢕꢗꢄꢅꢗꢃꢏꢘꢕꢈꢏꢅꢏꢕꢊꢌꢐꢉꢄꢖꢌꢇꢁ

ꢪꢛꢫꢨ ꢪꢌꢎꢌꢐꢌꢄꢖꢌꢅꢚꢃꢑꢌꢄꢇꢃꢕꢄꢓꢅꢈꢇꢈꢉꢊꢊꢒꢅꢗꢃꢏꢘꢕꢈꢏꢅꢏꢕꢊꢌꢐꢉꢄꢖꢌꢓꢅꢎꢕꢐꢅꢃꢄꢎꢕꢐꢑꢉꢏꢃꢕꢄꢅꢜꢈꢐꢜꢕꢇꢌꢇꢅꢕꢄꢊꢒꢁ

ꢝꢃꢖꢐꢕꢖꢘꢃꢜ ꢩꢌꢖꢘꢄꢕꢊꢕꢡꢒ ꢚꢐꢉꢗꢃꢄꢡ ꢧꢞꢥꢼꢀꢙꢠꢧ

 2003-2011 Microchip Technology Inc.

DS21794G-page 25

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS21794G-page 26

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2003-2011 Microchip Technology Inc.

DS21794G-page 27

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS21794G-page 28

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢡꢓꢄꢈꢆꢮꢈꢄꢊꢨꢆꢛꢏꢆꢂꢃꢄꢅꢆꢇꢄꢌꢕꢄꢖꢃꢆꢗꢍꢛꢘꢆꢣꢆꢟꢯꢠꢯꢤꢩꢰꢱꢆꢑꢑꢆꢥꢏꢅꢦꢆꢙꢞꢡꢮꢛꢚ

ꢛꢏꢊꢃꢜ ꢫꢕꢐꢅꢏꢘꢌꢅꢑꢕꢇꢏꢅꢖꢈꢐꢐꢌꢄꢏꢅꢜꢉꢖꢬꢉꢡꢌꢅꢋꢐꢉꢗꢃꢄꢡꢇꢓꢅꢜꢊꢌꢉꢇꢌꢅꢇꢌꢌꢅꢏꢘꢌꢅꢝꢃꢖꢐꢕꢖꢘꢃꢜꢅꢂꢉꢖꢬꢉꢡꢃꢄꢡꢅꢣꢜꢌꢖꢃꢎꢃꢖꢉꢏꢃꢕꢄꢅꢊꢕꢖꢉꢏꢌꢋꢅꢉꢏꢅ

ꢘꢏꢏꢜꢨꢭꢭꢗꢗꢗꢁꢑꢃꢖꢐꢕꢖꢘꢃꢜꢁꢖꢕꢑꢭꢜꢉꢖꢬꢉꢡꢃꢄꢡ

 2003-2011 Microchip Technology Inc.

DS21794G-page 29

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

APPENDIX A: REVISION HISTORY

Revision A (5/2003)

Initial Release.

Revision B (12/2003)

Corrections to Section 1.0, Electrical Characteristics.

Section 4.1, 6-Lead SOT-23 package to OT.

Revision C (4/2005)

Added DFN package.

Revision D (11/2006)

Updated Package Drawings and Product ID System

Revision E (3/2007)

Replaced Package Drawings; Revised Product ID

System (SOIC-SN package).

Revision F (5/2008)

Revised Figures 2-1 through 2-4 and Figures 2-8

through 2-11; Revised Package Marking Information;

Replaced Package Drawings; Revised Product ID

section.

Revision G (12/2011)

Added TDFN package.

DS21794G-page 30

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

THE MICROCHIP WEB SITE

CUSTOMER SUPPORT

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

• Development Systems Information Line

Customers

should

contact

their

distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

• General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

Technical support is available through the web site

at: http://microchip.com/support

• Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com. Under “Support”, click on

“Customer Change Notification” and follow the

registration instructions.

 2003-2011 Microchip Technology Inc.

DS21794G-page 31

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip

product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our

documentation can better serve you, please FAX your comments to the Technical Publications Manager at

(480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

TO:

RE:

Technical Publications Manager

Reader Response

Total Pages Sent ________

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Literature Number: DS21794G

Application (optional):

Would you like a reply?

Y

N

Device: 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21794G-page 32

 2003-2011 Microchip Technology Inc.

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

/XX

PART NO.

Device

X

Examples:

a)

b)

c)

93AA56C-I/P: 2K, 256x8 or 128x16 Serial

EEPROM, PDIP package, 1.8V

93AA56B-I/MS: 2K, 128x16 Serial EEPROM,

MSOP package, 1.8V

Package

Tape & Reel Temperature

Range

Pinout

93AA56AT-I/OT: 2K, 256x8 Serial EEPROM,

SOT-23 package, tape and reel, 1.8V

Device:

93AA56A: 2K 1.8V Microwire Serial EEPROM

93AA56B: 2K 1.8V Microwire Serial EEPROM

93AA56C: 2K 1.8V Microwire Serial EEPROM w/ORG

d)

93AA56CT-I/SN: 2K, 256x8 or 128x16 Serial

EEPROM, SOIC package, tape and reel, 1.8V

93LC56A: 2K 2.5V Microwire Serial EEPROM

93LC56B: 2K 2.5V Microwire Serial EEPROM

93LC56C: 2K 2.5V Microwire Serial EEPROM w/ORG

a)

b)

93LC56A-I/MS: 2K, 256x8 Serial EEPROM,

MSOP package, 2.5V

93LC56BT-I/OT: 2K, 128x16 Serial EEPROM,

SOT-23 package, tape and reel, 2.5V

93C56A: 2K 5.0V Microwire Serial EEPROM

93C56B: 2K 5.0V Microwire Serial EEPROM

93C56C: 2K 5.0V Microwire Serial EEPROM w/ORG

c)

d)

93LC56B-I/ST: 2K, 128x16 Serial EEPROM,

TSSOP package, 2.5V

Pinout:

Blank

X

=

Standard pinout

Rotated pinout

93LC56CT-I/MNY: 2K, 256x8 or 128x16 Serial

EEPROM, TDFN package, tape and reel, 2.5V

Tape & Reel:

Blank

T

=

Standard packaging

Tape & Reel

a)

b)

c)

d)

93C56B-I/MS: 2K, 128x16 Serial EEPROM,

MSOP package, 5.0V

93C56C-I/SN: 2K, 256x8 or 128x16 Serial

EEPROM, SOIC package, 5.0V

93C56AT-I/OT: 2K, 256x8 Serial EEPROM,

SOT-23 package, tape and reel, 5.0V

93C56BX-I/SN: 2K, 128x16 Serial EEPROM,

rotated SOIC package, 5.0V

Temperature Range:

Package:

I

E

=

-40°C to +85°C

-40°C to +125°C

MS

OT

P

SN

ST

=

Plastic MSOP (Micro Small outline), 8-lead

Plastic SOT-23, 6-lead (Tape & Reel only)

Plastic DIP (300 mil body), 8-lead

Plastic SOIC (3.90 mm body), 8-lead

Plastic TSSOP (4.4 mm body), 8-lead

Plastic DFN (2x3x0.90 mm body), 8-lead

Plastic TDFN (2x3x0.75 mm body), 8-lead

(Tape & Reel only)

MC

MNY⁽¹⁾

Note 1:

“Y” indicates a Nickel Palladium Gold (NiPdAu) finish.

 2003-2011 Microchip Technology Inc.

DS21794G-page 33

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C

NOTES:

DS21794G-page 34

 2003-2011 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,

32

PIC logo, rfPIC and UNI/O are registered trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, chipKIT,

chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,

dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,

FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,

Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,

MPLINK, mTouch, Omniscient Code Generation, PICC,

PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,

rfLAB, Select Mode, Total Endurance, TSHARC,

UniWinDriver, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

ISBN: 978-1-61341-887-1

Microchip received ISO/TS-16949:2009 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC^®MCUs and dsPIC^®DSCs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

 2003-2011 Microchip Technology Inc.

DS21794G-page 35

Worldwide Sales and Service

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://www.microchip.com/

support

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4123

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

Web Address:

www.microchip.com

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Japan - Osaka

Tel: 81-66-152-7160

Fax: 81-66-152-9310

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

China - Beijing

Tel: 86-10-8569-7000

Fax: 86-10-8528-2104

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

Boston

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

China - Chongqing

Tel: 86-23-8980-9588

Fax: 86-23-8980-9500

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

Korea - Seoul

China - Hangzhou

Tel: 86-571-2819-3187

Fax: 86-571-2819-3189

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Cleveland

Independence, OH

Tel: 216-447-0464

Fax: 216-447-0643

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

Detroit

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Indianapolis

Noblesville, IN

Tel: 317-773-8323

Fax: 317-773-5453

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Taiwan - Hsin Chu

Tel: 886-3-5778-366

Fax: 886-3-5770-955

Los Angeles

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-330-9305

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Santa Clara

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

Toronto

Mississauga, Ontario,

Canada

China - Xiamen

Tel: 905-673-0699

Fax: 905-673-6509

Tel: 86-592-2388138

Fax: 86-592-2388130

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

11/29/11

DS21794G-page 36

 2003-2011 Microchip Technology Inc.


型号：	93LC56BT-I/SNROC
厂家：	MICROCHIP
描述：	128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8, 3.90 MM, ROHS COMPLIANT, PLASTIC, SOIC-8 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管
文件：	总36页 (文件大小：899K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

93LC56BT-I/SNROC [MICROCHIP]

相关型号：

93LC56BT-I/SNRVA

93LC56BT-I/SNVAO

93LC56BT-I/ST

93LC56BT-I/STG

93LC56BT-I/STRVA

93LC56BT/SMRVA

93LC56BT/SNC22

93LC56BT/ST

93LC56BTE/MS

93LC56BTE/MSG

93LC56BTE/OT

93LC56BTE/OTG