93LC66A-TI/ST
更新时间:2024-09-18 15:04:08
品牌:MICROCHIP
描述:512 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8, 4.40 MM, LEAD FREE, PLASTIC, MO-153, TSSOP-8
93LC66A-TI/ST 概述
512 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8, 4.40 MM, LEAD FREE, PLASTIC, MO-153, TSSOP-8 EEPROM
93LC66A-TI/ST 规格参数
是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Active | 零件包装代码: | TSSOP |
包装说明: | TSSOP, | 针数: | 8 |
Reach Compliance Code: | compliant | 风险等级: | 5.07 |
最大时钟频率 (fCLK): | 3 MHz | JESD-30 代码: | R-PDSO-G8 |
JESD-609代码: | e3 | 长度: | 4.4 mm |
内存密度: | 4096 bit | 内存集成电路类型: | EEPROM |
内存宽度: | 8 | 湿度敏感等级: | 1 |
功能数量: | 1 | 端子数量: | 8 |
字数: | 512 words | 字数代码: | 512 |
工作模式: | SYNCHRONOUS | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 组织: | 512X8 |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
并行/串行: | SERIAL | 峰值回流温度(摄氏度): | 260 |
认证状态: | Not Qualified | 座面最大高度: | 1.1 mm |
串行总线类型: | MICROWIRE | 最大供电电压 (Vsup): | 5.5 V |
最小供电电压 (Vsup): | 2.5 V | 标称供电电压 (Vsup): | 3 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | MATTE TIN |
端子形式: | GULL WING | 端子节距: | 0.65 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | 40 |
宽度: | 3 mm | 最长写入周期时间 (tWC): | 6 ms |
Base Number Matches: | 1 |
93LC66A-TI/ST 数据手册
通过下载93LC66A-TI/ST数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
1K-16K Microwire Compatible Serial EEPROMs
Features:
Description:
• Densities from 1 Kbits through 16 Kbits
• Low-power CMOS technology
Microchip Technology Inc. supports the 3-wire
Microwire bus with low-voltage serial Electrically
Erasable PROMs (EEPROM) that range in density
from 1 Kbits up to 16 Kbits. Each density is available
with and without the ORG functionality, and selected by
the part number ordered. Advanced CMOS technology
makes these devices ideal for low power, nonvolatile
memory applications. The entire series of Microwire
devices are available in the standard 8-lead PDIP and
SOIC packages as well as the more advanced packag-
ing such as the 8-lead MSOP, 8-lead TSSOP, 6-lead
SOT-23, and 8-lead DFN (2x3). These packages are all
available in a Pb-free (Matte Tin) finish. Packaging with
the Sn/Pb finish is also available as a custom device.
• Available with or without ORG function:
With ORG function:
- ORG pin at Logic LO: 8-bit word
- ORG pin at Logic HI: 16-bit word
Without ORG function:
- ‘A’ version: 8-bit word
- ‘B’ version: 16-bit word
• Program Enable pin:
- Write-protect for entire array
(93XX76C and 93XX86C only)
• Self-timed Erase/Write cycles
(including auto-erase)
Pin Diagrams (not to scale)
PDIP/SOIC
(P, SN)
ROTATED SOIC
(ex: 93LC46BX)
• Automatic ERAL before WRAL
• Power-on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device Status signal (Ready/Busy)
• Sequential Read function
(1,3)
V
CC
ORG
1
2
3
4
CS
CLK
DI
8
7
6
5
NC
1
2
3
4
8
7
6
5
(2,3)
VCC
PE
VSS
(1,3)
ORG
CS
DO
DI
• 1,000,000 E/W cycles
DO
CLK
V
SS
• Data retention > 200 years
• Temperature ranges supported:
DFN (MC)
- Industrial (I)
-40°C to +85°C
-40°C to +125°C
CS
V
CC
(2,3)
1
8
- Automotive (E)
PE
7
6
5
CLK
DI
2
3
4
(1,3)
ORG
VSS
DO
Pin Function Table
TSSOP/MSOP
(ST, MS)
Name
Function
SOT-23
(OT)
CS
CLK
DI
Chip Select
8
7
6
5
1
2
3
4
CS
V
CC
1
2
3
6
5
4
V
CC
DO
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
(2,3)
CLK
PE
ORG
VSS
CS
CLK
(1,3)
DI
DI
V
SS
DO
DO
VSS
PE
Note 1: ORG pin: Only on 93XX46C/56C/66C/76C/86C.
2: PE pin: Only on 93XX76C/86C.
Program Enable
Memory Configuration
Power Supply
ORG
VCC
3: ORG/PE: No internal connections on 93XXA/B.
Note:
ORG and PE functionality not available in
all products. See Table 1-1, Device
Selection Table.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
© 2005 Microchip Technology Inc.
DS21929A-page 1
93XX46X/56X/66X/76X/86X
TABLE 1-1:
Part Number
DEVICE SELECTION TABLE
Density
VCC
Organization
(Words)
Temp
Range
ORG Pin
PE Pin
Packages
(Kbits) Range
93XX46A/B/C
93AA46A
93AA46B
93AA46C
93LC46A
93LC46B
93LC46C
93C46A
1
1
1
1
1
1
1
1
1
1.8-5.5
1.8-5.5
1.8-5.5
2.5-5.5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
No
No
128 x 8 bits
64 x 16 bits
No
No
No
No
No
No
No
No
No
I
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
I
Yes
No
Selectable x8 or x16
128 x 8 bits
I
I, E
I, E
I, E
I, E
I, E
I, E
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
No
64 x 16 bits
Yes
No
Selectable x8 or x16
128 x 8 bits
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
93C46B
No
64 x 16 bits
93C46C
Yes
Selectable x8 or x16
93AA46AX/BX/CX, 93LC46AX/BX/CX, 93C46AX/BX/CX (Alternate pinout with die rotated 90°)
93AA46AX
93AA46BX
93AA46CX
93LC46AX
93LC46BX
93LC46CX
93C46AX
93C46BX
93C46CX
93XX56A/B/C
93AA56A
93AA56B
93AA56C
93LC56A
93LC56B
93LC56C
93C56A
1
1
1
1
1
1
1
1
1
1.8-5.5
1.8-5.5
1.8-5.5
2.5-5.5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
No
No
128 x 8 bits
64 x 16 bits
No
No
No
No
No
No
No
No
No
I
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
I
Yes
No
Selectable x8 or x16
128 x 8 bits
I
I, E
I, E
I, E
I, E
I, E
I, E
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
No
64 x 16 bits
Yes
No
Selectable x8 or x16
128 x 8 bits
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
No
64 x 16 bits
Yes
Selectable x8 or x16
2
2
2
2
2
2
2
2
2
1.8-5.5
1.8-5.5
1.8-5.5
2.5-5.5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
No
No
256 x 8 bits
128 x 16 bits
No
No
No
No
No
No
No
No
No
I
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
I
Yes
No
Selectable x8 or x16
256 x 8 bits
I
I, E
I, E
I, E
I, E
I, E
I, E
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
No
128 x 16 bits
Yes
No
Selectable x8 or x16
256 x 8 bits
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
93C56B
No
128 x 16 bits
93C56C
Yes
Selectable x8 or x16
93XX66A/B/C
93AA66A
93AA66B
93AA66C
93LC66A
93LC66B
93LC66C
93C66A
4
4
4
4
4
4
4
4
4
1.8-5.5
1.8-5.5
1.8-5.5
2.5-5.5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
No
No
512 x 8 bits
256 x 16 bits
No
No
No
No
No
No
No
No
No
I
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
I
Yes
No
Selectable x8 or x16
512 x 8 bits
I
I, E
I, E
I, E
I, E
I, E
I, E
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
No
256 x 16 bits
Yes
No
Selectable x8 or x16
512 x 8 bits
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
93C66B
No
256 x 16 bits
93C66C
Yes
Selectable x8 or x16
DS21929A-page 2
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
TABLE 1-1:
Part Number
DEVICE SELECTION TABLE (CONTINUED)
Density
VCC
Organization
(Words)
Temp
Range
ORG Pin
PE Pin
Packages
(Kbits) Range
93XX76A/B/C
93AA76A
93AA76B
93AA76C
93LC76A
93LC76B
93LC76C
93C76A
8
8
8
8
8
8
8
8
8
1.8-5.5
1.8-5.5
1.8-5.5
2.5-5.5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
No
No
1024 x 8 bits
512 x 16 bits
No
No
I
OT
OT
I
Yes
No
Selectable x8 or x16
1024 x 8 bits
Yes
No
I
P, SN, ST, MS, MC
I, E
I, E
I, E
I, E
I, E
I, E
OT
No
512 x 16 bits
No
OT
Yes
No
Selectable x8 or x16
1024 x 8 bits
Yes
No
P, SN, ST, MS, MC
OT
93C76B
No
512 x 16 bits
No
OT
93C76C
Yes
Selectable x8 or x16
Yes
P, SN, ST, MS, MC
93XX86A/B/C
93AA86A
93AA86B
93AA86C
93LC86A
93LC86B
93LC86C
93C86A
16
16
16
16
16
16
16
16
16
1.8-5.5
1.8-5.5
1.8-5.5
2.5-5.5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
No
No
2048 x 8 bits
1024 x 16 bits
No
No
I
OT
I
OT
Yes
No
Selectable x8 or x16
2048 x 8 bits
Yes
No
I
P, SN, ST, MS, MC
I, E
I, E
I, E
I, E
I, E
I, E
OT
No
1024 x 16 bits
No
OT
Yes
No
Selectable x8 or x16
2048 x 8 bits
Yes
No
P, SN, ST, MS, MC
OT
93C86B
No
1024 x 16 bits
No
OT
93C86C
Yes
Selectable x8 or x16
Yes
P, SN, ST, MS, MC
© 2005 Microchip Technology Inc.
DS21929A-page 3
93XX46X/56X/66X/76X/86X
2.0
ELECTRICAL CHARACTERISTICS
(†)
Absolute Maximum Ratings
VCC.............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 2-1:
DC CHARACTERISTICS
VCC = 1.8V to 5.5V
All parameters apply over the specified
ranges unless otherwise noted.
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
No.
Symbol
Parameter
Min
Typ
Max
Units
Conditions
D1
VIH1
VIH2
High-level input voltage
2.0
0.7 VCC
—
—
VCC +1
VCC +1
V
V
VCC ≥ 2.7V
VCC < 2.7V
D2
D3
D4
VIL1
VIL2
Low-level input voltage
Low-level output voltage
High-level output voltage
-0.3
-0.3
—
—
0.8
0.2 VCC
V
V
VCC ≥ 2.7V
VCC < 2.7V
VOL1
VOL2
—
—
—
—
0.4
0.2
V
V
IOL = 2.1 mA, VCC = 4.5V
IOL = 100 μA, VCC = 2.5V
VOH1
VOH2
2.4
VCC-0.2
—
—
—
—
V
V
IOH = -400 μA, VCC = 4.5V
IOH = -100 μA, VCC = 2.5V
D5
D6
D7
ILI
Input leakage current
Output leakage current
—
—
—
—
—
—
±1
±1
7
μA
μA
pF
VIN = VSS to VCC
ILO
VOUT = VSS to VCC
CIN,
Pin capacitance
VIN/VOUT = 0V (Note 1)
COUT
(all inputs/outputs)
TA = 25°C, FCLK = 1 MHz
D8
ICC write Write current
—
—
2
mA
FCLK = 3 MHz, VCC = 5.5V
(93XX46X/56X/66X)
—
—
—
3
mA
FCLK = 3 MHz, VCC = 5.5V
(93XX76X/86X)
FCLK = 2 MHz, VCC = 2.5V
500
—
μA
D9
ICC read Read current
—
—
—
—
—
100
1
500
—
mA
μA
μA
FCLK = 3 MHz, VCC = 5.5V
FCLK = 2 MHz, VCC = 3.0V
FCLK = 2 MHz, VCC = 2.5V
D10
ICCS
Standby current
—
—
—
—
1
5
μA
μA
I-Temp (Note 2, 3)
E-Temp
CLK = Cs = 0V
ORG = DI = VSS or VCC
D11
VPOR
VCC voltage detect
—
—
1.5V
3.8V
—
—
V
V
93AAX6A/B/C, 93LCX6A/B/C,
93CX6A/B/C (Note 1)
Note 1: This parameter is periodically sampled and not 100% tested.
2: ORG and PE pins not available on ‘A’ or ‘B’ versions.
3: Ready/Busy status must be cleared from DO, see Section 4.4 “Data Out (DO)”.
DS21929A-page 4
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
TABLE 2-2:
AC CHARACTERISTICS
VCC = 1.8V to 5.5V
All parameters apply over the specified
ranges unless otherwise noted.
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
No.
Symbol
Parameter
Clock frequency
Min
Max
Units
Conditions
A1
FCLK
—
3
2
1
MHz 4.5V ≤ VCC < 5.5V
MHz 2.5V ≤ VCC < 4.5V
MHz 1.8V ≤ VCC < 2.5V
A2
A3
A4
TCKH
TCKL
TCSS
Clock high time
200
250
450
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
Clock low time
100
200
450
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
Chip Select setup time
50
100
250
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
A5
A6
A7
TCSH
TCSL
TDIS
Chip Select hold time
Chip Select low time
Data input setup time
0
—
—
—
ns
ns
1.8V ≤ VCC < 5.5V
1.8V ≤ VCC < 5.5V
250
50
100
250
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
A8
A9
TDIH
TPD
Data input hold time
50
100
250
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
Data output delay time
—
100
ns
4.5V ≤ VCC < 5.5V, CL = 100 pF
(93C76X/86X)
—
200
250
400
ns
ns
ns
4.5V ≤ VCC < 5.5V, CL = 100 pF
2.5V ≤ VCC < 4.5V, CL = 100 pF
1.8V ≤ VCC < 2.5V, CL = 100 pF
A10
A11
TCZ
TSV
Data output disable time
Status valid time
—
—
100
200
ns
ns
4.5V ≤ VCC < 5.5V, (Note 1)
1.8V ≤ VCC < 4.5V, (Note 1)
200
300
500
ns
ns
ns
4.5V ≤ VCC < 5.5V, CL = 100 pF
2.5V ≤ VCC < 4.5V, CL = 100 pF
1.8V ≤ VCC < 2.5V, CL = 100 pF
A12
TWC
Program cycle time
—
—
5
ms
Erase/Write mode
93XX76X/86X
(AA and LC versions)
6
ms
93XX46X/56X/66X
(AA and LC versions)
A13
A14
A15
A16
TWC
TEC
TWL
—
—
—
2
6
ms
ms
ms
93C46X/56X/66X/76X/86X
Program cycle time
Endurance
ERAL mode, 4.5V ≤ VCC ≤ 5.5V
WRAL mode, 4.5V ≤ VCC ≤ 5.5V
—
15
—
1M
cycles 25°C, VCC = 5.0V, (Note 2)
Note 1: This parameter is periodically sampled and not 100% tested.
2: This application is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which may be downloaded from
www.microchip.com.
© 2005 Microchip Technology Inc.
DS21929A-page 5
93XX46X/56X/66X/76X/86X
FIGURE 2-1:
SYNCHRONOUS DATA TIMING
VIH
VIL
VIH
CS
TCSS
TCKH
TCKL
TCSH
CLK
DI
VIL
TDIS
TDIH
VIH
VIL
TCZ
TCZ
TPD
TPD
VOH
DO
(Read)
VOL
VOH
TSV
DO
(Program)
Status Valid
VOL
Note:
Status Valid Time (TSV) is relative to CS.
DS21929A-page 6
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
TABLE 2-3:
INSTRUCTION SET FOR 93XX46A/B/C
Req.
CLK
Instruction SB Opcode
Address
Data In Data Out
Cycles
93XX46B OR 93XX46C WITH ORG = 1
(16-BIT WORD ORGANIZATION)
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
9
9
1
0
1
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
9
High-Z
9
A5 A4 A3 A2 A1 A0
D15-D0
25
25
25
A5 A4 A3 A2 A1 A0 D15-D0 (RDY/BSY)
D15-D0 (RDY/BSY)
0
1
x
x
x
x
93XX46A OR 93XX46C WITH ORG = 0
(8-BIT WORD ORGANIZATION)
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
A6 A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
10
10
10
10
18
18
18
1
0
1
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A6 A5 A4 A3 A2 A1 A0
D7-D0
A6 A5 A4 A3 A2 A1 A0 D7-D0 (RDY/BSY)
D7-D0 (RDY/BSY)
0
1
x
x
x
x
x
TABLE 2-4:
INSTRUCTION SET FOR 93XX56A/B/C
Req.
CLK
Instruction SB Opcode
Address
Data In
Data Out
Cycles
93XX56B OR 93XX56C WITH ORG = 1
(16-BIT WORD ORGANIZATION)
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
x
1
0
1
x
x
0
A6 A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
11
11
11
11
27
27
27
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A6 A5 A4 A3 S2 A1 A0
D15-D0
A6 A5 A4 A3 S2 A1 A0 D15-D0 (RDY/BSY)
D15-D0 (RDY/BSY)
(8-BIT WORD ORGANIZATION)
A7 A6 A5 A4 A3 A2 A1 A0
1
x
x
x
x
x
x
93XX56A OR 93XX56C WITH ORG = 0
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
x
1
0
1
x
x
0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
12
12
12
12
20
20
20
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A7 A6 A5 A4 A3 A2 A1 A0
D7-D0
A7 A6 A5 A4 A3 A2 A1 A0 D7-D0 (RDY/BSY)
D7-D0 (RDY/BSY)
1
x
x
x
x
x
x
x
© 2005 Microchip Technology Inc.
DS21929A-page 7
93XX46X/56X/66X/76X/86X
TABLE 2-5:
INSTRUCTION SET FOR 93XX66A/B/C
Req.
CLK
Instruction SB Opcode
Address
Data In
Data Out
Cycles
93XX66B OR 93XX66C WITH ORG = 1
(16-BIT WORD ORGANIZATION)
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
A7 A6 A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
11
11
11
11
27
27
27
1
0
1
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A7 A6 A5 A4 A3 A2 A1 A0
D15-D0
A7 A6 A5 A4 A3 A2 A1 A0 D15-D0 (RDY/BSY)
D15-D0 (RDY/BSY)
(8-BIT WORD ORGANIZATION)
A8 A7 A6 A5 A4 A3 A2 A1 A0
0
1
x
x
x
x
x
x
93XX66A OR 93XX66C WITH ORG = 0
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
12
12
12
12
20
20
20
1
0
1
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A8 A7 A6 A5 A4 A3 A2 A1 A0
D7-D0
A8 A7 A6 A5 A4 A3 A2 A1 A0 D7-D0 (RDY/BSY)
D7-D0 (RDY/BSY)
0
1
x
x
x
x
x
x
x
TABLE 2-6:
INSTRUCTION SET FOR 93XX76A/B/C
Req.
CLK
Instruction SB Opcode
Address
Data In
Data Out
Cycles
93XX76B OR 93XX76C WITH ORG = 1
(16-BIT WORD ORGANIZATION)
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
x
1
0
1
x
x
0
A8 A7 A6 A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
13
13
13
13
29
29
29
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A8 A7 A6 A5 A4 A3 A2 A1 A0
D15-D0
A8 A7 A6 A5 A4 A3 A2 A1 A0 D15-D0 (RDY/BSY)
D15-D0 (RDY/BSY)
(8-BIT WORD ORGANIZATION)
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
1
x
x
x
x
x
x
x
x
93XX76A OR 93XX76C WITH ORG = 0
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
x
1
0
1
x
x
0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
14
14
14
14
22
22
22
0
1
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
D7-D0
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7-D0 (RDY/BSY)
D7-D0 (RDY/BSY)
1
x
x
x
x
x
x
x
x
x
DS21929A-page 8
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
TABLE 2-7:
INSTRUCTION SET FOR 93XX86A/B/C
Req.
CLK
Instruction SB Opcode
Address
Data In
Data Out
Cycles
93XX86B OR 93XX86C WITH ORG = 1
(16-BIT WORD ORGANIZATION)
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
13
13
13
13
29
29
29
1
0
1
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
D15-D0
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D15-D0 (RDY/BSY)
D15-D0 (RDY/BSY)
(8-BIT WORD ORGANIZATION)
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
0
1
x
x
x
x
x
x
x
x
93XX86A OR 93XX86C WITH ORG = 0
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
High-Z
14
14
14
14
22
22
22
1
0
1
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
High-Z
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
D7-D0
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7-D0 (RDY/BSY)
D7-D0 (RDY/BSY)
0
1
x
x
x
x
x
x
x
x
x
© 2005 Microchip Technology Inc.
DS21929A-page 9
93XX46X/56X/66X/76X/86X
3.3
Data Protection
3.0
FUNCTIONAL DESCRIPTION
All modes of operation are inhibited when VCC is below
a typical voltage of 1.5V for ‘93AAXX’ and ‘93LCXX’
devices or 3.8V for ‘93CXX’ devices.
When the ORG pin is connected to VCC, the (x16)
organization is selected. When it is connected to
ground, the (x8) organization is selected. Instruc-
tions, addresses and write data are clocked into the
DI pin on the rising edge of the clock (CLK). The DO
pin is normally held in a High-Z state except when
reading data from the device, or when checking the
Ready/Busy status during a programming operation.
The Ready/Busy status can be verified during an
Erase/Write operation by polling the DO pin; DO low
indicates that programming is still in progress, while
DO high indicates the device is ready. DO will enter
the High-Z state on the falling edge of CS.
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
Note:
For added protection, an EWDS command
should be performed after every write
operation and an external 10 kΩ pull-down
protection resistor should be added to the
CS pin.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWENinstruction must be
performed before the initial ERASEor WRITEinstruction
can be executed.
3.1
Start Condition
The Start bit is detected by the device if CS and DI are
both high with respect to the positive edge of CLK for
the first time.
Note:
To prevent accidental writes to the array in
the 93XX76C/86C devices, set the PE pin
to a logic low.
Before a Start condition is detected, CS, CLK and DI
may change in any combination (except to that of a
Start condition), without resulting in any device
operation (Read, Write, Erase, EWEN, EWDS, ERAL
or WRAL). As soon as CS is high, the device is no
longer in Standby mode.
Block Diagram
HV Generator
VCC
VSS
An instruction following a Start condition will only be
executed if the required opcode, address and data bits
for any particular instruction are clocked in.
Note:
When preparing to transmit an instruction,
either the CLK or DI signal levels must be
at a logic low as CS is toggled active high.
EEPROM
Array
Memory
Control
Logic
X
I/O Control
Logic
Dec
Byte Latches
Y Decoder
3.2
Data In/Data Out (DI/DO)
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the read operation, if A0 is a logic high
level. Under such a condition the voltage level seen at
Data Out is undefined and will depend upon the relative
impedances of Data Out and the signal source driving
A0. The higher the current sourcing capability of the
driver, the higher the voltage at the Data Out pin. In
order to limit this current, a resistor should be
connected between DI and DO.
DI
DO
CS
CLK
Sense Amp.
R/W Control
ORG*
PE**
DS21929A-page 10
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
3.4
ERASE
The ERASE instruction forces all data bits of the
specified address to the logical ‘1’ state. CS is brought
low following the loading of the last address bit. This
falling edge of the CS pin initiates the self-timed
programming cycle, except on ‘93CXX’ devices where
the rising edge of CLK before the last address bit ini-
tiates the write cycle.
Note:
After the Erase cycle is complete, issuing
a Start bit and then taking CS low will clear
the Ready/Busy status from DO.
FIGURE 3-1:
ERASE TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
Check Status
CS
CLK
DI
1
1
1
AN
AN-1 AN-2
A0
•••
TSV
BUSY
TCZ
High-Z
DO
Ready
High-Z
TWC
FIGURE 3-2:
ERASE TIMING FOR 93CXX DEVICES
TCSL
Check Status
CS
CLK
1
1
1
AN
AN-1 AN-2
A0
•••
DI
TSV
TCZ
High-Z
DO
Busy
Ready
High-Z
TWC
© 2005 Microchip Technology Inc.
DS21929A-page 11
93XX46X/56X/66X/76X/86X
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL).
3.5
ERASE ALL (ERAL)
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle is
identical to the Erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93CXX’ devices where the rising edge of CLK before
the last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
VCC must be ≥ 4.5V for proper operation of ERAL.
Note:
After the ERAL command is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
FIGURE 3-3:
ERAL TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
Check Status
CS
CLK
DI
1
0
0
1
0
X
X
•••
TSV
TCZ
High-Z
DO
Busy
Ready
High-Z
TEC
Vcc must be ≥ 4.5V for proper operation of ERAL.
FIGURE 3-4:
ERAL TIMING FOR 93CXX DEVICES
TCSL
CS
Check Status
CLK
1
0
0
1
0
X
X
•••
DI
TSV
TCZ
High-Z
DO
Busy
Ready
High-Z
TEC
DS21929A-page 12
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
3.6
ERASE/WRITE DISABLE And
ENABLE (EWDS/EWEN)
The 93XX series devices power-up in the Erase/Write
Disable (EWDS) state. All programming modes must be
preceded by an Erase/Write Enable (EWEN) instruction.
Once the EWEN instruction is executed, programming
remains enabled until an EWDSinstruction is executed
or VCC is removed from the device.
To protect against accidental data disturbance, the
EWDSinstruction can be used to disable all Erase/Write
functions and should follow all programming
operations. Execution of
a READ instruction is
independent of both the EWENand EWDSinstructions.
FIGURE 3-5:
EWDS TIMING
TCSL
CS
CLK
•••
1
0
0
0
0
X
X
DI
FIGURE 3-6:
EWEN TIMING
TCSL
CS
CLK
•••
1
0
0
1
1
X
X
DI
© 2005 Microchip Technology Inc.
DS21929A-page 13
93XX46X/56X/66X/76X/86X
3.7
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the spec-
ified time delay (TPD). Sequential read is possible when
CS is held high. The memory data will automatically cycle
to the next register and output sequentially.
FIGURE 3-7:
READ TIMING
CS
CLK
DI
An
•••
1
1
0
A0
High-Z
DO
0
Dx
D0
Dx
D0
Dx
D0
•••
•••
•••
DS21929A-page 14
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
3.8
WRITE
The WRITEinstruction is followed by 8 bits (If ORG is
low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AAXX and 93LCXX devices,
after the last data bit is clocked into DI, the falling edge
of CS initiates the self-timed auto-erase and program-
ming cycle. For 93CXX devices, the self-timed auto-
erase and programming cycle is initiated by the rising
edge of CLK on the last data bit.
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
Note:
Note:
For devices with PE functionality such as
the 93XX76C or 93XX86C, the write
sequence requires a logic low signal on
the PE pin prior to the rising edge of the
last data bit.
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/Busy status from DO.
FIGURE 3-8:
WRITE TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
CS
CLK
0
1
1
An
A0
Dx
D0
•••
•••
DI
TSV
TCZ
High-Z
DO
Busy
Ready
High-Z
Twc
FIGURE 3-9:
WRITE TIMING FOR 93CXX DEVICES
TCSL
CS
CLK
DI
0
1
1
An
A0
Dx
D0
•••
•••
TSV
TCZ
High-Z
Busy
Ready
DO
High-Z
Twc
© 2005 Microchip Technology Inc.
DS21929A-page 15
93XX46X/56X/66X/76X/86X
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL).
3.9
WRITE ALL (WRAL)
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
For 93AAXX and 93LCXX devices, after the last data
bit is clocked into DI, the falling edge of CS initiates the
self-timed auto-erase and programming cycle. For
93CXX devices, the self-timed auto-erase and pro-
gramming cycle is initiated by the rising edge of CLK on
the last data bit. Clocking of the CLK pin is not neces-
sary after the device has entered the WRAL cycle. The
WRAL command does include an automatic ERAL
cycle for the device. Therefore, the WRAL instruction
does not require an ERALinstruction, but the chip must
be in the EWEN status.
VCC must be ≥ 4.5V for proper operation of WRAL.
Note:
For devices with PE functionality such as
the 93XX76C or 93XX86C, the write
sequence requires a logic low signal on
the PE pin prior to the rising edge of the
last data bit.
Note:
After the Write All cycle is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
FIGURE 3-10:
WRAL TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
CS
CLK
0
0
1
X
1
0
•••
Dx
•••
X
D0
DI
TSV
TCZ
High-Z
Busy
DO
Ready
HIGH-Z
TWL
VCC must be ≥ 4.5V for proper operation of WRAL.
FIGURE 3-11:
WRAL TIMING FOR 93CXX DEVICES
TCSL
CS
CLK
0
0
1
X
1
0
•••
Dx
•••
DI
X
D0
TSV
TCZ
High-Z
Busy
DO
Ready
HIGH-Z
TWL
DS21929A-page 16
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
4.0
PIN DESCRIPTIONS
TABLE 4-1:
Name
PIN DESCRIPTIONS
SOIC/PDIP/MSOP/
TSSOP/DFN
SOT-23
Function
CS
CLK
DI
1
2
3
4
5
5
4
3
1
2
Chip Select
Serial Clock
Data In
DO
Data Out
Ground
VSS
ORG
NC(1)
PE
Organization (93XX46C/56C/66C/76C/86C)
No connect on 93XXA/B devices
Program Enable (93XX76C/86C)
No connect on 93XXA/B devices
Power Supply
6
N/A
7
8
N/A
6
NC(1)
VCC
Note 1: With no internal connection, logic levels on NC pins are “don’t cares.”
After detection of a Start condition the specified number
4.1
Chip Select (CS)
of clock cycles (respectively low-to-high transitions of
CLK) must be provided. These clock cycles are
required to clock in all required opcode, address and
data bits before an instruction is executed. CLK and DI
then become “don't care” inputs waiting for a new Start
condition to be detected.
A high level selects the device; a low level deselects
the device and forces it into Standby mode. However, a
programming cycle which is already in progress will be
completed, regardless of the Chip Select (CS) input
signal. If CS is brought low during a program cycle, the
device will go into Standby mode as soon as the
programming cycle is completed.
4.3
Data In (DI)
CS must be low for 250 ns minimum (TCSL) between
consecutive instructions. If CS is low, the internal
control logic is held in a Reset status.
Data In (DI) is used to clock in a Start bit, opcode,
address and data synchronously with the CLK input.
4.4
Data Out (DO)
4.2
Serial Clock (CLK)
Data Out (DO) is used in the Read mode to output data
synchronously with the CLK input (TPD after the
positive edge of CLK).
The Serial Clock is used to synchronize the communi-
cation between a master device and the 93XX series
device. Opcodes, address and data bits are clocked in
on the positive edge of CLK. Data bits are also clocked
out on the positive edge of CLK.
This pin also provides Ready/Busy status information
during Erase and Write cycles. Ready/Busy status
information is available on the DO pin if CS is brought
high after being low for minimum Chip Select Low Time
(TCSL) and an erase or write operation has been
initiated.
CLK can be stopped anywhere in the transmission
sequence (at high or low level) and can be continued
anytime with respect to Clock High Time (TCKH) and
Clock Low Time (TCKL). This gives the controlling mas-
ter freedom in preparing opcode, address and data.
The Status signal is not available on DO, if CS is held
low during the entire Erase or Write cycle. In this case,
DO is in the High-Z mode. If status is checked after the
Erase/Write cycle, the data line will be high to indicate
the device is ready.
CLK is a “don't care” if CS is low (device deselected). If
CS is high, but the Start condition has not been
detected (DI = 0), any number of clock cycles can be
received by the device without changing its status (i.e.,
waiting for a Start condition).
Note:
After the Read cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/Busy status from DO.
CLK cycles are not required during the self-timed Write
(i.e., auto Erase/Write) cycle.
© 2005 Microchip Technology Inc.
DS21929A-page 17
93XX46X/56X/66X/76X/86X
4.5
Organization (ORG)
4.6
Program Enable (PE)
When the ORG pin is connected to VCC or Logic HI, the
(x16) memory organization is selected. When the ORG
pin is tied to VSS or Logic LO, the (x8) memory
organization is selected. For proper operation, ORG
must be tied to a valid logic level.
A logic level on the PE pin will enable or disable the
ability to write data to the memory array in only the 8-
lead 93XX76C and 93XX86C devices. For all other
devices the PE function is not present and the PE pin
is a no connect. When driving the PE pin to a logic
High, the device can be programmed, but when the PE
pin is driven Low, programming is inhibited. This pin is
used in parallel with the EWEN/EWDS latch to protect
the memory array from inadvertent writes, as shown in
Table 4-2.
For devices without the ORG functionality, there is no
internal connection to the ORG pin. In these devices
the functionality has been set at the factory to support
a single word size.
‘A’ series devices – x8 organization
‘B’ series devices – x16 organization
In either the 93XX76C or 93XX86C devices, the PE pin
must be tied to a specific logic level and cannot be
floated. In all other devices without the PE function, the
PE pin has no internal connections and programming is
always enabled.
TABLE 4-2:
WRITE PROTECTION SCHEME
EWEN/EWDS Latch
PE Pin*
Array WRITE
Enabled
Disabled
Enabled
Disabled
1
1
0
0
Yes
No
No
No
* PE pin level does not alter the state of the EWEN/EWDS latch.
Note:
For logic control, the PE pin must be driven high before the Chip Select enables the device and must
remain high until the Chip Select is disabled.
DS21929A-page 18
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
APPENDIX A: REVISION HISTORY
Revision A
Original release of document. Combined all the 93-Series
Microwire Serial EEPROM device data sheets.
© 2005 Microchip Technology Inc.
DS21929A-page 19
93XX46X/56X/66X/76X/86X
5.0
5.1
PACKAGING INFORMATION
Package Marking Information
Example: Pb-free
Example: Sn/Pb
8-Lead PDIP
93LC46A
I/P IL7
93LC46A
I/P 1L7
XXXXXXXX
TXXXXNNN
e
3
0528
0528
YYWW
3-Wire 8-Lead PDIP Package Marking (Pb-free or Sn/Pb)
Part
93AA46A
Line 1 Marking
Part
93LC46A
Line 1 Marking
Part
93C46A
Line 1 Marking
93AA46A
93AA46B
93AA46C
93AA56A
93AA56B
93AA56C
93AA66A
93AA66B
93AA66C
93AA76A
93AA76B
93AA76C
93AA86A
93AA86B
93AA86C
93LC46A
93LC46B
93LC46C
93LC56A
93LC56B
93LC56C
93LC66A
93LC66B
93LC66C
93LC76A
93LC76B
93LC76C
93LC86A
93LC86B
93LC86C
93C46A
93C46B
93C46C
93C56A
93C56B
93C56C
93C66A
93C66B
93C66C
93C76A
93C76B
93C76C
93C86A
93C86B
93C86C
93AA46B
93AA46C
93AA56A
93AA56B
93AA56C
93AA66A
93AA66B
93AA66C
93AA76A
93AA76B
93AA76C
93AA86A
93AA86B
93AA86C
Note:
93LC46B
93LC46C
93LC56A
93LC56B
93LC56C
93LC66A
93LC66B
93LC66C
93LC76A
93LC76B
93LC76C
93LC86A
93LC86B
93LC86C
93C46B
93C46C
93C56A
93C56B
93C56C
93C66A
93C66B
93C66C
93C76A
93C76B
93C76C
93C86A
93C86B
93C86C
Temperature range on second line.
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
YY
WW
NNN
e
3
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
DS21929A-page 20
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
Example: Pb-free
8-Lead SOIC
Example: Sn/Pb
93LC46AI
XXXXXXXT
XXXXYYWW
93LC46A
I/SN 0528
SN
0528
e
3
1L7
NNN
1L7
3-Wire 8-Lead SOIC (SN) Package Marking (Pb-free or Sn/Pb)
Part
93AA46A
Line 1 Marking
Part
Line 1 Marking
Part
93C46A
Line 1 Marking
93AA46AT
93AA46BT
93AA46CT
93AA56AT
93AA56BT
93AA56CT
93AA66AT
93AA66BT
93AA66CT
93AA76AT
93AA76BT
93AA76CT
93AA86AT
93AA86BT
93AA86CT
93LC46A
93LC46B
93LC46C
93LC56A
93LC56B
93LC56C
93LC66A
93LC66B
93LC66C
93LC76A
93LC76B
93LC76C
93LC86A
93LC86B
93LC86C
93LC46AT
93LC46BT
93LC46CT
93LC56AT
93LC56BT
93LC56CT
93LC66AT
93LC66BT
93LC66CT
93LC76AT
93LC76BT
93LC76CT
93LC86AT
93LC86BT
93LC86CT
93C46AT
93C46BT
93C46CT
93C56AT
93C56BT
93C56CT
93C66AT
93C66BT
93C66CT
93C76AT
93C76BT
93C76CT
93C86AT
93C86BT
93C86CT
93AA46B
93AA46C
93AA56A
93AA56B
93AA56C
93AA66A
93AA66B
93AA66C
93AA76A
93AA76B
93AA76C
93AA86A
93AA86B
93AA86C
Note:
93C46B
93C46C
93C56A
93C56B
93C56C
93C66A
93C66B
93C66C
93C76A
93C76B
93C76C
93C86A
93C86B
93C86C
T = Temperature Range: I = Industrial, E = Extended
Note:
For Sn/Pb devices the temperature range appears on the second line.
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
YY
WW
NNN
e
3
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
© 2005 Microchip Technology Inc.
DS21929A-page 21
93XX46X/56X/66X/76X/86X
Example:
8-Lead 2x3 DFN
304
506
L7
XXX
YWW
NN
3-Wire 2x3 DFN Package Marking (Pb-free)
Industrial
Line 1
E-Temp
Line 1
Industrial
Line 1
E-Temp
Line 1
Industrial E-Temp
Part
Part
Part
Line 1
Line 1
Marking
Marking
Marking
Marking
Marking
Marking
93AA46A
93AA46B
93AA46C
301
311
321
302
312
322
93LC46A
93LC46B
93LC46C
304
314
324
305
315
325
93C46A
93C46B
93C46C
307
317
327
308
318
328
93AA56A
93AA56B
93AA56C
331
341
351
332
342
352
93LC56A
93LC56B
93LC56C
334
344
354
335
345
355
93C56A
93C56B
93C56C
337
347
357
338
348
358
93AA66A
93AA66B
93AA66C
361
371
381
362
372
382
93LC66A
93LC66B
93LC66C
364
374
384
365
375
385
93C66A
93C66B
93C66C
367
377
387
368
378
388
93AA76C
93AA86C
3B1
3E1
3B2
3E2
93LC76C
93LC86C
3B4
3E4
3B5
3E5
93C76C
93C86C
3B7
3E7
3B8
3E8
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
YY
WW
NNN
e
3
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
DS21929A-page 22
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
Example: Pb-free
6-Lead SOT-23
XXNN
1EL7
3-Wire 6-Lead SOT-23 Package Marking (Pb-free)
Industrial
Line 1
E-Temp
Line 1
Industrial
Line 1
E-Temp
Line 1
Industrial E-Temp
Part
Part
Part
Line 1
Line 1
Marking
Marking
Marking
Marking
Marking
Marking
93AA46A
93AA46B
1BNN
1LNN
1CNN
1MNN
93LC46A
93LC46B
1ENN
1PNN
1FNN
1RNN
93C46A
93C46B
1HNN
1TNN
1JNN
1UNN
93AA56A
93AA56B
2BNN
2LNN
2CNN
2MNN
93LC56A
93LC56B
2ENN
2PNN
2FNN
2RNN
93C56A
93C56B
2HNN
2TNN
2JNN
2UNN
93AA66A
93AA66B
3BNN
3LNN
3CNN
3MNN
93LC66A
93LC66B
3ENN
3PNN
3FNN
3RNN
93C66A
93C66B
3HNN
3TNN
3JNN
3UNN
93AA76A
93AA76B
4BNN
4LNN
4CNN
4MNN
93LC76A
93LC76B
4ENN
4PNN
4FNN
4RNN
93C76A
93C76B
4HNN
4TNN
4JNN
4UNN
93AA86A
93AA86B
5BNN
5LNN
5CNN
5MNN
93LC86A
93LC86B
5ENN
5PNN
5FNN
5RNN
93C86A
93C86B
5HNN
5TNN
5JNN
5UNN
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
YY
WW
NNN
e
3
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
© 2005 Microchip Technology Inc.
DS21929A-page 23
93XX46X/56X/66X/76X/86X
8-Lead MSOP (150 mil)
Example: Pb-free or Sn/Pb
3L46AI
5281L7
XXXXXXT
YWWNNN
3-Wire 8-Lead MSOP Package Marking (Pb-free or Sn/Pb)
Part
93AA46A
Line 1 Marking
Part
Line 1 Marking
Part
93C46A
Line 1 Marking
3A46AT
3A46BT
3A46CT
3A56AT
3A56BT
3A56CT
3A66AT
3A66BT
3A66CT
3A76AT
3A76BT
3A76CT
3A86AT
3A86BT
3A86CT
93LC46A
93LC46B
93LC46C
93LC56A
93LC56B
93LC56C
93LC66A
93LC66B
93LC66C
93LC76A
93LC76B
93LC76C
93LC86A
93LC86B
93LC86C
3L46AT
3L46BT
3L46CT
3L56AT
3L56BT
3L56CT
3L66AT
3L66BT
3L66CT
3L76AT
3L76BT
3L76CT
3L86AT
3L86BT
3L86CT
3C46AT
3C46BT
3C46CT
3C56AT
3C56BT
3C56CT
3C66AT
3C66BT
3C66CT
3C76AT
3C76BT
3C76CT
3C86AT
3C86BT
3C86CT
93AA46B
93AA46C
93AA56A
93AA56B
93AA56C
93AA66A
93AA66B
93AA66C
93AA76A
93AA76B
93AA76C
93AA86A
93AA86B
93AA86C
Note:
93C46B
93C46C
93C56A
93C56B
93C56C
93C66A
93C66B
93C66C
93C76A
93C76B
93C76C
93C86A
93C86B
93C86C
T = Temperature Range: I = Industrial, E = Extended
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
YY
WW
NNN
e
3
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
DS21929A-page 24
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
Example: Pb-free or Sn/Pb
8-Lead TSSOP
L46A
I528
1L7
XXXX
TYWW
NNN
3-Wire 8-Lead TSSOP Package Marking (Pb-free or Sn/Pb)
Part
93AA46A
Line 1 Marking
Part
Line 1 Marking
Part
93C46A
Line 1 Marking
A46A
A46B
A46C
A56A
A56B
A56C
A66A
A66B
A66C
A76A
A76B
A76C
A86A
A86B
A86C
93LC46A
93LC46B
93LC46C
93LC56A
93LC56B
93LC56C
93LC66A
93LC66B
93LC66C
93LC76A
93LC76B
93LC76C
93LC86A
93LC86B
93LC86C
L46A
L46B
L46C
L56A
L56B
L56C
L66A
L66B
L66C
L76A
L76B
L76C
L86A
L86B
L86C
C46A
C46B
C46C
C56A
C56B
C56C
C66A
C66B
C66C
C76A
C76B
C76C
C86A
C86B
C86C
93AA46B
93AA46C
93AA56A
93AA56B
93AA56C
93AA66A
93AA66B
93AA66C
93AA76A
93AA76B
93AA76C
93AA86A
93AA86B
93AA86C
Note:
93C46B
93C46C
93C56A
93C56B
93C56C
93C66A
93C66B
93C66C
93C76A
93C76B
93C76C
93C86A
93C86B
93C86C
Temperature range on second line.
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
YY
WW
NNN
e
3
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
© 2005 Microchip Technology Inc.
DS21929A-page 25
93XX46X/56X/66X/76X/86X
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.100
.155
.130
2.54
Top to Seating Plane
A
.140
.170
3.56
2.92
3.94
3.30
4.32
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A2
A1
E
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
.145
3.68
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.373
.130
.012
.058
.018
.370
10
.325
.260
.385
.135
.015
.070
.022
.430
15
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
E1
D
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
B1
B
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
§
eB
α
β
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21929A-page 26
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
1
B
n
h
α
45°
c
A2
A
φ
β
L
A1
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
1.27
Overall Height
A
.053
.069
1.35
1.32
1.55
1.42
0.18
6.02
3.91
4.90
0.38
0.62
4
1.75
Molded Package Thickness
Standoff
A2
A1
E
.052
.004
.228
.146
.189
.010
.019
0
.061
.010
.244
.157
.197
.020
.030
8
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
§
0.10
5.79
3.71
4.80
0.25
0.48
0
Overall Width
Molded Package Width
Overall Length
E1
D
Chamfer Distance
Foot Length
h
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.008
.013
0
.009
.017
12
.010
.020
15
0.20
0.33
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
© 2005 Microchip Technology Inc.
DS21929A-page 27
93XX46X/56X/66X/76X/86X
8-Lead Plastic Dual Flat No Lead Package (MC) 2x3x0.9 mm Body (DFN) – Saw Singulated
p
D
b
n
L
E
E2
EXPOSED
METAL
PAD
2
1
PIN 1
ID INDEX
AREA
D2
(NOTE 2)
BOTTOM VIEW
TOP VIEW
A
A1
A3
EXPOSED
TIE BAR
(NOTE 1)
Units
Dimension Limits
INCHES
NOM
8
MILLIMETERS*
NOM
MIN
MAX
MIN
MAX
n
p
Number of Pins
Pitch
8
.020 BSC
0.50 BSC
0.90
Overall Height
Standoff
A
A1
A3
D
.031
.035
.001
.008 REF.
.039
.002
0.80
0.00
1.00
.000
0.02
0.05
Contact Thickness
Overall Length
0.20 REF.
2.00 BSC
--
.079 BSC
--
(Note 3)
Exposed Pad Length
Overall Width
D2
E
.055
.064
1.39
1.62
.118 BSC
--
3.00 BSC
--
(Note 3)
Exposed Pad Width
Contact Width
E2
b
.047
.008
.012
.071
.012
.020
1.20
0.20
0.30
1.80
0.30
0.50
.010
0.25
Contact Length
L
.016
0.40
*Controlling Parameter
Notes:
1. Package may have one or more exposed tie bars at ends.
2. Pin 1 visual index feature may vary, but must be located within the hatched area.
3. Exposed pad dimensions vary with paddle size.
4. JEDEC equivalent: MO-229
Drawing No. C04-123
Revised 05/24/04
DS21929A-page 28
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
6-Lead Plastic Small Outline Transistor (OT) (SOT-23)
E
E1
B
p1
D
n
1
α
c
A
A2
φ
A1
L
β
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
6
MAX
n
p
Number of Pins
Pitch
6
.038
.075
.046
.043
.003
.110
.064
.116
.018
5
0.95
1.90
p1
Outside lead pitch (basic)
Overall Height
A
A2
A1
E
.035
.057
0.90
0.90
1.18
1.10
0.08
2.80
1.63
2.95
0.45
5
1.45
1.30
0.15
3.00
1.75
3.10
0.55
10
Molded Package Thickness
Standoff
.035
.000
.102
.059
.110
.014
0
.051
.006
.118
.069
.122
.022
10
0.00
2.60
1.50
2.80
0.35
0
Overall Width
Molded Package Width
Overall Length
Foot Length
E1
D
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.004
.014
0
.006
.017
5
.008
.020
10
0.09
0.35
0
0.15
0.43
5
0.20
0.50
10
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
0
5
10
0
5
10
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .005" (0.127mm) per side.
JEITA (formerly EIAJ) equivalent: SC-74A
Drawing No. C04-120
© 2005 Microchip Technology Inc.
DS21929A-page 29
93XX46X/56X/66X/76X/86X
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Dimension Limits
INCHES
NOM
MILLIMETERS*
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.026 BSC
0.65 BSC
Overall Height
A
A2
A1
E
-
-
.043
-
-
0.85
-
1.10
Molded Package Thickness
Standoff
.030
.033
.037
0.75
0.95
0.15
.000
-
.006
0.00
Overall Width
.193 TYP.
4.90 BSC
Molded Package Width
Overall Length
Foot Length
E1
D
.118 BSC
.118 BSC
3.00 BSC
3.00 BSC
L
.016
.024
.037 REF
.031
0.40
0.60
0.95 REF
0.80
Footprint (Reference)
Foot Angle
F
φ
c
0°
.003
.009
5°
-
8°
.009
.016
15°
0°
0.08
0.22
5°
-
-
-
-
-
8°
0.23
0.40
15°
Lead Thickness
Lead Width
.006
B
α
β
.012
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
-
-
5°
15°
5°
15°
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
JEDEC Equivalent: MO-187
Drawing No. C04-111
DS21929A-page 30
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
A1
A2
φ
β
L
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.026
0.65
Overall Height
A
.043
1.10
0.95
0.15
6.50
4.50
3.10
0.70
8
Molded Package Thickness
Standoff
A2
A1
E
.033
.035
.004
.251
.173
.118
.024
4
.037
.006
.256
.177
.122
.028
8
0.85
0.05
0.90
0.10
6.38
4.40
3.00
0.60
4
§
.002
.246
.169
.114
.020
0
Overall Width
6.25
4.30
2.90
0.50
0
Molded Package Width
Molded Package Length
Foot Length
E1
D
L
φ
Foot Angle
c
Lead Thickness
.004
.007
0
.006
.010
5
.008
.012
10
0.09
0.19
0
0.15
0.25
5
0.20
0.30
10
Lead Width
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
© 2005 Microchip Technology Inc.
DS21929A-page 31
93XX46X/56X/66X/76X/86X
NOTES:
DS21929A-page 32
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• Development Systems Information Line
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
Technical support is available through the web site
at: http://support.microchip.com
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
In addition, there is
a
Development Systems
Information Line which lists the latest versions of
Microchip’s development systems software products.
This line also provides information on how customers
can receive currently available upgrade kits.
The Development Systems Information Line
numbers are:
CUSTOMER CHANGE NOTIFICATION
SERVICE
1-800-755-2345 – United States and most of Canada
1-480-792-7302 – Other International Locations
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com, click on Customer Change
Notification and follow the registration instructions.
© 2005 Microchip Technology Inc.
DS21929A-page 33
93XX46X/56X/66X/76X/86X
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
Reader Response
Total Pages Sent ________
RE:
From:
Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
93XX46X/56X/66X/76X/86X
DS21929A
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21929A-page 34
© 2005 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Tape &
Reel
Temp
Range
EEPROM
Series
Word
Size
Voltage
Density
Package
Lead Finish
93
AA = 1.8V-5.5V
LC = 2.5V-5.5V
C = 4.5V-5.5V
46 = 1 Kbit
56 = 2 Kbit
66 = 4 Kbit
76 = 8 Kbit
86 = 16 Kbit
A = x8 bit
B = x16 bit
C = Selectable
Blank = Std Pkg
T = Tape & Reel
I = -40°C to +85°C
E = -40°C to +125°C
P = 8-Lead PDIP
SN = 8-Lead SOIC (.150)
MC = 8-Lead 2x3 DFN
OT = 6-Lead SOT-23
MS = 8-Lead MSOP
ST = 8-Lead TSSOP
Examples:
a)
93AA46A-I/MS: 1K, 128x8 Serial EEPROM,
Industrial Temperature, MSOP package, 1.8V
Blank = Pb-Free – Matte Tin (see Note 1)
b)
93AA46BT-I/OT: 1K, 64x16 Serial EEPROM,
SOT-23 package, tape and reel, 1.8V
G = Pb-Free – Matte Tin only
c)
d)
93AA46CT-I/MS: 1K, 128x8 or 64x16 Serial
EEPROM, MSOP package, tape and reel, 1.8V
93AA46BX-I/SN: 1K, 128x8 Serial EEPROM,
Industrial temperature, SOIC package (alter-
nate pinout), tape and reel package, 1.8V
e)
f)
93LC66A-I/MS: 4K, 512x8 Serial EEPROM,
MSOP package, 2.5V
93LC66BT-I/OT: 4K, 256x16 Serial EEPROM,
SOT-23 package, tape and reel, 2.5V
g)
93LC66CT-E/SNG: 4K, 512x8 or 256x16 Serial
EEPROM, SOIC package, Extended tempera-
ture, tape and reel, Pb-free finish, 2.5V
h)
i)
93C86AT-I/OT: 16K, 2048x8 Serial EEPROM,
SOT-23 package, tape and reel, 5.0V
93C86BT-I/OT: 16K, 1024x16 Serial EEPROM,
SOT-23 package, tape and reel, 5.0V
j)
93C86CT-I/MC: 16K, 2048x8 or 1024x16
Serial EEPROM, DFN Industrial temperature,
tape and reel package, 5.0V
Note 1: Most products manufactured after January 2005 will have a Matte Tin (Pb-free) finish.
Most products manufactured before January 2005 will have a finish of approximately 63% Sn and 37% Pb (Sn/Pb).
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion, including conversion date
codes.
© 2005 Microchip Technology Inc.
DS21929A-page 35
93XX46X/56X/66X/76X/86X
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences
and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of
the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
DS21929A-page 36
© 2005 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,
MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,
PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel, Total
Endurance and WiperLock are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2005 Microchip Technology Inc.
DS21929A-page 37
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
India - Bangalore
Tel: 91-80-2229-0061
Fax: 91-80-2229-0062
Austria - Weis
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Denmark - Ballerup
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-5160-8631
Fax: 91-11-5160-8632
China - Chengdu
Tel: 86-28-8676-6200
Fax: 86-28-8676-6599
France - Massy
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Kanagawa
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Atlanta
China - Fuzhou
Tel: 86-591-8750-3506
Fax: 86-591-8750-3521
Germany - Ismaning
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Korea - Seoul
Alpharetta, GA
Tel: 770-640-0034
Fax: 770-640-0307
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Boston
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
England - Berkshire
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Dallas
Addison, TX
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Tel: 972-818-7423
Fax: 972-818-2924
Taiwan - Hsinchu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
China - Shunde
Detroit
Tel: 86-757-2839-5507
Fax: 86-757-2839-5571
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Qingdao
Tel: 86-532-502-7355
Fax: 86-532-502-7205
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
San Jose
Mountain View, CA
Tel: 650-215-1444
Fax: 650-961-0286
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
03/01/05
DS21929A-page 38
© 2005 Microchip Technology Inc.
93LC66A-TI/ST 相关器件
型号 | 制造商 | 描述 | 价格 | 文档 |
93LC66A-TI/STG | MICROCHIP | 512 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8, 4.40 MM, LEAD FREE, PLASTIC, MO-153, TSSOP-8 | 获取价格 | |
93LC66A/P | MICROCHIP | IC-4K BIT SERIAL EEPROM | 获取价格 | |
93LC66A/PRVA | MICROCHIP | EEPROM, 512X8, Serial, CMOS, PDIP8 | 获取价格 | |
93LC66A/SM | MICROCHIP | 512 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8, 0.208 INCH, PLASTIC, SOIC-8 | 获取价格 | |
93LC66A/SMRVA | MICROCHIP | EEPROM, 512X8, Serial, CMOS, PDSO8 | 获取价格 | |
93LC66A/SN | MICROCHIP | 512 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8, 0.150 INCH, PLASTIC, SOIC-8 | 获取价格 | |
93LC66A/SNRVA | MICROCHIP | EEPROM, 512X8, Serial, CMOS, PDSO8 | 获取价格 | |
93LC66A/ST | MICROCHIP | 512 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8, TSSOP-8 | 获取价格 | |
93LC66A/STRVA | MICROCHIP | 暂无描述 | 获取价格 | |
93LC66AB | MICROCHIP | 4K 2.5V Microwire Serial EEPROM | 获取价格 |
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