AT25640B-SSHL-T-899_技术文档

AT25320B/AT25640B

SPI Serial EEPROM 32 Kbits (4,096 x 8)

and 64 Kbits (8,192 x 8)

Features

•

Serial Peripheral Interface (SPI) Compatible

Supports SPI Modes 0 (0,0) and 3 (1,1):

Data sheet describes mode 0 operation

Low-Voltage and Standard-Voltage Operation:

1.8V (V_CC= 1.8V to 5.5V)

–

•

–

•

Industrial Temperature Range -40°C to +85°C

20 MHz Clock Rate (5V)

32-Byte Page Mode

Block Write Protection:

–

Protect 1/4, 1/2 or entire array

•

Write-Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data

Protection

•

Self-Timed Write Cycle (5 ms Maximum)

High Reliability:

–

Endurance: 1,000,000 write cycles

Data retention: 100 years

•

Green (Pb/Halide-free/RoHS Compliant) Packaging Options

Die Sales: Wafer Form and Bumped Wafers

Packages

•

8-Lead SOIC, 8-Lead TSSOP, 8-Pad UDFN, 8-Ball VFBGA and 8-Pad XDFN

DS20005993A-page 1

AT25320B/AT25640B

Table of Contents

Features.......................................................................................................................... 1

Packages.........................................................................................................................1

1. Package Types (not to scale).................................................................................... 4

2. Pin Description.......................................................................................................... 5

2.1. Chip Select (CS)...........................................................................................................................5

2.2. Serial Data Output (SO)............................................................................................................... 5

2.3. Write-Protect (WP)....................................................................................................................... 5

2.4. Ground (GND)..............................................................................................................................6

2.5. Serial Data Input (SI)....................................................................................................................6

2.6. Serial Data Clock (SCK)...............................................................................................................6

2.7. Suspends Serial Input (HOLD).....................................................................................................6

2.8. Device Power Supply (V_CC)......................................................................................................... 6

3. Description.................................................................................................................7

3.1. Block Diagram..............................................................................................................................7

4. Electrical Characteristics........................................................................................... 8

4.1. Absolute Maximum Ratings..........................................................................................................8

4.2. DC and AC Operating Range.......................................................................................................8

4.3. DC Characteristics....................................................................................................................... 8

4.4. AC Characteristics........................................................................................................................9

4.5. Electrical Specifications..............................................................................................................11

5. Serial Interface Description..................................................................................... 13

6. Functional Description.............................................................................................14

7. Timing Diagrams......................................................................................................17

8. Packaging Information.............................................................................................20

8.1. Package Marking Information.....................................................................................................20

9. Revision History.......................................................................................................31

The Microchip Web Site................................................................................................ 32

Customer Change Notification Service..........................................................................32

Customer Support......................................................................................................... 32

Product Identification System........................................................................................33

Microchip Devices Code Protection Feature................................................................. 34

DS20005993A-page 2

AT25320B/AT25640B

Legal Notice...................................................................................................................34

Trademarks................................................................................................................... 34

Quality Management System Certified by DNV.............................................................35

Worldwide Sales and Service........................................................................................36

DS20005993A-page 3

AT25320B/AT25640B

Package Types (not to scale)

1.

Package Types (not to scale)

8-Lead SOIC/TSSOP

(Top View)

8-Pad UDFN/XDFN

(Top View)

CS

1

2

8

7

V_CC

CS

V_CC

1

2

3

4

8

7

6

5

SO

WP

HOLD

SCK

SI

SO

WP

HOLD

SCK

SI

3

4

6

5

GND

8-Ball VFBGA

(Top View)

1

2

3

4

8

7

6

5

V_CC

CS

HOLD

SCK

SI

SO

WP

GND

DS20005993A-page 4

AT25320B/AT25640B

Pin Description

2.

Pin Description

The descriptions of the pins are listed in Table 2-1.

Table 2-1.ꢀPin Function Table

Name

8-Lead

SOIC

8-Lead

8-Pad

XDFN

8-Ball Function

VFBGA

TSSOP UDFN⁽¹⁾

CS

SO

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

Chip Select

Serial Data Output

Write-Protect

WP⁽²⁾

GND

SI

Ground

Serial Data Input

Serial Data Clock

Suspends Serial Input

Device Power Supply

SCK

HOLD⁽²⁾

V_CC

Note:ꢀ

1. The exposed pad on this package can be connected to GND or left floating.

2. The Write-Protect (WP) and Hold (HOLD) pins should be driven high or low as appropriate.

2.1

Chip Select (CS)

The AT25320B/AT25640B is selected when the CS pin is low. When the device is not selected, data will

not be accepted via the SI pin, and the Serial Output (SO) pin will remain in a high-impedance state.

To ensure robust operation, the Chip Select (CS) pin should follow V_CCupon power-up. It is therefore

recommended to connect CS to V_CCusing a pull-up resistor (less than or equal to 10 kΩ). After power-up,

a low level on CS is required prior to any sequence being initiated.

2.2

2.3

Serial Data Output (SO)

The Serial Data Output (SO) pin is used to transfer data out of the AT25320B/AT25640B. During a read

sequence, data is shifted out on this pin after the falling edge of the serial clock.

Write-Protect (WP)

The Write-Protect (WP) pin will allow normal read/write operations when held high. When the WP pin is

brought low and WPEN bit is set to a logic '1', all write operations to the STATUS register are inhibited.

WP going low while CS is still low will interrupt a write operation to the STATUS register. If the internal

write cycle has already been initiated, WP going low will have no effect on any write operation to the

STATUS register. The WP pin function is blocked when the WPEN bit in the STATUS register is set to a

logic '0'. This will allow the user to install the AT25320B/AT25640B in a system with the WP pin tied to

ground and still be able to write to the STATUS register. All WP pin functions are enabled when the

WPEN bit is set to a logic '1'.

DS20005993A-page 5

AT25320B/AT25640B

Pin Description

2.4

2.5

2.6

Ground (GND)

The ground reference for the power supply. The Ground (GND) pin should be connected to the system

ground.

Serial Data Input (SI)

The Serial Data Input (SI) pin is used to transfer data into the device. It receives instructions, addresses

and data. Data is latched on the rising edge of the serial clock.

Serial Data Clock (SCK)

The Serial Data Clock (SCK) pin is used to synchronize the communication between a master and the

AT25320B/AT25640B. Instructions, addresses or data present on the SI pin are latched on the rising

edge of the clock input, while data on the SO pin is updated after the falling edge of the clock input.

2.7

Suspends Serial Input (HOLD)

The HOLD pin is used in conjunction with the CS pin to pause the AT25320B/AT25640B. When the

device is selected and a serial sequence is underway, HOLD can be used to pause the serial

communication with the master device without resetting the serial sequence. To pause, the HOLD pin

must be brought low while the SCK pin is low. To resume serial communication, the HOLD pin is brought

high while the SCK pin is low (SCK may still toggle during HOLD). Inputs to the SI pin will be ignored

while the SO pin is in the high-impedance state.

2.8

Device Power Supply (V_CC)

The Device Power Supply (V_CC) pin is used to supply the source voltage to the device. Operations at

invalid V_CCvoltages may produce spurious results and should not be attempted.

DS20005993A-page 6

AT25320B/AT25640B

Description

3.

Description

The AT25320B/AT25640B provides 32,768/65,536 bits of Serial Electrically Erasable Programmable

Read-Only Memory (EEPROM) organized as 4,096/8,192 words of 8 bits each. The device is optimized

for use in many industrial and commercial applications where low-power and low-voltage operation are

essential.

The AT25320B/AT25640B is enabled through the Chip Select (CS) pin and accessed via a 3-wire

interface consisting of Serial Data Input (SI), Serial Data Output (SO) and Serial Clock (SCK). All

programming cycles are completely self-timed, and no separate erase cycle is required before write.

Block write protection is enabled by programming the STATUS register with one of four blocks of write

protection. Separate Program Enable and Program Disable instructions are provided for additional data

protection. Hardware data protection is provided via the WP pin to protect against inadvertent write

attempts to the STATUS register. The HOLD pin may be used to suspend any serial communication

without resetting the serial sequence.

3.1

Block Diagram

Memory

System Control

Module

Power-on

Reset

Generator

CS

SO

VCC

High-Voltage

Generation

Circuit

Register Bank:

STATUS Register

Pause

Operation

Control

HOLD

EEPROM Array

1 page

Address Register

and Counter

Column Decoder

Data Register

SCK

WP

Data Output

Buffer

GND

SI

Write Protection

Control

DS20005993A-page 7

AT25320B/AT25640B

Electrical Characteristics

4.

Electrical Characteristics

4.1

Absolute Maximum Ratings

Operating temperature

Storage temperature

Voltage on any pin with respect to ground

V_CC

-55°C to +125°C

-65°C to +150°C

-1.0V to +7.0V

6.25V

DC output current

5.0 mA

ESD protection

2 kV

Note:ꢀ Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to

the device. This is a stress rating only and functional operation of the device at these or any other

conditions above those indicated in the operational sections of this specification are not implied.

Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

4.2

4.3

DC and AC Operating Range

Table 4-1.ꢀDC and AC Operating Range

AT25320B/AT25640B

Operating Temperature (Case)

V_CCPower Supply

Industrial Temperature Range

Low Voltage Grade

-40°C to +85°C

1.8V to 5.5V

DC Characteristics

Table 4-2.ꢀDC Characteristics ⁽¹⁾

Parameter

Symbol Minimum Typical Maximum Units Conditions

Supply Voltage

Supply Current

V_CC1

V_CC2

V_CC3

I_CC1

1.8

2.5

4.5

—

5.5

V

—

5.5

7.5

10.0

mA V_CC= 5.0V at 20 MHz,

SO = Open, Read

Supply Current

Standby Current

I_CC2

I_CC3

I_SB1

—

4.0

10.0

6.0

mA V_CC= 5.0V at 20 MHz,

SO = Open, Read, Write

mA V_CC= 5.0V at 5 MHz,

SO = Open, Read, Write

<0.1

6.0⁽²⁾

µA V_CC= 1.8V, CS = V_CC

DS20005993A-page 8

AT25320B/AT25640B

Electrical Characteristics

Parameter

Symbol Minimum Typical Maximum Units Conditions

Standby Current

Input Leakage

Output Leakage

I_SB2

I_SB3

I_IL

—

0.3

2.0

—

7.0⁽²⁾

10.0⁽²⁾

3.0

µA V_CC= 2.5V, CS = V_CC

µA V_CC= 5.0V, CS = V_CC

µA V_IN= 0V to V_CC

-3.0

I_OL

—

3.0

µA V_IN= 0V to V_CC,

T_AC= 0°C to +70°C

(3)

Input

Low-Voltage

V_IL

-0.6

V_CCx 0.7

—

V_CCx 0.3

V

(3)

Input

High-Voltage

V_IH

V_CC+ 0.5

Output

Low-Voltage

V_OL1

V_OH1

V_OL2

V_OH2

0.4

—

3.6V ≤ V_CC≤ 5.5V I_OL= 3.0 mA

3.6V ≤ V_CC≤ 5.5V I_OH= -1.6 mA

1.8V ≤ V_CC≤ 3.6V I_OL= 0.15 mA

1.8V ≤ V_CC≤ 3.6V I_OH= -100 µA

Output

High-Voltage

V_CC- 0.8

—

Output

Low-Voltage

0.2

—

Output

V_CC- 0.2

High-Voltage

Note:ꢀ

1. Applicable over recommended operating range from: T_A= -40°C to +85°C, V_CC= 1.8V to 5.5V

(unless otherwise noted).

2. Worst case measured at 85°C.

3. V_ILmin and V_IHmax are reference only and are not tested.

4.4

AC Characteristics

Table 4-3.ꢀAC Characteristics⁽¹⁾

Parameter

Symbol

Minimum Maximum

Units

MHz

µs

Conditions

SCK Clock Frequency

f_SCK

0

20

10

5

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

0

Input Rise Time

Input Fall Time

t_RI

—

2

µs

2

µs

t_FI

2

µs

2

µs

DS20005993A-page 9

AT25320B/AT25640B

Electrical Characteristics

Parameter

Symbol

Minimum Maximum

Units

µs

ns

Conditions

—

20

40

80

20

40

80

25

50

100

25

50

100

25

50

100

5

2

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

SCK High Time

t_WH

—

20

40

80

—

SCK Low Time

CS High Time

t_WL

t_CS

t_CSS

t_CSH

t_SU

t_H

CS Setup Time

CS Hold Time

Data In Setup Time

Data In Hold Time

HOLD Setup Time

HOLD Hold Time

Output Valid

10

20

5

10

20

5

t_HD

t_CD

t_V

10

20

5

10

20

0

Output Hold Time

t_HO

0

DS20005993A-page 10

AT25320B/AT25640B

Electrical Characteristics

Parameter

Symbol

Minimum Maximum

Units

ns

Conditions

0

—

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

V_CC= 4.5V to 5.5V

V_CC= 2.5V to 5.5V

V_CC= 1.8V to 5.5V

0

ns

HOLD to Output Low Z

HOLD to Output High Z

Output Disable Time

Write Cycle Time

t_LZ

0

25

50

100

40

80

200

40

80

200

5

ns

0

ns

0

ns

t_HZ

—

ns

t_DIS

ns

t_WC

ms

5

Note:ꢀ

1. Applicable over recommended operating range from T_A= -40°C to +85°C, V_CC= As Specified,

C_L= 1 TTL Gate and 30 pF (unless otherwise noted).

4.5

Electrical Specifications

4.5.1

Power-Up Requirements and Reset Behavior

During a power-up sequence, the V_CCsupplied to the AT25320B/AT25640B should monotonically rise

from GND to the minimum V_CClevel as specified in Table 4-1 with a slew rate no faster than 0.1 V/μs.

4.5.1.1 Device Reset

To prevent inadvertent write operations or any other spurious events from occurring during a power-up

sequence, the AT25320B/AT25640B includes a Power-on Reset (POR) circuit. Upon power-up, the

device will not respond to any instructions until the V_CClevel crosses the internal voltage threshold (V_POR

that brings the device out of Reset and into Standby mode.

)

The system designer must ensure the instructions are not sent to the device until the V_CCsupply has

reached a stable value greater than or equal to the minimum V_CClevel. Additionally, once the V_CCis

greater than or equal to the minimum V_CClevel, the bus master must wait at least t_PUPbefore sending the

first instruction to the device. See Table 4-4 for the values associated with these power-up parameters.

DS20005993A-page 11

AT25320B/AT25640B

Electrical Characteristics

Table 4-4.ꢀ Power-Up Conditions⁽¹⁾

Symbol Parameter

Min. Max. Units

t_PUPTime required after V_CCis stable before the device can accept instructions. 100

—

1.5

—

µs

V

V_PORPower-on Reset Threshold Voltage.

—

t_POFFMinimum time at V_CC= 0V between power cycles.

500

ms

Note:ꢀ

1. These parameters are characterized but they are not 100% tested in production.

If an event occurs in the system where the V_CClevel supplied to the AT25320B/AT25640B drops below

the maximum V_PORlevel specified, it is recommended that a full power cycle sequence be performed by

first driving the V_CCpin to GND in less than 1 ms, waiting at least the minimum t_POFFtime and then

performing a new power-up sequence in compliance with the requirements defined in this section.

4.5.2

Pin Capacitance

Table 4-5.ꢀPin Capacitance^(1,2)

Symbol Test Conditions

Max.

Units

pF

Conditions

V_OUT= 0V

V_IN= 0V

C_OUT

C_IN

Output Capacitance (SO)

Input Capacitance (CS, SCK, SI, WP, HOLD)

8

6

pF

Note:ꢀ

1. This parameter is characterized and is not 100% tested.

2. Applicable over recommended operating range from: T_A= 25°C, f_SCK= 1.0 MHz, V_CC= 5.0V

(unless otherwise noted).

4.5.3

EEPROM Cell Performance Characteristics

Table 4-6.ꢀEEPROM Cell Performance Characteristics

Operation

Test Condition

Min.

Max.

Units

Write Endurance⁽¹⁾T_A= 25°C,V_CC= 3.3V, Page Mode

1,000,000

—

Write

Cycles

Data Retention⁽¹⁾

T_A= 55°C

100

—

Years

Note:ꢀ

1. Performance is determined through characterization and the qualification process.

DS20005993A-page 12

AT25320B/AT25640B

Serial Interface Description

5.

Serial Interface Description

Master:

Slave:

The device that generates the serial clock.

Because the Serial Clock (SCK) pin is always an input, the AT25320B/AT25640B

always operates as a slave.

Transmitter/

receiver:

The AT25320B/AT25640B has separate pins designated for data transmission (SO)

and reception (SI).

MSb:

The Most Significant bit (MSb) is the first bit transmitted and received.

Serial Opcode:

After the device is selected with CS going low, the first byte will be received. This

byte contains the opcode that defines the operations to be performed.

Invalid Opcode:

If an invalid opcode is received, no data will be shifted into the

AT25320B/AT25640B, and the Serial Output (SO) pin will remain in a

high‑impedance state until the falling edge of CS is detected again. This will

reinitialize the serial communication.

Figure 5-1.ꢀSPI Serial Interface

Slave:

AT25320B/

AT25640B

Master:

Microcontroller

Data Out (MOSI)

Data In (MISO)

Serial Clock (SPI CK)

SS0

SI

SO

SCK

CS

SS1

SI

SS2

SO

SCK

CS

SS3

SI

SO

SCK

CS

SI

SO

SCK

CS

DS20005993A-page 13

AT25320B/AT25640B

Functional Description

6.

Functional Description

The AT25320B/AT25640B is designed to interface directly with the synchronous Serial Peripheral

Interface (SPI) of the 6805 and 68HC11 series of microcontrollers.

The AT25320B/AT25640B utilizes an 8-bit instruction register. The list of instructions and their operation

codes are contained in Table 6-1. All instructions, addresses and data are transferred with the MSb first

and start with a high-to-low CS transition.

Table 6-1.ꢀInstruction Set

Instruction Name

WREN

Instruction Format

0000 X110

0000 X100

0000 X101

0000 X001

0000 X011

0000 X010

Operation

Set Write Enable Latch

Reset Write Enable Latch

Read STATUS Register

Write STATUS Register

Read Data from Memory Array

Write Data to Memory Array

WRDI

RDSR

WRSR

READ

WRITE

Write Enable

(WREN):

The device will power-up in the Write Disable state when V_CCis applied. All

programming instructions must therefore be preceded by a Write Enable instruction.

Write Disable

(WRDI):

To protect the device against inadvertent writes, the Write Disable instruction disables

all programming modes. The WRDIinstruction is independent of the status of the WP

pin.

Read STATUS The Read STATUS Register instruction provides access to the STATUS register. The

Register

(RDSR):

Ready/Busy and Write Enable status of the device can be determined by the RDSR

instruction. Similarly, the Block Write Protection bits indicate the extent of protection

employed. These bits are set by using the WRSRinstruction.

Table 6-2.ꢀSTATUS Register Format

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

WPEN

X

BP1

BP0

WEN

RDY

Table 6-3.ꢀRead STATUS Register Bit Definition

Bit

Definition

Bit 0 (RDY)

Bit 0 = 0(RDY) indicates the device is READY.

Bit 0 = 1indicates the write cycle is in progress.

Bit 1 (WEN)

Bit 1= 0indicates the device is not write enabled.

Bit 1 = 1indicates the device is write enabled.

Bit 2 (BP0)

Bit 3 (BP1)

See Table 6-4.

DS20005993A-page 14

AT25320B/AT25640B

Functional Description

Bit

Bits 4 – 6 are zeros when device is not in an internal write cycle.

Bit 7 (WPEN) See Table 6-5.

Bits 0 – 7 are ones during an internal write cycle.

Definition

Write

The WRSRinstruction allows the user to select one of four levels of protection. The

AT25320B/AT25640B is divided into four array segments. One-quarter, one-half or all of

the memory segments can be protected. Any of the data within any selected segment

will therefore be read-only. The Block Write Protection levels and corresponding STATUS

register control bits are shown in Table 6-4.

STATUS

Register

(WRSR):

The three bits BP0, BP1 and WPEN are nonvolatile cells that have the same properties and functions as

the regular memory cells (e.g., WREN, t_WC, RDSR).

Table 6-4.ꢀBlock Write-Protect Bits

Level

STATUS Register Bits

Array Addresses Protected

AT25320B AT25640B

None None

BP1

0

BP0

0

1

1(1/4)

2(1/2)

3(All)

0C00-0FFF

0800-0FFF

0000-0FFF

1800-1FFF

1000-1FFF

0000-1FFF

1

0

1

The WRSRinstruction also allows the user to enable or disable the Write-Protect (WP) pin through the use

of the Write-Protect Enable (WPEN) bit. Hardware Write Protection is enabled when the WP pin is low

and the WPEN bit is set to a logic '1'. Hardware Write Protection is disabled when either the WP pin is

high or the WPEN bit is set to a logic '0'. When the device is Hardware Write-Protected, writes to the

STATUS register, including the Block Protect bits and the WPEN bit, and the block-protected sections in

the memory array are disabled. Writes are only allowed to sections of the memory that are not block-

protected.

Note:ꢀ When the WPEN bit is Hardware Write-Protected, it cannot be set back to a logic '0' as long as

the WP pin is held low.

Table 6-5.ꢀWPEN Operation

WPEN

WP

x

WEN

Protected Blocks

Protected

Unprotected Blocks

Protected

STATUS Register

Protected

0

1

x

0

1

0

1

0

1

x

Protected

Writeable

Low

High

Protected

Writeable

Protected

Writeable

DS20005993A-page 15

AT25320B/AT25640B

Functional Description

Read

Reading the AT25320B/AT25640B via the Serial Output (SO) pin requires the following

Sequence sequence. After the CS line is pulled low to select a device, the READinstruction is

(READ):

transmitted via the SI line followed by the byte address to be read (A15 – A0, see Table

6-6). Upon completion, any data on the SI line will be ignored. The data (D7 – D0) at the

specified address is then shifted out onto the SO line. If only one byte is to be read, the

CS line should be driven high after the data comes out. The read sequence can be

continued since the byte address is automatically incremented and data will continue to be

shifted out. When the highest address is reached, the address counter will roll over to the

lowest address allowing the entire memory to be read in one continuous read cycle.

Write

In order to program the AT25320B/AT25640B, two separate instructions must be

Sequence executed. First, the device must be write enabled via the WRENinstruction. Then a

(WRITE):

WRITEinstruction may be executed. Also, the address of the memory location(s) to be

programmed must be outside the protected address field location selected by the Block

Write Protection level. During an internal write cycle, all instructions will be ignored except

the RDSRinstruction.

A WRITEinstruction requires the following sequence. After the CS line is pulled low to

select the device, the WRITEinstruction is transmitted via the SI line followed by the byte

address (A15 – A0) and the data (D7 – D0) to be programmed (see Table 6-6).

Programming will start after the CS pin is brought high. The low-to-high transition of the

CS pin must occur during the SCK low-time immediately after clocking in the D0 (LSb)

data bit.

The Ready/Busy status of the device can be determined by initiating a Read STATUS

Register (RDSR) instruction. If Bit 0 = 1, the write cycle is still in progress. If Bit 0 = 0, the

write cycle has ended. Only the RDSRinstruction is enabled during the write programming

cycle.

The AT25320B/AT25640B is capable of a 32-byte page write operation. After each byte of

data is received, the five low-order address bits are internally incremented by one; the

high-order bits of the address will remain constant. If more than 32 bytes of data are

transmitted, the address counter will rollover and the previously written data will be

overwritten. The AT25320B/AT25640B is automatically returned to the write disable state

at the completion of a write cycle.

Note:ꢀ If the device is not write enabled, the device will ignore the WRITEinstruction and

will return to the Standby state, when CS is brought high. A new CS falling edge is

required to reinitiate the serial communication.

Table 6-6.ꢀAddress Key

Address

AT25320B

A₁₁–A₀

AT25640B

A₁₂–A₀

A_N

Don’t Care Bits

A₁₅–A₁₂

A₁₅–A₁₃

DS20005993A-page 16

AT25320B/AT25640B

Timing Diagrams

7.

Timing Diagrams

Figure 7-1.ꢀSynchronous Data Timing (for Mode 0)

t_CS

V_IH

CS

V_IL

t_CSS

t_CSH

V_IH

t_WH

t_WL

SCK

V_IL

t_SU

t_H

V_IH

V_IL

Valid In

SI

t_HO

t_DIS

t_V

V_OH

High Z

SO

V_OL

Figure 7-2.ꢀWREN Timing

CS

SCK

SI

WREN Opcode

High Z

SO

Figure 7-3.ꢀWRDI Timing

CS

SCK

SI

WRDI Opcode

High Z

SO

DS20005993A-page 17

AT25320B/AT25640B

Timing Diagrams

Figure 7-4.ꢀRDSR Timing

CS

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

SCK

SI

Instruction

Data Out

High-Impedance

SO

7

6

5

4

3

2

1

0

MSB

Figure 7-5.ꢀWRSR Timing

CS

(1)

t_WC

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

SCK

SI

Instruction

Data In

7

6

5

4

3

2

1

0

High-Impedance

SO

Note:

This instruction initiates a self-timed internal write cycle (t_WC) on the rising edge of CS after a valid sequence.

Figure 7-6.ꢀRead Timing

CS

0

1

2

3

4

5

6

7

8

9

10 11 20 21 22 23 24 25 26 27 28 29 30 31

SCK

SI

Byte Address

...

Instruction

15 14 13

3

2

1

0

Data Out

High-Impedance

SO

7

6

5

4

3

2

1

0

MSB

DS20005993A-page 18

AT25320B/AT25640B

Timing Diagrams

Figure 7-7.ꢀWrite Timing

(1)

CS

t_WC

0

1

2

3

4

5

6

7

8

9 10 11 20 21 22 23 24 25 26 27 28 29 30 31

SCK

SI

Instruction

Byte Address

...

Data In

15 14 13

3

2

1

0

7

6

5

4

3

2

1

0

High-Impedance

SO

Note:

This instruction initiates a self-timed internal write cycle (t_WC) on the rising edge of CS after a valid sequence.

Figure 7-8.ꢀHOLD Timing

CS

t

CD

SCK

HOLD

SO

t

HD

t

HD

t

HZ

t

LZ

DS20005993A-page 19

AT25320B/AT25640B

Packaging Information

8.

Packaging Information

8.1

Package Marking Information

AT25320B and AT25640B: Package Marking Information

8-lead TSSOP

8-pad XDFN

8-lead SOIC

1.8 x 2.2 mm Body

ATMLHYWW

###% CO

YYWWNNN

ATHYWW

###

NNN

###%CO

YYWWNNN

8-ball VFBGA

8-pad UDFN

2.0 x 3.0 mm Body

2.35 x 3.73 mm Body

###

###U

WWNNN

H%

NNN

Note 1:

designates pin 1

Note 2: Package drawings are not to scale

Catalog Number Truncation

AT25320B

AT25640B

Truncation Code ###: 5BB

Truncation Code ###: 5CB

Date Codes

Voltages

YY = Year

16: 2016

17: 2017

18: 2018

19: 2019

Y = Year

6: 2016

7: 2017

8: 2018

9: 2019

WW = Work Week of Assembly

% = Minimum Voltage

L: 1.8V min

20: 2020

21: 2021

22: 2022

23: 2023

0: 2020

1: 2021

2: 2022

3: 2023

02: Week 2

04: Week 4

...

52: Week 52

Country of Origin

Device Grade

H or U: Industrial Grade

Atmel Truncation

CO = Country of Origin

AT: Atmel

ATM: Atmel

ATML: Atmel

Lot Number or Trace Code

NNN = Alphanumeric Trace Code (2 Characters for Small Packages)

DS20005993A-page 20

AT25320B/AT25640B

Packaging Information

8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

2X

0.10 C A–B

D

A

D

NOTE 5

N

E

2

E1

2

E1

E

1

2

NOTE 1

e

NX b

0.25

C A–B D

B

NOTE 5

TOP VIEW

0.10 C

C

A2

A

SEATING

PLANE

8X

SIDE VIEW

A1

h

R0.13

h

H

0.23

L

SEE VIEW C

(L1)

VIEW A–A

VIEW C

Microchip Technology Drawing No. C04-057-SN Rev D Sheet 1 of 2

DS20005993A-page 21

AT25320B/AT25640B

Packaging Information

8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

Units

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

Number of Pins

Pitch

N

e

8

1.27 BSC

Overall Height

Molded Package Thickness

Standoff

Overall Width

A

-

1.75

-

0.25

A2

A1

E

1.25

0.10

§

6.00 BSC

Molded Package Width

Overall Length

E1

D

3.90 BSC

4.90 BSC

Chamfer (Optional)

Foot Length

h

L

0.25

0.40

-

0.50

1.27

Footprint

L1

1.04 REF

Foot Angle

Lead Thickness

Lead Width

Mold Draft Angle Top

Mold Draft Angle Bottom

0°

0.17

0.31

5°

-

8°

c

0.25

0.51

15°

b

5°

15°

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. § Significant Characteristic

3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or

protrusions shall not exceed 0.15mm per side.

4. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

5. Datums A & B to be determined at Datum H.

Microchip Technology Drawing No. C04-057-SN Rev D Sheet 2 of 2

DS20005993A-page 22

AT25320B/AT25640B

Packaging Information

8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

SILK SCREEN

C

Y1

X1

E

RECOMMENDED LAND PATTERN

Units

Dimension Limits

MILLIMETERS

NOM

MIN

MAX

Contact Pitch

E

C

X1

Y1

1.27 BSC

5.40

Contact Pad Spacing

Contact Pad Width (X8)

Contact Pad Length (X8)

0.60

1.55

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

Microchip Technology Drawing C04-2057-SN Rev B

DS20005993A-page 23

AT25320B/AT25640B

Packaging Information

8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

D

N

E

E1

NOTE 1

1

2

b

e

c

φ

A

A2

A1

L

L1

Units

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

Number of Pins

Pitch

N

e

8

0.65 BSC

Overall Height

A

–

1.20

1.05

0.15

Molded Package Thickness

Standoff

A2

A1

E

0.80

0.05

1.00

–

Overall Width

6.40 BSC

Molded Package Width

Molded Package Length

Foot Length

E1

D

4.30

2.90

0.45

4.40

4.50

3.10

0.75

3.00

L

0.60

Footprint

L1

φ

1.00 REF

Foot Angle

0°

–

8°

Lead Thickness

c

0.09

0.20

0.30

Lead Width

b

0.19

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.

3. Dimensioning and tolerancing per ASME Y14.5M.

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-086B

DS20005993A-page 24

AT25320B/AT25640B

Packaging Information

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20005993A-page 25

AT25320B/AT25640B

Packaging Information

8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]

Atmel Legacy YNZ Package

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

D

A

B

E

N

(DATUM A)

(DATUM B)

NOTE 1

2X

0.10 C

1

2

2X

TOP VIEW

0.10 C

A1

0.10 C

0.08 C

C

A

SEATING

PLANE

8X

(A3)

SIDE VIEW

0.10

C A B

D2

e

2

1

2

0.10

K

C A B

E2

N

L

8X b

0.10

0.05

C A B

e

C

BOTTOM VIEW

Microchip Technology Drawing C04-21355-Q4B Rev A Sheet 1 of 2

DS20005993A-page 26

AT25320B/AT25640B

Packaging Information

8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]

Atmel Legacy YNZ Package

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

Units

Dimension Limits

MILLIMETERS

NOM

MIN

MAX

Number of Terminals

Pitch

Overall Height

Standoff

Terminal Thickness

Overall Length

Exposed Pad Length

Overall Width

Exposed Pad Width

Terminal Width

Terminal Length

N

e

8

0.50 BSC

0.55

0.02

0.152 REF

2.00 BSC

1.50

3.00 BSC

1.30

A

A1

A3

D

D2

E

E2

b

L

0.50

0.00

0.60

0.05

1.40

1.60

1.20

0.18

0.35

0.20

1.40

0.30

0.45

-

0.25

0.40

-

Terminal-to-Exposed-Pad

K

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. Package is saw singulated

3. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-21355-Q4B Rev A Sheet 2 of 2

DS20005993A-page 27

AT25320B/AT25640B

Packaging Information

8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]

Atmel Legacy YNZ Package

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

X2

EV

G2

8

ØV

C

Y2

G1

Y1

1

2

SILK SCREEN

X1

E

RECOMMENDED LAND PATTERN

Units

Dimension Limits

E

MILLIMETERS

NOM

0.50 BSC

MIN

MAX

Contact Pitch

Optional Center Pad Width

Optional Center Pad Length

Contact Pad Spacing

X2

Y2

C

1.60

1.40

2.90

Contact Pad Width (X8)

Contact Pad Length (X8)

Contact Pad to Center Pad (X8)

Contact Pad to Contact Pad (X6)

Thermal Via Diameter

X1

Y1

G1

G2

V

0.30

0.85

0.20

0.33

0.30

1.00

Thermal Via Pitch

EV

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during

reflow process

Microchip Technology Drawing C04-21355-Q4B Rev A

DS20005993A-page 28

AT25320B/AT25640B

Packaging Information

f

0.10 C

d

0.10

A

(4X)

d

0.08

Øb

C

A1 BALL

PAD

CORNER

C

D

A1 BALL PAD CORNER

2

1

A

B

C

D

j

n 0.15 m C A B

n 0.08 m

C

e

E

B

(e1)

A1

d

A2

A

(d1)

TOP VIEW

BOTTOM VIEW

SIDE VIEW

8 SOLDER BALLS

COMMON DIMENSIONS

(Unit of Measure = mm)

MIN

MAX

NOM

NOTE

SYMBOL

A

0.81 0.91 1.00

0.15 0.20 0.25

0.40 0.45 0.50

0.25 0.30 0.35

2.35 BSC

A1

A2

b

D

Notes:

E

3.73 BSC

1. This drawing is for general

e

0.75 BSC

e1

d

0.74 REF

2. Dimension 'b' is measured at the maximum solder ball diameter.

3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu.

0.75 BSC

d1

0.80 REF

6/11/13

TITLE

GPC

DRAWING NO.

8U2-1

REV.

G

8U2-1, 8-ball, 2.35 x 3.73 mm Body, 0.75 mm pitch,

Very Thin, Fine-Pitch Ball Grid Array Package

(VFBGA)

GWW

Note:ꢀ For the most current package drawings, please see the Microchip Packaging Specification located

at http://www.microchip.com/packaging.

DS20005993A-page 29

AT25320B/AT25640B

Packaging Information

D

7

5

6

8

E

PIN #1 ID

2

4

1

3

A1

Top View

A

Side View

e1

b

L

COMMON DIMENSIONS

(Unit of Measure = mm)

SYMBOL

MIN

–

NOM

–

MAX

0.40

0.05

1.90

2.30

0.25

NOTE

A

A1

D

E

0.10

PIN #1 ID

0.00

1.70

2.10

0.15

–

1.80

0.15

2.20

b

0.20

b

e

0.40 TYP

1.20 REF

0.30

e

e1

L

0.35

0.26

End View

9/10/2012

TITLE

DRAWING NO.

REV.

GPC

8ME1, 8-pad (1.80mm x 2.20mm body)

Extra Thin DFN (XDFN)

8ME1

B

DTP

Note:ꢀ For the most current package drawings, please see the Microchip Packaging Specification located

at http://www.microchip.com/packaging.

DS20005993A-page 30

AT25320B/AT25640B

Revision History

9.

Revision History

Atmel Document 8535 Revision A (April 2008)

Initial document release.

Atmel Document 8535 Revision B (July 2008)

Modified ‘Endurance’ parameter on page 6.

Atmel Document 8535 Revision C (May 2009)

Added Part Marking information; changed to Preliminary status.

Atmel Document 8535 Revision D (August 2009)

Changed Catalog Numbering. Added new Part Marking Information.

Atmel Document 8535 Revision E (April 2010)

Updated Ordering Code Detail, Ordering Information, template.

Atmel Document 8535 Revision F (June 2010)

Updated 8A2 and 8S1 package drawings. Remove Preliminary.

Atmel Document 8535 Revision G (November 2012)

Updated part markings to single page part marking. Updated package drawings. Replaced 8A2 package

with 8X package. Update template and Atmel logos.

Atmel Document 8535 Revision H (January 2015)

Added the UDFN Expanded Quantity Option. Updated the 8X, 8MA2, and 8ME1 package outline

drawings and the ordering information.

Revision A (June 2018)

Updated to the Microchip template. Microchip DS20005993A replaces Atmel document 8535. Updated

Part Marking Information. Added ESD rating. Removed lead finish designation. Added POR

recommendations section. Updated trace code format in package markings. Updated section content

throughout for clarification. Updated the SOIC, TSSOP, and UDFN package drawings to the Microchip

equivalents.

DS20005993A-page 31

AT25320B/AT25640B

The Microchip Web Site

Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as

a means to make files and information easily available to customers. Accessible by using your favorite

Internet browser, the web site contains the following information:

•

Product Support – Data sheets and errata, application notes and sample programs, design

resources, user’s guides and hardware support documents, latest software releases and archived

software

•

General Technical Support – Frequently Asked Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant program member listing

Business of Microchip – Product selector and ordering guides, latest Microchip press releases,

listing of seminars and events, listings of Microchip sales offices, distributors and factory

representatives

Customer Change Notification Service

Microchip’s customer notification service helps keep customers current on Microchip products.

Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata

related to a specified product family or development tool of interest.

To register, access the Microchip web site at http://www.microchip.com/. Under “Support”, click on

“Customer Change Notification” and follow the registration instructions.

Customer Support

Users of Microchip products can receive assistance through several channels:

•

Distributor or Representative

Local Sales Office

Field Application Engineer (FAE)

Technical Support

Customers should contact their distributor, representative or Field Application Engineer (FAE) for support.

Local sales offices are also available to help customers. A listing of sales offices and locations is included

in the back of this document.

Technical support is available through the web site at: http://www.microchip.com/support

DS20005993A-page 32

AT25320B/AT25640B

Product Identification System

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Examples:

Device

Package Package Package

Shipping Carrier

Option

Device Grade

Drawing

Code

Option

AT25320B-SSHL-B

AT25320B-SSHL-T

AT25640B-SSHL-T

AT25320B-XHL-B

AT25640B-XHL-T

AT25320B-MAHL-E

AT25640B-MAHL-T

AT25640B-MAHL-E

AT25640B-CUL-T

AT25320B-MEHL-T

SOIC

SN

SS

X

Bulk (Tubes)

Tape and Reel

Bulk (Tubes)

Industrial

Temperature

(-40°C to 85°C)

SOIC

SN

TSSOP

UDFN

VFBGA

XDFN

ST

X

Tape and Reel

Q4B

8U2-1

8ME1

MA

C

ME

DS20005993A-page 33

AT25320B/AT25640B

Microchip Devices Code Protection Feature

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

Microchip believes that its family of products is one of the most secure families of its kind on the

market today, when used in the intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of

these methods, to our knowledge, require using the Microchip products in a manner outside the

operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is

engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their

code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the

code protection features of our products. Attempts to break Microchip’s code protection feature may be a

violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software

or other copyrighted work, you may have a right to sue for relief under that Act.

Legal Notice

Information contained in this publication regarding device applications and the like is provided only for

your convenience and may be superseded by updates. It is your responsibility to ensure that your

application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY

OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS

CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE.

Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life

support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend,

indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting

from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual

property rights unless otherwise stated.

Trademarks

The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings,

BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo,

Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,

OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA,

SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of

Microchip Technology Incorporated in the U.S.A. and other countries.

ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight

Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom,

chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController,

dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial

Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi,

DS20005993A-page 34

AT25320B/AT25640B

motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient

Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL

ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total

Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are

trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.

GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of

Microchip Technology Inc., in other countries.

All other trademarks mentioned herein are property of their respective companies.

©

ISBN: 978-1-5224-3161-9

Quality Management System Certified by DNV

ISO/TS 16949

Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer

fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures are for its PIC^®MCUs and dsPIC^®

DSCs, KEELOQ^®code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design and manufacture of development

systems is ISO 9001:2000 certified.

DS20005993A-page 35

Worldwide Sales and Service

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://www.microchip.com/

support

Australia - Sydney

Tel: 61-2-9868-6733

China - Beijing

India - Bangalore

Tel: 91-80-3090-4444

India - New Delhi

Tel: 91-11-4160-8631

India - Pune

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

Denmark - Copenhagen

Tel: 45-4450-2828

Tel: 86-10-8569-7000

China - Chengdu

Tel: 86-28-8665-5511

China - Chongqing

Tel: 86-23-8980-9588

China - Dongguan

Tel: 86-769-8702-9880

China - Guangzhou

Tel: 86-20-8755-8029

China - Hangzhou

Tel: 86-571-8792-8115

China - Hong Kong SAR

Tel: 852-2943-5100

China - Nanjing

Tel: 91-20-4121-0141

Japan - Osaka

Fax: 45-4485-2829

Finland - Espoo

Tel: 81-6-6152-7160

Japan - Tokyo

Tel: 358-9-4520-820

France - Paris

Web Address:

www.microchip.com

Atlanta

Tel: 81-3-6880- 3770

Korea - Daegu

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Germany - Garching

Tel: 49-8931-9700

Duluth, GA

Tel: 82-53-744-4301

Korea - Seoul

Tel: 678-957-9614

Fax: 678-957-1455

Austin, TX

Tel: 82-2-554-7200

Malaysia - Kuala Lumpur

Tel: 60-3-7651-7906

Malaysia - Penang

Tel: 60-4-227-8870

Philippines - Manila

Tel: 63-2-634-9065

Singapore

Germany - Haan

Tel: 49-2129-3766400

Germany - Heilbronn

Tel: 49-7131-67-3636

Germany - Karlsruhe

Tel: 49-721-625370

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Germany - Rosenheim

Tel: 49-8031-354-560

Israel - Ra’anana

Tel: 512-257-3370

Boston

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Chicago

Tel: 86-25-8473-2460

China - Qingdao

Tel: 86-532-8502-7355

China - Shanghai

Tel: 86-21-3326-8000

China - Shenyang

Tel: 86-24-2334-2829

China - Shenzhen

Tel: 86-755-8864-2200

China - Suzhou

Itasca, IL

Tel: 65-6334-8870

Taiwan - Hsin Chu

Tel: 886-3-577-8366

Taiwan - Kaohsiung

Tel: 886-7-213-7830

Taiwan - Taipei

Tel: 630-285-0071

Fax: 630-285-0075

Dallas

Addison, TX

Tel: 972-9-744-7705

Italy - Milan

Tel: 972-818-7423

Fax: 972-818-2924

Detroit

Tel: 86-186-6233-1526

China - Wuhan

Tel: 886-2-2508-8600

Thailand - Bangkok

Tel: 66-2-694-1351

Vietnam - Ho Chi Minh

Tel: 84-28-5448-2100

Tel: 39-0331-742611

Fax: 39-0331-466781

Italy - Padova

Novi, MI

Tel: 86-27-5980-5300

China - Xian

Tel: 248-848-4000

Houston, TX

Tel: 39-049-7625286

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Norway - Trondheim

Tel: 47-7289-7561

Tel: 86-29-8833-7252

China - Xiamen

Tel: 281-894-5983

Indianapolis

Tel: 86-592-2388138

China - Zhuhai

Noblesville, IN

Tel: 317-773-8323

Fax: 317-773-5453

Tel: 317-536-2380

Los Angeles

Tel: 86-756-3210040

Poland - Warsaw

Tel: 48-22-3325737

Romania - Bucharest

Tel: 40-21-407-87-50

Spain - Madrid

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

Tel: 951-273-7800

Raleigh, NC

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

Sweden - Gothenberg

Tel: 46-31-704-60-40

Sweden - Stockholm

Tel: 46-8-5090-4654

UK - Wokingham

Tel: 919-844-7510

New York, NY

Tel: 631-435-6000

San Jose, CA

Tel: 408-735-9110

Tel: 408-436-4270

Canada - Toronto

Tel: 905-695-1980

Fax: 905-695-2078

Tel: 44-118-921-5800

Fax: 44-118-921-5820

DS20005993A-page 36


型号：	AT25640B-SSHL-T-899
厂家：	MICROCHIP
描述：	EEPROM, 8KX8, Serial, CMOS, PDSO8 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件：	总36页 (文件大小：2043K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AT25640B-SSHL-T-899 [MICROCHIP]

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