AT27C010-70JU-T [MICROCHIP]

IC OTP 1MBIT 70NS 32PLCC;
AT27C010-70JU-T
型号: AT27C010-70JU-T
厂家: MICROCHIP    MICROCHIP
描述:

IC OTP 1MBIT 70NS 32PLCC

OTP只读存储器 内存集成电路
文件: 总13页 (文件大小:720K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Features  
Fast read access time – 45ns  
Low-power CMOS operation  
– 100µA max standby  
– 25mA max active at 5MHz  
JEDEC standard packages  
– 32-lead PDIP  
– 32-lead PLCC  
5V 10% supply  
High-reliability CMOS technology  
– 2000V ESD protection  
1Mb (128K x 8)  
One-time  
– 200mA latchup immunity  
Rapid programming algorithm – 100 µs/byte (typical)  
CMOS- and TTL-compatible inputs and outputs  
Integrated product identification code  
Industrial temperature range  
Green (Pb/halide-free) packaging option  
Programmable,  
Read-only Memory  
Atmel AT27C010  
1.  
Description  
The Atmel® AT27C010 is a low-power, high-performance 1,048,576-bit, one-time pro-  
grammable, read-only memory (OTP EPROM) organized as 128K by 8 bits. Thedevice  
requires only one 5V power supply in normal read mode operation. Any byte can be  
accessed in less than 45ns, eliminating the need for speed reducing WAIT states on high-  
performance microprocessor systems.  
In read mode, the AT27C010 typically consumes only 8mA. Standby mode supply current  
is typically less than 10µA.  
The AT27C010 is available in a choice of industry standard, JEDEC approved, one-time pro-  
grammable (OTP) PDIP and PLCC packages. All devices feature two-line control (CE, OE)  
to give designers the flexibility to prevent bus contention.  
With 128K byte storage capability, the AT27C010 allows firmware to be stored reliably and  
to be accessed by the system without the delays of mass storage media.  
The AT27C010 has additional features to ensure high quality and efficient production use.  
The rapid programming algorithm reduces the time required to program the part and guar-  
antees reliable programming. Programming time is typically only 100 µs/byte. The  
integrated product identification code electronically identifies the device and manufacturer.  
This feature is used by industry standard programming equipment to select the proper pro-  
gramming algorithms and voltages.  
0321N–EPROM–4/11  
2.  
Pin configurations  
s
32-lead PLCC  
Top view  
32-lead PDIP  
Top view  
Pin name  
A0 - A16  
O0 - O7  
CE  
Function  
Addresses  
VPP  
A16  
A15  
A12  
A7  
1
2
3
4
5
6
7
8
9
32 VCC  
Outputs  
31 PGM  
30 NC  
29 A14  
28 A13  
27 A8  
26 A9  
25 A11  
24 OE  
23 A10  
22 CE  
21 O7  
20 O6  
19 O5  
18 O4  
17 O3  
Chip enable  
Output enable  
Program strobe  
No connect  
A7  
A6  
A5  
A4  
A3  
5
6
7
8
9
29 A14  
28 A13  
27 A8  
26 A9  
25 A11  
24 OE  
23 A10  
22 CE  
21 O7  
OE  
A6  
PGM  
A5  
A4  
NC  
A2 10  
A1 11  
A0 12  
O0 13  
A3  
A2 10  
A1 11  
A0 12  
O0 13  
O1 14  
O2 15  
GND 16  
3.  
System considerations  
Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless  
accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance.  
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This  
capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible.  
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic  
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as  
close as possible to the point where the power supply is connected to the array.  
Figure 3-1.  
Block diagram  
Atmel AT27C010  
2
0321N–EPROM–4/11  
Atmel AT27C010  
4.  
Absolute maximum ratings*  
*NOTICE:  
Stresses beyond those listed under “Absolute max-  
imum ratings” may cause permanent damage to  
the device. This is a stress rating only, and func-  
tional operation of the device at these or any other  
conditions beyond those indicated in the opera-  
tional sections of this specification is not implied.  
Exposure to absolute maximum rating conditions  
for extended periods may affect device reliability.  
Temperature under bias . . . . . . . . . . . . . .-55°C to +125°C  
Storage temperature . . . . . . . . . . . . . . . . .-65°C to +150°C  
Voltage on any pin with  
respect to ground . . . . . . . . . . . . . . . . . . . -2.0V to +7.0V(1)  
Voltage on A9 with  
respect to ground . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)  
VPP supply voltage with  
respect to ground . . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)  
Note:  
1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is  
CC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns.  
V
5.  
DC and AC characteristics  
Table 5-1.  
Operating modes  
Mode/Pin  
Read  
CE  
VIL  
X
OE  
VIL  
VIH  
X
PGM  
X(1)  
X
Ai  
VPP  
X
Outputs  
DOUT  
Ai  
Output disable  
X
X
High Z  
High Z  
DIN  
Standby  
VIH  
VIL  
VIL  
VIH  
X
X
X
Rapid program(2)  
PGM verify  
VIH  
VIL  
X
VIL  
VIH  
X
Ai  
Ai  
VPP  
VPP  
VPP  
DOUT  
PGM inhibit  
X
High Z  
(3)  
A9 = VH  
Product identification(4)  
VIL  
VIL  
X
A0 = VIH or VIL  
A1 - A16 = VIL  
X
Identification code  
Note:  
1. X can be VIL or VIH.  
2. Refer to programming characteristics.  
3. VH = 12.0 0.5V.  
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled low  
(VIL) to select the manufacturer’s identification byte and high (VIH) to select the device code byte.  
Table 5-2.  
DC and AC operating conditions for read operation  
Atmel AT27C010  
-45  
-70  
Operating temp. (case)  
VCC power supply  
Ind.  
-40C - 85C  
5V 10%  
-40C - 85C  
5V 10%  
3
0321N–EPROM–4/11  
Table 5-3.  
DC and operating characteristics for read operation  
Min  
Max  
1  
Units  
µA  
µA  
µA  
µA  
mA  
mA  
V
Symbol  
ILI  
Parameter  
Condition  
Input load current  
VIN = 0V to VCC  
Ind.  
Ind.  
ILO  
Output leakage current  
VPP(1)) read/standby current  
VOUT = 0V to VCC  
5  
IPP1(2)  
VPP = VCC  
10  
ISB1 (CMOS), CE = VCC0.3V  
ISB2 (TTL), CE = 2.0 to VCC + 0.5V  
f = 5MHz, IOUT = 0mA, CE = VIL  
100  
1
ISB  
VCC(1) standby current  
ICC  
VCC active current  
Input low voltage  
Input high voltage  
Output low voltage  
Output high voltage  
25  
VIL  
-0.6  
2.0  
0.8  
VIH  
VOL  
VOH  
VCC + 0.5  
0.4  
V
IOL = 2.1mA  
V
IOH = -400µA  
2.4  
V
Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.  
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and  
IPP.  
Table 5-4.  
AC characteristics for read operation  
Atmel AT27C010  
-45  
-70  
Symbol  
Parameter  
Condition  
CE = OE = VIL  
OE = VIL  
Min  
Max  
45  
Min  
Max  
70  
Units  
ns  
(3)  
tACC  
Address to output delay  
CE to output delay  
OE to output delay  
(2)  
tCE  
45  
70  
ns  
(2)(3)  
tOE  
CE = VIL  
20  
30  
ns  
(4)(5)  
tDF  
OE or CE high to output float, whichever occurred first  
20  
25  
ns  
tOH  
Output hold from address, CE or OE, whichever occurred first  
7
7
ns  
Figure 5-1.  
AC waveforms for read operation(1)  
Notes: 1. Timing measurement reference level is 1.5V for -45 devices. Input AC drive levels are VIL = 0.0V and VIH = 3.0V. Timing measure-  
ment reference levels for all other speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL = 0.45V and VIH = 2.4V.  
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.  
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC  
4. This parameter is only sampled, and is not 100% tested.  
.
5. Output float is defined as the point when data is no longer driven.  
Atmel AT27C010  
4
0321N–EPROM–4/11  
Atmel AT27C010  
Figure 5-2.  
Input test waveforms and measurement levels  
For -45 devices only:  
tR, tF < 5ns (10% to 90%)  
For -70 devices:  
tR, tF < 20ns (10% to 90%)  
Figure 5-3.  
Output test load  
CL = 100pF including jig capacitance, except for the -45  
devices, where CL = 30pF  
Table 5-5.  
Pin capacitance  
f = 1MHz, T = 25°C(1)  
Symbol  
CIN  
Typ  
4
Max  
8
Units  
pF  
Conditions  
VIN = 0V  
COUT  
8
12  
pF  
VOUT = 0V  
Note:  
1. Typical values for nominal supply voltage. This parameter is only sampled, and is not 100% tested.  
5
0321N–EPROM–4/11  
Figure 5-4.  
Programming Waveforms(1)  
Notes: 1. The input timing reference is 0.8V for VIL and 2.0V for VIH.  
2. tOE and tDFP are characteristics of the device, but must be accommodated by the programmer.  
3. When programming the Atmel AT27C010, a 0.1µF capacitor is required across VPP and ground to suppress spurious volt-  
age transients.  
Atmel AT27C010  
6
0321N–EPROM–4/11  
Atmel AT27C010  
Table 5-6.  
DC programming characteristics  
TA = 25 5°C, VCC = 6.5 0.25V, VPP = 13.0 0.25V  
Limits  
Symbol  
ILI  
Parameter  
Test conditions  
Min  
Max  
10  
Units  
µA  
V
Input load current  
VIN = VIL, VIH  
VIL  
Input low level  
-0.6  
2.0  
0.8  
VIH  
Input high level  
VCC + 1  
0.4  
V
VOL  
VOH  
ICC2  
IPP2  
VID  
Output low voltage  
Output high voltage  
VCC supply current (program and verify)  
VPP supply current  
IOL = 2.1mA  
V
IOH = -400µA  
2.4  
V
40  
20  
mA  
mA  
V
CE = PGM = VIL  
A9 product identification voltage  
11.5  
12.5  
Table 5-7.  
AC programming characteristics  
TA = 25 5°C, VCC = 6.5 0.25 V, VPP = 13.0 0.25V  
Limits  
Symbol  
tAS  
Parameter  
Test conditions(1)  
Min  
Max  
Units  
µs  
µs  
µs  
µs  
µs  
µs  
ns  
µs  
µs  
µs  
ns  
ns  
Address setup time  
CE setup time  
2
2
tCES  
tOES  
tDS  
Input rise and fall times  
(10% to 90%) 20ns  
OE setup time  
2
Data setup time  
2
Input pulse levels  
0.45V to 2.4V  
tAH  
Address hold time  
Data hold time  
0
tDH  
2
tDFP  
tVPS  
tVCS  
tPW  
OE high to output float delay(2)  
0
130  
Input timing reference level  
0.8V to 2.0V  
VPP setup time  
2
VCC setup time  
2
Output timing reference level  
0.8V to 2.0V  
PGM program pulse width(3)  
Data valid from OE  
VPP pulse rise time during programming  
95  
105  
150  
tOE  
tPRT  
50  
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.  
2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven.  
See timing diagram.  
3. Program pulse width tolerance is 100µsec 5%.  
Table 5-8.  
The Atmel AT27C010 integrated product identification code  
Pins  
Hex  
Codes  
A0  
0
O7  
0
O6  
0
O5  
0
O4  
1
O3  
1
O2  
1
O1  
1
O0  
0
data  
Manufacturer  
Device type  
1E  
1
0
0
0
0
0
1
0
1
05  
7
0321N–EPROM–4/11  
6.  
Rapid programming algorithm  
A 100µs PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised  
to 13.0V. Each address is first programmed with one 100µs PGM pulse without verification. Then a  
verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10  
successive 100µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been  
applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been  
checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to  
determine if the device passes or fails.  
Figure 6-1.  
Rapid programming algorithm  
Atmel AT27C010  
8
0321N–EPROM–4/11  
Atmel AT27C010  
7.  
Ordering information  
Green package option (Pb/halide-free)  
I
CC (mA)  
Standby  
tACC  
(ns)  
Active  
Atmel ordering code  
Package  
Lead finish  
Operation range  
Industrial  
45  
70  
25  
25  
0.1  
0.1  
AT27C010-45JU  
32J  
Matte tin  
(-40C to 85C)  
AT27C010-70JU  
AT27C010-70PU  
32J  
Matte tin  
Matte tin  
Industrial  
32P6  
(-40C to 85C)  
Package type  
32-lead, plastic, J-leaded chip carrier (PLCC)  
32-lead, 0.600" wide, plastic, dual inline package (PDIP)  
32J  
32P6  
9
0321N–EPROM–4/11  
8.  
Package Information  
32J – PLCC  
1.14(0.045) X 45°  
PIN NO. 1  
IDENTIFIER  
1.14(0.045) X 45°  
0.318(0.0125)  
0.191(0.0075)  
E2  
E1  
E
B1  
B
e
A2  
A1  
D1  
D
A
0.51(0.020)MAX  
45° MAX (3X)  
COMMON DIMENSIONS  
(Unit of measure = mm)  
MIN  
MAX  
3.556  
2.413  
NOM  
NOTE  
SYMBOL  
A
3.175  
1.524  
D2  
A1  
A2  
D
0.381  
12.319  
11.354  
9.906  
12.573  
D1  
D2  
E
11.506 Note 2  
10.922  
Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.  
2. Dimensions D1 and E1 do not include mold protrusion.  
Allowable protrusion is .010"(0.254mm) per side. Dimension D1  
and E1 include mold mismatch and are measured at the extreme  
material condition at the upper or lower parting line.  
14.859  
13.894  
12.471  
0.660  
15.113  
E1  
E2  
B
14.046 Note 2  
13.487  
0.813  
3. Lead coplanarity is 0.004" (0.10mm) maximum.  
B1  
e
0.330  
0.533  
1.270 TYP  
10/04/01  
TITLE  
DRAWING NO.  
32J  
REV.  
B
Package Drawing Contact:  
packagedrawings@atmel.com  
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)  
Atmel AT27C010  
10  
0321N–EPROM–4/11  
Atmel AT27C010  
32P6 – PDIP  
D
PIN  
1
E1  
A
SEATING PLANE  
A1  
L
B
B1  
e
E
COMMON DIMENSIONS  
(Unit of Measure = mm)  
0º ~ 15º REF  
C
MIN  
MAX  
4.826  
NOM  
NOTE  
SYMBOL  
A
eB  
A1  
D
0.381  
41.783  
15.240  
13.462  
0.356  
1.041  
3.048  
0.203  
15.494  
42.291 Note 1  
15.875  
E
E1  
B
13.970 Note 1  
0.559  
B1  
L
1.651  
Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion.  
Mold Flash or Protrusion shall not exceed 0.25mm (0.010").  
3.556  
C
0.381  
eB  
e
17.526  
2.540 TYP  
09/28/01  
TITLE  
DRAWING NO.  
32P6  
REV.  
B
Package Drawing Contact:  
packagedrawings@atmel.com  
32P6, 32-lead (0.600"/15.24mm wide) Plastic Dual  
Inline Package (PDIP)  
11  
0321N–EPROM–4/11  
9.  
Revision history  
Doc. Rev.  
Date  
Comments  
0321N  
04/2011  
Remove TSOP package  
Add lead finish to ordering information  
0321M  
12/2007  
Atmel AT27C010  
12  
0321N–EPROM–4/11  
Atmel Corporation  
2325 Orchard Parkway  
San Jose, CA 95131  
USA  
Atmel Asia Limited  
Unit 01-5 & 16, 19F  
BEA Tower, Millennium City 5  
418 Kwun Tong Road  
Kwun Tong, Kowloon  
HONG KONG  
Atmel Munich GmbH  
Business Campus  
Atmel Japan  
9F, Tonetsu Shinkawa Bldg.  
1-24-8 Shinkawa  
Parkring 4  
D-85748 Garching b. Munich  
GERMANY  
Chuo-ku, Tokyo 104-0033  
JAPAN  
Tel: (+1) (408) 441-0311  
Fax: (+1) (408) 487-2600  
www.atmel.com  
Tel: (+49) 89-31970-0  
Fax: (+49) 89-3194621  
Tel: (+81) (3) 3523-3551  
Fax: (+81) (3) 3523-7581  
Tel: (+852) 2245-6100  
Fax: (+852) 2722-1369  
© 2011 Atmel Corporation. All rights reserved. / Rev.: 0321N–EPROM–4/11  
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