AT93C46DY6-YH-B [MICROCHIP]
EEPROM;型号: | AT93C46DY6-YH-B |
厂家: | MICROCHIP |
描述: | EEPROM 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 光电二极管 内存集成电路 |
文件: | 总36页 (文件大小:1106K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AT93C46D/AT93C46E
Three-wire Serial EEPROM 1-Kbit (128 x 8 or 64 x 16)
Features
• Low-Voltage Operation:
– VCC = 1.8V to 5.5V
• User-Selectable Internally Organized as 128 x 8 (1K) or 64 x 16 (1K)
• Non-Selectable Internal Organization as 64 x 16 (1K), AT93C46E Only
• Industrial Temperature Range: -40°C to +85°C
• 2 MHz Clock Rate (5V)
• Self-Timed Write Cycle within 5 ms Maximum
• High Reliability:
– Endurance: 1,000,000 write cycles
– Data retention: 100 years
• Green Package Options (Lead-free/Halide-free/RoHS compliant)
• Die Sale Options: Wafer Form and Tape and Reel
Packages
• 8-lead SOIC, 8-lead TSSOP, 8-pad UDFN, 8-lead PDIP and 8-ball VFBGA
DS20006224A-page 1
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Table of Contents
Features.......................................................................................................................... 1
Packages.........................................................................................................................1
1. Package Types (not to scale).................................................................................... 4
2. Pin Descriptions.........................................................................................................5
2.1. Chip Select (CS)...........................................................................................................................5
2.2. Serial Data Clock (SK)................................................................................................................. 5
2.3. Serial Data Input (DI)....................................................................................................................5
2.4. Serial Data Output (DO)...............................................................................................................5
2.5. Ground (GND)..............................................................................................................................6
2.6. Internal Organization (ORG)........................................................................................................ 6
2.7. Device Power Supply (VCC)......................................................................................................... 6
3. Description.................................................................................................................7
3.1. Block Diagram..............................................................................................................................7
4. Electrical Characteristics........................................................................................... 8
4.1. Absolute Maximum Ratings..........................................................................................................8
4.2. DC and AC Operating Range.......................................................................................................8
4.3. DC Characteristics....................................................................................................................... 8
4.4. AC Characteristics........................................................................................................................9
4.5. Synchronous Data Timing.......................................................................................................... 11
4.6. Electrical Specifications..............................................................................................................11
5. Device Commands and Addressing........................................................................ 13
5.1. READ......................................................................................................................................... 13
5.2. Erase/Write Enable (EWEN)...................................................................................................... 14
5.3. Erase/Write Disable (EWDS)..................................................................................................... 14
5.4. ERASE....................................................................................................................................... 15
5.5. WRITE........................................................................................................................................15
5.6. Write All (WRAL)........................................................................................................................ 16
5.7. Erase All (ERAL)........................................................................................................................ 16
6. Packaging Information.............................................................................................18
6.1. Package Marking Information.....................................................................................................18
7. Revision History.......................................................................................................30
The Microchip Website..................................................................................................32
Product Change Notification Service.............................................................................32
Customer Support......................................................................................................... 32
Product Identification System........................................................................................33
DS20006224A-page 2
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Microchip Devices Code Protection Feature................................................................. 33
Legal Notice...................................................................................................................34
Trademarks................................................................................................................... 34
Quality Management System........................................................................................ 35
Worldwide Sales and Service........................................................................................36
DS20006224A-page 3
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Package Types (not to scale)
1.
Package Types (not to scale)
8-pad UDFN(1)
8-lead PDIP/SOIC/TSSOP
(Top View)
(Top View)
CS
1
2
8
7
Vcc
CS
1
8
Vcc
SK
DI
2
3
4
7
6
5
NC
SK
DI
NC
ORG(2)
GND
3
4
6
5
ORG(2)
GND
DO
DO
8-ball VFBGA(1)
(Top View)
1
2
3
4
8
7
6
5
Vcc
CS
SK
NC
DI
ORG
GND
DO
Note:ꢀ
1. This package is only available on the AT93C46D.
2. ORG pin is No Connect (NC) on the AT93C46E device.
DS20006224A-page 4
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Pin Descriptions
2.
Pin Descriptions
The descriptions of the pins are listed in Table 2-1.
Table 2-1.ꢀPin Function Table
Name
8‑Lead
PDIP
8‑Lead
SOIC
8‑Lead
TSSOP
8‑Pad
UDFN
8-Ball
VFBGA
Function
Chip Select
(1)
CS
SK
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
DI
DO
GND
(2)
ORG
NC
Internal Organization
No Connect
V
Device Power Supply
CC
Note:ꢀ
1. The exposed pad on this package can be connected to GND or left floating.
2. The Internal Organization (ORG) pin is a No Connect (NC) on the AT93C46E device.
2.1
2.2
Chip Select (CS)
The Chip Select (CS) pin is used to control device selection. The AT93C46D/AT93C46E is selected when
the CS pin is high. When the device is not selected, data will not be accepted via the Serial Data Input
(DI) pin, and the Serial Output (DO) pin will remain in a high-impedance state.
Serial Data Clock (SK)
The Serial Data Clock (SK) pin is used to synchronize the communication between a master and the
AT93C46D/AT93C46E. Instructions, addresses or data present on the Serial Data Input (DI) pin is latched
in on the rising edge of SK, while output on the Serial Data Output (DO) pin is also clocked out on the
rising edge of SK.
2.3
2.4
Serial Data Input (DI)
The Serial Data Input (DI) pin is used to transfer data into the device. It receives instructions, addresses
and data. Data is latched on the rising edge of the Serial Data Clock (SK).
Serial Data Output (DO)
The Serial Data Output (DO) pin is used to transfer data out of the AT93C46D/AT93C46E. During a read
sequence, data is shifted out on this pin after the rising edge of the Serial Data Clock (SK).
This pin also outputs the Ready/Busy status of the part if CS is brought high after being low for a
minimum of tcs and an erase or write operation has been initiated.
DS20006224A-page 5
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Pin Descriptions
2.5
2.6
Ground (GND)
The ground reference for the power supply. The Ground (GND) pin should be connected to the system
ground.
Internal Organization (ORG)
The Internal Organization (ORG) pin is used to select between the x16 or x8 memory organizations of the
device. When the ORG pin is tied to VCC, the x16 memory organization is selected. When the ORG pin is
tied to VSS, the x8 memory organization is selected.
If the ORG pin is left unconnected and the application does not load the input beyond the capability of the
internal 1 MΩ pull-up resistor, then the x16 organization is selected.
Note:ꢀ This pin is a No Connect (NC) on the AT93C46E.
2.7
Device Power Supply (VCC)
The Device Power Supply (VCC) pin is used to supply the source voltage to the device. Operations at
invalid VCC voltages may produce spurious results and should not be attempted.
DS20006224A-page 6
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Description
3.
Description
The AT93C46D provides 1,024 bits of Serial Electrically Erasable and Programmable Read-Only Memory
(EEPROM) organized as 64 words of 16 bits each (when the ORG pin is connected to VCC) and 128
words of 8 bits each (when the ORG pin is tied to ground). The device is optimized for use in many
industrial and commercial applications where low‑power and low‑voltage operations are essential. The
AT93C46D is available in space-saving 8-lead SOIC, 8-lead TSSOP, 8-pad UDFN, 8-lead PDIP, and 8-
ball VFBGA packages. All packages operate from 1.8V to 5.5V.
The AT93C46E provides 1,024 bits of Serial Electrically Erasable and Programmable Read-Only Memory
(EEPROM) organized as 64 words of 16 bits each only. The AT93C46E does not offer the ORG pin so
organization is not user-selectable on this device. The device is optimized for use in many industrial and
commercial applications where low‑power and low‑voltage operations are essential. The AT93C46E is
also available in space-saving 8-lead SOIC, 8-lead TSSOP, and 8-lead PDIP packages. All packages
operate from 1.8V to 5.5V.
The AT93C46D/AT93C46E is enabled through the Chip Select (CS) pin and accessed via a three-wire
serial interface consisting of Data Input (DI), Data Output (DO), and Serial Data Clock (SK). Upon
receiving a READ instruction at DI, the address is decoded, and the data is clocked out serially on the DO
pin. The write cycle is completely self-timed, and no separate erase cycle is required before write. The
write cycle is only enabled when the part is in the Erase/Write Enable state. When CS is brought high
following the initiation of a write cycle, the DO pin outputs the Ready/Busy status of the part.
3.1
Block Diagram
Memory
System Control
Module
Power-on
Reset
Generator
CS
SK
VCC
High Voltage
Generation
Circuit
EEPROM Array
128 x 8(1)
or
64 x 16
Address Register
and Counter
Column Decoder
Data Register
DI
ORG(1)
Clock
Generator
DO
GND
Output
Buffer
Note:ꢀ
1. The organization of the AT93C46E is not selectable by the ORG pin and defaults to 64x16. If the
x16 organization is the mode of choice and pin 6 (ORG) is left unconnected, Microchip
recommends using AT93C46E device.
DS20006224A-page 7
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Electrical Characteristics
4.
Electrical Characteristics
4.1
Absolute Maximum Ratings
Temperature under bias
Storage temperature
VCC
-55°C to +125°C
-65°C to +150°C
6.25V
Voltage on any pin with respect to ground
DC output current
-1.0V to +7.0V
5.0 mA
ESD protection
2 kV
Note:ꢀ Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operation listings of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
4.2
4.3
DC and AC Operating Range
Table 4-1.ꢀDC and AC Operating Range
AT93C46D/AT93C46E
Operating Temperature (Case)
VCC Power Supply
Industrial Temperature Range
Low-Voltage Grade
-40°C to +85°C
1.8V to 5.5V
DC Characteristics
Table 4-2.ꢀDC Characteristics(1)
Parameter
Symbol
Minimum
Typical
—
Maximum Units Test Conditions
Supply Voltage
Supply Voltage
Supply Voltage
Supply Current
Supply Current
V
V
V
1.8
2.7
4.5
—
5.5
5.5
5.5
2.0
2.0
1.0
V
V
CC1
CC2
CC3
CC1
CC2
—
—
V
I
I
0.5
0.5
0.4
mA
mA
μA
V
V
V
= 5.0V, Read at 1 MHz
= 5.0V, Write at 1 MHz
= 1.8V, CS = 0V
CC
CC
CC
—
Standby Current
(1.8V Option)
I
I
I
—
SB1
SB2
SB3
Standby Current
(2.7V Option)
—
—
6.0
10.0
15.0
μA
μA
V
V
= 2.7V, CS = 0V
= 5.0V, CS = 0V
CC
CC
Standby Current
(5.0V Option)
10.0
DS20006224A-page 8
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Electrical Characteristics
...........continued
Parameter
Symbol
Minimum
Typical
Maximum Units Test Conditions
Input Leakage
Current
I
—
0.1
1.0
1.0
0.8
μA
V
= 0 to V
IL
IN
IN
CC
CC
Output Leakage
Current
I
—
0.1
μA
V
= 0 to V
LO
Input Low‑Voltage
Input High‑Voltage
Input Low‑Voltage
Input High‑Voltage
V
-0.6
2.0
—
—
—
—
—
V
V
V
V
V
2.7V ≤ V
2.7V ≤ V
1.8V ≤ V
1.8V ≤ V
2.7V ≤ V
≤ 5.5V (Note 2)
≤ 5.5V (Note 2)
≤ 2.7V (Note 2)
≤ 2.7V (Note 2)
≤ 5.5V,
IL1
CC
CC
CC
CC
CC
V
V
+ 1
IH1
CC
V x 0.3
CC
V
-0.6
IL2
V
V
x 0.7
V
+ 1
IH2
CC
CC
Output
V
—
0.4
OL1
Low‑Voltage
I
= 2.1 mA
OL
Output
High‑Voltage
V
2.4
—
—
—
—
—
0.2
—
V
V
V
2.7V ≤ V
≤ 5.5V,
OH1
CC
= -0.4 mA
I
OH
Output
Low‑Voltage
V
1.8V ≤ V
≤ 2.7V,
OL2
CC
= 0.15 mA
I
OL
Output
High‑Voltage
V
V
- 0.2
1.8V ≤ V
≤ 2.7V,
OH2
CC
CC
= -100 µA
I
OH
Note:ꢀ
1. Applicable over recommended operating range from: TA = -40°C to +85°C, VCC = 1.8V to 5.5V
(unless otherwise noted).
2. VIL min and VIH max are reference only and are not tested.
4.4
AC Characteristics
Table 4-3.ꢀAC Characteristics(1)
Parameter
Symbol Minimum Typical Maximum
Units Test Conditions
Clock Frequency, SK
fSK
tSKH
tSKL
0
0
—
—
—
—
—
—
—
—
—
2
1
MHz
MHz
kHz
ns
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
0
250
—
—
—
—
—
—
High Time, SK
Low Time, SK
250
250
1000
250
250
1000
ns
ns
ns
ns
ns
DS20006224A-page 9
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Electrical Characteristics
...........continued
Parameter
Symbol Minimum Typical Maximum
Units Test Conditions
Minimum CS Low
Time
tCS
250
250
1000
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
CS Setup Time
tCSS
4.5V ≤ VCC ≤ 5.5V,
Relative to SK
50
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
2.7V ≤ VCC ≤ 5.5V,
Relative to SK
200
100
100
400
1.8V ≤ VCC ≤ 5.5V,
Relative to SK
DI Setup Time
tDIS
4.5V ≤ VCC ≤ 5.5V,
Relative to SK
2.7V ≤ VCC ≤ 5.5V,
Relative to SK
1.8V ≤ VCC ≤ 5.5V,
Relative to SK
CS Hold Time
DI Hold Time
tCSH
tDIH
0
—
—
—
—
ns
ns
Relative to SK
100
4.5V ≤ VCC ≤ 5.5V,
Relative to SK
100
400
—
—
—
—
ns
ns
2.7V ≤ VCC ≤ 5.5V,
Relative to SK
1.8V ≤ VCC ≤ 5.5V,
Relative to SK
Output Delay to 1
Output Delay to 0
CS to Status Valid
tPD1
tPD0
tSV
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
250
250
ns
ns
ns
ns
ns
ns
ns
ns
ns
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V,
1000
250
250
1000
250
250
1000
DS20006224A-page 10
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Electrical Characteristics
...........continued
Parameter
Symbol Minimum Typical Maximum
Units Test Conditions
CS to DO in
High‑impedance
tDF
—
—
—
—
3
100
250
400
5
ns
ns
ns
ms
4.5V ≤ VCC ≤ 5.5V,
CS = VIL
—
2.7V ≤ VCC ≤ 5.5V,
CS = VIL
—
1.8V ≤ VCC ≤ 5.5V,
CS = VIL
Write Cycle Time
tWP
0.1
1.8V ≤ VCC ≤ 5.5V
Note:ꢀ
1. Applicable over recommended operating range from TA = -40°C to +85°C, VCC = As Specified, CL =
1 TTL Gate and 100 pF (unless otherwise noted).
4.5
Synchronous Data Timing
Figure 4-1.ꢀSynchronous Data Timing
VIH
VIL
(1)
1
µs
CS
t
t
t
t
CSH
SKH
CSS
SKL
VIH
VIL
SK
t
t
DIH
DIS
VIH
VIL
DI
t
t
DF
DF
t
t
PD0
PD1
VOH
VOL
DO (Read)
t
SV
VOH
VOL
DO (Program)
Status Valid
Note:ꢀ
1. This is the minimum SK period.
4.6
Electrical Specifications
4.6.1
Power-Up Requirements and Reset Behavior
During a power-up sequence, the VCC supplied to the AT93C46D/AT93C46E should monotonically rise
from GND to the minimum VCC level, as specified in Table 4-1, with a slew rate no faster than 0.1 V/µs.
4.6.1.1 Device Reset
To prevent inadvertent write operations or any other spurious events from occurring during a power-up
sequence, the AT93C46D/AT93C46E includes a Power-on Reset (POR) circuit. Upon power-up, the
device will not respond to any commands until the VCC level crosses the internal voltage threshold (VPOR
that brings the device out of Reset and into Standby mode.
)
DS20006224A-page 11
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Electrical Characteristics
The system designer must ensure the instructions are not sent to the device until the VCC supply has
reached a stable value greater than or equal to the minimum VCC level. Additionally, once the VCC is
greater than or equal to the minimum VCC level, the bus master must wait at least tPUP before sending the
first command to the device. See Power-up Conditions(1) for the values associated with these power-up
parameters.
Table 4-4.ꢀPower-up Conditions(1)
Symbol
Parameter
Min. Max. Units
tPUP
Time required after VCC is stable before the device can accept commands 100
-
1.5
-
µs
V
VPOR Power-on Reset Threshold Voltage
-
tPOFF Minimum time at VCC = 0V between power cycles
500
ms
Note:ꢀ
1. These parameters are characterized but they are not 100% tested in production.
If an event occurs in the system where the VCC level supplied to the AT93C46D/AT93C46E drops below
the maximum VPOR level specified, it is recommended that a full power cycle sequence be performed by
first driving the VCC pin to GND, waiting at least the minimum tPOFF time and then performing a new
power-up sequence in compliance with the requirements defined in this section.
4.6.2
Pin Capacitance
Table 4-5.ꢀPin Capacitance(1)
Symbol Test Condition
Max.
Units Conditions
COUT
CIN
Output Capacitance (DO)
Input Capacitance (CS, SK, DI, ORG)
5
5
pF
pF
VOUT = 0V
VIN = 0V
Note:ꢀ
1. This parameter is characterized but is not 100% tested in production.
4.6.3
EEPROM Cell Performance Characteristics
Table 4-6.ꢀEEPROM Cell Performance Characteristics
Operation
Test Condition
TA = 25°C, VCC = 5.0V
TA = 55°C
Min.
1,000,000
100
Max.
—
Units
Write Cycles
Years
Write Endurance(1)
Data Retention(1)
—
Note:ꢀ
1. Performance is determined through characterization and the qualification process.
DS20006224A-page 12
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Device Commands and Addressing
5.
Device Commands and Addressing
The AT93C46D/AT93C46E is accessed via a simple and versatile three-wire serial communication
interface. Device operation is controlled by seven instructions issued by the Host processor. A valid
instruction starts with a rising edge of CS and consists of a Start bit (SB), followed by the appropriate
opcode, and the desired memory address location.
Table 5-1.ꢀAT93C46D/AT93C46E Instruction Set
Instruction
SB
Opcode
Address
Data
Comments
(1)
X8
(1)
X16
X8
X16
READ
EWEN
1
1
10
00
A ‑A
A ‑A
5 0
Reads data stored in memory at
specified address.
6
0
11XXXXXXX
11XXXXXX
Write Enable must precede all
programming modes.
ERASE
WRITE
ERAL
1
1
1
11
01
00
A ‑A
A ‑A
Erases memory location A ‑A .
N 0
6
0
0
5
0
0
A ‑A
6
A ‑A
5
D ‑D
D
‑D
Writes memory location A ‑A .
N 0
7
0
15
0
10XXXXXXX
01XXXXXXX
00XXXXXXX
10XXXXXX
01XXXXXX
00XXXXXX
Erases all memory locations. Valid
only at V . See Table 4-2.
CC3
Writes all memory locations. Valid
only at V . See Table 4-2
WRAL
EWDS
1
1
00
00
D ‑D
D
15
‑D
0
7
0
CC3
Disables all programming
instructions.
Note:ꢀ
1. The ‘X’ in the address field represent a “don’t care” bit, and must be sent to the device.
Table 5-2.ꢀOrganization Key for Timing Diagrams
I/O
AT93C46D/AT93C46E (1K)
x8(1)
A6
x16
A5
AN
DN
D7
D15
Note:ꢀ
1. The internal organization of the AT93C46E is x16 only.
5.1
READ
The READ instruction contains the address code for the memory location to be read. After the instruction
and address are decoded, data from the selected memory location is available at the DO pin. Output data
changes are synchronized with the rising edges of the SK pin.
Note:ꢀ A dummy bit (logic ‘0’) precedes the 8-bit or 16-bit data output string.
DS20006224A-page 13
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Device Commands and Addressing
Figure 5-1.ꢀREAD Timing
tCS
CS
SK
DI
1
1
0
AN
A0
High-impedance
DO
0
DN
D0
5.2
Erase/Write Enable (EWEN)
To ensure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when
power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any
programming instructions can be carried out.
Note:ꢀ Once in the write enabled state, programming remains enabled until an EWDS instruction is
executed, or VCC power is removed from the part.
Figure 5-2.ꢀEWEN Timing
t
CS
CS
SK
DI
...
0
1
1
1
0
5.3
Erase/Write Disable (EWDS)
To protect against accidental data disturbance, the Erase/Write Disable (EWDS) instruction disables all
programming modes and should be executed after all programming operations. The operation of the
READ instruction is independent of both the EWEN and EWDS instructions and can be executed at any time.
DS20006224A-page 14
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Device Commands and Addressing
Figure 5-3.ꢀEWDS Timing
tCS
CS
SK
...
0
0
0
1
0
DI
5.4
ERASE
The ERASE instruction programs all bits in the specified memory location to the logic ‘1’ state. The self-
timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the
Ready/Busy status of the part if CS is brought high after being kept low for a minimum of tCS. A logic ‘1’ at
the DO pin indicates that the selected memory location has been erased, and the part is ready for
another instruction.
Figure 5-4.ꢀERASE Timing
t
CS
Standby
Check
Status
CS
SK
A0
1
1
1
AN
...
AN-1 AN-2
DI
t
DF
t
SV
High-impedance
High-impedance
Busy
DO
Ready
t
WP
5.5
WRITE
The WRITE instruction contains the 8 bits or 16 bits of data to be written into the specified memory
location. The self-timed programming cycle, tWP, starts after the last bit of data is received at DI pin . The
DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum
of tCS. A logic ‘0’ at DO indicates that programming is still in progress. A logic ‘1’ indicates that the
memory location at the specified address has been written with the data pattern contained in the
instruction, and the part is ready for further instructions. A Ready/Busy status cannot be obtained if CS is
brought high after the end of the self-timed programming cycle, tWP
.
DS20006224A-page 15
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Device Commands and Addressing
Figure 5-5.ꢀWRITE Timing
t
CS
CS
SK
...
...
AN
DN
1
0
1
A0
D0
DI
High-impedance
DO
Busy
Ready
t
WP
5.6
Write All (WRAL)
The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the
instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept
low for a minimum of tCS
.
Note:ꢀ The WRAL instruction is valid only at VCC3 (see Table 4-2).
Figure 5-6.ꢀWRAL Timing
tCS
CS
SK
1
0
0
0
1
...
D
N
...
D0
DI
High-impedance
DO
Busy
Ready
tWP
5.7
Erase All (ERAL)
The Erase All (ERAL) instruction programs every bit in the memory array to the logic ‘1’ state and is
primarily used for testing purposes. The DO pin outputs the Ready/Busy status of the part if CS is brought
high after being kept low for a minimum of tCS
.
Note:ꢀ The ERAL instruction is valid only at VCC3 (see Table 4-2).
DS20006224A-page 16
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Device Commands and Addressing
Figure 5-7.ꢀERAL Timing
t
CS
Standby
Check
Status
CS
SK
1
0
0
1
0
DI
t
DF
t
SV
High-impedance
High-impedance
DO
Busy
Ready
t
WP
DS20006224A-page 17
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
6.
Packaging Information
6.1
Package Marking Information
AT93C46D and AT93C46E: Package Marking Information
8-lead TSSOP
8-lead SOIC
8-lead PDIP
ATMLUYWW
ATMLHYWW
###% CO
YYWWNNN
ATHYWW
###% CO
YYWWNNN
###%CO
YYWWNNN
8-ball VFBGA
8-pad UDFN
2.0 x 3.0 mm Body
1.5 x 2.0 mm Body
###
###U
WNNN
H%
NNN
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT93C46D
Truncation Code ###: 46D
Truncation Code ###: 46E
AT93C46E
Date Codes
Voltages
YY = Year
16: 2016
17: 2017
18: 2018
19: 2019
Y = Year
WW = Work Week of Assembly
% = Minimum Voltage
L: 1.8V min
20: 2020
21: 2021
22: 2022
23: 2023
6: 2016
7: 2017
8: 2018
9: 2019
0: 2020
1: 2021
2: 2022
3: 2023
02: Week 2
04: Week 4
...
52: Week 52
Country of Origin
Device Grade
H or U: Industrial Grade
Atmel Truncation
CO = Country of Origin
AT: Atmel
ATM: Atmel
ATML: Atmel
Lot Number or Trace Code
NNN = Alphanumeric Trace Code (2 Characters for Small Packages)
DS20006224A-page 18
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A
D
NOTE 5
N
E
2
E1
2
E1
E
1
2
NOTE 1
e
NX b
0.25
C A–B D
B
NOTE 5
TOP VIEW
0.10 C
0.10 C
C
A2
A
SEATING
PLANE
8X
SIDE VIEW
A1
h
R0.13
R0.13
h
H
0.23
L
SEE VIEW C
(L1)
VIEW A–A
VIEW C
Microchip Technology Drawing No. C04-057-SN Rev E Sheet 1 of 2
DS20006224A-page 19
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
Overall Height
Molded Package Thickness
Standoff
Overall Width
A
-
-
-
-
1.75
-
0.25
A2
A1
E
1.25
0.10
§
6.00 BSC
Molded Package Width
Overall Length
E1
D
3.90 BSC
4.90 BSC
Chamfer (Optional)
Foot Length
h
L
0.25
0.40
-
-
0.50
1.27
Footprint
L1
1.04 REF
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
0°
0.17
0.31
5°
-
-
-
-
-
8°
c
0.25
0.51
15°
b
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Microchip Technology Drawing No. C04-057-SN Rev E Sheet 2 of 2
DS20006224A-page 20
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
C
Y1
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Contact Pitch
E
C
X1
Y1
1.27 BSC
5.40
Contact Pad Spacing
Contact Pad Width (X8)
Contact Pad Length (X8)
0.60
1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2057-SN Rev E
DS20006224A-page 21
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
1
2
b
e
c
φ
A
A2
A1
L
L1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
0.65 BSC
Overall Height
A
–
–
1.20
1.05
0.15
Molded Package Thickness
Standoff
A2
A1
E
0.80
0.05
1.00
–
Overall Width
6.40 BSC
Molded Package Width
Molded Package Length
Foot Length
E1
D
4.30
2.90
0.45
4.40
4.50
3.10
0.75
3.00
L
0.60
Footprint
L1
φ
1.00 REF
Foot Angle
0°
–
–
–
8°
Lead Thickness
c
0.09
0.20
0.30
Lead Width
b
0.19
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-086B
DS20006224A-page 22
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20006224A-page 23
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]
Atmel Legacy YNZ Package
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E
N
(DATUM A)
(DATUM B)
NOTE 1
2X
0.10 C
1
2
2X
TOP VIEW
0.10 C
A1
0.10 C
0.08 C
C
A
SEATING
PLANE
8X
(A3)
SIDE VIEW
0.10
C A B
D2
e
2
1
2
0.10
K
C A B
E2
N
L
8X b
0.10
0.05
C A B
e
C
BOTTOM VIEW
Microchip Technology Drawing C04-21355-Q4B Rev A Sheet 1 of 2
DS20006224A-page 24
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]
Atmel Legacy YNZ Package
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of Terminals
Pitch
Overall Height
Standoff
Terminal Thickness
Overall Length
Exposed Pad Length
Overall Width
Exposed Pad Width
Terminal Width
Terminal Length
N
e
8
0.50 BSC
0.55
0.02
0.152 REF
2.00 BSC
1.50
3.00 BSC
1.30
A
A1
A3
D
D2
E
E2
b
L
0.50
0.00
0.60
0.05
1.40
1.60
1.20
0.18
0.35
0.20
1.40
0.30
0.45
-
0.25
0.40
-
Terminal-to-Exposed-Pad
K
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-21355-Q4B Rev A Sheet 2 of 2
DS20006224A-page 25
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]
Atmel Legacy YNZ Package
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X2
EV
G2
8
ØV
C
Y2
G1
Y1
1
2
SILK SCREEN
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
MILLIMETERS
NOM
0.50 BSC
MIN
MAX
Contact Pitch
Optional Center Pad Width
Optional Center Pad Length
Contact Pad Spacing
X2
Y2
C
1.60
1.40
2.90
Contact Pad Width (X8)
Contact Pad Length (X8)
Contact Pad to Center Pad (X8)
Contact Pad to Contact Pad (X6)
Thermal Via Diameter
X1
Y1
G1
G2
V
0.30
0.85
0.20
0.33
0.30
1.00
Thermal Via Pitch
EV
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-21355-Q4B Rev A
DS20006224A-page 26
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
N
B
E1
NOTE 1
1
2
TOP VIEW
E
A2
A
C
PLANE
L
c
A1
e
eB
8X b1
8X b
.010
C
SIDE VIEW
END VIEW
Microchip Technology Drawing No. C04-018D Sheet 1 of 2
DS20006224A-page 27
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
ALTERNATE LEAD DESIGN
(VENDOR DEPENDENT)
DATUM A
DATUM A
b
b
e
2
e
2
e
e
Units
Dimension Limits
INCHES
NOM
8
.100 BSC
-
MIN
MAX
Number of Pins
Pitch
N
e
Top to Seating Plane
A
-
.210
.195
-
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
A2
A1
E
E1
D
.115
.015
.290
.240
.348
.115
.008
.040
.014
-
.130
-
.310
.250
.365
.130
.010
.060
.018
-
.325
.280
.400
.150
.015
.070
.022
.430
L
c
b1
b
eB
Lower Lead Width
Overall Row Spacing
§
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-018D Sheet 2 of 2
DS20006224A-page 28
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Packaging Information
d
0.10 (4X)
d
0.08 C
f
0.10
C
A
E
C
D
2.
b
j
j
n 0.15m
0.08m
C
C
A B
n
B
PIN 1 BALL PAD CORNER
A1
A2
A
TOP VIEW
SIDE VIEW
PIN 1 BALL PAD CORNER
4
3
1
2
d
(d1)
6
5
8
7
COMMON DIMENSIONS
(Unit of Measure - mm)
e
(e1)
SYMBOL
NOM
MIN
MAX
NOTE
0.73
0.09
0.40
0.20
0.79
0.85
0.19
0.50
0.30
A
A1
A2
b
BOTTOM VIEW
8 SOLDER BALLS
0.14
0.45
Notes:
1. This drawing is for general information only.
0.25
2
1.50 BSC
2.0 BSC
0.50 BSC
0.25 REF
1.00 BSC
0.25 REF
D
E
2. Dimension ‘b’ is measured at maximum solder ball diameter.
3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu.
e
e1
d
d1
7/1/14
REV.
TITLE
DRAWING NO.
8U3-1
GPC
GXU
8U3-1, 8-ball, 1.50mm x 2.00mm body, 0.50mm pitch,
Very Thin, Fine-Pitch Ball Grid Array Package (VFBGA)
G
Note:ꢀ For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging.
DS20006224A-page 29
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Revision History
7.
Revision History
Revision A (July 2019)
Updated to the Microchip template. Microchip DS20006224 replaces Atmel documents 5193 and 5207.
Updated Package Marking Information. Removed lead finish designation. Updated trace code format in
package markings. Updated section content throughout for clarification. Updated the 8U3-1 VFBGA
package drawing. Updated the PDIP, SOIC, TSSOP and UDFN package drawings to Microchip format.
Atmel AT93C46E 5207 Revision F (January 2015)
Updated ordering information section.
Atmel AT93C46D 5193 Revision H (January 2015)
Added the UDFN expanded quantity option and the ordering information section. Updated the 8MA2 and
8P3 package drawings.
Atmel AT93C46E 5207 Revision E (October 2014)
Added the part markings and ordering code detail. Updated the package outline drawings and the 8A2 to
8X. Updated the template, Atmel logos, and the disclaimer page.
Atmel AT93C46D 5193 Revision G (August 2014)
Updated package drawings, template, logos, and disclaimer page.
Atmel AT93C46E 5207 Revision D (January 2008)
Removed the ‘preliminary’ status.
Atmel AT93C46D 5193 Revision F (January 2008)
Removed the ‘preliminary’ status.
Atmel AT93C46E 5207 Revision C (November 2007)
Modified the ‘max’ value in AC Characteristics table.
Atmel AT93C46D 5193 Revision E (November 2007)
Modified the ‘max’ value in AC Characteristics table.
Atmel AT93C46E 5207 Revision B (August 2007)
Modified Part Marking Schemes.
Atmel AT93C46D 5193 Revision D (August 2007)
Moved Pinout figure. Added new feature for Die Sales. Modified Ordering Information table layout.
Modified Park Marking Schemes.
Atmel AT93C46D 5193 Revision C (June 2007)
Updated to new template. Added Product Markup Scheme. Added Technical email contact. Corrected
Figures 4 and 5.
DS20006224A-page 30
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Revision History
Atmel AT93C46D 5193 Revision B (February 2007)
Added ‘Ultra Thin’ description to 8-lead Mini-MAP package.
Atmel AT93C46E 5207 Revision A (January 2007)
Initial document release.
Atmel AT93C46D 5193 Revision A (January 2007)
Initial document release.
DS20006224A-page 31
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
The Microchip Website
Microchip provides online support via our website at http://www.microchip.com/. This website is used to
make files and information easily available to customers. Some of the content available includes:
• Product Support – Data sheets and errata, application notes and sample programs, design
resources, user’s guides and hardware support documents, latest software releases and archived
software
• General Technical Support – Frequently Asked Questions (FAQs), technical support requests,
online discussion groups, Microchip design partner program member listing
• Business of Microchip – Product selector and ordering guides, latest Microchip press releases,
listing of seminars and events, listings of Microchip sales offices, distributors and factory
representatives
Product Change Notification Service
Microchip’s product change notification service helps keep customers current on Microchip products.
Subscribers will receive email notification whenever there are changes, updates, revisions or errata
related to a specified product family or development tool of interest.
To register, go to http://www.microchip.com/pcn and follow the registration instructions.
Customer Support
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Embedded Solutions Engineer (ESE)
• Technical Support
Customers should contact their distributor, representative or ESE for support. Local sales offices are also
available to help customers. A listing of sales offices and locations is included in this document.
Technical support is available through the web site at: http://www.microchip.com/support
DS20006224A-page 32
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
Product Identification System
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
A T 9 3 C 4 6 D N - S H - B
Shipping Carrier Option
B
T
E
= Bulk
= Tape and Reel, Standard Quantity Option
= Tape and Reel, Extended Quantity Option
Product Family
93C = Microwire-compatible
Three-Wire Serial EEPROM
Package Device Grade or
Wafer/Die Thickness
H or U = Industrial Temperature Range
(-40°C to +85°C)
Device Density
46 = 1-Kilobit
11
= 11mil Wafer Thickness
Device Organization
D = User Selectable
E = 16 x 64 Only
Package Option
S
T
Y
P
U
= SOIC
= TSSOP
= 2.0mm x 3.0mm UDFN
= PDIP
= VFBGA
Package Variation (if applicable)
N = SOIC
Y6 = UDFN
U3 = VFBGA
WWU= Wafer Unsawn
Examples
Device
Package
Package
Drawing
Code
Package
Option
Organization
Shipping
Carrier Option
Device Grade
AT93C46DN-SH-B
AT93C46EN-SH-T
AT93C46E-TH-B
AT93C46D-TH-T
AT93C46DY6-YH-T
AT93C46DY6-YH-E
SOIC
SOIC
SN
SN
S
S
T
T
Y
Y
User Selectable
16 X 64
Bulk (Tubes)
Tape and Reel
Bulk (Tubes)
Industrial
Temperature
(-40°C to 85°C)
TSSOP
TSSOP
UDFN
UDFN
ST
16 X 64
ST
User Selectable
User Selectable
User Selectable
Tape and Reel
Tape and Reel
Q4B
Q4B
Extended Qty.,
Tape and Reel
AT93C46E-PU
PDIP
P
P
U
16 X 64
Bulk (Tubes)
AT93C46DU3-UU-T
VFBGA
8U3-1
User Selectable
Tape and Reel
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the
market today, when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of
these methods, to our knowledge, require using the Microchip products in a manner outside the
operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is
engaged in theft of intellectual property.
DS20006224A-page 33
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the
code protection features of our products. Attempts to break Microchip’s code protection feature may be a
violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software
or other copyrighted work, you may have a right to sue for relief under that Act.
Legal Notice
Information contained in this publication regarding device applications and the like is provided only for
your convenience and may be superseded by updates. It is your responsibility to ensure that your
application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY
OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS
CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life
support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend,
indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting
from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual
property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks,
BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR,
HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB,
megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC,
picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC,
SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TempTrackr, TimeSource, tinyAVR,
UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed
Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge,
ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium,
TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky,
BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController,
dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain,
Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient
Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE,
Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
DS20006224A-page 34
Datasheet
© 2019 Microchip Technology Inc.
AT93C46D/AT93C46E
The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered
trademarks of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
©
2019, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-4748-1
AMBA, Arm, Arm7, Arm7TDMI, Arm9, Arm11, Artisan, big.LITTLE, Cordio, CoreLink, CoreSight, Cortex,
DesignStart, DynamIQ, Jazelle, Keil, Mali, Mbed, Mbed Enabled, NEON, POP, RealView, SecurCore,
Socrates, Thumb, TrustZone, ULINK, ULINK2, ULINK-ME, ULINK-PLUS, ULINKpro, µVision, Versatile
are trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
Quality Management System
For information regarding Microchip’s Quality Management Systems, please visit http://
www.microchip.com/quality.
DS20006224A-page 35
Datasheet
© 2019 Microchip Technology Inc.
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DS20006224A-page 36
Datasheet
© 2019 Microchip Technology Inc.
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