AT93C56B-MAHM-E [MICROCHIP]
EEPROM, 128X16, Serial, CMOS, PDSO8;
| 型号： | AT93C56B-MAHM-E |
| 厂家： | 
MICROCHIP |
| 描述： | EEPROM, 128X16, Serial, CMOS, PDSO8 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 光电二极管 内存集成电路 |
| 文件： | 总20页 (文件大小：809K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AT93C56B and AT93C66B
3-wire Serial EEPROM
2K (256 x 8 or 128 x 16) and 4K (512 x 8 or 256 x 16)
DATASHEET
Features
Low-voltage Operation
VCC = 1.7V to 5.5V
User-selectable Internal Organization
̶
̶
̶
2K: 256 x 8 or 128 x 16
4K: 512 x 8 or 256 x 16
3-wire Serial Interface
Sequential Read Operation
2MHz Clock Rate (5V)
Self-timed Write Cycle (5ms Max)
High Reliability
̶
̶
Endurance: 1,000,000 Write Cycles
Data Retention: 100 Years
8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 8-pad XDFN, and
8-ball VFBGA packages
Description
The Atmel® AT93C56B/66B provides 2,048/4,096 bits of Serial Electrically
Erasable Programmable Read-Only Memory (EEPROM) organized as 128/256
words of 16 bits each (when the ORG pin is connected to VCC) and 256/512 words
of 8 bits each (when the ORG pin is tied to ground). The device is optimized for
use in many industrial and commercial applications where low-power and low-
voltage operations are essential. The AT93C56B/66B is available in space-saving
8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 8-pad XDFN, and 8-ball
VFBGA packages.
The AT93C56B/66B is enabled through the Chip Select pin (CS) and accessed
via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and
Shift Clock (SK). Upon receiving a Read instruction at DI, the address is decoded,
and the data is clocked out serially on the DO pin. The write cycle is completely
self-timed, and no separate erase cycle is required before Write. The write cycle is
only enabled when the part is in the Erase/Write Enable state. When CS is
brought high following the initiation of a write cycle, the DO pin outputs the
Ready/Busy status of the part.
The AT93C56B/66B operates from 1.7V to 5.5V.
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
1.
Pin Configurations and Pinouts
Table 1-1.
Pin Configurations
8-lead SOIC
8-lead TSSOP
Pin Name
CS
Function
1
2
3
4
8
7
6
5
CS
SK
DI
V
CC
Chip Select
CS
SK
DI
VCC
NC
ORG
GND
1
2
3
4
8
7
6
5
NC
SK
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
ORG
GND
DO
DI
DO
Top View
DO
Top View
GND
VCC
Power Supply
Internal Organization
No Connect
8-pad UDFN/XDFN
8-ball VFBGA
ORG
NC
8
7
6
5
1
2
3
4
V
8
7
6
5
1
2
3
4
CS
CS
SK
DI
V
CC
CC
NC
ORG
GND
SK
DI
NC
ORG
GND
DO
DO
Bottom View
Bottom View
Note: Drawings are not to scale.
2.
Absolute Maximum Ratings*
*Notice: Stresses beyond those listed under “Absolute
Operating Temperature 55C to +125C
Storage Temperature65C to +150C
Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only, and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Voltage on any pin
with respect to ground 1.0V to +7.0V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mA
2
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
3.
Block Diagram
VCC
GND
Memory Array
Address
Decoder
256/512 x 8
or
128/256 x 16
ORG
Data
Register
Output
Buffer
DI
Mode Decode
Logic
CS
Clock
Generator
SK
DO
Note:
When the ORG pin is connected to VCC, the x16 organization is selected. When it is connected to ground,
the x8 organization is selected. If the ORG pin is left unconnected, and the application does not load the input
beyond the capability of the internal 1M pull-up resistor, then the x16 organization is selected.
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
3
4.
Memory Organization
4.1
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25C, f = 1.0MHz, VCC = 5.0V (unless otherwise noted).
Symbol
COUT
CIN
Test Conditions
Max
5
Units
pF
Conditions
VOUT = 0V
VIN = 0V
Output Capacitance (DO)
Input Capacitance (CS, SK, DI)
5
pF
Note:
1. This parameter is characterized, and is not 100% tested.
4.2
DC Characteristics
Applicable over recommended operating range from TAI = -40°C to +85°C, VCC = 1.7V to 5.5V (unless otherwise noted).
Symbol
VCC1
Parameter
Test Condition
Min
1.7
2.5
4.5
Typ
Max
5.5
Unit
V
Supply Voltage
Supply Voltage
Supply Voltage
VCC2
5.5
V
VCC3
5.5
V
Read at 1.0MHz
Write at 1.0MHz
CS = 0V
0.5
0.5
0.4
6.0
10.0
0.1
0.1
2.0
mA
mA
μA
μA
μA
μA
μA
V
ICC
Supply Current
VCC = 5.0V
2.0
ISB1
ISB2
ISB3
IIL
Standby Current
Standby Current
Standby Current
Input Leakage
VCC = 1.7V
1.0
VCC = 2.5V
CS = 0V
10.0
15.0
3.0
VCC = 5.0V
CS = 0V
VIN = 0V to VCC
VIN = 0V to VCC
2.5V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 2.5V
1.7V VCC 2.5V
IOL
Output Leakage
3.0
(1)
VIL1
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
0.6
2.0
0.8
(1)
VIH1
VCC + 1
VCC x 0.3
VCC + 1
0.4
V
(1)
VIL2
0.6
V
(1)
VIH2
VCC x 0.7
V
VOL1
VOH1
VOL2
VOH2
2.5V VCC 5.5V IOL = 2.1mA
2.5V VCC 5.5V IOH = 0.4mA
1.7V VCC 2.5V IOL = 0.15mA
1.7V VCC 2.5V IOH = 100μA
V
2.4
V
0.2
V
VCC 0.2
V
Note:
1. VIL min and VIH max are reference only, and are not tested.
4
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
4.3
AC Characteristics
Applicable over recommended operating range from TAI = -40°C to + 85°C, VCC = as specified, CL = 1 TTL gate and 100pF
(unless otherwise noted).
Symbol
Parameter
Test Condition
Min
0
Max
2
Units
4.5V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
MHz
fSK
SK Clock Frequency
0
1
MHz
0
250
kHz
250
1000
250
1000
250
1000
50
ns
tSKH
tSKL
tCS
SK High Time
ns
ns
SK Low Time
ns
ns
Minimum CS Low Time
CS Setup Time
ns
2.5V VCC 5.5V
ns
tCSS
Relative to SK
1.7V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
200
100
400
0
ns
ns
tDIS
tCSH
tDIH
DI Setup Time
CS Hold Time
DI Hold Time
Relative to SK
Relative to SK
Relative to SK
ns
ns
2.5V VCC 5.5V
1.7V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
2.5V VCC 5.5V
1.7V VCC 5.5V
1.7V VCC 5.5V
100
400
ns
ns
250
1000
250
1000
250
1000
150
400
5
ns
tPD1
tPD0
tSV
Output Delay to 1
Output Delay to 0
CS to Status Valid
AC Test
AC Test
AC Test
ns
ns
ns
ns
ns
AC Test
CS = VIL
ns
ns
CS to DO in
High-impedance
tDF
tWP
Write Cycle Time
5.0V, 25°C
ms
Endurance(1)
1,000,000
Write Cycles
Note:
1. This parameter is characterized, and is not 100% tested.
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
5
5.
Functional Description
The AT93C56B/66B is accessed via a simple and versatile 3-wire serial communication interface. Device
operation is controlled by seven instructions issued by the Host processor. A valid instruction starts with a rising
edge of CS and consists of a Start bit (Logic 1), followed by the appropriate opcode, and the desired memory
address location.
Table 5-1.
AT93C56B/66B Instruction Set
Address
Data
Instruction SB Opcode
x8(1)
x16(1)
x8
x16
Comments
Reads data stored in memory at
specified address.
READ
EWEN
ERASE
WRITE
ERAL
1
1
1
1
1
1
1
10
00
11
01
00
00
00
A8 – A0
A7 – A0
Write Enable must precede all
programming modes.
11XXXXXXX 11XXXXXX
A8 – A0
A8 – A0
A7 – A0
A7 – A0
Erases memory location AN – A0.
D7 – D0
D15 – D0 Writes memory location AN – A0.
Erases all memory locations.
Valid only at VCC3 (Section 4.2, “DC
Characteristics” on page 4).
10XXXXXXX 10XXXXXX
01XXXXXXX 01XXXXXX
00XXXXXXX 00XXXXXX
Writes all memory locations.
D15 – D0 Valid only at VCC3 (Section 4.2) and
Disable Register cleared.
WRAL
D7 – D0
Disables all programming
instructions.
EWDS
Note:
1. The Xs in the address field represent don’t care values, and must be clocked.
READ: The READ instruction contains the address code for the memory location to be read. After the
instruction and address are decoded, data from the selected memory location is available at the Serial Output
pin, DO. Output data changes are synchronized with the rising edges of the Serial Clock pin, SK. It should be
noted that a dummy bit (Logic 0) precedes the 8-bit or 16-bit data output string. The AT93C56B/66B supports
sequential Read operations. The device will automatically increment the internal address pointer and clock out
the next memory location as long as Chip Select (CS) is held high. In this case, the dummy bit (Logic 0) will not
be clocked out between memory locations, thus allowing for a continuous stream of data to be read.
Erase/Write Enable (EWEN): To ensure data integrity, the part automatically goes into the Erase/Write Disable
(EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first
before any programming instructions can be carried out.
Note: Once in the EWEN state, programming remains enabled until an EWDS instruction is executed, or VCC
power is removed from the part.
6
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
ERASE: The ERASE instruction programs all bits in the specified memory location to the Logic 1 state. The self-
timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the
Ready/Busy status of the part if CS is brought high after being kept low for a minimum of tCS. A Logic 1 at the
DO pin indicates that the selected memory location has been erased, and the part is ready for another
instruction.
WRITE: The WRITE instruction contains the 8-bits or 16-bits of data to be written into the specified memory
location. The self-timed programming cycle, tWP, starts after the last bit of data is received at Serial Data Input
pin DI. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a
minimum of tCS. A
Logic 0 at DO indicates that programming is still in progress. A Logic 1 indicates that the memory location at the
specified address has been written with the data pattern contained in the instruction, and the part is ready for
further instructions. A Ready/Busy status cannot be obtained if CS is brought high after the end of the
self-timed programming cycle, tWP
.
Erase All (ERAL): The Erase All (ERAL) instruction programs every bit in the Memory Array to the Logic 1 state
and is primarily used for testing purposes. The DO pin outputs the ready/busy status of the part if CS is brought
high after being kept low for a minimum of tCS. The ERAL instruction is valid only at VCC3 (Section 4.2, “DC
Characteristics” on page 4).
Write All (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns
specified in the instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after
being kept low for a minimum of tCS. The WRAL instruction is valid only at VCC3 (Section 4.2).
Erase/Write Disable (EWDS): To protect against accidental data disturbance, the Erase/Write Disable (EWDS)
instruction disables all programming modes and should be executed after all programming operations. The
operation of the Read instruction is independent of both the EWEN and EWDS instructions and can be
executed at any time.
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
7
6.
Timing Diagrams
Figure 6-1.
Synchronous Data Timing
VIH
VIL
CS
tSKH
tCSS
tSKL
tCSH
VIH
VIL
SK
DI
tDIS
tDIH
VIH
VIL
tDF
tPD0
tPD1
VOH
VOL
DO (Read)
tDF
tSV
VOH
VOL
DO (Program)
Status Valid
Table 6-1.
Organization Key for Timing Diagrams
AT93C56B (2K)
AT93C66B (4K)
I/O
AN
DN
x8
x16
x8
x16
A7
(1)
(2)
A8
A7
A8
D7
D7
D15
D15
Notes: 1. A8 is a don’t-care value, but the extra clock is required.
2. A7 is a don’t-care value, but the extra clock is required.
Figure 6-2.
READ Timing
t
CS
CS
SK
DI
1
1
0
AN
A0
High-impedance
DO
0
DN
D0
8
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
Figure 6-3.
EWEN Timing
t
CS
CS
SK
DI
...
0
1
1
1
0
Figure 6-4.
ERASE Timing
t
CS
Standby
Check
Status
CS
SK
A0
1
1
1
AN
...
AN-1 AN-2
DI
t
DF
t
SV
High-impedance
High-impedance
Busy
DO
Ready
t
WP
Figure 6-5.
WRITE Timing
t
CS
CS
SK
...
...
AN
DN
1
0
1
A0
D0
DI
High-impedance
DO
Busy
Ready
t
WP
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
9
Figure 6-6.
ERAL Timing(1)
t
CS
Standby
Check
Status
CS
SK
1
0
0
1
0
DI
t
DF
t
SV
High-impedance
High-impedance
DO
Busy
Ready
t
WP
Note:
1. Valid only at VCC3 (Section 4.2).
Figure 6-7.
WRAL Timing(1)
t
CS
CS
SK
1
0
0
0
1
...
D
...
D0
N
DI
High-impedance
DO
Busy
Ready
t
WP
Note:
1. Valid only at VCC3 (Section 4.2).
Figure 6-8.
EWDS Timing
t
CS
CS
SK
DI
...
0
0
0
1
0
10
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
7.
Ordering Code Detail
A T 9 3 C 5 6 B - S S H M - B
Atmel Designator
Shipping Carrier Option
B or Blank = Bulk (Tubes)
T
= Tape and Reel, Standard Quantity Option
E = Tape and Reel, Expanded Quantity Option
Product Family
93C = Microwire-compatible
3-Wire Serial EEPROM
Operating Voltage
M = 1.7V to 5.5V
Device Density
56 = 2k
66 = 4k
Package Device Grade or
Wafer/Die Thickness
H = Green, NiPdAu Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
Device Revision
U = Green, Matte Sn Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
11 = 11mil Wafer Thickness
Package Option
SS = JEDEC SOIC
X
= TSSOP
MA = UDFN
ME = XDFN
C
= VFBGA
WWU= Wafer Unsawn
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
11
8.
Ordering Information
Delivery Information
Operation
Range
Atmel Ordering Code
Lead Finish
Package
Form
Quantity
AT93C56B-SSHM-B
Bulk (Tubes)
Tape and Reel
Bulk (Tubes)
100 per Tube
8S1
AT93C56B-SSHM-T
AT93C56B-XHM-B
AT93C56B-XHM-T
AT93C56B-MAHM-T
AT93C56B-MAHM-E
AT93C56B-MEHM-T
4,000 per Reel
100 per Tube
5,000 per Reel
5,000 per Reel
8X
NiPdAu
(Lead-free/Halogen-free)
Tape and Reel
Tape and Reel
Industrial
Temperature
(-40C to 85C)
8MA2
Tape and Reel 15,000 per Reel
8ME1
8U3-1
Tape and Reel
Tape and Reel
5,000 per Reel
5,000 per Reel
SnAgCu
(Lead-free/Halogen-free)
AT93C56B-CUM-T
AT93C56B-WWU11M(1)
N/A
Wafer Sale
Note 1
AT93C66B-SSHM-B
AT93C66B-SSHM-T
AT93C66B-XHM-B
AT93C66B-XHM-T
AT93C66B-MAHM-T
AT93C66B-MAHM-E
AT93C66B-MEHM-T
Bulk (Tubes)
Tape and Reel
Bulk (Tubes)
100 per Tube
4,000 per Reel
100 per Tube
5,000 per Reel
5,000 per Reel
8S1
8X
NiPdAu
(Lead-free/Halogen-free)
Tape and Reel
Tape and Reel
Industrial
Temperature
(-40C to 85C)
8MA2
Tape and Reel 15,000 per Reel
8ME1
8U3-1
Tape and Reel
Tape and Reel
5,000 per Reel
5,000 per Reel
SnAgCu
(Lead-free/Halogen-free)
AT93C66B-CUM-T
AT93C66B-WWU11M(1)
N/A
Wafer Sale
Note 1
Note:
1. For wafer sales, please contact Atmel sales.
Package Type
8S1
8-lead, 0.150” wide, Plastic Gull Wing, Small Outline (JEDEC SOIC)
8-lead, 0.170” wide, Thin Shrink Small Outline (TSSOP)
8X
8MA2
8ME1
8U3-1
8-pad, 2.00mm x 3.00mm body, 0.50mm pitch, Ultra Thin Dual No Lead (UDFN)
8-pad, 1.80mm x 2.20mm body, Extra Thin Dual No Lead (XDFN)
8-ball, 1.50mm x 2.00mm body, 0.50mm pitch, Small Die Ball Grid Array (VFBGA)
12
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
9.
Part Markings
AT93C56B and AT93C66B: Package Marking Information
8-lead TSSOP
8-lead SOIC
8-pad UDFN
2.0 x 3.0 mm Body
ATHYWW
AAAAAAA
###
ATMLHYWW
###%
AAAAAAAA
###% @
H%@
YXX
@
8-pad XDFN
8-ball VFBGA
1.8 x 2.2 mm Body
1.5 x 2.0 mm Body
###
YXX
###U
YMXX
PIN 1
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT93C56B
AT93C66B
Truncation Code ###: 56B
Truncation Code ###: 66B
Date Codes
Voltages
Y = Year
3: 2013
4: 2014
5: 2015
6: 2016
M = Month
A: January
B: February
...
WW = Work Week of Assembly
% = Minimum Voltage
M: 1.7V min
7: 2017
8: 2018
9: 2019
0: 2020
02: Week 2
04: Week 4
...
L: December
52: Week 52
Country of Assembly
Lot Number
AAA...A = Atmel Wafer Lot Number
Grade/Lead Finish Material
@ = Country of Assembly
U: Industrial/Matte Tin/SnAgCu
H: Industrial/NiPdAu
Trace Code
Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code)
Example: AA, AB.... YZ, ZZ
AT: Atmel
ATM: Atmel
ATML: Atmel
3/22/13
TITLE
DRAWING NO.
REV.
93C56-66BSM, AT93C56B and AT93C66B Package Marking
Information
Package Mark Contact:
DL-CSO-Assy_eng@atmel.com
93C56-66BSM
B
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
13
10. Packaging Information
10.1 8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
MIN
1.35
0.10
MAX
1.75
0.25
NOM
–
–
NOTE
SYMBOL
A1
A
A1
b
0.31
0.17
4.80
3.81
5.79
–
0.51
0.25
5.05
3.99
6.20
C
D
E1
E
e
–
–
D
–
–
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
1.27 BSC
L
0.40
0°
–
–
1.27
8°
Ø
6/22/11
DRAWING NO. REV.
8S1
TITLE
GPC
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
SWB
G
Package Drawing Contact:
packagedrawings@atmel.com
14
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
10.2 8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
N
L
Top View
End View
A
b
A1
COMMON DIMENSIONS
(Unit of Measure = mm)
e
A2
D
SYMBOL
MIN
-
NOM
-
MAX
1.20
0.15
1.05
3.10
NOTE
2, 5
A
Side View
A1
A2
D
0.05
0.80
2.90
-
Notes: 1. This drawing is for general information only.
1.00
Refer to JEDEC Drawing MO-153, Variation AA, for proper
dimensions, tolerances, datums, etc.
3.00
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
E
6.40 BSC
4.40
E1
b
4.30
0.19
4.50
0.30
3, 5
4
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.08mm total in excess
of the b dimension at maximum material condition. Dambar
cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
0.25
e
0.65 BSC
0.60
L
0.45
0.09
0.75
0.20
L1
C
1.00 REF
-
2/27/14
TITLE
GPC
TNR
DRAWING NO.
REV.
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
8X
E
Package Drawing Contact:
packagedrawings@atmel.com
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
15
10.3 8MA2 — 8-pad UDFN
E
1
8
7
6
5
Pin 1 ID
2
3
4
D
C
TOP VIEW
E2
SIDE VIEW
A2
A
A1
b (8x)
8
1
2
3
4
COMMON DIMENSIONS
(Unit of Measure = mm)
7
6
5
Pin#1 ID
D2
MIN
0.50
MAX
0.60
NOM
0.55
NOTE
SYMBOL
A
A1
A2
D
0.0
-
0.02
-
0.05
0.55
2.10
1.60
3.10
1.40
0.30
e (6x)
L (8x)
BOTTOM VIEW
K
1.90
1.40
2.90
1.20
0.18
2.00
D2
E
1.50
3.00
Notes:
1. This drawing is for general information only. Refer to
Drawing MO-229, for proper dimensions, tolerances,
datums, etc.
E2
b
1.30
0.25
3
2. The Pin #1 ID is a laser-marked feature on Top View.
3. Dimensions b applies to metallized terminal and is
measured between 0.15 mm and 0.30 mm from the
terminal tip. If the terminal has the optional radius on
the other end of the terminal, the dimension should
not be measured in that radius area.
C
1.52 REF
0.35
L
0.30
0.20
0.40
-
e
0.50 BSC
-
K
4. The Pin #1 ID on the Bottom View is an orientation
feature on the thermal pad.
11/26/14
TITLE
DRAWING NO.
REV.
GPC
8MA2, 8-pad 2 x 3 x 0.6mm Body, Thermally
YNZ
8MA2
G
Package Drawing Contact:
packagedrawings@atmel.com
Enhanced Plastic Ultra Thin Dual Flat No-Lead
Package (UDFN)
16
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
10.4 8ME1 — 8-pad XDFN
D
7
5
4
6
3
8
E
PIN #1 ID
2
1
A1
Top View
A
Side View
e1
b
L
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
–
NOM
–
MAX
0.40
0.05
1.90
2.30
0.25
NOTE
A
A1
D
E
0.10
PIN #1 ID
0.00
1.70
2.10
0.15
–
1.80
0.15
2.20
b
0.20
b
e
0.40 TYP
1.20 REF
0.30
e
e1
L
0.35
0.26
End View
9/10/2012
TITLE
DRAWING NO.
REV.
GPC
8ME1, 8-pad (1.80mm x 2.20mm body)
Extra Thin DFN (XDFN)
8ME1
B
DTP
Package Drawing Contact:
packagedrawings@atmel.com
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
17
10.5 8U3-1 — 8-ball VFBGA
E
D
2.
b
PIN 1 BALL PAD CORNER
A1
A2
A
TOP VIEW
SIDE VIEW
PIN 1 BALL PAD CORNER
4
3
1
2
d
(d1)
6
5
8
7
COMMON DIMENSIONS
(Unit of Measure - mm)
e
(e1)
SYMBOL
NOM
MIN
MAX
NOTE
2
0.73
0.09
0.40
0.20
0.79
0.85
0.19
0.50
0.30
A
A1
A2
b
BOTTOM VIEW
8 SOLDER BALLS
0.14
0.45
Notes:
0.25
1. This drawing is for general information only.
1.50 BSC
2.0 BSC
0.50 BSC
0.25 REF
1.00 BSC
0.25 REF
D
E
2. Dimension ‘b’ is measured at maximum solder ball diameter.
3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu.
e
e1
d
d1
6/11/13
REV.
TITLE
DRAWING NO.
8U3-1
GPC
GXU
8U3-1, 8-ball, 1.50mm x 2.00mm body, 0.50mm pitch,
Very Thin, Fine-Pitch Ball Grid Array Package (VFBGA)
F
Package Drawing Contact:
packagedrawings@atmel.com
18
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
11. Revision History
Rev. No.
Date
Comments
Add the UDFN extended quantity option and update package outline drawings.
Update the 8MA2 package drawing.
8735C
01/2015
Correct Synchronous Data Timing figure and remove note.
Update TSSOP package option from 8A2 to 8X.
Update UDFN package option from 8Y6 to 8MA2.
Update template and Atmel logos.
8735B
8735A
04/2013
01/2011
Initial document release.
AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015
19
X X
X X X X
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© 2015 Atmel Corporation. / Rev.: Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015.
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