AT93C86A-10SU-1.8-T [MICROCHIP]
EEPROM;
| 型号： | AT93C86A-10SU-1.8-T |
| 厂家： | 
MICROCHIP |
| 描述： | EEPROM 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 |
| 文件： | 总19页 (文件大小：869K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AT93C86A
3-wire Serial EEPROM
16K (2,048 x 8 or 1,024 x 16)
DATASHEET
Features
Low-voltage Operation
̶
̶
VCC = 1.8V to 5.5V
VCC = 2.7V to 5.5V
User-selectable Internal Organization
16K: 2,048 x 8 or 1,024 x 16
̶
3-wire Serial Interface
Sequential Read Operation
Schmitt Trigger, Filtered Inputs for Noise Suppression
2MHz Clock Rate (5V)
Self-timed Write Cycle (10ms Max)
High Reliability
̶
̶
Endurance: 1,000,000 Write Cycles
Data Retention: 100 Years
8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, and 8-lead PDIP Packages
Description
The Atmel® AT93C86A provides 16,384 bits of Serial Electrically Erasable
Programmable Read-Only Memory (EEPROM) organized as 1,024 words of 16
bits each (when the ORG pin is connected to VCC) and 2,048 words of 8 bits each
(when the ORG pin is tied to ground). The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage
operations are essential. The AT93C86A is available in space-saving 8-lead
JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, and 8-lead PDIP packages.
The AT93C86A is enabled through the Chip Select pin (CS) and accessed via a
3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a Read instruction at DI, the address is decoded, and
the data is clocked out serially on the DO pin. The write cycle is completely
self-timed, and no separate erase cycle is required before Write. The write cycle is
only enabled when the part is in the Erase/Write Enable state. When CS is
brought high following the initiation of a write cycle, the DO pin outputs the
Ready/Busy status of the part.
The AT93C86A operates from 1.8V to 5.5V or from 2.7V to 5.5V.
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
1.
Pin Configurations and Pinouts
Table 1-1.
Pin Configurations
8-lead SOIC
(Top View)
8-lead TSSOP
(Top View)
Pin Name
CS
Function
Chip Select
1
2
3
4
8
7
6
5
CS
SK
DI
VCC
NC
ORG
GND
CS
SK
DI
VCC
NC
ORG
GND
1
2
3
4
8
7
6
5
SK
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
DO
DO
DI
DO
8-pad UDFN
(Top View)
8-lead PDIP
GND
VCC
(Top View)
Power Supply
Internal Organization
No Connect
CS
SK
DI
VCC
NC
ORG
GND
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
CS
SK
DI
VCC
ORG
NC
NC
DO
ORG
GND
DO
Note: Drawings are not to scale.
2.
Absolute Maximum Ratings*
*Notice: Stresses beyond those listed under “Absolute
Operating Temperature . . . . . . . . . . .-55C to +125C
Storage Temperature . . . . . . . . . . . . .-65C to +150C
Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only, and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Voltage on any pin
with respect to ground . . . . . . . . . . . -1.00V to +7.00V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mA
2
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
3.
Block Diagram
Figure 3-1.
Block Diagram
VCC
GND
Memory Array
Address
Decoder
2,048 x 8
or
1,024 x 16
ORG
Data
Register
Output
Buffer
DI
Mode Decode
Logic
CS
Clock
Generator
SK
DO
Note:
When the ORG pin is connected to VCC, the x16 organization is selected. When it is connected to ground,
the x8 organization is selected. If the ORG pin is left unconnected, and the application does not load the input
beyond the capability of the internal 1M pull-up resistor, then the x16 organization is selected.
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
3
4.
Memory Organization
4.1
Pin Capacitance
Table 4-1.
Applicable over recommended operating range from TA = 25C, f = 1.0MHz, VCC = 5.0V (unless otherwise noted).
Pin Capacitance(1)
Symbol
COUT
CIN
Test Conditions
Max
5
Units
pF
Conditions
VOUT = 0V
VIN = 0V
Output Capacitance (DO)
Input Capacitance (CS, SK, DI)
5
pF
Note:
1. This parameter is characterized, and is not 100% tested.
4.2
DC Characteristics
Table 4-2.
DC Characteristics
Applicable over recommended operating range from TAI = -40°C to +85°C, VCC = 1.8V to 5.5V (unless otherwise noted).
Symbol
VCC1
Parameter
Test Condition
Min
1.8
2.7
4.5
Typ
Max
5.5
Unit
V
Supply Voltage
Supply Voltage
Supply Voltage
VCC2
5.5
V
VCC3
5.5
V
Read at 1.0MHz
Write at 1.0MHz
CS = 0V
0.5
0.5
0.4
6.0
10.0
0.1
0.1
2.0
mA
mA
μA
μA
μA
μA
μA
V
ICC
Supply Current
VCC = 5.0V
2.0
ISB1
ISB2
ISB3
IIL
Standby Current
Standby Current
Standby Current
Input Leakage
VCC = 1.8V
1.0
VCC = 2.7V
CS = 0V
10.0
15.0
3.0
VCC = 5.0V
CS = 0V
VIN = 0V to VCC
VIN = 0V to VCC
2.7V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 2.7V
1.8V VCC 2.7V
IOL
Output Leakage
3.0
(1)
VIL1
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
0.6
2.0
0.8
(1)
VIH1
VCC + 1
VCC x 0.3
VCC + 1
0.4
V
(1)
VIL2
0.6
V
(1)
VIH2
VCC x 0.7
V
VOL1
VOH1
VOL2
VOH2
2.7V VCC 5.5V IOL = 2.1mA
2.7V VCC 5.5V IOH = 0.4mA
1.8V VCC 2.5V IOL = 0.15mA
1.8V VCC 2.7V IOH = 100μA
V
2.4
V
0.2
V
VCC 0.2
V
Note:
1. VIL min and VIH max are reference only, and are not tested.
4
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
4.3
AC Characteristics
Table 4-3.
AC Characteristics
Applicable over recommended operating range from TAI = -40°C to + 85°C, CL = 1 TTL gate and 100pF (unless otherwise
noted).
Symbol
Parameter
Test Condition
Min
0
Typ
Max
2
Units
MHz
MHz
kHz
ns
4.5V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
fSK
SK Clock Frequency
0
1
0
250
250
1000
250
1000
250
1000
50
tSKH
tSKL
tCS
SK High Time
ns
ns
SK Low Time
ns
ns
Minimum CS Low Time
CS Setup Time
ns
2.7V VCC 5.5V
ns
tCSS
Relative to SK
1.8V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
200
100
400
0
ns
ns
tDIS
tCSH
tDIH
DI Setup Time
CS Hold Time
DI Hold Time
Relative to SK
Relative to SK
Relative to SK
ns
ns
2.7V VCC 5.5V
1.8V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
1.8V VCC 5.5V
100
400
ns
ns
250
1000
250
1000
250
1000
150
400
10
ns
tPD1
tPD0
tSV
Output Delay to 1
Output Delay to 0
CS to Status Valid
AC Test
AC Test
AC Test
ns
ns
ns
ns
ns
AC Test
CS = VIL
ns
CS to DO in
High-impedance
tDF
ns
tWP
Write Cycle Time
0.1
3
ms
Write
Cycles
Endurance(1) 5.0V, 25°C
1,000,000
Note:
1. This parameter is characterized, and is not 100% tested.
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
5
5.
Functional Description
The AT93C86A is accessed via a simple and versatile 3-wire serial communication interface. Device operation
is controlled by seven instructions issued by the Host processor. A valid instruction starts with a rising edge of
CS and consists of a Start bit (Logic 1), followed by the appropriate opcode, and the desired memory address
location.
Table 5-1.
AT93C86A Instruction Set
Address
Data
Instruction SB Opcode
x8(1)
x16(1)
x8
x16
Comments
Reads data stored in memory at
specified address.
READ
EWEN
ERASE
WRITE
ERAL
1
1
1
1
1
1
1
10
00
11
01
00
00
00
A10 – A0
A9 – A0
Write Enable must precede all
programming modes.
11XXXXXXX 11XXXXXX
A10 – A0
A10 – A0
A9 – A0
A9 – A0
Erases memory location AN – A0.
D7 – D0
D15 – D0 Writes memory location AN – A0.
Erases all memory locations.
Valid only at VCC = 4.5V to 5.5V.
10XXXXXXX 10XXXXXX
01XXXXXXX 01XXXXXX
00XXXXXXX 00XXXXXX
Writes all memory locations.
D15 – D0 Valid only at VCC = 4.5V to 5.5V and
Disable Register cleared.
WRAL
D7 – D0
Disables all programming
instructions.
EWDS
Note:
1. The ‘X’ in the address field represent don’t care values, and must be clocked.
READ: The READ instruction contains the address code for the memory location to be read. After the
instruction and address are decoded, data from the selected memory location is available at the Serial Output
pin, DO. Output data changes are synchronized with the rising edges of the Serial Clock pin, SK. It should be
noted that a dummy bit (Logic 0) precedes the 8-bit or 16-bit data output string. The AT93C86A supports
sequential Read operations. The device will automatically increment the internal address pointer and clock out
the next memory location as long as Chip Select (CS) is held high. In this case, the dummy bit (Logic 0) will not
be clocked out between memory locations, thus allowing for a continuous stream of data to be read.
Erase/Write Enable (EWEN): To ensure data integrity, the part automatically goes into the Erase/Write Disable
(EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first
before any programming instructions can be carried out.
Note: Once in the EWEN state, programming remains enabled until an EWDS instruction is executed, or VCC
power is removed from the part.
6
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
ERASE: The ERASE instruction programs all bits in the specified memory location to the Logic 1 state. The
self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the
Ready/Busy status of the part if CS is brought high after being kept low for a minimum of tCS. A Logic 1 at the
DO pin indicates that the selected memory location has been erased, and the part is ready for another
instruction.
WRITE: The WRITE instruction contains the 8-bits or 16-bits of data to be written into the specified memory
location. The self-timed programming cycle, tWP, starts after the last bit of data is received at Serial Data Input
pin DI. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a
minimum of tCS. A Logic 0 at DO indicates that programming is still in progress. A Logic 1 indicates that the
memory location at the specified address has been written with the data pattern contained in the instruction, and
the part is ready for further instructions. A Ready/Busy status cannot be obtained if CS is brought high after the
end of the self-timed programming cycle, tWP
.
Erase All (ERAL): The Erase All (ERAL) instruction programs every bit in the Memory Array to the Logic 1 state
and is primarily used for testing purposes. The DO pin outputs the ready/busy status of the part if CS is brought
high after being kept low for a minimum of tCS. The ERAL instruction is valid only at VCC = 5.0V ± 10%.
Write All (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns
specified in the instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after
being kept low for a minimum of tCS. The WRAL instruction is valid only at VCC = 5.0V ± 10%.
Erase/Write Disable (EWDS): To protect against accidental data disturbance, the Erase/Write Disable (EWDS)
instruction disables all programming modes and should be executed after all programming operations. The
operation of the Read instruction is independent of both the EWEN and EWDS instructions and can be
executed at any time.
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
7
6.
Timing Diagrams
Figure 6-1.
Synchronous Data Timing
1µs(1)
V
IH
CS
V
IL
tSKH
tCSS
tSKL
tCSH
V
IH
SK
DI
V
IL
tDIS
tDIH
V
IH
V
IL
tDF
tPD0
tPD1
V
OH
DO (Read)
V
OL
tDF
tSV
V
OH
DO (Program)
Status Valid
V
OL
Note:
1. This is the minimum SK period.
Table 6-1.
Organization Key for Timing Diagrams
AT93C86A (16K)
I/O
AN
DN
x8
A10
D7
x16
A9
D15
Figure 6-2.
ERASE Timing
t
CS
Standby
Check
Status
CS
SK
A0
1
1
1
AN
...
AN-1 AN-2
DI
t
DF
t
SV
High-impedance
High-impedance
Busy
DO
Ready
t
WP
8
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
Figure 6-3.
READ Timing
t
CS
CS
SK
DI
1
1
0
AN
A0
High-impedance
DO
0
DN
D0
Figure 6-4.
EWEN Timing
t
CS
CS
SK
DI
...
0
1
1
1
0
Figure 6-5.
WRITE Timing
t
CS
CS
SK
...
...
AN
DN
1
0
1
A0
D0
DI
High-impedance
DO
Busy
Ready
t
WP
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
9
Figure 6-6.
ERAL Timing(1)
t
CS
Standby
Check
Status
CS
SK
1
0
0
1
0
DI
t
DF
t
SV
High-impedance
High-impedance
DO
Busy
Ready
t
WP
Note:
1. VCC = 4.5V to 5.5V.
Figure 6-7.
WRAL Timing(1)
t
CS
CS
SK
1
0
0
0
1
...
D
...
D0
N
DI
High-impedance
DO
Busy
Ready
t
WP
Note:
1. Valid only at VCC = 4.5V to 5.5V.
Figure 6-8.
EWDS Timing
t
CS
CS
SK
DI
...
0
0
0
1
0
10
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
7.
Ordering Code Detail
A T 9 3 C 8 6 A N - 1 0 S U - 1.8 - T
Atmel Designator
Shipping Carrier Option
Blank = Bulk (Tubes)
T = Tape and Reel, Standard Quantity Option
E = Tape and Reel, Expanded Quantity Option
Product Family
93C = Microwire-Compatible
3-Wire Serial EEPROM
Operating Voltage
1.8 or 18 = 1.8V to 5.5V
2.7 = 2.7V to 5.5V
Device Density
86 = 16-Kilobit
Package Device Grade
U = Green, Matte Tin Lead Finish
or SnAgCu Ball
Device Revision
Industrial Temperature Range
(-40°C to +85°C)
Package Variation
(Package Type Dependent)
N = 0.150” width SOIC
H = Green, NiPdAu Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
11 = 11mil Wafer Thickness
Y6 = 2.0x3.0mm body UDFN
Package Type
S
T
Y
P
= JEDEC SOIC
= TSSOP
= UDFN
= PDIP
Speed Type
10 = Default value
Note: This field is not used for
Serial EEPROM products.
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
11
8.
Part Markings
AT93C86A: Package Marking Information
8-lead TSSOP
8-lead SOIC
ATMELYWW
U%
93C86A
SU%%
AT###
Note: Lot Number, location of assembly and
YWW date code on the bottom side of
the package.
Note: Lot Number and location of assembly
on the bottom side of the package.
8-pad UDFN
8-lead PDIP
2.0 x 3.0 mm Body
ATMLUYWW
93C86A
PU%%
###
H%
YXX
Note: Lot Number and location of assembly
on the bottom side of the package.
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT93C86A
Truncation Code ###: 86A
Date Codes
Voltages
% = Minimum Voltage
Y = Year
4: 2014
5: 2015
6: 2016
7: 2017
M = Month
WW = Work Week of Assembly
8: 2018
9: 2019
0: 2020
1: 2021
A: January
B: February
...
02: Week 2
04: Week 4
...
3 or 27: 2.7V min
1 or 18: 1.8V min
L: December
52: Week 52
Country of Assembly
Lot Number
AAA...A = Atmel Wafer Lot Number
Grade/Lead Finish Material
@ = Country of Assembly
H: Industrial/NiPdAu
U: Industrial/Matte Tin/SnAgCu
Trace Code
Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code)
Example: AA, AB.... YZ, ZZ
AT: Atmel
ATM: Atmel
ATML: Atmel
6/11/14
TITLE
DRAWING NO.
REV.
93C86ASM, AT93C86A Package Marking Information
Package Mark Contact:
93C86ASM
A
DL-CSO-Assy_eng@atmel.com
12
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
9.
Ordering Information
Delivery Information
Lead
Finish
Operation
Range
Atmel Ordering Code (1)
Package
Voltage
Form
Quantity
Industrial
Temperature
(-40C to 85C)
AT93C86A-10SU-1.8
1.8V to 5.5V
Bulk (Tubes)
100 per Tube
AT93C86A-10SU-1.8-T
AT93C86A-10SU-2.7
AT93C86A-10SU-2.7-T
AT93C86A-10TU-1.8
AT93C86A-10TU-1.8-T
AT93C86A-10TU-2.7
AT93C86A-10TU-2.7-T
AT93C86A-10PU-1.8
AT93C86A-10PU-2.7
AT93C86AY6-10YH-1.8-T
AT93C86AY6-10YH-18-E
1.8V to 5.5V
2.7V to 5.5V(1)
2.7V to 5.5V(1)
1.8V to 5.5V
1.8V to 5.5V
2.7V to 5.5V(1)
2.7V to 5.5V(1)
1.8V to 5.5V
2.7V to 5.5V(1)
Tape and Reel
Bulk (Tubes)
Tape and Reel
Bulk (Tubes)
Tape and Reel
Bulk (Tubes)
Tape and Reel
Bulk (Tubes)
Bulk (Tubes)
Tape and Reel
Tape and Reel
4,000 per Reel
100 per Tube
4,000 per Reel
100 per Tube
5,000 per Reel
100 per Tube
5,000 per Reel
50 per Tube
8S1
Matte Tin
Lead-free
Halogen-free
8X
8P3
50 per Tube
5,000 per Reel
15,000 per Reel
NiPdAu
Lead-free
8MA2
1.8V to 5.5V
Halogen-free
Notes: 1. For 2.7V devices used in a 4.5V to 5.5V range, please refer to performance values in Section 4.2, “DC Characteristics”
and 4.3, “AC Characteristics” on page 5.
Package Type
8S1
8X
8-lead, 0.150” wide, Plastic Gull Wing, Small Outline (JEDEC SOIC)
8-lead, 0.170” wide, Thin Shrink Small Outline (TSSOP)
8P3
8MA2
8-lead, 0.300” wide body, Plastic Dual In-line Package (PDIP)
8-pad, 2.00mm x 3.00mm body, 0.50mm pitch, Ultra Thin Dual No Lead (UDFN)
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
13
10. Packaging Information
10.1 8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
MIN
–
0.10
MAX
1.75
0.25
NOM
–
–
NOTE
SYMBOL
A1
A
A1
b
0.31
0.17
–
0.51
0.25
C
D
E
E1
e
–
4.90 BSC
6.00 BSC
3.90 BSC
1.27 BSC
–
D
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
L
0.40
0°
1.27
8°
Ø
–
3/6/2015
DRAWING NO. REV.
8S1
TITLE
GPC
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
SWB
H
Package Drawing Contact:
packagedrawings@atmel.com
14
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
10.2 8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
N
L
Top View
End View
A
b
A1
COMMON DIMENSIONS
(Unit of Measure = mm)
e
A2
D
SYMBOL
MIN
-
NOM
-
MAX
1.20
0.15
1.05
3.10
NOTE
2, 5
A
Side View
A1
A2
D
0.05
0.80
2.90
-
Notes: 1. This drawing is for general information only.
1.00
Refer to JEDEC Drawing MO-153, Variation AA, for proper
dimensions, tolerances, datums, etc.
3.00
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
E
6.40 BSC
4.40
E1
b
4.30
0.19
4.50
0.30
3, 5
4
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.08mm total in excess
of the b dimension at maximum material condition. Dambar
cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
0.25
e
0.65 BSC
0.60
L
0.45
0.09
0.75
0.20
L1
C
1.00 REF
-
2/27/14
TITLE
GPC
TNR
DRAWING NO.
REV.
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
8X
E
Package Drawing Contact:
packagedrawings@atmel.com
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
15
10.3 8MA2 — 8-pad UDFN
E
1
8
7
6
5
Pin 1 ID
2
3
4
D
C
TOP VIEW
E2
SIDE VIEW
A2
A
C
A1
b (8x)
8
1
2
3
4
COMMON DIMENSIONS
(Unit of Measure = mm)
7
6
5
Pin#1 ID
D2
MIN
0.50
MAX
0.60
NOM
0.55
NOTE
SYMBOL
A
A1
A2
D
0.0
-
0.02
-
0.05
0.55
2.10
1.60
3.10
1.40
0.30
e (6x)
L (8x)
BOTTOM VIEW
K
1.90
1.40
2.90
1.20
0.18
2.00
D2
E
1.50
3.00
Notes:
1. This drawing is for general information only. Refer to
Drawing MO-229, for proper dimensions, tolerances,
datums, etc.
E2
b
1.30
0.25
3
2. The Pin #1 ID is a laser-marked feature on Top View.
3. Dimensions b applies to metallized terminal and is
measured between 0.15 mm and 0.30 mm from the
terminal tip. If the terminal has the optional radius on
the other end of the terminal, the dimension should
not be measured in that radius area.
C
0.152 REF
0.40
L
0.35
0.20
0.45
-
e
0.50 BSC
-
K
4. The Pin #1 ID on the Bottom View is an orientation
feature on the thermal pad.
11/2/15
TITLE
DRAWING NO.
REV.
GPC
8MA2, 8-pad 2 x 3 x 0.6mm Body, Thermally
Enhanced Plastic Ultra Thin Dual Flat No-Lead
Package (UDFN)
YNZ
8MA2
H
Package Drawing Contact:
packagedrawings@atmel.com
16
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
10.4 8P3 — 8-lead PDIP
E
1
E1
.381
Gage Plane
N
Top View
c
eA
End View
COMMON DIMENSIONS
(Unit of Measure = mm)
D
e
MIN
MAX
5.334
-
NOM
-
NOTE
SYMBOL
D1
A2 A
A
-
2
A1
A2
b
0.381
2.921
0.356
1.143
0.762
0.203
9.017
0.127
7.620
6.096
-
3.302
0.457
1.524
0.991
0.254
9.271
0.000
7.874
6.350
2.540 BSC
7.620 BSC
3.302
4.953
0.559
1.778
1.143
0.356
10.160
0.000
8.255
7.112
5
6
6
b2
b3
c
A1
b2
D
3
3
4
3
L
b3
D1
E
m
b
4 PLCS
0.254
C
v
E1
e
Side View
eA
L
4
2
2.921
3.810
Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information.
2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3.
3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch.
4. E and eA measured with the leads constrained to be perpendicular to datum.
5. Pointed or rounded lead tips are preferred to ease insertion.
6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm).
07/31/14
TITLE
GPC
PTC
DRAWING NO.
8P3
REV.
E
8P3, 8-lead, 0.300” Wide Body, Plastic Dual
In-line Package (PDIP)
Package Drawing Contact:
packagedrawings@atmel.com
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
17
11. Revision History
Revision No.
Date
Comments
Added Bulk (Tube) Shipping Carrier Option
Changed Standard Quantity Tape and Reel Option to “T”
Updated Ordering Information Table
3408L
01/2017
Removed AT93C86A-W1.8-11 Part Number
3408K
3408J
12/2015
01/2015
Correct Ordering Code Detail and update the 8S1 and 8MA2 package drawings.
Add the UDFN extended quantity option and update the ordering information section.
Update the 8MA2 and 8P3 package drawings.
Update pinouts, 8MA2 package drawing, grammatical changes, document template,
logos, and disclaimer page. No changes to functional specification.
3408I
08/2014
01/2007
Add “Bottom View” to page 1 Ultra Thin MiniMap package drawing page 4 revise Note 1
added “ensured by characterization”.
3408H
Revision history implemented.
Delete ‘Preliminary’ status from datasheet; Add ‘Ultra Thin’ description to MLP 2x3
package; Delete ‘1.8V not available’ on Figure 1 Note; Add 1.8V range on Table 4 under
Write Cycle Time.
3408G
07/2006
18
AT93C86A [DATASHEET]
Atmel-3408L-SEEPROM-AT93C86A-Datasheet_012017
X
X X X X
X
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