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ATTINY88-MMH [MICROCHIP]

IC MCU 8BIT 8KB FLASH 28VQFN;
ATTINY88-MMH
型号： ATTINY88-MMH
厂家： MICROCHIP    MICROCHIP
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IC MCU 8BIT 8KB FLASH 28VQFN
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AVR515: Migrating from ATmega48/88/168 and  
ATmega48P/88P/168P/328P to ATtiny48/88  
8-bit  
Microcontrollers  
Features  
•
•
•
•
•
•
•
•
•
•
•
•
General Porting Considerations  
Pin Configurations  
AVR® CPU Core  
Application Note  
Memories  
System Clock and Clock Options  
Power Management and Sleep Modes  
Interrupts  
Timer/Counters  
USART0  
Analogue Comparator  
Memory Programming  
Speed Grades  
1 Introduction  
This application note is a guide to assist users of ATmega48/88/168 and  
ATmega48P/88P/168P/328P in converting existing designs to ATtiny48/88. In  
addition to the differences described in this document, the electrical characteristics  
of the devices are different. Some of the differences are outlined in this document  
and some are not. Improvements or added features in ATtiny48/88 that are not in  
conflict with those in ATmega48/88/168 and ATmega48P/88P/168P/328P are not  
listed in this document.  
The ATtiny48/88 are low-cost, feature-reduced versions of the ATmega48/88/168  
and ATmega48P/88P/168P/328P devices. The tinyAVR versions are designed to  
be pin compatible with the megaAVR versions. Because of improvements that will  
be mentioned in this application note there may be a need for minor modifications  
in the application when migrating.  
Please see latest data sheets for detailed information.  
Rev. 8089A-AVR-09/07  
2 General Porting Considerations  
To make the porting process as easy as possible, one should always refer to  
registers and bit positions using their defined names and avoid using absolute  
addresses and values. In most cases, register and bit names are unchanged from  
device to device. When porting a design it is more convenient to include the correct  
definition file for the new device, rather than manually changing all addresses and bit  
values. It is also considered good programming practice to use named references  
instead of absolute values. Some examples are shown below.  
PORTB |= (1<<PORTB3);  
DDRB &= ~(1<<PORTB3);  
// Set pin 3 on port B high  
// Set pin 3 on port B as input  
// Configure USI  
USICR = (1<<USISIE)|(0<<USIOIE)|(1<<USIWM1)|(0<<USIWM0)|  
(1<<USICS1)|(0<<USICS0)|(0<<USICLK)|(0<<USITC);  
To avoid conflicts with added features and register functionality, never access  
registers that are marked as reserved. Reserved bits should always be written zero, if  
accessed. This ensures forward compatibility, and added features will stay in their  
default states when unused.  
3 Pin Configurations  
Pin output drivers have been optimized for size in ATtiny48/88. Drive strengths are  
summarised in the table below.  
Table 3-1. Pin drive strengths.  
ATmega48P  
ATmega48  
ATmega88  
ATmega168  
ATtiny48  
ATtiny88  
ATmega88P  
ATmega168P  
ATmega328P  
Supply voltage  
Normal I/O  
High Sink  
20 mA  
5 V  
3 V  
20 mA  
10 mA  
20 mA  
10 mA  
10 mA  
5 mA  
10 mA  
ATtiny48/88  
is  
pin-compatible  
with  
ATmega48/88/168  
and  
ATmega48P/88P/168P/328P by default, although some pin functions have been  
removed and other functions have been added. These changes should not affect pin  
compatibility by default but have been listed in the table below for clarity.  
Table 3-2. Pin configurations.  
Pin  
Change  
TQFP  
MLF  
PDIP  
Name  
PD3  
1
2
3
6
1
2
3
6
5
6
-
Removed: OC2B  
PD4  
Removed: XCK  
GND (PA2)  
VCC (PA3)  
Changed: GND to PCINT26 / PA2  
Changed: VCC to PCINT27 / PA3  
-
2
AVR515  
8089A-AVR-09/07  
AVR515  
Pin  
PDIP  
Change  
TQFP  
7
MLF  
7
Name  
PB6  
PB7  
PD5  
PD6  
PB3  
PA0  
PC7  
PA1  
PD0  
PD1  
9
10  
11  
12  
17  
-
Removed: TOSC1, XTAL1. Added: CLKI  
Removed: TOSC2, XTAL2  
Removed: OC0B  
8
8
9
9
10  
15  
19  
20  
22  
30  
31  
10  
15  
19  
20  
22  
30  
31  
Removed: OC0A  
Removed: OC2A  
Added: PCINT24, PA0  
Changed: AREF to PCINT15. Added: PC7  
Added: PCINT25, PA1  
Removed: RXD  
21  
-
2
3
Removed: TXD  
4 AVR CPU Core  
The AVR core and the microcontroller architecture are the same in all AVR devices,  
but some instructions have not been implemented in ATtiny48/88. Where  
ATmega48/88/168 and ATmega48P/88P/168P/328P have 131 instructions,  
ATtiny48/88 only has 123. The table below summarizes instructions that are available  
on ATmega48/88/168 and ATmega48P/88P/168P/328P but have not been  
implemented in ATtiny48/88.  
Table 4-1. Instructions not implemented in ATtiny48/88.  
Instruction  
MUL  
Operands  
Rd, Rr  
Rd, Rr  
Rd, Rr  
Rd, Rr  
Rd, Rr  
Rd, Rr  
k
Meaning  
Multiply Unsigned  
MULS  
Multiply Signed  
MULSU  
FMUL  
Multiply Signed with Unsigned  
Fractional Multiply Unsigned  
Fractional Multiply Signed  
Fractional Multiply Signed with Unsigned  
Direct Jump  
FMULS  
FMULSU  
JMP  
CALL  
k
Direct Subroutine Call  
The limited instruction set is of concern chiefly when programming in assembler.  
High-level language (such as “C”) compilers automatically take into account the  
available instruction set and the end user does not need to be aware of limitations.  
In applications that extensively rely on the use of multiplication and division there may  
be a code size and speed penalty when moving from ATmega48/88/168 and  
ATmega48P/88P/168P/328P to ATtiny48/88. This is because multiplication and  
division require more instructions and take longer time to execute in the absence of a  
hardware multiplier.  
3
8089A-AVR-09/07  
5 Memories  
ATtiny48/88 has less volatile and non-volatile memory than ATmega48/88/168 and  
ATmega48P/88P/168P/328P, as shown in the table below. This means some  
firmware may have to be re-engineered or recompiled using memory optimisation  
algorithms.  
Table 5-1. Memory Summary.  
Memory Size in Bytes  
Device  
Flash  
SRAM  
EEPROM  
256  
ATmega48/48V/48P/48PV  
ATmega88/88V/88P/88PV  
ATmega168/168V/168P/168PV  
ATmega328P/328PV  
ATtiny48  
4096  
512  
8192  
1024  
1024  
2048  
256  
512  
16384  
32768  
4096  
512  
1024  
64  
ATtiny88  
8192  
512  
64  
6 System Clock and Clock Options  
ATtiny48/88 has a reduced clock system as compared to ATmega48/88/168 and  
ATmega48P/88P/168P/328P.  
6.1 Clock Sources  
ATtiny48/88 does not include a crystal oscillator, but all other clocking options of  
ATmega48/88/168 and ATmega48P/88P/168P/328P are available, as shown in the  
table below.  
Table 6-1. Clocking Source Settings.  
CKSEL3...0  
Device Clocking Option  
ATmega48/88/168  
ATtiny48/88  
ATmega48P/88P/168P  
External Clock  
0000  
Reserved  
0001  
0010  
0011  
Calibrated Internal RC Oscillator  
Internal 128 kHz RC Oscillator  
0100  
0101  
0110  
0111  
Low Frequency Crystal Oscillator  
N/A(1)  
Full Swing Crystal Oscillator  
Reserved  
1000 - 1111  
Notes:  
1. Crystal oscillator not implemented in ATtiny48/88.  
4
AVR515  
8089A-AVR-09/07  
AVR515  
7 Power Management and Sleep Modes  
ATtiny48/88  
has  
less  
sleep  
modes  
than  
ATmega48/88/168  
and  
ATmega48P/88P/168P/328P. The table below summarises sleep modes in all  
devices.  
Table 7-1. Sleep Modes.  
Implementation  
ATmega48P  
ATmega48  
Sleep Mode  
ATmega88P  
ATmega168P  
ATmega328P  
ATtiny48  
ATtiny88  
ATmega88  
ATmega168  
Idle  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
ADC Noise Reduction  
Power-down  
Power-save  
Standby  
Extended Standby  
Sleep mode selection bit SM2 has not been implemented in ATtiny48/88.  
The BOD disable function in Extended Standby Sleep Mode of  
ATmega48P/88P/168P/328P can be found in the Power-down Sleep Mode of  
ATtiny48/88. See device data sheets for more information.  
8 Interrupts  
The interrupt vector table of ATtiny48/88 differs from those of ATmega48/88/168 and  
ATmega48P/88P/168P/328P. See table below.  
Table 8-1. Interrupt vectors.  
ATmega48P/88P  
Vector  
Address  
ATtiny48  
ATtiny88  
ATmega48/88/168  
ATmega168P/328P  
0x000  
0x001  
0x002  
0x003  
0x004  
0x005  
0x006  
0x007  
0x008  
0x009  
0x00A  
0x00B  
0x00C  
RESET  
INT0  
INT1  
PCINT0  
PCINT1  
PCINT2  
WDT  
PCINT3  
TIMER2_COMPA  
TIMER2_COMPB  
TIMER2_OVF  
WDT  
TIMER1_CAPT  
TIMER1_COMPA  
TIMER1_COMPB  
TIMER1_OVF  
TIMER0_COMPA  
TIMER1_CAPT  
TIMER1_COMPA  
TIMER1_COMPB  
5
8089A-AVR-09/07  
ATmega48P/88P  
Vector  
Address  
ATtiny48  
ATtiny88  
ATmega48/88/168  
ATmega168P/328P  
0x00D  
0x00E  
0x00F  
0x010  
0x011  
0x012  
0x013  
0x014  
0x015  
0x016  
0x017  
0x018  
0x019  
TIMER1_OVF  
TIMER0_COMPB  
TIMER0_COMPA  
TIMER0_COMPB  
TIMER0_OVF  
SPI_STC  
TIMER0_OVF  
SPI_STC  
ADC  
EE_RDY  
USART_RX  
USART_UDRE  
USART_TX  
ADC  
ANA_COMP  
TWI  
-
-
-
-
-
-
EE_RDY  
ANA_COMP  
TWI  
SPM_RDY  
9 Timer/Counters  
The Timer/Counters of ATtiny48/88 have reduced functionality as compared to those  
of ATmega48/88/168 and ATmega48P/88P/168P/328P.  
9.1 Timer/Counter0  
The 8-bit Timer/Counter0 of ATtiny48/88 does not have a PWM output stage. As a  
consequence, the control bits of Timer/Counter Control Register A (TCCR0A) have  
been changed and the Timer/Counter Control Register B (TCCR0B) has been  
removed. The Compare Match Output (COM0xx) and Waveform Generation Mode  
(WGMxx) bits of TCCR0A have been replaced by Clear Timer on Compare Match  
Mode (CTC0). Also, the Clock Select bits of TCCR0B have been moved to TCCR0A.  
Waveform generation modes are summarised in the table below.  
Table 9-1. Waveform generation modes.  
ATmega48/88/168 and ATmega48P/88P/168P/328P  
ATtiny48/88  
WGM  
000  
001  
010  
011  
100  
101  
110  
111  
Mode  
TOP  
0xFF  
0xFF  
OCRA  
0xFF  
-
OCRx  
Immediate  
TOP  
TOV  
MAX  
BOTTOM  
MAX  
MAX  
-
CTC0  
Normal  
0
-
Phase correct PWM  
CTC  
Immediate  
BOTTOM  
-
1
-
Fast PWM  
Reserved  
-
Phase correct PWM  
Reserved  
OCRA  
-
TOP  
BOTTOM  
-
-
-
-
Fast PWM  
OCRA  
BOTTOM  
TOP  
-
See device datasheets for detailed explanations of Timer/Counter functions.  
6
AVR515  
8089A-AVR-09/07  
AVR515  
9.2 Timer/Counter2  
The 8-bit Timer/Counter2 of ATmega48/88/168 and ATmega48P/88P/168P/328P has  
not been implemented in ATtiny48/88.  
10 USART0  
The Universal Synchronous and Asynchronous serial Receiver and Transmitter  
(USART) have not been implemented in ATtiny48/88.  
11 Analogue to Digital Converter  
The option to use an external voltage reference has not been implemented in  
ATtiny48/88. The external voltage reference pin (AREF in ATmega48/88/168 and  
ATmega48P/88P/168P/328P) has been replaced by a general purpose I/O pin. This  
means in ATtiny48/88 it is not possible to use an external bypass capacitor to  
stabilize the internal voltage reference.  
12 Memory Programming  
The differences in Fuse Bytes, Signature Bytes and the Calibration Byte are outlined  
in the sections below.  
12.1 Fuse Bits  
ATtiny48/88, ATmega48/88/168 and ATmega48P/88P/168P/328P have identical high  
fuse bytes, but there are some differences in the extended and low fuse bytes, as  
shown in the tables below.  
Table 12-1. Extended Fuse Byte.  
ATmega48  
ATmega48P  
ATtiny48/88  
ATmega88/168  
ATmega88P/168P/328P  
Fuse Bit  
7…3  
(not implemented)  
2
1
0
BOOTSZ1  
BOOTSZ0  
BOOTRST  
(not implemented)  
(not implemented)  
SELFPRGEN  
Table 12-2. Low Fuse Byte.  
ATmega48/88/168  
ATmega48P/88P/168P/328P  
Fuse Bit  
ATtiny48/88  
7
6
5
4
3
2
1
CKDIV8  
CKOUT  
SUT1  
SUT0  
CKSEL3  
CKSLE2  
(not implemented)  
(not implemented)  
CKSEL1  
7
8089A-AVR-09/07  
ATmega48/88/168  
Fuse Bit  
ATtiny48/88  
ATmega48P/88P/168P/328P  
0
CKSEL0  
12.2 Signature Bytes  
Signature bytes are unique for each device, as shown in the table below.  
Table 12-3. Signature bytes.  
Signature Byte  
Device  
0x000  
0x001  
0x002  
0x09  
0x05  
0x0A  
0x11  
0x0A  
0x0F  
0x06  
0x0B  
0x0F  
ATtiny48  
0x92  
ATmega48  
ATmega48P  
ATtiny88  
0x1E  
0x93  
ATmega88  
ATmega88P  
ATmega168  
ATmega168P  
ATmega328P  
0x94  
0x95  
12.3 Calibration Byte  
In ATtiny48/88 there is only one calibration range but in ATmega48/88/168 and  
ATmega48P/88P/168P/328P devices there are two, as shown in the table below.  
Table 12-4. Oscillator Calibration Register.  
Device  
CAL7  
CAL6…0  
ATmega48/88/168  
ATmega48P/88P/168P/328P  
ATtiny48/88  
Selects range of  
operation  
Tunes frequency within the  
selected range  
Tunes frequency within one, constant range  
13 Speed Grades  
The maximum frequency of ATtiny48/88 devices is lower than that of devices  
ATmega48/88/168 and ATmega48P/88P/168P/328P, as shown in the table below.  
Table 13-1. Device speed grades.  
Device  
1.8 – 5.5 V  
N/A  
2.7 – 5.5 V  
10 MHz  
6 MHz  
4.5 – 5.5 V  
20 MHz  
ATmega48/88/168  
ATmega48P/88P/168P  
ATtiny48/88  
N/A  
12 MHz  
ATmega48V/88V/168V  
4 MHz  
10 MHz  
10 MHz  
ATmega48PV/88PV/168PV  
8
AVR515  
8089A-AVR-09/07  
AVR515  
Device  
1.8 – 5.5 V  
N/A  
2.7 – 5.5 V  
10 MHz  
6 MHz  
4.5 – 5.5 V  
20 MHz  
6 MHz  
ATmega48/88/168  
ATmega48P/88P/168P  
ATtiny48V/88V  
4 MHz  
9
8089A-AVR-09/07  
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8089A-AVR-09/07  

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