ATWINC3400-MR210CAXXX [MICROCHIP]

IEEE® 802.11 b/g/n Network Controller with Integrated Bluetooth® Low Energy Module;
ATWINC3400-MR210CAXXX
型号: ATWINC3400-MR210CAXXX
厂家: MICROCHIP    MICROCHIP
描述:

IEEE® 802.11 b/g/n Network Controller with Integrated Bluetooth® Low Energy Module

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ATWINC3400-MR210xA  
®
IEEE 802.11 b/g/n Network Controller with Integrated  
®
Bluetooth Low Energy Module  
Introduction  
The ATWINC3400-MR210xA is an IEEE 802.11 b/g/n RF/Baseband/Medium Access Control (MAC) network  
controller with Bluetooth Low Energy module. The ATWINC3400-MR210xA modules are Bluetooth 5.0 certified.  
This module is optimized for low power and high performance mobile applications. This module features small  
form factor with integrated Power Amplifier (PA), Low-Noise Amplifier (LNA), Transmit/Receive (T/R) switch (for  
Wi-Fi® and Bluetooth) and Power Management Unit (PMU). The ATWINC3400-MR210CA integrates a chip antenna  
while the ATWINC3400-MR210UA adds a micro co-ax (u.FL) connector for connecting to an external antenna. The  
ATWINC3400-MR210xA module requires a 32.768 kHz clock for sleep operation.  
The ATWINC3400-MR210xA module utilizes highly optimized IEEE 802.11 Bluetooth coexistence protocols, and  
provides Serial Peripheral Interface (SPI) to interface with the host controller.  
The references to the ATWINC3400-MR210xA module include the following devices:  
ATWINC3400-MR210CA – Integrates a chip antenna  
ATWINC3400-MR210UA – Adds a micro co-ax (u.FL) connector for connecting to an external antenna  
Features  
Wi-Fi features:  
IEEE 802.11 b/g/n RF/PHY/MAC  
IEEE 802.11 b/g/n (1x1) with Single Spatial Stream, up to 72 Mbps PHY Rate in a 2.4 GHz ISM Band  
Integrated Chip Antenna or Micro Co-ax (U.FL) Connector for an External Antenna  
Superior Sensitivity and Range via Advanced PHY Signal Processing  
Advanced Equalization and Channel Estimation  
Advanced Carrier and Timing Synchronization  
Supports Soft-AP  
Supports IEEE 802.11 WEP, WPA and WPA2 Personal and WPA2 Enterprise (firmware version 1.3.1 or later)  
Superior MAC Throughput through Hardware Accelerated Two-Level A-MSDU/A-MPDU Frame Aggregation and  
Block Acknowledgment  
On-Chip Memory Management Engine to Reduce the Host Load  
Operating Temperature Range from -40°C to +85°C  
Input/Output voltage ranges from 2.7V to 3.6V  
Power supply (VBAT) ranges from 3.0V to 4.2V  
Wi-Fi Alliance® Certified for Connectivity and Optimizations  
– ID: WFA62065  
Integrated On-Chip Microcontroller  
SPI Host Interface  
Integrated Flash Memory for Wi-Fi and Bluetooth System Software  
Low Leakage On-Chip Memory for State Variables  
Fast AP Re-Association (150 ms)  
DS70005350D-page 1  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
On-Chip Network Stack to Offload MCU  
Network Features: Firmware version 1.2.0 or later  
– TCP, UDP, DHCP, ARP, HTTP, TLS, DNS and SNTP  
Bluetooth features:  
ATWINC3400-MR210xA Bluetooth Low Energy Certification (end product) QD ID: 112092  
Adaptive Frequency Hopping (AFH)  
Superior Sensitivity and Range  
DS70005350D-page 2  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Table of Contents  
Introduction.....................................................................................................................................................1  
Features......................................................................................................................................................... 1  
1. Ordering Information and Module Marking..............................................................................................5  
2. Block Diagram.........................................................................................................................................6  
3. Pinout and Package Information.............................................................................................................7  
3.1. Package Description.................................................................................................................. 10  
4. Electrical Characteristics....................................................................................................................... 11  
4.1. Absolute Maximum Ratings........................................................................................................11  
4.2. Recommended Operating Conditions........................................................................................ 11  
4.3. DC Characteristics..................................................................................................................... 12  
4.4. IEEE 802.11 b/g/n Radio Performance...................................................................................... 12  
4.5. Bluetooth Radio Performance.................................................................................................... 14  
5. Power Management..............................................................................................................................17  
5.1. Device States............................................................................................................................. 17  
5.2. Controlling Device States...........................................................................................................17  
5.3. Power-Up/Down Sequence........................................................................................................18  
5.4. Digital I/O Pin Behavior During Power-Up Sequences...............................................................19  
6. Clocking................................................................................................................................................ 20  
6.1. Low-Power Clock....................................................................................................................... 20  
7. CPU and Memory Subsystem...............................................................................................................21  
7.1. Processor................................................................................................................................... 21  
7.2. Memory Subsystem....................................................................................................................21  
7.3. Nonvolatile Memory (eFuse)...................................................................................................... 21  
8. WLAN Subsystem.................................................................................................................................23  
8.1. MAC........................................................................................................................................... 23  
8.2. PHY............................................................................................................................................24  
8.3. Radio..........................................................................................................................................24  
9. Bluetooth Low Energy...........................................................................................................................26  
10. External Interfaces................................................................................................................................ 27  
10.1. Interfacing with the Host Microcontroller.................................................................................... 27  
10.2. SPI Client Interface.................................................................................................................... 28  
10.3. UART Interface...........................................................................................................................30  
10.4. I2C Client Interface.....................................................................................................................31  
11. Application Reference Design...............................................................................................................33  
11.1. Host Interface.............................................................................................................................33  
12. Module Outline Drawings......................................................................................................................35  
DS70005350D-page 3  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
13. Design Considerations..........................................................................................................................39  
13.1. ATWINC3400-MR210CA............................................................................................................39  
13.2. ATWINC3400-MR210UA External Antenna Connector............................................................. 42  
13.3. Reflow Profile Information.......................................................................................................... 44  
13.4. Module Assembly Considerations..............................................................................................44  
13.5. Conformal Coating..................................................................................................................... 44  
14. Appendix A: Regulatory Approval......................................................................................................... 45  
14.1. United States..............................................................................................................................45  
14.2. Canada.......................................................................................................................................47  
14.3. Europe........................................................................................................................................49  
14.4. Japan..........................................................................................................................................50  
14.5. Korea..........................................................................................................................................50  
14.6. Taiwan........................................................................................................................................ 51  
14.7. China..........................................................................................................................................52  
14.8. Other Regulatory Information.....................................................................................................52  
15. Reference Documentation.................................................................................................................... 53  
16. Document Revision History...................................................................................................................54  
The Microchip Website.................................................................................................................................56  
Product Change Notification Service............................................................................................................56  
Customer Support........................................................................................................................................ 56  
Microchip Devices Code Protection Feature................................................................................................56  
Legal Notice................................................................................................................................................. 57  
Trademarks.................................................................................................................................................. 57  
Quality Management System....................................................................................................................... 58  
Worldwide Sales and Service.......................................................................................................................59  
DS70005350D-page 4  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Ordering Information and Module Marking  
1.  
Ordering Information and Module Marking  
The following table provides the ordering details for the ATWINC3400-MR210xA module.  
Table 1-1.ꢀOrdering Details  
Regulatory  
Information  
Model Number  
Ordering Code  
Package  
Description  
ATWINC3400-MR210CA  
ATWINC3400-MR210CAxxx(1)  
22.43 x 14.73 Certified module FCC, IC, CE,  
x 2.0 mm  
with chip  
antenna  
MIC, KCC, NCC,  
SRC  
ATWINC3400-MR210UA  
ATWINC3400-MR210UAxxx(1)  
22.43 x 14.73 Certified module FCC, IC, CE  
x 2.0 mm  
with u.FL  
connector for an  
external antenna  
Note:ꢀ  
1. 'xxx' in the preceding table and following figure denotes the software version. For example, at the time of  
publish, the software is v1.22, so its equivalent order code is ATWINC3400-MR210CA122. The order code  
changes with the software version. For more information on the ordering code, refer to the ATWINC3400  
product page.  
The following figure illustrates the ATWINC3400-MR210xA module marking information.  
Figure 1-1.ꢀMarking Information  
MR  
2
1
0
C/U  
A
xxx  
ATWINC3400  
Device name  
MR: Internal Code  
2: OTA with shield  
1: Reserved  
0: Reserved  
C: Chip antenna  
U: External antenna  
Revision letter  
Software version  
Blank: Tray Packing  
T: Tape and Reel  
DS70005350D-page 5  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Block Diagram  
2.  
Block Diagram  
The following figure shows the block diagram of the ATWINC3400-MR210xA module.  
Figure 2-1.ꢀATWINC3400-MR210xA Module Block Diagram  
ATWINC3400-MR210xA  
2.4 GHz  
Chip Antenna  
or  
u.FL Connector for  
an External Antenna  
Discrete Balun  
UART TXD/RXD  
BT TXD/RXD  
BT RTS/CTS  
SPI  
RX/TX  
and  
Filter  
ATWINC3400 IC  
I2C  
26 MHz  
Crystal  
GPIOs  
GND  
DS70005350D-page 6  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Pinout and Package Information  
3.  
Pinout and Package Information  
This package contains an exposed paddle that must be connected to the system board ground. The ATWINC3400-  
MR210xA module pin assignment is shown in the following figure. This package contains an exposed paddle, Pin 37,  
PADDLE VSS, that must be connected to the system board ground.  
Figure 3-1.ꢀATWINC3400-MR210xA Module Pin Assignment  
ATWINC3400-MR210xA  
MODULE  
GND  
J1  
GND  
SPI_CFG  
J2  
J3  
J36  
I2C_SDA_M  
I2C_SCL_M  
IRQN  
N/C  
N/C  
N/C  
J35  
J34  
J33  
J4  
J5  
J6  
J7  
GPIO20  
N/C  
J32  
J31  
J30  
J29  
GPIO19  
RESETN  
BT_TXD  
BT_RXD  
GPIO18  
J8  
J9  
GPIO17  
GND  
I2C_SDA_S  
I2C_SCL_S  
VDDIO  
J28  
J27  
J10  
J11  
GPIO7  
SPI_MOSI  
SPI_SSN  
J12  
J13  
J26  
J25  
GND  
The following table provides the ATWINC3400-MR210xA module pin description.  
Table 3-1.ꢀATWINC3400-MR210xA Module Pin Description  
Pin #  
Pin Name  
GND  
Pin Type  
Description  
1
2
GND  
Ground pin  
SPI_CFG  
Digital Input  
Serial Peripheral Interface pin, which must be tied to  
VDDIO  
3
4
5
6
NC  
NC  
NC  
NC  
No connection  
No connection  
No connection  
No connection  
DS70005350D-page 7  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Pinout and Package Information  
...........continued  
Pin #  
Pin Name  
Pin Type  
Digital Input  
Description  
7
RESETN  
Active-low hard Reset pin  
When the Reset pin is asserted low, the module  
is in the Reset state. When the Reset pin is  
asserted high, the module functions normally  
This pin must connect to a host output that is  
low by default on power-up. If the host output is  
tri-stated, add a 1 MOhm pull-down resistor to  
ensure a low level at power-up  
8
9
BT_TXD  
Digital I/O,  
Programmable pull up  
Bluetooth UART transmit data output pin  
Used only during debug for DTM interface. SPI  
is the data and control interface with the host  
Microcontroller  
It is recommended to add a test point for this pin  
BT_RXD  
Digital I/O,  
Programmable pull up  
Bluetooth UART receive data input pin  
Used only during debug for the DTM interface.  
SPI is the data and control interface with the  
host Microcontroller  
Adding a test point for this pin is recommended  
10  
11  
I2C_SDA_S  
I2C_SCL_S  
Digital I/O,  
Programmable pull up  
I2C Client data pin  
Used only for test purposes. Adding a test point  
for this pin is recommended  
Digital I/O,  
Programmable pull up  
I2C Client clock pin  
Used only for test purposes. Adding a test point  
for this pin is recommended  
12  
13  
14  
VDDIO  
GND  
Power  
GND  
Digital I/O power supply  
Ground pin  
GPIO3  
Digital I/O,  
General Purpose Input/Output pin(1)  
Programmable pull up  
15  
16  
GPIO4  
Digital I/O,  
Programmable pull up  
General Purpose Input/Output pin(1)  
UART_TXD  
Digital I/O,  
Programmable pull up  
Wi-Fi UART TxD output pin  
Used only for debug development purposes.  
Adding a test point for this pin is recommended  
17  
18  
UART_RXD  
VBAT  
Digital I/O,  
Programmable pull up  
Wi-Fi UART RxD input pin  
Used only for debug development purposes.  
Adding a test point for this pin is recommended  
Power  
Power supply pin for DC/DC converter and PA  
DS70005350D-page 8  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Pinout and Package Information  
...........continued  
Pin #  
Pin Name  
Pin Type  
Digital Input  
Description  
19  
CHIP_EN  
PMU enable pin  
When the CHIP_EN pin is asserted high, the  
module is enabled. When the CHIP_EN pin is  
asserted low, the module is disabled or put into  
Power-Down mode  
Connect to a host output that is low by default  
at power-up. If the host output is tri-stated, add  
a 1 MOhm pull-down resistor, if necessary, to  
ensure a low level at power-up  
20  
RTC_CLK  
Digital I/O,  
Programmable pull up  
RTC Clock input pin  
This pin must connect to a 32.768 kHz clock  
source  
21  
22  
GND  
GND  
Ground pin  
GPIO8  
Digital I/O,  
General Purpose Input/Output pin(1)  
Programmable pull up  
23  
24  
25  
26  
27  
SPI_SCK  
SPI_MISO  
SPI_SSN  
SPI_MOSI  
GPIO7  
Digital I/O,  
Programmable pull up  
SPI clock pin  
Digital I/O,  
Programmable pull up  
SPI MISO (Host In Client Out) pin  
Active-low SPI SSN (Client Select) pin  
SPI MOSI (Host Out Client In) pin  
General Purpose Input/Output pin(1)  
Digital I/O,  
Programmable pull up  
Digital I/O,  
Programmable pull up  
Digital I/O,  
Programmable pull up  
28  
29  
GND  
GND  
Ground pin  
GPIO17  
Digital I/O,  
General Purpose Input/Output pin(1)  
Programmable pull up  
30  
31  
32  
33  
GPIO18  
GPIO19  
GPIO20  
IRQN  
Digital I/O,  
Programmable pull up  
General Purpose Input/Output pin(1)  
General Purpose Input/Output pin(1)  
General Purpose Input/Output pin(1)  
Digital I/O,  
Programmable pull up  
Digital I/O,  
Programmable pull up  
Digital output,  
Programmable pull up  
ATWINC3400-MR210xA module host interrupt  
request output pin  
This pin must connect to a host interrupt pin  
34  
35  
I2C_SCL_M  
I2C_SDA_M  
Digital I/O,  
Programmable pull up  
I2C Host clock pin  
Digital I/O,  
I2C Host data pin  
Programmable pull up  
36  
37  
GND  
GND  
GND  
Ground pin  
PADDLE VSS  
Connect to the system board ground  
DS70005350D-page 9  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Pinout and Package Information  
Note:ꢀ  
1. Usage of the GPIO functionality is not supported by the firmware. The data sheet will be updated once the  
support for this feature is added.  
3.1  
Package Description  
The following table provides the ATWINC3400-MR210xA module package dimensions.  
Table 3-2.ꢀATWINC3400-MR210xA Module Package Information  
Parameter  
Value  
37  
Unit  
Pad count  
Package size  
22.43 x 14.73  
2.09  
Total thickness  
Pad pitch  
1.20  
mm  
Pad width  
0.81  
Exposed pad size  
4.4 x 4.4  
DS70005350D-page 10  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Electrical Characteristics  
4.  
Electrical Characteristics  
This chapter provides an overview of the electrical characteristics of the ATWINC3400-MR210xA module.  
4.1  
Absolute Maximum Ratings  
The following table provides the absolute maximum ratings for the ATWINC3400-MR210xA module.  
Table 4-1.ꢀATWINC3400-MR210xA Module Absolute Maximum Ratings  
Symbol  
VDDIO  
Parameter  
I/O supply voltage  
Min.  
-0.3  
-0.3  
-0.3  
-0.3  
Max.  
5.0  
Unit  
VBAT  
VIN  
Battery supply voltage  
Digital input voltage  
Analog input voltage  
5.0  
VDDIO  
1.5  
V
VAIN  
Electrostatic discharge  
Human Body Model (HBM)  
-1000, -2000 (see notes +1000, +2000 (see notes  
VESDHBM  
below)  
below)  
TA  
Storage temperature  
Junction temperature  
RF input power  
-65  
150  
ºC  
125  
23  
dBm  
1. VIN corresponds to all the digital pins.  
2. For VESDHBM, each pin is classified as Class 1, Class 2 or both:  
2.1.  
2.2.  
2.3.  
The Class 1 pins include all the pins (both analog and digital).  
The Class 2 pins include all digital pins only.  
VESDHBM is ±1 kV for Class 1 pins. VESDHBM is ± 2 kV for Class 2 pins.  
Stresses beyond those listed under “Absolute Maximum Ratings” cause permanent damage to the device.  
This is a stress rating only. The functional operation of the device at those or any other conditions above  
those indicated in the operation listings of this specification is not implied. Exposure to maximum rating  
conditions for extended periods affects the device reliability.  
CAUTION  
4.2  
Recommended Operating Conditions  
The following table provides the recommended operating conditions for the ATWINC3400-MR210xA module.  
Table 4-2.ꢀATWINC3400-MR210xA Module Recommended Operating Conditions  
Symbol  
VDDIO  
Parameter  
Min.  
2.7  
Typ.  
3.3  
3.3  
Max.  
3.6  
4.2  
85  
Units  
V
I/O supply voltage (1)  
Battery supply voltage(2)(3)  
Operating temperature  
VBAT  
3.0  
V
-40  
ºC  
DS70005350D-page 11  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Electrical Characteristics  
Notes:ꢀ  
1. I/O supply voltage is applied to the VDDIO pin.  
2. Battery supply voltage is applied to the VBAT pin.  
3. The ATWINC3400-MR210xA module is functional across this range of voltages; however, optimal RF  
performance is ensured for VBAT of 3.3V.  
4.3  
DC Characteristics  
The following table provides the DC characteristics for the ATWINC3400-MR210xA module digital pads.  
Table 4-3.ꢀDC Electrical Characteristics  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
VIL  
Input Low  
Voltage  
-0.30  
0.60  
VIH  
VOL  
VOH  
Input High  
Voltage  
VDDIO - 0.60  
VDDIO + 0.30  
V
Output Low  
Voltage  
0.45  
Output High  
Voltage  
VDDIO - 0.50  
Output Load  
Capacitance  
20  
6
pF  
Digital Input Load  
Capacitance  
4.4  
IEEE 802.11 b/g/n Radio Performance  
4.4.1  
Receiver Performance  
The receiver performance is tested under the following conditions:  
VBAT = 3.3V  
VDDIO = 3.3V  
Temp = 25°C  
Measured after RF matching network  
The following table provides the receiver performance characteristics for the ATWINC3400-MR210xA module.  
Table 4-4.ꢀIEEE 802.11 Receiver Performance Characteristics  
Parameter  
Frequency  
Description  
Min.  
2,412  
Typ.  
Max.  
2,484  
Unit  
MHz  
1 Mbps DSSS  
2 Mbps DSSS  
-95.0  
-94.0  
-90.0  
-86.0  
Sensitivity 802.11b  
dBm  
5.5 Mbps DSSS  
11 Mbps DSSS  
DS70005350D-page 12  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Electrical Characteristics  
...........continued  
Parameter  
Description  
Min.  
Typ.  
-90.0  
-89.0  
-87.0  
-85.0  
-82.0  
-79.0  
-75.0  
-73.0  
-89.0  
-87.0  
-84.0  
-82.0  
-78.0  
-75.0  
-73.0  
-71.0  
0
Max.  
Unit  
6 Mbps OFDM  
9 Mbps OFDM  
12 Mbps OFDM  
18 Mbps OFDM  
Sensitivity 802.11g  
dBm  
24 Mbps OFDM  
36 Mbps OFDM  
48 Mbps OFDM  
54 Mbps OFDM  
MCS 0  
MCS 1  
MCS 2  
Sensitivity 802.11n  
(BW = 20 MHz, 800  
ns GI)  
MCS 3  
dBm  
MCS 4  
MCS 5  
MCS 6  
MCS 7  
1-11 Mbps DSSS  
6-54 Mbps OFDM  
MCS 0 – 7 (800 ns GI)  
1 Mbps DSSS (30 MHz offset)  
11 Mbps DSSS (25 MHz offset)  
6 Mbps OFDM (25 MHz offset)  
54 Mbps OFDM (25 MHz offset)  
MCS 0 – 20 MHz BW (25 MHz offset)  
MCS 7 – 20 MHz BW (25 MHz offset)  
Maximum receive  
signal level  
0
dBm  
0
50  
43  
40  
Adjacent channel  
rejection  
dB  
25  
40  
20  
4.4.2  
Transmitter Performance  
The transmitter performance is tested under the following conditions:  
VBAT = 3.3V  
VDDIO = 3.3V  
Temp = 25°C  
The following table provides the transmitter performance characteristics for the ATWINC3400-MR210xA module.  
Table 4-5.ꢀIEEE 802.11 Transmitter Performance Characteristics  
Parameter  
Frequency  
Description  
Minimum  
Typical  
Max.  
Unit  
2,412  
2,484  
MHz  
DS70005350D-page 13  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Electrical Characteristics  
...........continued  
Parameter  
Description  
802.11b 1 Mbps  
Minimum  
Typical  
16.7(1)  
17.5(1)  
18.3(1)  
13.0(1)  
17.5(1)  
12.5 (1)(2)  
±1.5(3)  
30.0  
Max.  
Unit  
802.11b 11 Mbps  
802.11g OFDM 6 Mbps  
Output power  
dBm  
802.11g OFDM 54 Mbps  
802.11n HT20 MCS 0 (800 ns GI)  
802.11n HT20 MCS 7 (800 ns GI)  
TX power accuracy  
Carrier suppression  
dB  
dBc  
Harmonic output power  
(Radiated, Regulatory  
mode)  
2nd  
3rd  
-41  
-41  
dBm/MHz  
Notes:ꢀ  
1. Measured as per IEEE 802.11 specifications.  
2. The typical output power is 10 dBm only for channel-10 (2.457 GHz). Values mentioned in the preceding table  
are applicable for all the other channels.  
3. Measured after RF matching network.  
4. The operating temperature range is -40°C to +85°C. RF performance is ensured at a room temperature of  
25°C with a 2-3 dB change at the boundary conditions.  
5. With respect to TX power, different (higher/lower) RF output power settings may be used for specific antennas  
and/or enclosures, in which case re-certification may be required.  
6. The availability of some specific channels and/or operational frequency bands are country-dependent and  
must be programmed at the host product factory to match the intended destination. Regulatory bodies prohibit  
exposing the settings to the end user. This requirement needs to be taken care of via the host implementation.  
7. The RF parameters for the ATWINC3400-MR210UA are approximately 1 dB less than the values in the table.  
This insertion loss accounts for PCB trace losses, and the filter network loss to the U.FL connector.  
4.5  
Bluetooth Radio Performance  
4.5.1  
Receiver Performance  
The receiver performance is tested under the following conditions:  
VBAT = 3.3V  
VDDIO = 3.3V  
Temp: 25°C  
Measured after RF matching network  
The following table provides the Bluetooth receiver performance characteristics for the ATWINC3400-MR210xA  
module.  
Table 4-6.ꢀBluetooth Receiver Performance Characteristics  
Parameter  
Frequency  
Sensitivity (ideal Tx)  
Description  
Min.  
2,402  
Typ.  
Max.  
2,480  
Unit  
MHz  
Bluetooth Low Energy (GFSK)  
-92.5  
dBm  
Maximum receive signal level Bluetooth Low Energy (GFSK)  
-2  
DS70005350D-page 14  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Electrical Characteristics  
...........continued  
Parameter  
Description  
Co-channel  
Min.  
Typ.  
9
Max.  
Unit  
adjacent + 1 MHz  
adjacent - 1 MHz  
-4  
-2  
adjacent + 2 MHz (image  
frequency)  
-24  
adjacent - 2 MHz  
-25  
-27  
Interference performance  
(Bluetooth Low Energy)  
adjacent + 3 MHz (adjacent to  
image)  
dB  
adjacent - 3 MHz  
adjacent + 4 MHz  
adjacent - 4 MHz  
adjacent + 5 MHz  
adjacent - 5 MHz  
-27  
-28  
-27  
-27  
-27  
4.5.2  
Transmitter Performance  
The transmitter performance is tested under the following conditions:  
VBAT = 3.3V  
VDDIO = 3.3V  
Temp: 25°C  
Measured after RF matching network  
The following table provides the Bluetooth transmitter performance characteristics for the ATWINC3400-MR210xA  
module.  
Table 4-7.ꢀBluetooth Transmitter Performance Characteristics  
Parameter  
Frequency  
Description  
Min.  
2,402  
Typ.  
Max.  
2,480  
Unit  
MHz  
Output power  
Bluetooth Low Energy (GFSK)  
N + 2 (Image frequency)  
3.3  
-33  
-32  
3.8  
N + 3 (Adjacent to image  
frequency)  
dBm  
In-band spurious emission  
(Bluetooth Low Energy)  
N - 2  
N - 3  
-48  
-47  
DS70005350D-page 15  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Electrical Characteristics  
Notes:ꢀ  
1. Measured after RF matching network.  
2. The operating temperature range is -40°C to +85°C. RF performance is ensured at a room temperature of  
25°C with a 2-3 dB change at the boundary conditions.  
3. With respect to TX power, different (higher/lower) RF output power settings may be used for specific antennas  
and/or enclosures, in which case re-certification may be required.  
4. The availability of some specific channels and/or operational frequency bands are country-dependent and  
must be programmed at the host product factory to match the intended destination. Regulatory bodies prohibit  
exposing the settings to the end user. This requirement needs to be taken care of via the host implementation.  
5. The RF parameters for the ATWINC3400-MR210UA are approximately 1 dB less than the values in the table.  
This insertion loss accounts for PCB trace losses and the filter network loss to the u.FL connector.  
DS70005350D-page 16  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Power Management  
5.  
Power Management  
5.1  
Device States  
The ATWINC3400-MR210xA module has multiple device states, based on the state of the IEEE 802.11 and Bluetooth  
subsystems. It is possible for both subsystems to be active at the same time. To simplify the device power  
consumption breakdown, the following basic states are defined. One subsystem can be active at a time:  
WiFi_ON_Transmit – Device actively transmits IEEE 802.11 signal  
WiFi_ON_Receive – Device actively receives IEEE 802.11 signal  
BT_ON_Transmit – Device actively transmits Bluetooth signal  
BT_ON_Receive – Device actively receives Bluetooth signal  
Doze – Device is powered on but it does not actively transmit or receive data  
Power_Down – Device core supply is powered off  
5.2  
Controlling Device States  
The following table shows different device states and their power consumption for the ATWINC3400-MR210xA . The  
device states can be switched using the following:  
CHIP_EN – Module pin (pin 19) enables or disables the DC/DC converter  
VDDIO – I/O supply voltage from external supply  
In the ON states, VDDIO is ON and CHIP_EN is high (at VDDIO voltage level). To change from the ON states  
to Power_Down state, connect the RESETN and CHIP_EN pin to logic low (GND) by following the power-down  
sequence mentioned in Figure 5-1. When VDDIO is OFF and CHIP_EN is low, the chip is powered off with no  
leakage.  
Table 5-1.ꢀDevice States Current Consumption  
Current Consumption(1)  
Output Power  
Device State  
Code Rate  
(dBm)  
IVBAT  
IVDDIO  
24 mA  
ON_WiFi_Transmit  
802.11b 1 Mbps  
802.11b 11 Mbps  
802.11g 6 Mbps  
802.11g 54 Mbps  
802.11n MCS 0  
802.11n MCS 7  
802.11b 1 Mbps  
802.11b 11 Mbps  
802.11g 6 Mbps  
802.11g 54 Mbps  
802.11n MCS 0  
802.11n MCS 7  
BLE 1 Mbps  
16.7  
17.5  
18.3  
13.0  
17.5  
12.5  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
3.3  
271 mA  
265 mA  
275 mA  
235 mA  
272 mA  
232 mA  
63.9 mA  
63.9 mA  
63.9 mA  
63.9 mA  
63.9 mA  
63.9 mA  
79.37 mA  
24 mA  
24 mA  
24 mA  
24 mA  
24 mA  
ON_WiFi_Receive  
23.7 mA  
23.7 mA  
23.7 mA  
23.7 mA  
23.7 mA  
23.7 mA  
23.68 mA  
ON_BT_Transmit  
ON_BT_Receive  
BLE 1 Mbps  
N/A  
51.36 mA  
23.68 mA  
DS70005350D-page 17  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Power Management  
...........continued  
Device State  
Current Consumption(1)  
Output Power  
(dBm)  
Code Rate  
IVBAT  
IVDDIO  
Doze (Bluetooth Low  
Energy Idle)  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
53 mA (2)  
1 mA (2)  
Doze (Bluetooth Low  
Energy Low Power)  
Power_Down  
10.5 uA(2)  
Notes:ꢀ  
1. Conditions: VBAT = 3.3V, VDDIO = 3.3V, at 25°C.  
2. Current consumption mentioned for these states is the sum of current consumed in VDDIO and VBAT voltage  
rails.  
When power is not supplied to the device (DC/DC converter output and VDDIO are OFF, at ground potential), voltage  
cannot be applied to the ATWINC3400-MR210xA module pins because each pin contains an ESD diode from the pin  
to supply. This diode turns on when voltage higher than one diode-drop is supplied to the pin.  
If voltage must be applied to the signal pads when the chip is in a low-power state, the VDDIO supply must be ON,  
so the Power_Down state must be used. Similarly, to prevent the pin-to-ground diode from turning ON, do not apply  
voltage that is more than one diode-drop below the ground to any pin.  
5.3  
Power-Up/Down Sequence  
The following figure illustrates the power-up/down sequence for the ATWINC3400-MR210xA.  
Figure 5-1.ꢀ Power-Up/Down Sequence  
VBATT  
tA  
tA'  
VDDIO  
tB  
tB'  
CHIP_EN  
RESETN  
tC  
tC'  
XO Clock  
The following table provides power-up/down sequence timing parameters.  
Table 5-2.ꢀ Power-Up/Down Sequence Timing  
Paramet  
Min. Max. Units  
Description  
Notes  
er  
tA  
0
0
ms VBAT rise to VDDIO VBAT and VDDIO can rise simultaneously or connected  
rise  
together. VDDIO must not rise before VBAT.  
tB  
ms VDDIO rise to  
CHIP_EN rise  
CHIP_EN must not rise before VDDIO. CHIP_EN must  
be driven high or low and must not be left floating.  
DS70005350D-page 18  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Power Management  
...........continued  
Paramet  
Min. Max. Units  
Description  
Notes  
er  
tC  
5
ms CHIP_EN rise to  
RESETN rise  
This delay is required to stabilize the XO clock before  
RESETN removal. RESETN must be driven high or low  
and must not be left floating.  
tA’  
tB’  
tC’  
0
0
0
ms VDDIO fall to VBAT  
fall  
VBAT and VDDIO must fall simultaneously or be  
connected together. VBAT must not fall before VDDIO.  
ms CHIP_EN fall to  
VDDIO fall  
VDDIO must not fall before CHIP_EN. CHIP_EN and  
RESETN must fall simultaneously.  
ms RESETN fall to  
VDDIO fall  
VDDIO must not fall before RESETN. RESETN and  
CHIP_EN fall simultaneously.  
5.4  
Digital I/O Pin Behavior During Power-Up Sequences  
The following table represents the digital I/O pin states corresponding to the device power modes.  
Table 5-3.ꢀDigital I/O Pin Behavior in Different Device States  
Pull Up/Down  
Resistor (96  
kOhm)  
Input  
Driver  
Device State  
VDDIO CHIP_EN RESETN Output Driver  
Power_Down: core supply  
OFF  
High  
Low  
High  
High  
Low  
Low  
High  
Disabled (Hi-Z)  
Disabled (Hi-Z)  
Disabled (Hi-Z)  
Disabled Disabled  
Disabled Enabled  
Power-On Reset: core supply High  
and hard reset ON  
Power-On Default: core supply High  
ON, device out of reset and  
not programmed  
Enabled  
Enabled  
On_Doze/ On_Transmit/  
On_Receive: core supply  
ON, device programmed by  
firmware  
High  
High  
High  
Programmed by Opposite Programmed by  
firmware for  
each pin:  
enabled or  
disabled  
of Output firmware for each  
Driver  
state  
pin: enabled or  
disabled  
DS70005350D-page 19  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Clocking  
6.  
Clocking  
6.1  
Low-Power Clock  
The ATWINC3400-MR210xA module requires an external 32.768 kHz clock to be supplied at the module pin 20. This  
clock is used during the sleep operation. The frequency accuracy of this external clock must be within ±200 ppm.  
DS70005350D-page 20  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
CPU and Memory Subsystem  
7.  
CPU and Memory Subsystem  
7.1  
Processor  
The ATWINC3400-MR210xA module has two Cortus APS3 32-bit processors, one is used for Wi-Fi and the other  
is used for Bluetooth. In IEEE 802.11 mode, the processor performs many of the MAC functions, including but  
not limited to: association, authentication, power management, security key management and MSDU aggregation/de-  
aggregation. In addition, the processor provides flexibility for various modes of operation, such as Station (STA) and  
Access Point (AP) modes. In Bluetooth mode, the processor handles multiple tasks of the Bluetooth protocol stack.  
7.2  
7.3  
Memory Subsystem  
The APS3 core uses a 256 KB instruction/boot ROM (160 KB for IEEE 802.11 and 96 KB for Bluetooth) along with  
a 420 KB instruction RAM (128 KB for IEEE 802.11 and 292 KB for Bluetooth), and a 128 KB data RAM (64 KB for  
IEEE 802.11 and 64 KB for Bluetooth). In addition, the device uses a 160 KB shared/exchange RAM (128 KB for  
IEEE 802.11 and 32 KB for Bluetooth), accessible by the processor and MAC, which allows the processor to perform  
various data management tasks on the Tx and Rx data packets.  
Nonvolatile Memory (eFuse)  
The ATWINC3400-MR210xA modules have 768 bits of nonvolatile eFuse memory that can be read by the CPU after  
a device reset. The eFuse is partitioned into six 128-bit banks (Bank 0 – Bank 5). Each bank has the same bit map  
(see the following figure). The purpose of the first 108 bits in each bank is fixed, and the remaining 20 bits are  
general-purpose software dependent bits, or reserved for future use. Currently, the Bluetooth address is derived from  
the Wi-Fi MAC address such that the Bluetooth address = Wi-Fi MAC address + 1.  
Note:ꢀ If IQ Amp Used, IQ Amp Correction, IQ Pha Used, and IQ Pha Correction bit fields are programmed, Bank 0  
and Bank 1 must not be programmed with any values, and only the Bank Invalid bit must be programmed.  
This nonvolatile one-time-programmable (OTP) memory can be used for storing the following customer-specific  
parameters:  
MAC address  
Calibration information (crystal frequency offset (XO offset) and so on)  
Other software-specific configuration parameters  
Each bank can be programmed independently, which allows for several updates of the device parameters following  
the initial programming. For example, if the MAC address is currently programmed in Bank 3, and to update the new  
MAC address, perform the following steps:  
1. Invalidate the contents of Bank 3 by programming the Bank Invalid bit field of Bank 3.  
2. Program Bank 4 with the new MAC address along with the values of ADC Calib (if used in Bank 3), Frequency  
Offset (from Bank 3), IQ Amp Correction (from Bank 3) and IQ Pha Correction (from Bank 3). The Used bit  
field for each corresponding value bit field must also be programmed.  
3. Validate the contents of Bank 4 by programming the Bank Used bit field of Bank 4.  
Each bit field (i.e., MAC Address, ADC Calibration, Frequency Offset, IQ Amp Correction, and IQ Pha Correction) has  
its corresponding Used bit field. Each Used bit field indicates to the firmware that the value in the related bit field is  
valid. A value of '0' in the Used bit field indicates that the following bit field is invalid and a value of '1' programmed to  
the Used bit field indicates that the corresponding bit field is valid and can be used by firmware.  
By default, all the ATWINC3400-MR210xA modules are programmed with the MAC address, Frequency Offset bits,  
IQ Amp and IQ Phase fields of Bank 3.  
DS70005350D-page 21  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
CPU and Memory Subsystem  
Figure 7-1.ꢀBitmap for ATWINC3400-MR210xA eFuse Bank  
Width  
1
1
3
2
1
48  
1
7
1
15  
1
13  
1
13  
20  
Bit  
31  
30  
29:27 26:25  
Word 0  
24  
23:0  
31:8  
7
6:0  
31  
30:16  
15  
14:2  
1
0 - 31:20 19  
0
Word  
Word 1  
Word 2  
Word 3  
Note:ꢀ The bit map has been updated with the IQ Amp Correction and IQ Pha Correction fields from firmware version  
1.4 onwards. Earlier, these bit fields were reserved for future use. For customers using firmware older than 1.4, the  
IQ Amp Correction and IQ Pha Correction bit fields will not be used by the firmware.  
The matrix table below provides details on how different versions of the firmware would handle the IQ Amp Used, IQ  
Amp Correction, IQ Pha Used and IQ Pha Correction bit fields during Initialization.  
IQ Amp Used and IQ Pha Used Bit Status  
Firmware Version  
Used by  
Customer  
Device with IQ Amp Used and IQ Pha Used  
Bits with Value ‘1’  
Device with IQ Amp Used and IQ Pha  
Used Bits with Value ‘0’  
1.4 or later  
The firmware loads the IQ calibration values  
from the IQ Amp Correction and IQ Pha  
The firmware ignores the values in the IQ  
Amp Correction and IQ Pha Correction bit  
Correction bit fields of the corresponding eFuse fields and proceeds with Initialization.  
bank and proceeds with Initialization.  
Prior to 1.4  
The firmware does not check for the IQ Amp Used and IQ Pha Used bit fields and proceeds  
with Initialization.  
DS70005350D-page 22  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
WLAN Subsystem  
8.  
WLAN Subsystem  
The WLAN subsystem is composed of the Media Access Controller (MAC), Physical Layer (PHY) and the radio.  
8.1  
MAC  
The ATWINC3400-MR210xA module is designed to operate at low power, while providing high data throughput. The  
IEEE 802.11 MAC functions are implemented with a combination of dedicated datapath engines, hardwired control  
logic and a low power, high-efficiency microprocessor. The combination of dedicated logic with a programmable  
processor provides optimal power efficiency and real-time response while providing the flexibility to accommodate  
evolving standards and future feature enhancements.  
The dedicated datapath engines are used to implement datapath functions with heavy computational requirements.  
For example, a Frame Check Sequence (FCS) engine checks the Cyclic Redundancy Check (CRC) of the  
transmitting and receiving packets, and a cipher engine performs all the required encryption and decryption  
operations for the WEP, WPA-TKIP and WPA2 CCMP-AES security requirements.  
Control functions, which have real-time requirements, are implemented using hardwired control logic modules.  
These logic modules offer real-time response while maintaining configurability through the processor. Examples  
of hardwired control logic modules are the channel access control module (implements EDCA/HCCA, Beacon TX  
control, interframe spacing and so on), protocol timer module (responsible for the Network Access vector, back-off  
timing, timing synchronization function and slot management), MAC Protocol Data Unit (MPDU) handling module,  
aggregation/deaggregation module, block ACK controller (implements the protocol requirements for burst block  
communication) and TX/RX control Finite State Machine (FSM) (coordinates data movement between PHY and MAC  
interface, cipher engine and the Direct Memory Access (DMA) interface to the TX/RX FIFOs).  
The following are the characteristics of the MAC functions implemented solely in the software on the microprocessor:  
Functions with high memory requirements or complex data structures. Examples include association table  
management and power save queuing.  
Functions with low computational load or without critical real-time requirements. Examples include  
authentication and association.  
Functions that require flexibility and upgradeability. Examples include beacon frame processing and QoS  
scheduling.  
Features  
The ATWINC3400-MR210xA MAC supports the following functions:  
IEEE 802.11b/g/n  
IEEE 802.11e WMM QoS EDCA/HCCA/PCF multiple access categories traffic scheduling  
Advanced IEEE 802.11n features:  
– Transmission and reception of aggregated MPDUs (A-MPDU)  
– Transmission and reception of aggregated MSDUs (A-MSDU)  
– Immediate block acknowledgment  
– Reduced Interframe Spacing (RIFS)  
IEEE 802.11i and WFA security with key management:  
– WEP 64/128  
– WPA-TKIP  
– 128-bit WPA2 CCMP (AES)  
Advanced power management:  
– Standard IEEE 802.11 power save mode  
RTS-CTS and CTS-self support  
Either STA or AP mode in the infrastructure basic service set mode  
DS70005350D-page 23  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
WLAN Subsystem  
8.2  
PHY  
The ATWINC3400-MR210xA module WLAN PHY is designed to achieve the reliable and power-efficient physical  
layer communication specified by the IEEE 802.11 b/g/n in single stream mode with 20 MHz bandwidth. The  
advanced algorithms are used to achieve maximum throughput in a real-world communication environment with  
impairments and interference. The PHY implements all the required functions such as Fast Fourier Transform (FFT),  
filtering, Forward Error Correction (FEC) that is a Viterbi decoder, frequency, timing acquisition and tracking, channel  
estimation and equalization, carrier sensing, clear channel assessment and automatic gain control.  
Features  
The IEEE 802.11 PHY supports the following functions:  
Single antenna 1x1 stream in 20 MHz channels  
Supports IEEE 802.11b DSSS-CCK modulation: 1, 2, 5.5 and 11 Mbps  
Supports IEEE 802.11g OFDM modulation: 6, 9, 12,18, 24, 36, 48 and 54 Mbps  
Supports IEEE 802.11n HT modulations MCS0-7, 20 MHz, 800 and 400 ns guard interval: 6.5, 7.2, 13.0, 14.4,  
19.5, 21.7, 26.0, 28.9, 39.0, 43.3, 52.0, 57.8, 58.5, 65.0 and 72.2 Mbps(1)  
IEEE 802.11n mixed mode operation  
Per packet TX power control  
Advanced channel estimation/equalization, automatic gain control, CCA, carrier/symbol recovery and frame  
detection  
Note:ꢀ  
1. Short GI is currently not supported by the firmware. The data sheet will be updated when the feature is  
supported.  
8.3  
Radio  
This section presents information describing the properties and characteristics of the ATWINC3400-MR210xA and  
Wi-Fi radio transmit and receive performance capabilities of the device.  
The performance measurements are taken at the RF pin assuming 50Ω impedance; the RF performance is ensured  
for a room temperature of 25oC with a derating of 2-3 dB at the boundary conditions.  
The measurements were taken under typical conditions: VBATT = 3.3V; VDDIO = 3.3V; temperature: +25ºC  
Table 8-1.ꢀFeatures and Properties  
Feature  
Description  
Part Number  
WLAN Standard  
Host Interface  
Dimension  
ATWINC3400-MR210xA  
IEEE 802.11 b/g/n, Wi-Fi Compliant  
SPI  
22.4 x 14.7 x 2.0 mm  
Frequency Range  
Number of Channels  
Modulation  
2.412 GHz ~ 2.472 GHz (2.4 GHz ISM Band)  
11 for North America and 13 for Europe and Japan  
802.11b: DQPSK, DBPSK, CCK  
802.11g/n: OFDM /64-QAM,16-QAM, QPSK, BPSK  
Data Rate  
802.11b: 1, 2, 5.5, 11 Mbps  
802.11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps  
802.11n: 6.5, 13, 19.5, 26, 39, 52, 58.5, 65 Mbps  
Data Rate  
(20 MHz, normal GI, 800 ns)  
DS70005350D-page 24  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
WLAN Subsystem  
...........continued  
Feature  
Description  
Data Rate  
(20 MHz, short GI, 400 ns)(1)  
802.11n: 7.2, 14.4, 21.7, 28.9, 43.3, 57.8, 65,72.2 Mbps  
Operating Temperature  
-40 to +85oC  
Note:ꢀ  
1. Currently, short GI is not supported by the firmware. The data sheet will be updated when the feature is  
supported.  
DS70005350D-page 25  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Bluetooth Low Energy  
9.  
Bluetooth Low Energy  
The Bluetooth subsystem implements all the mission critical real-time functions. It encodes/decodes HCI packets,  
constructs baseband data packages; and manages and monitors the connection status, slot use, data flow, routing,  
segmentation and buffer control. The Bluetooth subsystem supports Bluetooth Low Energy modes of operation.  
The following advanced low energy applications are supported:  
Smart energy  
Consumer wellness  
Home automation  
Security  
Proximity detection  
Entertainment  
Sports and fitness  
Automotive  
Coexistence Mechanism  
The ATWINC3400-MR210xA supports simultaneous use of both Bluetooth Low Energy and Wi-Fi via a coexistence  
mechanism that allows the protocols to share the same radio. The radio defaults to Wi-Fi use until a Bluetooth Low  
Energy event occurs (such as connection or advertising), in which case the radio is gracefully switched over for  
Bluetooth Low Energy use. For the duration of the Bluetooth Low Energy event, the radio is switched back and forth  
between Wi-Fi and Bluetooth Low Energy, as demanded by the Bluetooth Low Energy activity, before returning to  
Wi-Fi until the next Bluetooth Low Energy event.  
DS70005350D-page 26  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
External Interfaces  
10.  
External Interfaces  
The ATWINC3400-MR210CA external interfaces include:  
I2C for debugging  
SPI for control and data transfer  
UART for debugging  
General Purpose Input/Output pins(1)  
Note:ꢀ  
1. Usage of the GPIO functionality is not supported by the ATWINC3400 firmware. The data sheet will be  
updated once the support for this feature is added.  
10.1  
Interfacing with the Host Microcontroller  
This section describes interfacing the ATWINC3400-MR210xA module with the host microcontroller. The interface is  
comprised of a client SPI and additional control signals, as shown in the following figure. For more information on SPI  
interface specification and timing, refer to the SPI Interface. Additional control signals are connected to the GPIO/IRQ  
interface of the microcontroller.  
Figure 10-1.ꢀInterfacing with Host Microcontroller  
CHIP_EN  
RESET  
Host  
Microcontroller  
Wi-Fi Controller  
Module  
SPI  
IRQN  
Table 10-1.ꢀHost Microcontroller Interface Pins  
Pin Number  
Pin Name  
RESETN  
IRQN  
7
33  
19  
25  
26  
24  
CHIP_EN  
SPI_SSN  
SPI_MOSI  
SPI_MISO  
DS70005350D-page 27  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
External Interfaces  
...........continued  
Pin Number  
Pin Name  
SPI_SCK  
23  
10.2  
SPI Client Interface  
10.2.1 Overview  
The ATWINC3400-MR210xA has a Serial Peripheral Interface (SPI) that operates as an SPI client. The SPI interface  
can be used for control and for serial I/O of 802.11 and Bluetooth Low Energy data. The SPI pins are mapped as  
shown in the following table. The SPI is a full-duplex, client-synchronous serial interface that is available immediately  
following a Reset when pin 2 (SPI_CFG) is tied to VDDIO.  
Table 10-2.ꢀSPI Interface Pin Mapping  
Pin #  
2
SPI function  
CFG: Must be tied to VDDIO  
SSN: Active-Low Client Select  
MOSI(RXD): Serial Data Receive  
SCK: Serial Clock  
25  
26  
23  
24  
MISO(TXD): Serial Data Transmit  
When the SPI is not selected, that is, when the SSN is high, the SPI interface will not interfere with data transfers  
between the serial-host and other serial-client devices. When the serial-client is not selected, its transmitted data  
output is buffered, resulting in a high impedance drive onto the MISO line.  
The SPI interface responds to a protocol that allows an external host to read or write any register in the chip, as well  
as, initiate DMA transfers.  
The SPI SSN, MOSI, MISO and SCK pins of the ATWINC3400-MR210xA have internal programmable pull-up  
resistors. These resistors must be programmed to be disabled; otherwise, if any of the SPI pins are driven to a low  
level while the ATWINC3400-MR210xA is in the low-power sleep state, the current will flow from the VDDIO supply  
through the pull-up resistors, increasing the current consumption of the module.  
10.2.2 SPI Timing  
The SPI Client interface supports four standard modes as determined by the Clock Polarity (CPOL) and Clock Phase  
(CPHA) settings. These modes are illustrated in the following table and figure.  
Table 10-3.ꢀSPI Client Modes  
Mode  
CPOL  
CPHA  
0
1
2
3
0
0
1
1
0
1
0
1
Note:ꢀ The ATWINC3400-MR210xA firmware uses “SPI MODE 0” to communicate with the host.  
The red lines in the following figure correspond to Clock Phase = 0 and the blue lines correspond to Clock Phase = 1.  
DS70005350D-page 28  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
External Interfaces  
Figure 10-2.ꢀSPI Client Clock Polarity and Clock Phase Timing  
CPOL = 0  
SCK  
CPOL = 1  
SSN  
CPHA = 0  
CPHA = 1  
z
1
2
3
4
5
6
7
8
z
RXD/TXD  
(MOSI/MISO)  
z
1
2
3
4
5
6
7
8
z
The SPI timing is provided in the following figure and table.  
Figure 10-3.ꢀSPI Timing Diagram (SPI Mode CPOL = 0, CPHA = 0)  
f
SCK  
t
t
t
WL  
LH  
WH  
HL  
SCK  
TXD  
t
t ODLY  
RXD  
SSN  
t
t
ISU  
IHD  
t SUSSN  
Table 10-4.ꢀSPI Client Timing Parameters(  
t
HDSSN  
Parameter  
Symbol  
fSCK  
Min.  
Max.  
Units  
Clock Input Frequency(2)  
48  
MHz  
DS70005350D-page 29  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
External Interfaces  
...........continued  
Parameter  
Symbol  
tWL  
Min.  
Max.  
Units  
Clock Low Pulse Width  
Clock High Pulse Width  
Clock Rise Time  
4
5
7
tWH  
tLH  
0
Clock Fall Time  
tHL  
0
7
TXD Output Delay(3)  
RXD Input Setup Time  
RXD Input Hold Time  
SSN Input Setup Time  
SSN Input Hold Time  
tODLY  
tISU  
4
9 from SCK fall  
ns  
1
tIHD  
5
tSUSSN  
tHDSSN  
3
5.5  
Notes:ꢀ  
1. The timing is applicable to all SPI modes.  
2. The maximum clock frequency specified is limited by the SPI Client interface internal design; the actual  
maximum clock frequency can be lower and depends on the specific PCB layout.  
3. The timing is based on 15 pF output loading. Under all conditions, tLH + tWH + tHL + tWL must be less than or  
equal to 1/ fSCK  
.
10.3  
UART Interface  
The ATWINC3400-MR210xA supports the Universal Asynchronous Receiver/Transmitter (UART) interface. Wi-Fi and  
Bluetooth Low Energy interfaces must be used for debug purposes only. Wi-Fi UART pins are available on pins 16  
(TXD) and 17 (RXD). Bluetooth Low Energy UART pins are available on pins 8 (TXD) and 9 (RXD). The UART is  
compatible with the RS-232 standard.  
The default configuration for accessing the Wi-Fi UART interface of the ATWINC3400-MR210xA is mentioned below:  
Baud rate: 460800  
Data: 8-bit  
Parity: None  
Stop bit: 1-bit  
Flow control: None  
It also has RX and TX FIFOs, which ensure reliable high-speed reception and low software overhead transmission.  
FIFO size is 4 x 8 for both RX and TX direction. The UART also has status registers showing the number of received  
characters available in the FIFO and various error conditions, as well as, the ability to generate interrupts based on  
these status bits.  
An example of the UART receiving or transmitting a single packet is shown in the following figure. This example  
shows 7-bit data (0x45), odd parity and two stop bits.  
Figure 10-4.ꢀExample of UART RX of TX Packet  
Current Packet  
Data  
Previous  
Packets or  
Leading  
Next  
Packet  
Parity  
Bit  
Start  
Bit  
Stop Bits  
Idle Bits  
DS70005350D-page 30  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
External Interfaces  
10.4  
I2C Client Interface  
The I2C client interface is a two-wire serial interface consisting of a serial data line (SDA) on module Pin 10 and a  
serial clock line (SCL) on module Pin 11. This interface is used for debugging of ATWINC3400-MR210xA modules.  
The I2C client responds to the seven bit address value 0x60. The ATWINC3400-MR210xA I2C supports I2C bus  
version 2.1 - 2000 and can operate in Standard mode (with data rates up to 100 Kb/s) and Fast mode (with data rates  
up to 400 Kb/s).  
Note:ꢀ For specific information on I2C bus, refer to Philips Specification entitled “The I2C-Bus Specification, Version  
2.1”. The I2C client is a synchronous serial interface. The SDA line is a bidirectional signal and changes only  
while the SCL line is low, except for STOP, START, and RESTART conditions. The output drivers are open-drain to  
perform wire-AND functions on the bus. The maximum number of devices on the bus is limited by only the maximum  
capacitance specification of 400 pF. Data is transmitted in byte packages.  
10.4.1 I2C Client Timing  
The I2C Client timing diagram for the ATWINC3400-MR210xA module is shown in the following figure.  
Figure 10-5.ꢀI2C Client Timing Diagram  
The following table provides the I2C Client timing parameters for the ATWINC3400-MR210xA module.  
Table 10-5.ꢀI2C Client Timing Parameters  
Parameter  
SCL Clock Frequency  
SCL Low Pulse Width  
SCL High Pulse Width  
SCL, SDA Fall Time  
Symbol  
Min.  
0
Max.  
400  
Units  
Remarks  
fSCL  
tWL  
tWH  
tHL  
kHz  
1.3  
0.6  
µs  
ns  
µs  
300  
This is dictated by external  
components  
SCL, SDA Rise Time  
tLH  
300  
START Setup Time  
START Hold Time  
SDA Setup Time  
tSUSTA  
tHDSTA  
tSUDAT  
0.6  
0.6  
100  
0
ns  
ns  
µs  
Client and Host Default  
Host Programming Option  
SDA Hold Time  
tHDDAT  
40  
DS70005350D-page 31  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
External Interfaces  
...........continued  
Parameter  
Symbol  
tSUSTO  
Min.  
Max.  
Units  
µs  
Remarks  
STOP Setup Time  
0.6  
Bus Free Time Between STOP  
and START  
tBUF  
tPR  
1.3  
0
Glitch Pulse Reject  
50  
ns  
DS70005350D-page 32  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Application Reference Design  
11.  
Application Reference Design  
The ATWINC3400-MR210xA module application schematics for different supported host interfaces are shown in this  
section.  
11.1  
Host Interface  
Figure 11-1.ꢀATWINC3400-MR210xA Reference Schematic  
Note:ꢀ It is recommended to add test points for module pins J8, J9, J10, J11, J16 and J17 in the design.  
The following table provides the reference Bill of Material (BoM) details for the ATWINC3400-MR210xA module with  
SPI as host interface.  
Table 11-1.ꢀATWINC3400-MR210xA Reference Bill of Materials for SPI Operation  
Item  
Quantity Referenc Value  
e
Description  
Manufacturer  
Part Number Footprint  
1
1
U1  
ATWINC3400- Wi-Fi/  
Microchip  
ATWINC3400 Custom  
-MR210xA  
MR210xA  
Bluetooth/BLE Technology  
®
Combo Module Inc.  
®
2
1
U2  
ASH7KW-32.76 Oscillator,  
Abracon  
ASH7KW-32. OSCCC320  
8kHZ-L-T  
32.768 kHz,  
+0/-175 ppm,  
1.2V - 5.5V,  
-40°C - +85°C  
Corporation  
768kHZ-L-T  
X150X100-4  
N
DS70005350D-page 33  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Application Reference Design  
...........continued  
Item  
Quantity Referenc Value  
Description  
Manufacturer  
Part Number Footprint  
e
®
3
1
R1  
1M  
0
RESISTOR,  
Thick Film, 1  
MOhm, 0201  
Panasonic  
ERJ-1GEJ10 RS0201  
5C  
®
4
13  
R2-R14  
RESISTOR,  
Thick Film, 0  
Ohm, 0201  
Panasonic  
ERJ-1GN0R0 RS0201  
0C  
DS70005350D-page 34  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Module Outline Drawings  
12.  
Module Outline Drawings  
The ATWINC3400-MR210xA module package details are outlined in the following figure.  
Figure 12-1.ꢀATWINC3400-MR210CA Footprint and Module Package Drawings - Top, Bottom and Side View  
22.428  
1.981  
METAL SHIELD  
1.30  
13  
1
14  
1.346  
14.732  
ANTENNA  
5.21  
1.204  
PITCH  
24  
25  
36  
1.341  
1.204 PITCH  
0.787  
2.09  
TOP VIEW  
SIDE VIEW  
THIS PAD MUST BE  
SOLDERED TO GROUND  
25 26 27 28 29 30 31 32 33 34 35 36  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
4.40  
0.94  
13 12 11 10  
9
8
7
6
5
4
3
2
1
4.40  
6.13  
BOTTOM VIEW  
DS70005350D-page 35  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Module Outline Drawings  
Figure 12-2.ꢀATWINC3400-MR210CA Module Package Drawings - 3D View and Recommended Land Pattern  
RECOMMENDED LAND PATTERN  
1.204  
PITCH  
SILK  
SCREEN  
6.128  
4.400  
13  
1
1.880  
14  
5.118  
4.400  
14.732  
12.045  
EDGE OF  
PC BOARD  
5.214  
24  
25  
36  
1.985  
0.813  
13.244  
22.428  
DS70005350D-page 36  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Module Outline Drawings  
Figure 12-3.ꢀATWINC3400-MR210UA Footprint and Module Package Drawings - Top, Bottom and Side View  
22.428  
1.981  
RF CONNECTOR  
3.64  
1.30  
13  
1
14  
2.72  
1.346  
14.732  
1.204  
PITCH  
24  
25  
36  
METAL  
SHIELD  
1.341  
1.204 PITCH  
0.787  
2.09  
TOP VIEW  
SIDE VIEW  
THIS PAD MUST BE  
SOLDERED TO GROUND  
25 26 27 28 29 30 31 32 33 34 35 36  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
5.21  
4.40  
0.94  
13 12 11 10  
9
8
7
6
5
4
3
2
1
4.40  
6.13  
BOTTOM VIEW  
DS70005350D-page 37  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Module Outline Drawings  
Figure 12-4.ꢀATWINC3400-MR210UA Module Package Drawings - 3D View and Recommended Land Pattern  
RECOMMENDED LAND PATTERN  
1.204  
PITCH  
SILK  
SCREEN  
6.128  
4.400  
13  
1
1.880  
14  
5.118  
4.400  
14.732  
12.045  
EDGE OF  
PC BOARD  
5.214  
24  
25  
36  
1.985  
0.813  
13.244  
22.428  
Notes:ꢀ  
1. Dimensions are in mm.  
2. Having a 5x5 grid of GND vias solidly connecting the exposed GND paddle of the module to the ground plane  
on the inner/other layers of the host board is recommended. This will provide a good ground and thermal  
transfer for the ATWINC3400-MR210xA module.  
DS70005350D-page 38  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Design Considerations  
13.  
Design Considerations  
This chapter provides the guidelines on module placement and routing to achieve the best performance.  
13.1  
ATWINC3400-MR210CA  
13.1.1 ATWINC3400-MR210CA Module Placement and Routing Guidelines  
It is critical to follow the recommendations listed below to achieve the best RF performance:  
The module must be placed on the host board and the chip antenna area must not overlap with the host board.  
The following figure on placement reference shows the best, poor and worst case module placements in the  
host board.  
Figure 13-1.ꢀATWINC3400-MR210CA Placement Example  
Do not place the module in the middle of the host board or far away from the host board edge.  
CAUTION  
Follow the host board mechanical recommendation, ground plane and keepout recommendations, as shown in  
the following figure. Module chip antenna is specifically tuned for this host board mechanical recommendation,  
as shown in the following figure. The host PCB must have a thickness of 1.5 mm.  
– Follow the module placement and keepout recommendation, as shown in the following figure.  
Avoid routing any traces on the top layer of the host board, which is directly below the module area.  
In the keepout region, there must be no copper traces in all signal layers.  
Avoid placing any components (like mechanical spacers, bumpon and so on) on the host board close  
to the chip antenna region.  
Place the GND polygon pour below the module on the top layer of the host board. Avoid breaks in this  
GND plane and ensure continuous GND plane for better RF performance.  
DS70005350D-page 39  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Design Considerations  
The GND polygon pour in the top layer of the host board must have a minimum area of 20 x 40 mm.  
Place sufficient GND vias on the host board edge and below the module for better RF performance.  
Having a 5 x 5 grid of GND vias solidly connecting the exposed GND paddle of the module to  
the ground plane of the host board is recommended. This will act as a good ground and thermal  
conduction path for the ATWINC3400-MR210CA module. The GND vias must have a minimum via  
hole size of 0.2 mm.  
The antenna on the module must not be placed in direct contact or close proximity to plastic casing/  
objects. Keep a minimum clearance of > 7 mm in all directions around the chip antenna.  
Figure 13-2.ꢀATWINC3400-MR210CA Best Case Placement Reference Example  
13.1.2 ATWINC3400-MR210CA Antenna Performance  
The ATWINC3400-MR210CA uses a chip antenna, which is fed via matching network. The table below lists the  
technical specification of the chip antenna.  
Table 13-1.ꢀChip antenna specification  
Parameter  
Value  
Peak gain  
0.5 dBi  
Operating frequency  
Antenna P/N  
Antenna vendor  
2400 – 2500 MHz  
2450AT18A100  
Johanson Technology Inc.  
13.1.2.1 Radiation Pattern  
Following figures illustrate the antenna radiation pattern measured for the ATWINC3400-MR210CA module mounted  
in the ATWINC3400-Xpro evaluation kit. During the measurement, the module is placed in the XZ plane with Y axis  
being perpendicular to the module and pointing to the front of the module.  
DS70005350D-page 40  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Design Considerations  
Figure 13-3.ꢀAntenna Radiation Pattern - XY Plane  
Figure 13-4.ꢀAntenna Radiation Pattern - ZY Plane  
Figure 13-5.ꢀAntenna Radiation Pattern - ZX Plane  
DS70005350D-page 41  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Design Considerations  
13.2  
ATWINC3400-MR210UA External Antenna Connector  
13.2.1 ATWINC3400-MR210UA Module Placement and Routing Guidelines  
The ATWINC3400-MR210UA module has an Ultra Small Miniature RF Connector (u.FL) for the external antenna.  
The choice of antenna is limited to the antenna types for which the module was tested and approved. For a list of  
tested and approved antennas that may be used with the module, refer to the respective country in the Regulatory  
Approval section.  
An approved list of external antennas tested and certified with the ATWINC3400-MR210UA module is shown in  
13.2.2 ATWINC3400-MR210UA Approved External Antennas.  
It is critical to follow the recommendations listed below to achieve the best RF performance:  
Avoid routing any traces on the top layer of the host board, which is directly below the module area.  
Place the GND polygon pour below the complete module area. Do not have any breaks in this GND plane.  
Place sufficient GND vias in the GND polygon pour below the module area for better RF performance.  
Having a 3 x 3 grid of GND vias solidly connecting the exposed GND paddle of the module to the inner layer  
ground plane of the host board is recommended. This will act as a good ground and thermal conduction path for  
the ATWINC3400-MR210UB module. The GND vias must have a minimum via hole size of 0.3 mm.  
Keep large metal objects away from the external antenna to avoid electromagnetic field blocking.  
Make sure the width of the traces routed to GND, VDDIO and VBAT rails are sufficiently larger for handling the  
peak TX current consumption.  
13.2.1.1 Antenna Placement Recommendations for ATWINC3400-MR210UA  
The following recommendations must be applied for the placement of antenna and its cable:  
The antenna cable must not be routed over circuits generating electrical noise on the host board or alongside or  
underneath the module. It is preferable that the cable be routed straight out of the module.  
The antenna must not be placed in direct contact or in close proximity of the plastic casing/objects.  
– Do not enclose the antenna within a metal shield.  
Keep any components that may radiate noise, signals or harmonics within the 2.4 GHz to 2.5 GHz frequency  
band away from the antenna and, if possible, shield those components. Any noise radiated from the host board  
in this frequency band degrades the sensitivity of the module.  
It is recommended that the antenna be placed at a distance greater than 5 cm away from the module. The  
following figure shows the antenna keepout area; the antenna must not be placed in this area.  
This recommendation is based on an open-air measurement and does not take into account any metal shielding  
of the customer end product. When a metal enclosure is used, the antenna can be located closer to the  
ATWINC3400-MR210UA module.  
The drawing provides an option for routing the antenna cable depending on the location of the antenna with  
respect to the ATWINC3400-MR210UA PCB. There are two possible options for the optimum routing of the  
cable.  
DS70005350D-page 42  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Design Considerations  
Figure 13-6.ꢀAntenna Placement Guideline  
Note:ꢀ These guidelines are generic and it is recommended that customers check and fine-tune the antenna  
positioning in the final host product based on RF performance.  
13.2.2 ATWINC3400-MR210UA Approved External Antennas  
The ATWINC3400-MR210UA module is approved for use with the antennas listed in the following table. It is  
permissible to use a different antenna, provided the antenna is of the same type, gain (equal or less than), and  
has similar in-band and out-of-band characteristics are present (refer to specification sheet for cutoff frequencies).  
If other antenna types are used, the OEM installer must conduct the necessary assessments and authorize  
the antenna with respective regulatory agencies and ensure compliance. For more details on the corresponding  
regulatory approval sections, 14. Appendix A: Regulatory Approval.  
Table 13-2.ꢀList of Approved External Antennas  
List Items  
Part Number  
Manufacturer  
Antenna Gain at 2.4 Antenna type  
GHz band  
1
2
RFA-02-P33  
RFA-02-D3  
Aristotle  
Aristotle  
2
2
PCB  
Dipole  
DS70005350D-page 43  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Design Considerations  
...........continued  
List Items  
Part Number  
Manufacturer  
Antenna Gain at 2.4 Antenna type  
GHz band  
3
4
5
6
7
RFA-02-L2H1  
RFA-02-P05  
RFA-02-C2M2  
W3525B039  
Aristotle  
2
Dipole  
PCB  
Aristotle  
2
Aristotle  
2
Dipole  
PCB  
Pulse Electronics  
2
RFDPA870920IMLB3 WALSIN  
01  
1.84  
Dipole  
8
RN-SMA-S  
Microchip  
0.56  
Dipole  
Notes:ꢀ  
1. If the end-product using the module is designed to have an antenna port that is accessible to the end user,  
then the unique antenna connector (permissible by FCC) must be used (for example, Reverse Polarity (RP)-  
SMA).  
2. If an RF coaxial cable is used between the module RF output and the enclosure, then the unique antenna  
connector must be used in the enclosure wall to interface with an antenna.  
3. Contact the antenna vendor for detailed antenna specifications to review suitability to end-product operating  
environment and to identify alternatives.  
13.3  
13.4  
Reflow Profile Information  
For information on the reflow process guidelines, refer to the “Solder Reflow Recommendation” Application Note  
(AN233).  
Module Assembly Considerations  
The ATWINC3400-MR210xA module is assembled with an EMI shield to ensure compliance with EMI emission and  
immunity rules. The EMI shield is made of a tin-plated steel (SPTE) and is not hermetically sealed. Solutions such as  
IPA and similar solvents can be used to clean this module. Cleaning solutions containing acid must never be used on  
the module.  
13.5  
Conformal Coating  
The modules are not intended for use with a conformal coating and the customer assumes all risks (such as the  
module reliability, performance degradation and so on) if a conformal coating is applied to the modules.  
DS70005350D-page 44  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Appendix A: Regulatory Approval  
14.  
Appendix A: Regulatory Approval  
The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have received regulatory approval for the  
following countries:  
ATWINC3400-MR210CA  
– United States/FCC ID: 2ADHKWINC3400  
– Canada/ISED:  
IC: 20266-ATWINC3400  
HVIN: ATWINC3400-MR210CA  
PMN: Wi-Fi and Bluetooth Module  
– Europe/CE  
– Japan/MIC: 005-101794  
– Korea/KCC: R-CRM-mcp-WINC3400MR210C  
Taiwan/NCC: CCAN18LP0450T0  
– China/SRRC: CMIIT ID: 2018DJ2733  
ATWINC3400-MR210UA  
– United States/FCC ID: 2ADHKWINC3400U  
– Canada/ISED:  
IC: 20266-WINC3400UA  
HVIN: ATWINC3400-MR210UA  
PMN: ATWINC3400-MR210UA  
– Europe/CE  
Gain Table for Individual Regulatory Region  
The ATWINC3400-MR210CA module has received regulatory approvals for many regions in the world, namely  
United States/FCC, Canada/ISED, Europe/CE, Japan/MIC, Korea/KCC, Taiwan/NCC, and China/SRRC. The  
ATWINC3400-MR210UA module has received regulatory approvals for United States/FCC, Canada/ISED and  
Europe/CE.  
The default firmware uses a common gain table that meets IEEE 802.11 specifications, and regulatory region limits  
for both ATWINC3400-MR210CA and ATWINC3400-MR210UA as noted above. In some cases, the output power  
is reduced by limits of regulatory region with stringent transmit power limits. To optimize performance, and if end  
products’ destination is known, the specific gain table for that region can be optionally embedded into the firmware.  
The regulatory region certified gain table for individual regulatory region is available on ATWINC3400-MR210CA and  
ATWINC3400-MR210UA product page. Customers can update the gain table in firmware by following the instructions  
in section 6. Updating Application Gain Table into WINC3400 of ATWINC3400 – Deriving Application Gain Table  
Application Note  
14.1  
United States  
The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have received Federal Communications  
Commission (FCC) CFR47 Telecommunications, Part 15 Subpart C “Intentional Radiators” single-modular approval  
in accordance with Part 15.212 Modular Transmitter approval. Single-modular transmitter approval is defined as a  
complete RF transmission sub-assembly, designed to be incorporated into another device, that must demonstrate  
compliance with FCC rules and policies independent of any host. A transmitter with a modular grant can be installed  
in different end-use products (referred to as a host, host product or host device) by the grantee or other equipment  
manufacturer, then the host product may not require additional testing or equipment authorization for the transmitter  
function provided by that specific module or limited module device.  
The user must comply with all of the instructions provided by the Grantee, which indicate installation and/or operating  
conditions necessary for compliance.  
A host product itself is required to comply with all other applicable FCC equipment authorization regulations,  
requirements, and equipment functions that are not associated with the transmitter module portion. For example,  
DS70005350D-page 45  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Appendix A: Regulatory Approval  
compliance must be demonstrated: to regulations for other transmitter components within a host product; to  
requirements for unintentional radiators (Part 15 Subpart B), such as digital devices, computer peripherals, radio  
receivers, etc.; and to additional authorization requirements for the non-transmitter functions on the transmitter  
module (i.e., Suppliers Declaration of Conformity (SDoC) or certification) as appropriate (e.g., Bluetooth and Wi-Fi  
transmitter modules may also contain digital logic functions).  
14.1.1 Labeling and User Information Requirements  
The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have been labeled with its own FCC ID number,  
and if the FCC ID is not visible when the module is installed inside another device, then the outside of the finished  
product into which the module is installed must display a label referring to the enclosed module. This exterior label  
must use the following wording:  
For ATWINC3400-MR210CA  
Contains Transmitter Module FCC ID: 2ADHKWINC3400  
or  
Contains FCC ID: 2ADHKWINC3400  
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:  
(1) this device may not cause harmful interference, and (2) this device must accept any interference  
received, including interference that may cause undesired operation.  
For ATWINC3400-MR210UA  
Contains Transmitter Module FCC ID: 2ADHKWINC3400U  
or  
Contains FCC ID: 2ADHKWINC3400U  
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:  
(1) this device may not cause harmful interference, and (2) this device must accept any interference  
received, including interference that may cause undesired operation.  
The user's manual for the finished product must include the following statement:  
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part  
15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a  
residential installation. This equipment generates, uses and can radiate radio frequency energy, and if not installed  
and used in accordance with the instructions, may cause harmful interference to radio communications. However,  
there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful  
interference to radio or television reception, which can be determined by turning the equipment off and on, the user  
is encouraged to try to correct the interference by one or more of the following measures:  
Reorient or relocate the receiving antenna  
Increase the separation between the equipment and receiver  
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected  
Consult the dealer or an experienced radio/TV technician for help  
Additional information on labeling and user information requirements for Part 15 devices can be found in KDB  
Publication 784748, which is available at the FCC Office of Engineering and Technology (OET) Laboratory Division  
Knowledge Database (KDB) apps.fcc.gov/oetcf/kdb/index.cfm.  
DS70005350D-page 46  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Appendix A: Regulatory Approval  
14.1.2 RF Exposure  
All transmitters regulated by FCC must comply with RF exposure requirements. KDB 447498 General RF Exposure  
Guidance provides guidance in determining whether proposed or existing transmitting facilities, operations  
or devices comply with limits for human exposure to Radio Frequency (RF) fields adopted by the Federal  
Communications Commission (FCC).  
From the FCC Grant: Output power listed is conducted. This transmitter is restricted for use with the specific  
antenna(s) tested in this application for Certification.  
The antenna(s) used with this transmitter must be installed to provide a separation distance of at least 6.5 cm from  
all persons and must not be co-located or operating in conjunction with any other antenna or transmitter. Users and  
installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying  
RF exposure compliance.  
14.1.3 Approved External Antennas  
To maintain modular approval in the United States, only the antenna types that have been tested shall be used. It  
is permissible to use different antenna, provided the same antenna type, antenna gain (equal to or less than), with  
similar in-band and out-of band characteristics (refer to specification sheet for cutoff frequencies).  
For ATWINC3400-MR210CA, the approval is received using the integral chip antenna.  
For ATWINC3400-MR210UA, approved antennas are listed in the table 13.2.2 ATWINC3400-MR210UA Approved  
External Antennas.  
14.1.4 Helpful Web Sites  
Federal Communications Commission (FCC): www.fcc.gov.  
FCC Office of Engineering and Technology (OET) Laboratory Division Knowledge Database (KDB) apps.fcc.gov/  
oetcf/kdb/index.cfm.  
14.2  
Canada  
The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have been certified for use in Canada under  
Innovation, Science and Economic Development Canada (ISED, formerly Industry Canada) Radio Standards  
Procedure (RSP) RSP-100, Radio Standards Specification (RSS) RSS-Gen and RSS-247. Modular approval permits  
the installation of a module in a host device without the need to recertify the device.  
14.2.1 Labeling and User Information Requirements  
Labeling Requirements (from RSP-100 - Issue 12, Section 5): The host product shall be properly labeled to identify  
the module within the host device.  
The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible  
at all times when installed in the host device; otherwise, the host product must be labeled to display the Innovation,  
Science and Economic Development Canada certification number of the module, preceded by the word “Contains” or  
similar wording expressing the same meaning, as follows:  
For ATWINC3400-MR210CA  
Contains IC: 20266-ATWINC3400  
For ATWINC3400-MR210UA  
Contains IC: 20266-WINC3400UA  
User Manual Notice for License-Exempt Radio Apparatus (from Section 8.4 RSS-Gen, Issue 5, March 2019): User  
manuals for license-exempt radio apparatus shall contain the following or equivalent notice in a conspicuous location  
in the user manual or alternatively on the device or both:  
DS70005350D-page 47  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Appendix A: Regulatory Approval  
This device contains license-exempt transmitter(s)/receiver(s) that comply with Innovation, Science and  
Economic Development Canada’s license-exempt RSS(s). Operation is subject to the following two  
conditions:  
(1) This device may not cause interference;  
(2) This device must accept any interference, including interference that may cause undesired operation of  
the device.  
L’émetteur/récepteur exempt de licence contenu dans le présent appareil est conforme aux CNR  
d’Innovation, Sciences et Développement économique Canada applicables aux appareils radio exempts  
de licence. L’exploitation est autorisée aux deux conditions suivantes:  
1. L’appareil ne doit pas produire de brouillage;  
2. L’appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d’en  
compromettre le fonctionnement.  
Transmitter Antenna (From Section 6.8 RSS-GEN, Issue 5, March 2019): User manuals, for transmitters shall display  
the following notice in a conspicuous location:  
This radio transmitter [IC: 20266-ATWINC3400 and IC: 20266-WINC3400UA] has been approved by  
Innovation, Science and Economic Development Canada to operate with the antenna types listed below,  
with the maximum permissible gain indicated. Antenna types not included in this list that have a gain  
greater than the maximum gain indicated for any type listed are strictly prohibited for use with this device.  
Le présent émetteur radio [IC: 20266-ATWINC3400 and IC: 20266-WINC3400UA] a été approuvé par  
Innovation, Sciences et Développement économique Canada pour fonctionner avec les types d'antenne  
énumérés cidessous et ayant un gain admissible maximal. Les types d'antenne non inclus dans cette liste,  
et dont le gain est supérieur au gain maximal indiqué pour tout type figurant sur la liste, sont strictement  
interdits pour l'exploitation de l'émetteur.  
Immediately following the above notice, the manufacturer shall provide a list of all antenna types approved for use  
with the transmitter, indicating the maximum permissible antenna gain (in dBi) and required impedance for each.  
14.2.2 RF Exposure  
All transmitters regulated by Innovation, Science and Economic Development Canada (ISED) must comply with RF  
exposure requirements listed in RSS-102 - Radio Frequency (RF) Exposure Compliance of Radio communication  
Apparatus (All Frequency Bands).  
This transmitter is restricted for use with a specific antenna tested in this application for certification, and must not  
be co-located or operating in conjunction with any other antenna or transmitters within a host device, except in  
accordance with Canada multi-transmitter product procedures.  
The installation of the transmitter must ensure that the antenna has a separation distance of at least 6.5 cm from all  
persons or compliance must be demonstrated according to the ISED SAR procedures.  
14.2.3 Approved Antenna Types  
For the ATWINC3400-MR210CA, the approval is received using the integral chip antenna.  
For the ATWINC3400-MR210UA, approved antennas are listed in the table 13.2.2 ATWINC3400-MR210UA  
Approved External Antennas.  
14.2.4 Helpful Web Sites  
Innovation, Science and Economic Development Canada (ISED): www.ic.gc.ca/.  
DS70005350D-page 48  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Appendix A: Regulatory Approval  
14.3  
Europe  
The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules is/are a Radio Equipment Directive (RED)  
assessed radio module that is CE marked and has been manufactured and tested with the intention of being  
integrated into a final product.  
The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules has/have been tested to RED 2014/53/EU  
Essential Requirements mentioned in the following European Compliance table.  
Table 14-1.ꢀEuropean Compliance  
Certification  
Safety  
Standards  
EN 62368  
Article  
3.1a  
Health  
EN 62311  
EMC  
EN 301 489-1  
EN 301 489-17  
EN 300 328  
3.1b  
3.2  
Radio  
The ETSI provides guidance on modular devices in the “Guide to the application of harmonised standards  
covering articles 3.1b and 3.2 of the RED 2014/53/EU (RED) to multi-radio and combined radio and non-  
radio equipment” document available at http://www.etsi.org/deliver/etsi_eg/203300_203399/20 3367/01.01.01_60/  
eg_203367v010101p.pdf.  
Note:ꢀ To maintain conformance to the standards listed in the preceding European Compliance table, the module  
shall be installed in accordance with the installation instructions in this data sheet and shall not be modified. When  
integrating a radio module into a completed product, the integrator becomes the manufacturer of the final product and  
is therefore responsible for demonstrating compliance of the final product with the essential requirements against the  
RED.  
14.3.1 Labeling and User Information Requirements  
The label on the final product that contains the ATWINC3400-MR210CA and ATWINC3400-MR210UA modules must  
follow CE marking requirements.  
14.3.2 Conformity Assessment  
From ETSI Guidance Note EG 203367, section 6.1, when non-radio products are combined with a radio product:  
If the manufacturer of the combined equipment installs the radio product in a host non-radio product in equivalent  
assessment conditions (i.e. host equivalent to the one used for the assessment of the radio product) and according to  
the installation instructions for the radio product, then no additional assessment of the combined equipment against  
article 3.2 of the RED is required.  
14.3.2.1 Simplified EU Declaration of Conformity  
Hereby, Microchip Technology Inc. declares that the radio equipment type ATWINC3400-MR210xA is in compliance  
with Directive 2014/53/EU.  
The full text of the EU declaration of conformity for this product is available at www.microchip.com/ATWINC3400  
(available under Documents > Certifications).  
14.3.3 Approved Antenna Types  
For the ATWINC3400-MR210CA, the approval is received using the integral chip antenna.  
For the ATWINC3400-MR210UA, approved antennas are listed in the table 13.2.2 ATWINC3400-MR210UA  
Approved External Antennas.  
14.3.4 Helpful Websites  
A document that can be used as a starting point in understanding the use of Short Range Devices (SRD) in Europe is  
the European Radio Communications Committee (ERC) Recommendation 70-03 E, which can be downloaded from  
the European Communications Committee (ECC) at: http://www.ecodocdb.dk/.  
DS70005350D-page 49  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Appendix A: Regulatory Approval  
Additional helpful web sites are:  
Radio Equipment Directive (2014/53/EU):  
https://ec.europa.eu/growth/single-market/european-standards/harmonised-standards/red_en  
European Conference of Postal and Telecommunications Administrations (CEPT):  
http://www.cept.org  
European Telecommunications Standards Institute (ETSI):  
http://www.etsi.org  
The Radio Equipment Directive Compliance Association (REDCA):  
http://www.redca.eu/  
14.4  
Japan  
The ATWINC3400-MR210CA module has/have received type certification and is required to be labeled with its own  
technical conformity mark and certification number as required to conform to the technical standards regulated by the  
Ministry of Internal Affairs and Communications (MIC) of Japan pursuant to the Radio Act of Japan.  
Integration of this module into a final product does not require additional radio certification provided installation  
instructions are followed and no modifications of the module are allowed. Additional testing may be required:  
If the host product is subject to electrical appliance safety (for example, powered from an AC mains), the  
host product may require Product Safety Electrical Appliance and Material (PSE) testing. The integrator should  
contact their conformance laboratory to determine if this testing is required  
There is an voluntary Electromagnetic Compatibility (EMC) test for the host product administered by VCCI:  
www.vcci.jp/vcci_e/index.html  
14.4.1 Labeling and User Information Requirements  
The label on the final product which contains the ATWINC3400-MR210CA module must follow Japan marking  
requirements. The integrator of the module should refer to the labeling requirements for Japan available at the  
Ministry of Internal Affairs and Communications (MIC) website.  
For the ATWINC3400-MR210CA module, due to a limited module size, the technical conformity logo and ID is  
displayed in the data sheet and/or packaging and cannot be displayed on the module label. The final product in  
which this module is being used must have a label referring to the type certified module inside:  
005-101794  
14.4.2 Helpful Web Sites  
Ministry of Internal Affairs and Communications (MIC): www.tele.soumu.go.jp/e/index.htm.  
Association of Radio Industries and Businesses (ARIB): www.arib.or.jp/english/.  
14.5  
Korea  
The ATWINC3400-MR210CA module has/have received certification of conformity in accordance with the Radio  
Waves Act. Integration of this module into a final product does not require additional radio certification provided  
installation instructions are followed and no modifications of the module are allowed.  
14.5.1 Labeling and User Information Requirements  
The label on the final product which contains the ATWINC3400-MR210CA module must follow KC marking  
requirements. The integrator of the module should refer to the labeling requirements for Korea available on the  
Korea Communications Commission (KCC) website.  
DS70005350D-page 50  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Appendix A: Regulatory Approval  
For ATWINC3400-MR210CA, due to a limited module size, the KC mark and ID are displayed in the data sheet  
and/or packaging and cannot be displayed on the module label. The final product requires the KC mark and  
certificate number of the module:  
R-CRM-mcp-WINC3400MR210C  
14.5.2 Helpful Websites  
Korea Communications Commission (KCC): www.kcc.go.kr.  
National Radio Research Agency (RRA): rra.go.kr.  
14.6  
Taiwan  
The ATWINC3400-MR210CA module has/have received compliance approval in accordance with the  
Telecommunications Act. Customers seeking to use the compliance approval in their product should contact  
Microchip Technology sales or distribution partners to obtain a Letter of Authority.  
Integration of this module into a final product does not require additional radio certification provided installation  
instructions are followed and no modifications of the module are allowed.  
14.6.1 Labeling and User Information Requirements  
For the ATWINC3400-MR210CA module, due to the limited module size, the NCC mark and ID are displayed in the  
data sheet only and cannot be displayed on the module label:  
CCAN18LP0450T0  
The user's manual should contain following warning (for RF device) in traditional Chinese:  
注意 !  
依據 低功率電波輻射性電機管理辦法  
第十二條 經型式認證合格之低功率射頻電機,非經許 可,  
公司、商號或使用者均不得擅自變更頻率、加大功率或 變更原設計  
之特性及功能。  
第十四條 低功率射頻電機之使用不得影響飛航安全及 干擾合法通信;  
經發現有干擾現象時,應立即停用,並改善至無干擾時 方得繼續使用。  
前項合法通信,指依電信規定作業之無線電信。  
低功率射頻電機須忍受合法通信或工業、科學及醫療用 電波輻射性  
電機設備之干擾。  
14.6.2 Helpful Web Sites  
National Communications Commission (NCC): www.ncc.gov.tw  
DS70005350D-page 51  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Appendix A: Regulatory Approval  
14.7  
China  
The ATWINC3400-MR210CA modules has/have received certification of conformity in accordance with the China  
MIIT Notice 2014-01 of State Radio Regulation Committee (SRRC) certification scheme. Integration of this module  
into a final product does not require additional radio certification, provided installation instructions are followed and no  
modifications of the module are allowed. Refer to SRRC certificate available in ATWINC3400-MR210xA product page  
for expiry date.  
14.7.1 Labeling and User Information Requirements  
The ATWINC3400-MR210CA module is labeled with its own CMIIT ID as follows:  
CMIIT ID: 2018DJ2733  
When Host system is using an approved Full Modular Approval (FMA) radio: The host must bear a label containing  
the statement “This device contains SRRC approved Radio module CMIIT ID: 2018DJ2733”.  
14.8  
Other Regulatory Information  
For information about other countries' jurisdictions, refer to www.microchip.com/wwwproducts/en/ATWINC3400  
(available under Documents > Certifications).  
Should other regulatory jurisdiction certification be required by the customer, or the customer needs to recertify  
the module for other reasons, contact Microchip for the required utilities and documentation  
DS70005350D-page 52  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Reference Documentation  
15.  
Reference Documentation  
For further details, refer to the following documents:  
ATWINC3400A-MU Datasheet  
Wi-Fi Network Controller Software Design Guide Application Note  
Integrated Serial Flash Memory Download Procedure Application Note  
Wi-Fi Network Controller Software Programming Guide Application Note  
ATWINC3400 XPro User Guide  
BLE Profiles Application User Guide  
Solder Reflow Recommendation Application Note  
ATWINC3400A/ATWINC3400-MR110xA Errata  
ATWINC3400 – Deriving Application Gain Table Application Note  
Note:ꢀ For a complete listing of development-support tools and documentation, visit http://www.microchip.com/  
wwwproducts/en/ATWINC3400 or refer to the customer support section for details on the nearest Microchip field  
representative.  
DS70005350D-page 53  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Document Revision History  
16.  
Document Revision History  
Revision Date  
Section  
Changes  
D
04/2021 Document  
Replaced Master/Slave with the new terminologies. For more details, see the  
following note.  
1. Ordering Information and Module  
Updated Figure 1-1 with tape and reel information.  
Marking  
14.3 Europe  
Updated EN 301 489 in EMC to EN 301 489-1 and EN 301 489-17.  
C
12/2020 Document  
Updated ATWINC3400-MR210CA to ATWINC3400-MR210xA  
Added ATWINC3400-MR210UA module information  
Minor edits  
2. Block Diagram  
Updated Figure 2-1  
3. Pinout and Package Information  
Updated Figure 3-1  
Updated pin descriptions of Pin 8, 9, 14, 15, 22,27, 28,29, 30, 31, 32 and 37  
Added Note  
4. Electrical Characteristics  
8. WLAN Subsystem  
10.2.2 SPI Timing  
Updated VBAT specification in 4.2 Recommended Operating Conditions  
Added footnotes for Short GI feature  
Updated Note  
Added description in 10.4 I2C Client Interface  
13.1.1 ATWINC3400-MR210CA  
Module Placement and Routing  
Guidelines  
Added ATWINC3400-MR210CA for the section name  
Updated Figure 13-2  
13.2.1 ATWINC3400-MR210UA  
Module Placement and Routing  
Guidelines  
Added  
Added  
13.2.2 ATWINC3400-MR210UA  
Approved External Antennas  
1. Ordering Information and Module  
Marking  
Updated Table 1-1  
Updated Figure 1-1  
10.3 UART Interface  
Updated with Wi-Fi and Bluetooth Low Energy data information  
Updated Figure 11-1  
11.1 Host Interface  
14. Appendix A: Regulatory Approval  
Updated Japan, Korea, Taiwan and China regulatory IDs for ATWINC3400-  
MR210CA  
Updated USA, Canada and Europe regulatory IDs for ATWINC3400-  
MR210UA  
Added 14. Gain Table for Individual Regulatory Region  
Updated 14.1 United States, 14.2 Canada and 14.3 Europe with the  
details of antennas used for approval  
Revamped 14.3 Europe  
Updated module label information in 14.5 Korea  
Updated expiry date information in 14.7 China  
Updated contents of 14.8 Other Regulatory Information  
B
08/2018 Document  
Features  
Updated from Bluetooth 4.0 to Bluetooth 5.0 throughout the document  
Removed Bluetooth Host and Controller QD ID  
Added QD ID for an end product  
DS70005350D-page 54  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Document Revision History  
...........continued  
Revision Date  
Section  
Changes  
1. Ordering Information and Module  
Marking  
Updated product web page link  
Table 10-1 and Table 10-2  
Reflow profile information  
Updated pin numbers  
Removed Reflow Profile information sections  
Added link to Solder Reflow Recommendation Application Note  
14. Appendix A: Regulatory Approval Added PMN details under Canada/ISED  
15. Reference Documentation  
Updated web links  
Added Solder Reflow Recommendation  
Radiation Pattern  
Newly added  
Initial Release  
A
11/2017 Document  
Note:ꢀ Microchip is aware that some terminologies used in the technical documents and existing software codes of  
this product are outdated and unsuitable. This document may use these new terminologies, which may or may not  
reflect on the source codes, software GUIs, and the documents referenced within this document. The following table  
shows the relevant terminology changes made in this document.  
Table 16-1.ꢀTerminology Related Changes  
Old Terminology  
Master  
New Terminology  
Description  
Host  
The following sections are updated with new terminology:  
3. Pinout and Package Information  
10.1 Interfacing with the Host Microcontroller  
10.2 SPI Client Interface  
Slave  
Client  
10.2.1 Overview  
10.2.2 SPI Timing  
10.4 I2C Client Interface  
DS70005350D-page 55  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
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If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue  
for relief under that Act.  
DS70005350D-page 56  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Legal Notice  
Information contained in this publication is provided for the sole purpose of designing with and using Microchip  
products. Information regarding device applications and the like is provided only for your convenience and may be  
superseded by updates. It is your responsibility to ensure that your application meets with your specifications.  
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SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense,  
VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology  
Incorporated in the U.S.A. and other countries.  
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.  
The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of  
Microchip Technology Inc. in other countries.  
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip  
Technology Inc., in other countries.  
All other trademarks mentioned herein are property of their respective companies.  
©
2021, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.  
ISBN: 978-1-5224-8269-7  
DS70005350D-page 57  
Datasheet  
© 2021 Microchip Technology Inc.  
ATWINC3400-MR210xA  
Quality Management System  
For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.  
DS70005350D-page 58  
Datasheet  
© 2021 Microchip Technology Inc.  
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DS70005350D-page 59  
Datasheet  
© 2021 Microchip Technology Inc.  

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