LAN9255-V/ZMX020 [MICROCHIP]

2/3-Port EtherCAT® Device Controller with Integrated PHYs & SAM E53J 32-bit ARM® Cortex®-M4F MCU;
LAN9255-V/ZMX020
型号: LAN9255-V/ZMX020
厂家: MICROCHIP    MICROCHIP
描述:

2/3-Port EtherCAT® Device Controller with Integrated PHYs & SAM E53J 32-bit ARM® Cortex®-M4F MCU

文件: 总23页 (文件大小:1577K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LAN9255  
2/3-Port EtherCAT® Device Controller with Integrated PHYs  
& SAM E53J 32-bit ARM® Cortex®-M4F MCU  
• Microchip LAN9253 2/3-Port EtherCAT Device  
Highlights  
-
Integrated 100Mbps Ethernet transceivers  
• 2/3-port EtherCAT® device controller with 8 Fieldbus  
Memory Management Units (FMMUs) and  
8 SyncManagers  
• Integrated ARM Cortex-M4F MCU with  
1 Msps 12-bit ADC, SQSPI, USB LS/FS Host and  
Device, Ethernet MAC, and PTC  
-
-
-
-
-
-
Compliant with IEEE 802.3/802.3u (Fast Ethernet)  
Signal Quality Index diagnostics  
Loop-back modes  
Automatic polarity detection and correction  
HP Auto-MDIX  
Compatible with EtherCAT P  
-
-
EtherCAT device controller  
-
-
-
Supports 8 FMMUs  
• Integrated EtherCAT PHYs with HP Auto-MDIX  
• EtherCAT cable diagnostic support  
Supports 8 SyncManagers  
Distributed clock support allows synchronization with  
other EtherCAT devices  
-
8K bytes of DPRAM  
Host Bus Interface  
Target Applications  
-
SPI / SQI (Quad SPI) support at up to 60MHz  
-
-
3rd port for flexible network configurations  
Comprehensive power management features  
• Motor Motion Control  
• Process/Factory Automation  
• Communication Modules, Interface Cards  
• Sensors  
• Hydraulic & Pneumatic Valve Systems  
• Operator Interfaces  
-
-
-
3 power-down levels  
Wake on link status change (energy detect)  
Magic packet wakeup, Wake on LAN (WoL),  
wake on broadcast, wake on perfect DA  
Wakeup indicator event signal  
-
-
-
Power and I/O  
-
-
Integrated power-on reset circuit  
Latch-up performance exceeds 150mA  
per EIA/JESD78, Class II  
Key Benefits  
-
-
-
-
JEDEC Class 3A ESD performance  
Single 3.3V power supply (integrated 1.2V regulator)  
Option for external power supplies  
Local host allowed to enter sleep mode until addressed  
by EtherCAT Host  
• Microchip SAM E53J ARM Cortex-M4F  
-
-
-
Memories  
-
-
1 MB/512 KB/256 KB in-system programmable flash  
256 KB /192 KB/128 KB SRAM main memory  
Additional Features  
System  
-
-
-
-
-
-
EEPROM emulation  
Enhanced EtherCAT cycle time  
Transformer-less link support  
Multifunction GPIOs  
Ability to use low cost 25MHz crystal for reduced BOM  
25MHz clock output for reference clock daisy chaining  
-
-
Power-on Reset (POR) and Brown-out detection  
Internal and external clock options  
Power Supply  
-
-
-
Idle, Standby, Hibernate, Backup, and Off sleep modes  
SleepWalking peripherals  
Embedded Buck/LDO regulator  
• Packaging  
-
-
Peripherals  
Pb-free RoHS compliant 128-pin TQFP  
(14mm x 14mm, 0.4mm pitch)  
-
-
-
-
-
-
-
-
32-channel Direct Memory Access Controller (DMAC)  
SD/MMC Host Controller (SDHC)  
Quad I/O Serial Peripheral Interface (QSPI)  
10/100 Ethernet MAC with 1588 PTP/TSU  
Full-Speed USB 2.0 interface  
32-channel Event System  
Dual 1 MSPS 12-bit ADCs and DACs  
Peripheral Touch Controller (PTC)  
• Environmental  
-
-
-
Commercial (0C to +70C)  
Industrial (-40C to +85C)  
Extended industrial (-40C to +105C)  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 1  
LAN9255  
TO OUR VALUED CUSTOMERS  
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip  
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and  
enhanced as new volumes and updates are introduced.  
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via  
E-mail at docerrors@microchip.com. We welcome your feedback.  
Most Current Documentation  
To obtain the most up-to-date version of this documentation, please register at our Worldwide Web site at:  
http://www.microchip.com  
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.  
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).  
Errata  
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-  
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the  
revision of silicon and revision of document to which it applies.  
To determine if an errata sheet exists for a particular device, please check with one of the following:  
Microchip’s Worldwide Web site; http://www.microchip.com  
Your local Microchip sales office (see last page)  
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are  
using.  
Customer Notification System  
Register on our web site at www.microchip.com to receive the most current information on all of our products.  
DS00003646B-page 2  
2020-2021 Microchip Technology Inc.  
LAN9255  
Table of Contents  
1.0 Preface ............................................................................................................................................................................................ 4  
2.0 Introduction ..................................................................................................................................................................................... 5  
3.0 LAN9255 Device Specifications ...................................................................................................................................................... 6  
4.0 Pin Configuration ............................................................................................................................................................................ 8  
5.0 Package Information ..................................................................................................................................................................... 16  
Appendix A: Revision History .............................................................................................................................................................. 19  
The Microchip Web Site ...................................................................................................................................................................... 20  
Customer Change Notification Service ............................................................................................................................................... 20  
Customer Support ............................................................................................................................................................................... 20  
Product Identification System ............................................................................................................................................................. 21  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 3  
LAN9255  
1.0  
1.1  
PREFACE  
References  
• Microchip LAN9253 Data Sheet: https://www.microchip.com/wwwproducts/en/LAN9253  
Microchip SAM E53J Data Sheet: http://ww1.microchip.com/downloads/en/DeviceDoc/60001507E.pdf  
DS00003646B-page 4  
2020-2021 Microchip Technology Inc.  
LAN9255  
2.0  
INTRODUCTION  
The LAN9255 is a System-In-Package (SIP) design that combines the Microchip LAN9253 2/3-port EtherCAT device  
controller with dual integrated Ethernet PHYs and the Microchip SAM E53J ARM Cortex-M4F MCU into a single 128-  
pin TQFP package.  
The LAN9255 is available in commercial (0°C to +70°C), industrial (-40°C to +85°C), and extended industrial (-40°C to  
+105°C) temperature ranges. A block diagram of the LAN9255 is provided in Figure 2-1.  
Details on each integrated device (LAN9253 & SAM E53J) can be referenced via their respective data sheets, as out-  
lined in Section 1.1, References. Any device specific details outside of those detailed in the respective data sheets are  
provided in Section 3.0, LAN9255 Device Specifications. Pinout information for the LAN9255 is detailed in Section 4.0,  
Pin Configuration.  
FIGURE 2-1:  
LAN9255 BLOCK DIAGRAM  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 5  
LAN9255  
3.0  
LAN9255 DEVICE SPECIFICATIONS  
This section details device specifications that are unique to the LAN9255 and/or supersede those included in the  
LAN9253 and SAM E53J data sheets.  
3.1  
Optimal Interfacing between LAN9253 and SAM E53J  
The following guidelines will provide optimal interfacing between the internal LAN9253 and SAM E53J die.  
• The following connections are required between die for SPI/QSPI operation:  
TABLE 3-1:  
SPI/QSPI CONNECTIONS  
SPI Function  
LAN9253 Pins  
SAM E53J Pins  
SCK  
SCS#  
SIO0  
SIO1  
SIO2  
SIO3  
41  
101  
38  
40  
42  
33  
34  
35  
36  
26  
24  
71  
• ESC EEPROM connected to the LAN9253 is optional  
• Refer to the LAN9253 Data Sheet for information on configuration straps required to enable EEPROM emulation  
• The 25MHz clock from the LAN9253 may be optionally used to feed the SAM E53J  
3.2  
Optimal EtherCAT Interfacing  
• The EtherCAT RUN and EtherCAT ERROR LEDs can be used. Refer to the LAN9253 Data Sheet for additional  
information.  
3.2.1  
IMPLEMENTING ETHERNET  
RMII INTERFACE  
TABLE 3-2:  
RMII Function  
Pin Name  
LAN9255 Pin Number  
TXEN  
TXD0  
TXD1  
RXDV  
RXD0  
RXD1  
RXER  
MDIO  
MDC  
PA17  
PA18  
PA19  
PA16  
PA13  
PA12  
PA15  
PA21  
PA20  
68  
69  
73  
67  
62  
61  
64  
87  
84  
DS00003646B-page 6  
2020-2021 Microchip Technology Inc.  
LAN9255  
3.3  
Device ID  
• The LAN9255 provides a dedicated device ID returned by the integrated SAM E53J. This enables developers to  
distinguish between discrete SAM E53J implementations and those with the LAN9255. A list of the Device IDs for  
the various ordering options is detailed in Table 3-3.  
• The integrated LAN9253 returns its normal device ID.  
TABLE 3-3:  
DEVICE ID  
CPP Number  
Temp/MEM Size  
UNG Part ID  
LAN9255-V/ZMX020  
LAN9255-I/ZMX020  
LAN9255/ZMX020  
LAN9255-V/ZMX019  
LAN9255-I/ZMX019  
LAN9255/ZMX019  
LAN9255-V/ZMX018  
LAN9255-I/ZMX018  
LAN9255/ZMX018  
105°C 1024k Memory  
85°C 1024k Memory  
70°C 1024k Memory  
105°C 512k Memory  
85°C 512k Memory  
70°C 512k Memory  
105°C 256k Memory  
85°C 256k Memory  
70°C 256k Memory  
0x61830355  
0x61830355  
0x61830355  
0x61830356  
0x61830356  
0x61830356  
0x61830357  
0x61830357  
0x61830357  
3.4  
Extended Temperature Operation  
As also noted in the LAN9253 Data Sheet, for the extended industrial temperature range option, the following restric-  
tions apply:  
• Internal regulator disabled  
• 2.5V (typical) Ethernet magnetics voltage required  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 7  
LAN9255  
4.0  
PIN CONFIGURATION  
This section provides pin assignment information for the LAN9255. Pin descriptions for the various LAN9253 and SAM  
E53J functions should be referenced in their respective data sheets, as detailed in Section 1.1, References.  
4.1  
Pin Assignments  
FIGURE 4-1:  
PIN ASSIGNMENTS (TOP VIEW)  
VDDIO_S  
PB22  
PB23  
97  
98  
99  
PA15  
PA14  
PA13  
D4/AD4/DIGIO3/GPI3/GPO3/MII_LINK  
100  
101  
102  
103  
104  
105  
106  
107  
108  
109  
110  
111  
112  
113  
114  
115  
PA12  
VDDIO_J  
D5/AD5/OUTVALID/SCS#  
VDD33TXRX1  
TXNA  
RD/RD_WR/DIGIO15/GPI15/GPO15/MII_RXD3  
WR/ENB/DIGIO14/GPI14/GPO14/MII_RXD2  
A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/EE_EMUL_ALELO_POL/MII_LINKPOL/LEDPOL2  
CS/DIGIO13/GPI13/GPO13/MII_RXD1  
A4/BE1/DIGIO12/GPI12/GPO12/MII_RXD0  
A3/BE0/DIGIO11/GPI11/GPO11/MII_RXDV  
A1/ALELO/OE_EXT/MII_CLK25//EE_EMUL_SPI2  
VDDCR  
D10/AD10/DIGIO4/GPI4/GPO4/MII_TXEN  
D11/AD11/DIGIO5/GPI5/GPO5/MII_TXD0/100FD_A  
D12/AD12/DIGIO6/GPI6/GPO6/MII_TXD1/100FD_B  
NC  
PB15  
PB14  
VDDIO_J  
PB13  
TXPA  
RXNA  
RXPA  
PA27  
RESETN_E53  
VDDCORE  
VDD12TX1  
RBIAS  
VDD33BIAS  
VDD12TX2  
VSW  
RXPB  
RXNB  
VDDIO_S  
TXPB  
TXNB  
LAN9255  
128-TQFP  
116  
117  
(Top View)  
118  
119  
120  
121  
122  
123  
124  
125  
126  
127  
128  
PB12  
PB11  
PA30  
PA31  
PB30  
PB31  
D9/AD9/LATCH_IN/SCK  
PB10  
SYNC1/LATCH1/PME  
D0/AD0/WD_STATE/SI/SIO0  
VDDIOB  
PA11  
PA10  
PA09  
PA08  
VSS  
Connect exposed pad to ground with a via field  
VDD33TXRX2  
PB00  
PB01  
PB02  
OSCI  
Note:  
When a “#” is used at the end of the signal name, it indicates that the signal is active low. For example,  
RST# indicates that the reset signal is active low. Configuration straps are identified by an underlined sym-  
bol name.  
DS00003646B-page 8  
2020-2021 Microchip Technology Inc.  
LAN9255  
Table 4-1 details the pin assignments in table format. As shown, select pin functions may change based on the device’s  
mode of operation. For modes where a specific pin has no function, the table cell will be marked with “-”. The source die  
and original source die pin number for each signal is also provided.  
TABLE 4-1:  
LAN9255  
LAN9255 PIN ASSIGNMENTS  
HBI Indexed HBI Multiplexed SPI with GPIO SPI with MII  
Digital I/O  
Source  
Die  
Source  
Die Pin  
Pin  
Mode Pin NameMode Pin NameMode Pin NameMode Pin NameMode Pin Name  
Number  
LAN9253  
SAM E53J  
SAM E53J  
LAN9253  
SAM E53J  
LAN9253  
LAN9253  
SAM E53J  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
LAN9253  
LAN9253  
SAM E53J  
SAM E53J  
LAN9253  
1
2
OSCO  
2
64  
1
3
2
4
5
3
4
5
6
6
7
8
7
8
9
PB03  
3
PA00  
4
OSCVDD12  
5
PA01  
6
OSCVSS  
7
VDD33  
8
PA02  
9
PA03  
10  
11  
12  
13  
14  
15  
16  
17  
PB04  
PB05  
VDDCR  
REG_EN  
CLK_25/CLK_25_EN/XTAL_MODE  
GNDANA  
VDDANA  
ERRLED/PME/100FD_B/LEDPOL4  
ERRLED/  
PME/  
LEDPOL4  
ERRLED/  
100FD_B/  
LEDPOL4  
LAN9253  
18  
WAIT_ACK/PME  
WAIT_ACK/PME/  
EE_EMUL_SPI3  
LATCH0  
10  
SAM E53J  
SAM E53J  
LAN9253  
SAM E53J  
SAM E53J  
LAN9253  
SAM E53J  
LAN9253  
SAM E53J  
SAM E53J  
LAN9253  
SAM E53J  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
PB06  
9
PB07  
RST#  
PB08  
PB09  
10  
11  
11  
12  
12  
13  
13  
14  
15  
14  
16  
D2  
AD2  
AD1  
SIO2/EE_EMUL_SPI0  
SOF  
EOF  
PA04  
SO/SIO1  
PA05  
D1  
PA06  
VDDIO_J  
PA07  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 9  
LAN9255  
TABLE 4-1:  
LAN9255 PIN ASSIGNMENTS (CONTINUED)  
LAN9255  
Pin  
Number  
HBI Indexed HBI Multiplexed SPI with GPIO SPI with MII  
Mode Pin NameMode Pin NameMode Pin NameMode Pin NameMode Pin Name  
Digital I/O  
Source  
Die  
Source  
Die Pin  
LAN9253  
LAN9253  
31  
D14  
D13  
AD14  
AD13  
GPI8/GPO8  
GPI7/GPO7  
MII_TXD3/  
TX_SHIFT1  
DIGIO8  
DIGIO7  
15  
16  
32  
MII_TXD2/  
TX_SHIFT0  
SAM E53J  
SAM E53J  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
LAN9253  
33  
34  
35  
36  
37  
38  
39  
PA08  
PA09  
17  
18  
19  
20  
21  
17  
18  
PA10  
PA11  
VDDIOB  
D0  
D9  
AD0  
SI/SIO0  
WD_STATE  
SYNC1/LATCH1/PME  
SYNC1/  
LATCH1  
SAM E53J  
LAN9253  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
SAM E53J  
SAM E53J  
N/A  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
PB10  
23  
19  
24  
25  
26  
20  
27  
28  
N/A  
21  
AD9  
SCK  
LATCH_IN  
PB11  
PB12  
PB13  
VDDIO_J  
PB14  
PB15  
NC  
LAN9253  
D12  
D11  
D10  
AD12  
AD11  
AD10  
GPI6/GPO6  
MII_TXD1/  
100FD_B  
DIGIO6  
DIGIO5  
DIGIO4  
LAN9253  
50  
GPI5/GPO5  
MII_TXD0/  
100FD_A  
22  
LAN9253  
LAN9253  
LAN9253  
51  
52  
53  
GPI4/GPO4  
MII_TXEN  
23  
24  
25  
VDDCR  
-
A1  
ALELO  
MII_CLK25/  
EE_EMUL_S  
PI2  
OE_EXT  
LAN9253  
LAN9253  
54  
55  
A3  
A4  
BE0  
BE1  
GPI11/GPO11  
MII_RXDV  
MII_RXD0  
DIGIO11  
DIGIO12  
26  
27  
GPI12/  
GPO12  
LAN9253  
56  
CS  
GPI13/  
MII_RXD1  
DIGIO13  
28  
GPO13  
DS00003646B-page 10  
2020-2021 Microchip Technology Inc.  
LAN9255  
TABLE 4-1:  
LAN9255  
LAN9255 PIN ASSIGNMENTS (CONTINUED)  
HBI Indexed HBI Multiplexed SPI with GPIO SPI with MII  
Digital I/O  
Source  
Die  
Source  
Die Pin  
Pin  
Mode Pin NameMode Pin NameMode Pin NameMode Pin NameMode Pin Name  
Number  
LAN9253  
57  
A2  
ALEHI/  
EE_EMUL_A  
LELO_POL  
GPI10/  
GPO10  
LINKACT-  
LED2/  
MII_LINK-  
POL/LED-  
POL2  
DIGIO10  
29  
LAN9253  
LAN9253  
58  
59  
WR/ENB  
RD/RD_WR  
GPI14/  
GPO14  
MII_RXD2  
DIGIO14  
DIGIO15  
30  
31  
GPI15/  
MII_RXD3  
GPO15  
LAN9253  
SAM E53J  
SAM E53J  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
VDDIO_J  
PA12  
32  
29  
30  
31  
32  
34  
33  
35  
36  
37  
34  
PA13  
PA14  
PA15  
VDDIO_S  
GPI9/GPO9  
PA16  
A0/D15  
AD15  
MII_RXER  
DIGIO9  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
PA17  
PA18  
SYNC0/LATCH0/PME  
SYNC0/  
LATCH0  
LAN9253  
LAN9253  
SAM E53J  
LAN9253  
N/A  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
81  
82  
83  
84  
85  
86  
D3  
D6  
AD3  
AD6  
SIO3/EE_EMUL_SPI1  
WD_TRIG  
DIGIO0  
35  
36  
GPI0/GPO0  
PA19  
MII_RXCLK  
38  
VDDIO_J  
NC  
37  
N/A  
38  
LAN9253  
SAM E53J  
LAN9253  
SAM E53J  
LAN9253  
LAN9253  
LAN9253  
LAN9253  
SAM E53J  
N/A  
VDDCR  
PB16  
39  
D7  
D8  
AD7  
AD8  
GPI1/GPO1  
PB17  
MII_MDC  
MII_MDIO  
DIGIO1  
DIGIO2  
39  
40  
GPI2/GPO2  
TESTMODE  
40  
41  
EESDA/TMS/EE_EMUL1  
EESDA/TMS  
EESCL/TCK  
42  
EESCL/TCK/EE_EMUL2  
43  
PA20  
NC  
41  
N/A  
N/A  
N/A  
NC  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 11  
LAN9255  
TABLE 4-1:  
LAN9255 PIN ASSIGNMENTS (CONTINUED)  
LAN9255  
Pin  
Number  
HBI Indexed HBI Multiplexed SPI with GPIO SPI with MII  
Mode Pin NameMode Pin NameMode Pin NameMode Pin NameMode Pin Name  
Digital I/O  
Source  
Die  
Source  
Die Pin  
SAM E53J  
LAN9253  
LAN9253  
87  
88  
89  
PA21  
42  
44  
45  
IRQ  
LATCH1  
RUNLED/STATE_RUNLED/E2PSIZE/EE_EMUL0/LEDPOL3  
RUNLED/  
STATE_RUN-  
LED/  
E2PSIZE/  
LEDPOL3  
LAN9253  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
LAN9253  
90  
91  
92  
93  
94  
95  
LINKACTLED1/TDI/CHIP_MODE1/LEDPOL1  
46  
43  
44  
45  
47  
48  
PA22  
PA23  
PA24  
VDDIO_J  
LINKACTLED0/TDO/CHIP_MODE0/100FD_A/  
LINKACT-  
LED0/TDO/  
CHIP_-  
LINKACT-  
LED0/TDO/  
CHIP_-  
LEDPOL0  
MODE0/  
MODE0/  
LEDPOL0  
100FD_A/  
LEDPOL0  
SAM E53J  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
LAN9253  
LAN9253  
LAN9253  
LAN9253  
LAN9253  
LAN9253  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
LAN9253  
LAN9253  
LAN9253  
SAM E53J  
LAN9253  
96  
PA25  
VDDIO_S  
PB22  
46  
48  
49  
50  
49  
50  
51  
52  
53  
54  
55  
51  
52  
53  
56  
57  
58  
59  
55  
60  
97  
98  
99  
PB23  
100  
101  
102  
103  
104  
105  
106  
107  
108  
109  
110  
111  
112  
113  
114  
115  
D4  
D5  
AD4  
AD5  
GPI3/GPO3  
SCS#  
MII_LINK  
DIGIO3  
OUTVALID  
VDD33TXRX1  
TXNA  
TXPA  
RXNA  
RXPA  
PA27  
RESETN_E53  
VDDCORE  
VDD12TX1  
RBIAS  
VDD33BIAS  
VDD12TX2  
VSW  
RXPB  
DS00003646B-page 12  
2020-2021 Microchip Technology Inc.  
LAN9255  
TABLE 4-1:  
LAN9255  
LAN9255 PIN ASSIGNMENTS (CONTINUED)  
HBI Indexed HBI Multiplexed SPI with GPIO SPI with MII  
Digital I/O  
Source  
Die  
Source  
Die Pin  
Pin  
Mode Pin NameMode Pin NameMode Pin NameMode Pin NameMode Pin Name  
Number  
LAN9253  
SAM E53J  
LAN9253  
LAN9253  
SAM E53J  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
SAM E53J  
SAM E53J  
SAM E53J  
LAN9253  
LAN9253  
SAM E53J  
116  
117  
118  
119  
120  
121  
122  
123  
124  
125  
126  
127  
128  
RXNB  
VDDIO_S  
TXPB  
61  
56  
62  
63  
57  
58  
59  
60  
64  
61  
62  
63  
1
TXNB  
PA30  
PA31  
PB30  
PB31  
VDD33TXRX2  
PB00  
PB01  
PB02  
OSCI  
Exposed  
Pad  
VSS  
ePad  
22,33,  
47,54  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 13  
LAN9255  
4.1.1  
INTERNAL PIN MAPPING  
Figure 4-2 and Figure 4-3 detail the LAN9255 internal pin mappings between the integrated LAN9253 and SAM E53J,  
respectively.  
FIGURE 4-2:  
LAN9253 INTERNAL PIN MAPPING  
LAN9255  
LAN9253  
1
2
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
128  
1
66  
A0/D15/AD15/DIGIO9/GPI9/  
GPO9/MII_RXER  
A0/D15/AD15/DIGIO9/GPI9/  
GPO9/MII_RXER  
OSCI  
OSCO  
OSCI  
70  
OSCO  
SYNC0/LATCH0/PME  
SYNC0/LATCH0/PME  
3
4
71  
D3/AD3/WD_TRIG/SIO3/  
EE_EMUL_SPI1  
D3/AD3/WD_TRIG/SIO3/  
EE_EMUL_SPI1  
OSCVDD12  
OSCVSS  
VDD33  
OSCVDD12  
OSCVSS  
VDD33  
4
6
72  
D6/AD6/DIGIO0/GPI0/GPO0/  
MII_RXCLK  
D6/AD6/DIGIO0/GPI0/GPO0/  
MII_RXCLK  
5
7
74  
VDDIO  
VDDIO_J  
VDDCR  
6
12  
13  
14  
17  
18  
21  
24  
26  
29  
31  
32  
38  
39  
41  
45  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
76  
VDDCR  
VDDCR  
REG_EN  
VDDCR  
7
78  
D7/AD7/DIGIO1/GPI1/GPO1/  
MII_MDC  
D7/AD7/DIGIO1/GPI1/GPO1/  
MII_MDC  
REG_EN  
8
80  
CLK_25/CLK_25_EN/  
XTAL_MODE  
CLK_25/CLK_25_EN/  
XTAL_MODE  
D8/AD8/DIGIO2/GPI2/GPO2/  
MII_MDIO  
D8/AD8/DIGIO2/GPI2/GPO2/  
MII_MDIO  
9
81  
ERR_LED/PME/100FD_B/  
LEDPOL4  
ERR_LED/PME/100FD_B/  
LEDPOL4  
TESTMODE  
EESDA/TMS/EE_EMUL1  
EESCL/TCK/EE_EMUL2  
IRQ/LATCH1  
TESTMODE  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
82  
WAIT_ACK/PME/LATCH0/  
EE_EMUL_SPI3  
WAIT_ACK/PME/LATCH0/  
EE_EMUL_SPI3  
EESDA/TMS/EE_EMUL1  
EESCL/TCK/EE_EMUL2  
IRQ/LATCH1  
83  
RST#  
RST#  
88  
D2/AD2/SOF/SIO2/  
EE_EMUL_SPI0  
D2/AD2/SOF/SIO2/  
EE_EMUL_SPI0  
89  
RUNLED/STATERUN_LED/  
E2PSIZE/EE_EMUL0/LEDPOL3  
RUNLED/STATERUN_LED/  
E2PSIZE/EE_EMUL0/LEDPO L3  
D1/AD1/EOF/SO/SIO1  
VDDIO_J  
D1/AD1/EOF/SO/SIO1  
VDDIO  
90  
LINKACTLED1/TDI/  
CHIP_MODE1/LEDPOL1  
LINKACTLED1/TDI/  
CHIP_MODE1/LEDPOL1  
94  
D14/AD14/DIGIO8/GPI8/GPO8/  
MII_TXD3/TX_SHIFT1  
D14/AD14/DIGIO8/GPI8/GPO8/  
MII_TXD3/TX_SHIFT1  
VDDIO  
VDDIO_J  
95  
D13/AD13/DIGIO7/GPI7/GPO7/  
MII_TXD2/TX_SHIFT0  
D13/AD13/DIGIO7/GPI7/GPO7/  
MII_TXD2/TX_SHIFT0  
LINKACTLED0/TDO/  
LINKACTLED0/TDO/  
CHIP_MODE0/100FD_A/LEDPOL0  
CHIP_MODE0/100FD_A/LEDPOL0  
100  
101  
102  
103  
104  
105  
106  
110  
111  
112  
113  
115  
116  
118  
119  
124  
D4/AD4/DIGIO3/GPI3/GPO3/  
MII_LINK  
D4/AD4/DIGIO3/GPI3/GPO3/  
MII_LINK  
D0/AD0/WD_STATE/SI/SIO0  
SYNC1/LATCH1/PME  
D9/AD9/LATCH_IN/SCK  
VDDIO_J  
D0/AD0/WD_STATE/SI/SIO0  
SYNC1/LATCH1/PME  
D9/AD9/LATCH_IN/SCK  
VDDIO  
D5/AD5/OUTVALID/SCS#  
VDD33TXRX1  
TXNA  
D5/AD5/OUTVALID/SCS#  
VDD33TXRX1  
TXNA  
D12/AD12/DIGIO6/GPI6/GPO6/  
MII_TXD1/100FD_B  
D12/AD12/DIGIO6/GPI6/GPO6/  
MII_TXD1/100FD_B  
TXPA  
TXPA  
D11/AD11/DIGIO5/GPI5/GPO5/  
MII_TXD0/100FD_A  
D11/AD11/DIGIO5/GPI5/GPO5/  
MII_TXD0/100FD_A  
RXNA  
RXNA  
D10/AD10/DIGIO4/GPI4/GPO4/  
MII_TXEN  
D10/AD10/DIGIO4/GPI4/GPO4/  
MII_TXEN  
RXNP  
RXNP  
VDDCR  
VDDCR  
VDD12TX1  
RBIAS  
VDD12TX1  
RBIAS  
A1/ALELO/OE_EXT/  
MII_CLK25/EE_EMUL_SPI2  
A1/ALELO/OE_EXT/  
MII_CLK25/EE_EMUL_SPI2  
A3/BE0/DIGIO11/GPI11/GPO11/  
MII_RXDV  
A3/BE0/DIGIO11/GPI11/GPO11/  
MII_RXDV  
VDD33BIAS  
VDD12TX2  
RXPB  
VDD33BIAS  
VDD12TX2  
RXPB  
A4/BE1/DIGIO12/GPI12/GPO12/  
MII_RXD0  
A4/BE1/DIGIO12/GPI12/GPO12/  
MII_RXD0  
CS/DIGIO13/GPI13/GPO13/  
MII_RXD1  
CS/DIGIO13/GPI13/GPO13/  
MII_RXD1  
A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/  
EE_EMUL_ALELO_POL/MII_LINKPOL/LEDPOL2  
A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/  
EE_EMUL_ALELO_POL/MII_LINKPOL/LEDPOL2  
RXNB  
TXPB  
RXNB  
WR/ENB/DIGIO14/GPI14/  
GPO14/MII_RXD2  
WR/ENB/DIGIO14/GPI14/  
GPO14/MII_RXD2  
TXPB  
RD/RD_WR/DIGIO15/GPI15/  
GPO15/MII_RXD3  
RD/RD_WR/DIGIO15/GPI15/  
GPO15/MII_RXD3  
TXNB  
TXNB  
VDDIO_J  
VDDIO  
VDD33TXRX2  
VDD33TXRX2  
VSS  
85  
86  
Exposed Pad  
NC  
NC  
DS00003646B-page 14  
2020-2021 Microchip Technology Inc.  
LAN9255  
FIGURE 4-3:  
SAM E53J INTERNAL PIN MAPPING  
LAN9255  
SAM E53J  
1
2
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
3
5
PA00  
PA01  
PA00  
PA01  
PA02  
PA03  
PB04  
PB05  
GND  
VDDIO  
PA16  
65  
67  
68  
69  
73  
77  
79  
84  
87  
91  
92  
93  
96  
VDDIO_S  
3
8
PA02  
PA16  
PA17  
PA18  
PA19  
PB19  
PB17  
PA20  
PA21  
PA22  
PA23  
PA24  
PA25  
4
9
PA03  
PA17  
5
10  
11  
15  
16  
19  
20  
22  
23  
25  
27  
28  
30  
33  
34  
35  
36  
37  
PB04  
PA18  
6
PB05  
PA19  
7
GNDANA  
VDDANA  
PB06  
GNDANA  
VDDANA  
PB06  
PB07  
PB08  
PB09  
PA04  
PA05  
PA06  
PA07  
PA08  
PA09  
PA10  
PA11  
VDDIOB  
GND  
PB19  
8
PB17  
9
PA20  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
PB07  
PA21  
PB08  
PA22  
PB09  
PA23  
PA04  
PA24  
PA05  
PA25  
PA06  
GND  
97  
PA07  
VDDIO  
PB22  
VDDIO_S  
PB22  
98  
PA08  
99  
PA09  
PB23  
PB23  
107  
108  
109  
PA10  
PA27  
PA27  
PA11  
RESETN  
VDDCORE  
GND  
RESETN_E53  
VDDCORE  
VDDIOB  
40  
42  
43  
44  
46  
47  
61  
62  
63  
64  
114  
117  
120  
121  
122  
123  
125  
126  
127  
2
PB10  
PB11  
PB12  
PB13  
PB14  
PB15  
PA12  
PA13  
PA14  
PA15  
PB10  
PB11  
PB12  
PB13  
PB14  
PB15  
PA12  
PA13  
PA14  
PA15  
VSW  
VSW  
VDDIO_S  
PA30  
PA31  
PB30  
PB31  
PB00  
PB01  
PB02  
PB03  
VDDIO  
PA30  
PA31  
PB30  
PB31  
PB00  
PB01  
PB02  
PB03  
48  
75  
Exposed Pad  
NC  
NC  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 15  
LAN9255  
5.0  
PACKAGE INFORMATION  
Note:  
For the most current package drawings, see the Microchip Packaging Specification at  
http://www.microchip.com/packaging.  
FIGURE 5-1:  
128-TQFP PACKAGE (DRAWING)  
D
D1  
128X  
D
2
D1  
2
0.08 C  
D
96  
33  
97  
64  
E
2
A
B
E1 E  
A
A
D1  
2
NOTE 1  
128  
33  
4X 32 TIPS  
1
1
3
3
32  
32  
2
2
0.20 C A–B D  
0.20 C A–B D 4X  
A1  
A2  
A
TOP VIEW  
0.05  
D2  
SEATING  
PLANE  
C
128  
33  
SIDE VIEW  
NOTE 1  
E2  
97  
64  
96  
33  
e
2
128X b  
0.07  
C A–B  
D
e
BOTTOM VIEW  
Microchip Technology Drawing C04-502 Rev A Sheet 1 of 2  
DS00003646B-page 16  
2020-2021 Microchip Technology Inc.  
LAN9255  
FIGURE 5-2:  
128-TQFP PACKAGE (DIMENSIONS)  
T
2
T
1
R
H
R1  
c
T
3
T
L
L1  
SECTION A-A  
Units  
MILLIMETERS  
Dimension Limits  
MIN  
NOM  
MAX  
Number of Leads  
Lead Pitch  
N
e
128  
0.40 BSC  
Overall Height  
Standoff  
Molded Package Thickness  
Overall Length  
A
A1  
A2  
D
-
-
1.20  
0.15  
1.05  
0.05  
0.95  
0.10  
1.00  
16.00 BSC  
Molded Package Length  
Exposed Pad Length  
Overall Width  
D1  
D2  
E
14.00 BSC  
9.00  
16.00 BSC  
8.90  
9.10  
Molded Package Width  
Exposed Pad Width  
Lead Width  
Lead Thickness  
Foot Length  
Footprint  
Foot Angle  
Lead Angle  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
Lead Bend Radius  
Lead Bend Radius  
E1  
E2  
b
14.00 BSC  
8.90  
0.13  
0.09  
0.45  
9.00  
0.16  
-
0.60  
1.00 REF  
9.10  
0.23  
0.20  
0.75  
c
L
L1  
T
ș1  
ș2  
ș3  
R
0°  
0°  
11°  
11°  
0.08  
0.08  
-
-
7°  
-
13°  
13°  
-
12°  
12°  
-
R1  
-
0.20  
Notes:  
1. Pin 1 visual index feature may vary, but must be located within the hatched area.  
2. Dimensioning and tolerancing per ASME Y14.5M  
BSC: Basic Dimension. Theoretically exact value shown without tolerances.  
REF: Reference Dimension, usually without tolerance, for information purposes only.  
Microchip Technology Drawing C04-181 Rev A Sheet 2 of 2  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 17  
LAN9255  
FIGURE 5-3:  
128-TQFP PACKAGE (LAND PATTERN)  
C1  
X2  
EV  
96  
65  
SILK SCREEN  
ØV  
97  
64  
EV  
C2 Y2  
G2  
G1  
Y1  
128  
33  
1
3
32  
2
X1  
E
RECOMMENDED LAND PATTERN  
Units  
Dimension Limits  
E
MILLIMETERS  
NOM  
0.40 BSC  
MIN  
MAX  
Contact Pitch  
Optional Center Pad Width  
Optional Center Pad Length  
Contact Pad Spacing  
Contact Pad Spacing  
Contact Pad Width (X128)  
Contact Pad Length (X128)  
X2  
Y2  
C1  
C2  
X1  
Y1  
9.10  
9.10  
15.40  
15.40  
0.20  
1.50  
Contact Pad to Center Pad (X128) G1  
Contact Pad to Contact Pad (X124) G2  
2.40  
0.20  
Thermal Via Diameter  
Thermal Via Pitch  
V
EV  
0.33  
1.20  
Notes:  
1. Dimensioning and tolerancing per ASME Y14.5M  
BSC: Basic Dimension. Theoretically exact value shown without tolerances.  
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during  
reflow process  
Microchip Technology Drawing C04-2502 Rev A  
DS00003646B-page 18  
2020-2021 Microchip Technology Inc.  
LAN9255  
APPENDIX A: REVISION HISTORY  
TABLE A-1:  
REVISION HISTORY  
Revision Level  
Section/Figure/Entry  
Correction  
- Changed “EtherCAT Master” to “EtherCAT Host” in features  
- Title of Table 3-2 changed from “RGMII Interface” to “RMII  
Interface”, first column heading changed from “RGMII Function”  
to “RMII Function”  
- Removed “slave” and replaced with “device” in Figure 2-1.  
- Added the following sentence to the end of the first bullet in  
Section 3.3 Device ID:  
DS00003646B  
(04-09-21)  
“A list of the Device IDs for the various ordering options is  
detailed in Table 3-3, “Device ID”  
- Added Table 3-3, “Device ID”  
- Removed “Confidential - NDA Required” nomenclature from  
footer.  
DS00003646A  
(09-15-20)  
All  
Initial Release  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 19  
LAN9255  
THE MICROCHIP WEB SITE  
Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make  
files and information easily available to customers. Accessible by using your favorite Internet browser, the web site con-  
tains the following information:  
Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s  
guides and hardware support documents, latest software releases and archived software  
General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion  
groups, Microchip consultant program member listing  
Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of semi-  
nars and events, listings of Microchip sales offices, distributors and factory representatives  
CUSTOMER CHANGE NOTIFICATION SERVICE  
Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive  
e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or  
development tool of interest.  
To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notifi-  
cation” and follow the registration instructions.  
CUSTOMER SUPPORT  
Users of Microchip products can receive assistance through several channels:  
• Distributor or Representative  
• Local Sales Office  
• Field Application Engineer (FAE)  
Technical Support  
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales  
offices are also available to help customers. A listing of sales offices and locations is included in the back of this docu-  
ment.  
Technical support is available through the web site at: http://microchip.com/support  
DS00003646B-page 20  
2020-2021 Microchip Technology Inc.  
LAN9255  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
[X]  
[-X]  
XXX  
/
XXX  
PART NO.  
Device  
Examples:  
a)  
b)  
c)  
d)  
e)  
f)  
LAN9255/ZMX018  
Standard Packaging (Tray),  
Commercial Temperature,  
Tape and Reel Temperature  
Option  
Range  
Package  
Mem. Cfg.  
128-pin TQFP, 256K Memory  
Device:  
LAN9255  
LAN9255-I/ZMX019  
Standard Packaging (Tray)  
Industrial Temperature,  
128-pin TQFP, 512K Memory  
Tape and Reel  
Option:  
Blank = Standard packaging (Tray)  
T
= Tape and Reel(Note 1)  
LAN9255-V/ZMX020  
Standard Packaging (Tray)  
Extended Industrial Temperature,  
128-pin TQFP, 1024K Memory  
Temperature  
Range:  
Blank  
I
V
=
=
=
0C to +70C (Commercial)  
-40C to +85C (Industrial)  
-40C to +105C (Extended Industrial)  
LAN9255T/ZMX018  
Tape and Reel  
Commercial Temperature,  
128-pin TQFP, 256K Memory  
Package:  
ZMX  
=
128-pin TQFP (9.0mm ePad)  
Mem. Config:  
018  
019  
020  
=
=
=
256K Programmable Memory  
512K Programmable Memory  
1024K Programmable Memory  
LAN9255T-I/ZMX019  
Tape and Reel  
Industrial Temperature,  
128-pin TQFP, 512K Memory  
LAN9255T-V/ZMX020  
Tape and Reel  
Extended Industrial Temperature,  
128-pin TQFP, 1024K Memory  
Note 1:  
Tape and Reel identifier only appears in  
the catalog part number description. This  
identifier is used for ordering purposes and  
is not printed on the device package.  
Check with your Microchip Sales Office for  
package availability with the Tape and Reel  
option.  
2020-2021 Microchip Technology Inc.  
DS00003646B-page 21  
LAN9255  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specifications contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is secure when used in the intended manner and under normal conditions.  
There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip  
devices. We believe that these methods require using the Microchip products in a manner outside the operating specifications  
contained in Microchip's Data Sheets. Attempts to breach these code protection features, most likely, cannot be accomplished  
without violating Microchip's intellectual property rights.  
Microchip is willing to work with any customer who is concerned about the integrity of its code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not  
mean that we are guaranteeing the product is "unbreakable." Code protection is constantly evolving. We at Microchip are  
committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection  
feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or  
other copyrighted work, you may have a right to sue for relief under that Act.  
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