MCP102T-300I/TT [MICROCHIP]
Micropower Voltage Supervisors; 微功耗电压监控器型号: | MCP102T-300I/TT |
厂家: | MICROCHIP |
描述: | Micropower Voltage Supervisors |
文件: | 总28页 (文件大小:403K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MCP102/103/121/131
Micropower Voltage Supervisors
Features
Package Types
• Ultra low supply current: 1.75 µA
(steady-state max.)
SOT23-3/SC-70
TO-92
•
Precision monitoring options of:
1
2
RST
VDD
- 1.90V, 2.32V, 2.63V, 2.93V, 3.08V, 4.38V
and 4.63V
VSS
3
RST
• Resets microcontroller in a power-loss event
• RST pin (Active-low):
VSS
VDD
- MCP121: Active-low, open-drain
- MCP131: Active-low, open-drain with internal
pull-up resistor
SOT23-3/SC-70
- MCP102 and MCP103: Active-low, push-pull
VSS
1
• Reset Delay Timer (120 ms delay, typ.)
• Available in SOT23-3, TO-92 and SC-70
packages
VDD
3
•
Temperature Range:
RST
2
- Extended: -40°C to +125°C
(except MCP1XX-195)
- Industrial: -40°C to +85°C (MCP1XX-195 only)
• Pb-free devices
Block Diagram
VDD
Applications
• Critical Microcontroller and Microprocessor
Power-monitoring Applications
R (1)
Comparator
• Computers
+
–
Reset
Output
Driver
• Intelligent Instruments
• Portable Battery-powered Equipment
Delay
RST
Circuit
General Description
Band Gap
Reference
The MCP102/103/121/131 are voltage supervisor
devices designed to keep a microcontroller in reset
until the system voltage has reached and stabilized at
the proper level for reliable system operation. Table 1
shows the available features for these devices.
VSS
Note 1: MCP131 Only
TABLE 1:
DEVICE FEATURES
Output
Reset
Delay (typ)
Package Pinout
(Pin # 1, 2, 3)
Device
Comment
Type
Pull-up Resistor
MCP102 Push-pull
MCP103 Push-pull
No
No
120 ms
120 ms
120 ms
RST, VDD, VSS
VSS, RST, VDD
RST, VDD, VSS
RST, VDD, VSS
VOUT, VSS, VDD
MCP121 Open-drain External
MCP131 Open-drain Internal (~95 kΩ) 120 ms
MCP111 Open-drain External
No
See MCP111/112 Data Sheet
(DS21889)
MCP112 Push-Pull No
No
VOUT, VSS, VDD
See MCP111/112 Data Sheet
(DS21889)
© 2005 Microchip Technology Inc.
DS21906B-page 1
MCP102/103/121/131
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
DD
Input current (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
DD
Output current (RST) . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Rated Rise Time of V
. . . . . . . . . . . . . . . . . . . . . . 100V/µs
DD
All inputs and outputs (except RST) w.r.t. V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.6V to (V + 1.0V)
DD
RST output w.r.t. V
. . . . . . . . . . . . . . . . . . . -0.6V to 13.5V
SS
Storage temperature . . . . . . . . . . . . . . . . . . -65°C to + 150°C
Ambient temp. with power applied . . . . . . . -40°C to + 125°C
Maximum Junction temp. with power applied . . . . . . . .150°C
ESD protection on all pins. . . . . . . . . . . . . . . . . . . . . . . . . ≥ 2 kV
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: V = 1V to 5.5V, R = 100 kΩ (MCP121 only),
DD
PU
T = -40°C to +125°C.
A
Parameters
Operating Voltage Range
Specified V Value to RST low
Sym
Min
Typ
Max
Units
Conditions
V
V
1.0
1.0
—
—
—
5.5
V
V
DD
DD
DD
I
= 10 uA, V
< 0.2V
RST
DD
RST
Operating Current
MCP102,
I
< 1
1.75
µA
Reset Power-up Timer (t
) Inactive
) Active
RPU
MCP103,
MCP121
MCP131
—
—
—
20.0
1.75
µA
µA
Reset Power-up Timer (t
RPU
I
< 1
V
> V
and Reset Power-up
TRIP
DD
DD
Timer (t
) Inactive
RPU
—
—
—
—
75
90
µA
µA
V
< V
and Reset Power-up
TRIP
DD
Timer (t
) Inactive (Note 3)
RPU
Reset Power-up Timer (t
) Active
RPU
(Note 4)
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: RST output is forced low. There is a current through the internal pull-up resistor.
4: This includes the current through the internal pull-up resistor and the reset power-up timer.
®
5: This specification allows this device to be used in PICmicro microcontroller applications that require In-Circuit Serial
Programming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification
DOES NOT allow a continuos high voltage to be present on the open-drain output pin (V
). The total time that the
OUT
V
pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the V
pin should be
OUT
OUT
limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C
(+25°C preferred). For additional information, please refer to Figure 2-33.
6: This parameter is established by characterization and not 100% tested.
DS21906B-page 2
© 2005 Microchip Technology Inc.
MCP102/103/121/131
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all limits are specified for: V = 1V to 5.5V, R = 100 kΩ (MCP121 only),
DD
PU
T = -40°C to +125°C.
A
Parameters
Sym
Min
Typ
Max
Units
Conditions
T = +25°C (Note 1)
V
Trip Point
MCP1XX-195
V
1.872
1.853
2.285
2.262
2.591
2.564
2.886
2.857
3.034
3.003
4.314
4.271
4.561
4.514
—
1.900
1.900
2.320
2.320
2.630
2.630
2.930
2.930
3.080
3.080
4.380
4.380
4.630
4.630
±100
—
1.929
1.948
2.355
2.378
2.670
2.696
2.974
3.003
3.126
3.157
4.446
4.490
4.700
4.746
—
V
DD
TRIP
A
V
T = -40°C to +85°C (Note 2)
A
MCP1XX-240
MCP1XX-270
MCP1XX-300
MCP1XX-315
MCP1XX-450
MCP1XX-475
V
T = +25°C (Note 1)
A
V
Note 2
V
T = +25°C (Note 1)
A
V
Note 2
V
T = +25°C (Note 1)
A
V
Note 2
V
T = +25°C (Note 1)
A
V
Note 2
V
T = +25°C (Note 1)
A
V
Note 2
V
T = +25°C (Note 1)
A
V
Note 2
V
Trip Point Tempco
T
ppm/°C
DD
TPCO
Threshold
Hysteresis
(min. = 1%,
max = 6%)
MCP1XX-195
MCP1XX-240
MCP1XX-270
MCP1XX-300
MCP1XX-315
MCP1XX-450
MCP1XX-475
V
0.019
0.023
0.026
0.029
0.031
0.044
0.046
—
0.114
0.139
0.158
0.176
0.185
0.263
0.278
0.4
V
V
V
V
V
V
V
V
V
T = +25°C
A
HYS
—
—
—
—
—
—
RST Low-level Output Voltage
V
—
I
I
= 500 µA, V = V
OL DD TRIP(MIN)
OL
RST High-level Output Voltage
V
V
– 0.6
—
—
= 1 mA, For MCP102/MCP103
OH
OH
DD
(MCP102 and MCP103 only)
only (push-pull output)
Internal Pull-up Resistor
(MCP131 only)
R
—
95
—
—
kΩ
V
= 5.5V
PU
DD
(5)
Open-drain High Voltage on Output
(MCP121 only)
V
—
—
13.5
V
V
= 3.0V, Time voltage > 5.5V
ODH
DD
applied ≤ 100s,
current into pin limited to 2 mA, 25°C
operation recommended
(Note 5, Note 6)
Open-drain Output Leakage Current
I
0.1
—
µA
OD
(MCP121 only)
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: RST output is forced low. There is a current through the internal pull-up resistor.
4: This includes the current through the internal pull-up resistor and the reset power-up timer.
®
5: This specification allows this device to be used in PICmicro microcontroller applications that require In-Circuit Serial
Programming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification
DOES NOT allow a continuos high voltage to be present on the open-drain output pin (V
). The total time that the
OUT
V
pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the V
pin should be
OUT
OUT
limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C
(+25°C preferred). For additional information, please refer to Figure 2-33.
6: This parameter is established by characterization and not 100% tested.
© 2005 Microchip Technology Inc.
DS21906B-page 3
MCP102/103/121/131
VTRIP
1V
VDD
tRPU
tRPD
VOH
1V
VOL
RST
tRT
FIGURE 1-1:
Timing Diagram.
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: V = 1V to 5.5V, R = 100 kΩ (MCP121 only),
DD
PU
T = -40°C to +125°C.
A
Parameters
Detect to RST Inactive
Sym
Min
Typ
Max
Units
Conditions
Figure 1-1 and C = 50 pF
V
V
t
t
80
—
120
130
180
—
ms
µs
DD
RPU
RPD
L
Detect to RST Active
V
ramped from V
+
TRIP(MAX)
DD
DD
250 mV down to V
–
TRIP(MIN)
250 mV, per Figure 1-1,
C = 50 pF (Note 1)
L
RST Rise Time After RST Active
t
—
5
—
µs
For RST 10% to 90% of final value
RT
(MCP102 and MCP103 only)
per Figure 1-1, C = 50 pF
L
(Note 1)
Note 1: These parameters are for design guidance only and are not 100% tested.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all limits are specified for: V = 1V to 5.5V, R = 100 kΩ (MCP121 only),
DD
PU
T = -40°C to +125°C.
A
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Specified Temperature Range
Specified Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Package Thermal Resistances
Thermal Resistance, 3L-SOT23
Thermal Resistance, 3L-SC-70
Thermal Resistance, 3L-TO-92
T
-40
-40
—
—
—
—
—
+85
ºC
ºC
ºC
ºC
MCP1XX-195
A
T
+125
+150
+150
Except MCP1XX-195
A
T
J
T
-65
A
θ
θ
θ
—
—
—
336
340
—
—
—
ºC/W
ºC/W
ºC/W
JA
JA
JA
131.9
DS21906B-page 4
© 2005 Microchip Technology Inc.
MCP102/103/121/131
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
1.8
1.6
1.4
1.2
1
16
14
12
10
8
MCP102-195
5.5V
MCP102-195
5.5V
5.0V
4.0V
5.0V
2.8V
0.8
0.6
0.4
0.2
0
4.0V
6
2.1V
1.7V
4
2.8V
2.1V
1.0V
2
0
Temperature (°C)
Temperature (°C)
FIGURE 2-1:
IDD vs. Temperature
FIGURE 2-4:
IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP102-195).
(Reset Power-up Timer Active) (MCP102-195).
35
80
MCP131-315
2.9V
MCP131-315
70
30
25
20
15
5.5V
60
5.0V
50
4.5V
4.0V
40
3.3V
30
10
20
10
0
1.0V
5
3.3V, 4.0V, 5.0V, 5.5V
0
Temperature (°C)
Temperature (°C)
FIGURE 2-2:
IDD vs. Temperature
FIGURE 2-5:
IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP131-315).
(Reset Power-up Timer Active) (MCP131-315).
0.9
16
MCP121-450
MCP121-450
5.5V
0.8
14
0.7
12
10
8
5.5V
5.0V
0.6
5.0V
4.8V
4.6V
0.5
0.4
0.3
0.2
0.1
0
4.8V
6
4.6V
4.1V
3.0V
1.0V
4
2
0
Temperature (°C)
Temperature (°C)
FIGURE 2-3:
IDD vs. Temperature
FIGURE 2-6:
IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP121-450).
(Reset Power-up Timer Active) (MCP121-450).
© 2005 Microchip Technology Inc.
DS21906B-page 5
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
16
14
12
10
8
1.8
1.6
1.4
1.2
1
-40°C
0°C
+25°C
+70°C
+85°C
+125°C
MCP102-195
MCP102-195
+25°C
+125°C
+85°C
Device in Reset
0.8
0.6
0.4
0.2
0
tRPU inactive
6
0°C
5.0
-40°C
4
2
0
1.0
2.0
3.0
4.0
6.0
1.0
2.0
3.0
4.0
5.0
6.0
VDD (V)
VDD (V)
FIGURE 2-7:
IDD vs. VDD
FIGURE 2-10:
IDD vs.VDD
(Reset Power-up Timer Inactive) (MCP102-195).
(Reset Power-up Timer Active) (MCP102-195).
80
35
MCP131-315
-40°C, 0°C
+25°C
+70°C
0°C, +25°C
-40°C
MCP131-315
70
60
50
40
30
20
10
0
30
25
20
15
10
5
+85°C
Device in Reset
+125°C
tRPU inactive
+70°
+85°C
+125°C
0
-5
1.0
2.0
3.0
4.0
5.0
6.0
1.0
2.0
3.0
4.0
5.0
6.0
VDD (V)
V
DD (V)
FIGURE 2-8:
IDD vs. VDD
FIGURE 2-11:
IDD vs.VDD
(Reset Power-up Timer Inactive) (MCP131-315).
(Reset Power-up Timer Active) (MCP131-315).
0.9
16
-40°C
0°C
+25°C
+70°C
MCP121-450
MCP121-450
0.8
14
12
10
8
0.7
+125°C
Device in Reset
tRPU inactive
+85°C
0.6
0.5
0.4
0.3
0.2
0.1
0
+70°C
+125°C
6
+85°C
4
0°C
2
-40°C
+25°C
3.0
0
-2
1.0
2.0
4.0
5.0
6.0
1.0
2.0
3.0
4.0
5.0
6.0
VDD (V)
VDD (V)
FIGURE 2-9:
IDD vs. VDD
FIGURE 2-12:
IDD vs.VDD
(Reset Power-up Timer Inactive) (MCP121-450).
(Reset Power-up Timer Active) (MCP121-450).
DS21906B-page 6
© 2005 Microchip Technology Inc.
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121;
see Figure 4-1), TA = -40°C to +125°C.
0.120
0.100
0.080
0.060
0.040
0.020
0.000
-0.020
MCP102-195
VDD = 1.7V
1.945
0.050
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
0.005
0.000
VTRIP, increasing VDD
1.940
1.935
1.930
1.925
1.920
1.915
1.910
1.905
1.900
1.895
+70°C
+125°C
+85°C
VHYS, Hysteresis
+25°C
0°C
-40°C
VTRIP, decreasing VDD
MCP102-195
90
-60
-10
40
140
0.00
0.25
0.50
IOL (mA)
0.75
1.00
Temperature (°C)
FIGURE 2-13:
VTRIP vs. Temperature vs.
FIGURE 2-16:
VOL vs. IOL
Hysteresis (MCP102-195).
(MCP102-195 @ VDD = 1.7V).
0.070
MCP131-315
3.200
0.108
0.106
0.104
0.102
0.100
0.098
0.096
0.094
0.092
0.090
+70°C
VTRIP, increasing VDD
0.060 VDD = 2.9V
3.180
+125°C
0.050
0.040
0.030
0.020
0.010
0.000
3.160
3.140
3.120
3.100
3.080
3.060
VHYS, Hysteresis
+85°C
-40°C
0.75
VTRIP, decreasing VDD
MCP131-315
0°C
+25°C
0.00
0.25
0.50
IOL (mA)
1.00
-60
-10
40
90
140
Temperature (°C)
FIGURE 2-14:
VTRIP vs. Temperature vs.
FIGURE 2-17:
VOL vs. IOL
Hysteresis (MCP131-315).
(MCP131-315 @ VDD = 2.9V).
0.060
4.550
0.190
0.180
0.170
0.160
0.150
0.140
0.130
0.120
0.110
0.100
MCP121-450
VDD = 4.1V
+85°C
0.050
+125°C
4.500
VTRIP, increasing VDD
0.040
+70°C
VHYS, Hysteresis
4.450
4.400
4.350
4.300
0.030
0.020
VTRIP, decreasing VDD
+25°C
0.010
0°C
-40°C
MCP121-450
0.000
-60
-20
20
60
100
140
0.00
0.25
0.50
0.75
1.00
IOL (mA)
Temperature (°C)
FIGURE 2-15:
VTRIP vs. Temperature vs.
FIGURE 2-18:
VOL vs. IOL
Hysteresis (MCP121-450).
(MCP121-450 @ VDD = 4.1V).
© 2005 Microchip Technology Inc.
DS21906B-page 7
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
0.140
2.110
MCP102-195
MCP102-195
VDD = 2.1V
VDD = 1.7 V
0.120
0.100
0.080
0.060
0.040
0.020
0.000
2.090
2.070
2.050
2.030
2.010
1.990
1.970
1.950
IOL = 1.00 mA
IOL = 0.75 mA
0°C
-40°C
IOL = 0.50 mA
+125°C
+85°C
IOL = 0.25 mA
IOL = 0.00 mA
80
+70°C
+25°C
-40
0
40
120
0.00
0.25
0.50
IOL (mA)
0.75
1.00
Temperature (°C)
FIGURE 2-19:
VOL vs. Temperature
FIGURE 2-22:
VOH vs. IOL
(MCP102-195 @ VDD = 1.7V).
(MCP102-195 @ VDD = 2.1V).
0.070
IOL = 1.00 mA
MCP131-315
VDD = 2.9V
0.060
IOL = 0.75 mA
IOL = 0.50 mA
0.050
0.040
0.030
0.020
0.010
0.000
IOL = 0.25 mA
IOL = 0.00 mA
-40
0
40
80
120
Temperature (°C)
FIGURE 2-20:
VOL vs. Temperature
(MCP131-315 @ VDD = 2.9V).
0.060
MCP121-450
IOL = 1.00 mA
VDD = 4.1V
0.050
IOL = 0.75 mA
0.040
0.030
0.020
0.010
0.000
IOL = 0.50 mA
IOL = 0.25 mA
IOL = 0.00 mA
-40
0
40
80
120
Temperature (°C)
FIGURE 2-21:
VOL vs. Temperature
(MCP121-450 @ VDD = 4.1V).
DS21906B-page 8
© 2005 Microchip Technology Inc.
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
300
250
200
150
100
50
160
150
140
130
120
110
100
VDD decreasing
from: 5V - 1.7V
MCP102-195
MCP102-195
VDD decreasing from:
VDD increasing from:
0V - 2.1V
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V
VDD increasing from:
0V - 2.8V
VDD increasing
from: 0V - 4.0V
VDD decreasing
from: 5V - 0V
VDD increasing
from: 0V - 5.5V
0
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
Temperature (°C)
Temperature (°C)
FIGURE 2-23:
tRPD vs. Temperature
FIGURE 2-26:
tRPU vs. Temperature
(MCP102-195).
(MCP102-195).
250
160
150
140
130
120
110
100
VDD increasing from:
VDD decreasing from:
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V
MCP131-315
MCP131-315
0V - 3.3V
200
150
100
50
VDD increasing from:
0V - 4.0V
VDD decreasing from:
5V - 2.7V
VDD decreasing from:
5V - 0V
VDD increasing from:
0V - 4.5V
VDD increasing from:
0V - 5.5V
0
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
Temperature (°C)
Temperature (°C)
FIGURE 2-24:
tRPD vs. Temperature
FIGURE 2-27:
tRPU vs. Temperature
(MCP131-315).
(MCP131-315).
145
140
135
130
125
120
115
110
38
MCP121-450
MCP121-450
VDD increasing from:
0V - 4.8V
37.5
VDD increasing from:
0V - 4.6V
VDD increasing from:
0V - 4.8V
37
36.5
36
VDD increasing from:
0V - 5.0V
35.5
35
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 5.5V
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
Temperature (°C)
Temperature (°C)
FIGURE 2-25:
(MCP121-450).
tRPD vs. Temperature
FIGURE 2-28:
(MCP121-450).
tRPU vs. Temperature
© 2005 Microchip Technology Inc.
DS21906B-page 9
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
0.45
0.4
1400
1200
1000
800
600
400
200
0
VDD increasing from:
0V - 2.1V
MCP102-195
MCP121-450
VDD increasing from:
0V - 2.8V
0.35
0.3
0.25
0.2
MCP102-195
MCP131-315
0.15
0.1
VDD increasing from:
0V - 4.0V
VDD increasing from:
0V - 5.5V
VDD increasing from:
0.05
0
0V - 5.0V
-40
-15
10
35
60
85
110
0.001
0.01
0.1
1
10
VTRIP(Min) - VDD
Temperature (°C)
FIGURE 2-29:
tRT vs. Temperature
FIGURE 2-32:
Transient Duration vs.
(MCP102-195).
V
TRIP (min) - VDD.
1.00E-02
10m
45
1.00E-03
VDD increasing from:
0V - 5.0V
1m
VDD increasing from:
43
41
39
37
35
33
31
29
27
25
1.00E-04
0V - 5.5V
100µ
VDD increasing from:
0V - 4.5V
1.00E-05
10µ
1.00E-06
1µ
1.00E-07
+125°C
+25°C
100n
1.00E-08
10n
1.00E-09
1n
1.00E-10
100p
VDD increasing from:
0V - 3.3V
1.00E-11
10p
- 40°C
VDD increasing from:
0V - 4.0V
1.00E-12
1p
MCP131-315
1.00E-13
100f
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14
-40
-15
10
35
60
85
110
Temperature (°C)
Pull-Up Voltage (V)
FIGURE 2-30:
tRT vs. Temperature
FIGURE 2-33:
Open-Drain Leakage
(MCP131-315).
Current vs. Voltage Applied to VOUT Pin
(MCP121-195).
38
MCP121-450
37.5
37
VDD increasing from:
0V - 4.6V
VDD increasing from:
0V - 4.8V
36.5
36
35.5
35
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 5.5V
-40
-15
10
35
60
85
110
Temperature (°C)
FIGURE 2-31:
tRT vs. Temperature
(MCP121-450).
DS21906B-page 10
© 2005 Microchip Technology Inc.
MCP102/103/121/131
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
Pin No.
PIN FUNCTION TABLE
Symbol
MCP102
Function
MCP121 MCP103
MCP131
1
1
RST
Output State
VDD Falling:
H = VDD > VTRIP
L = VDD < VTRIP
VDD Rising:
H = VDD > VTRIP + VHYS
L = VDD < VTRIP + VHYS
2
3
3
2
VDD
VSS
Positive power supply
Ground reference
© 2005 Microchip Technology Inc.
DS21906B-page 11
MCP102/103/121/131
4.1
RST Operation
4.0
APPLICATION INFORMATION
The RST output pin operation determines how the
device can be used and indicates when the system
should be forced into reset. To accomplish this, an
internal voltage reference is used to set the voltage trip
point (VTRIP). Additionally, there is a hysteresis on this
trip point.
For many of today’s microcontroller applications, care
must be taken to prevent low-power conditions that can
cause many different system problems. The most
common causes are brown-out conditions, where the
system supply drops below the operating level momen-
tarily. The second most common cause is when a
slowly decaying power supply causes the
microcontroller to begin executing instructions without
sufficient voltage to sustain volitile memory (RAM), thus
producing indeterminate results. Figure 4-1 shows a
typical application circuit.
When the falling edge of VDD crosses this voltage
threshold, the reset power-down timer (TRPD) starts.
When this delay timer times out, the RST pin is forced
low.
When the rising-edge of VDD crosses this voltage
threshold, the reset power-up timer (TRPU) starts.
When this delay timer times out, the RST pin is forced
high, TRPU is active and there is additional system
current.
The MCP102/103/121/131 are voltage supervisor
devices designed to keep a microcontroller in reset
until the system voltage has reached and stabilized at
the proper level for reliable system operation. These
devices also operate as protection from brown-out
conditions.
The actual voltage trip point (VTRIPAC) will be between
the minimum trip point (VTRIPMIN) and the maximum
trip point (VTRIPMAX). The hysteresis on this trip point
and the delay timer (TRPU) are to remove any “jitter”
that would occur on the RST pin when the device VDD
is at the trip point.
VDD
VDD
VDD
PICmicro®
Microcontroller
0.1
µF
RPU
Figure 4-2 shows the waveform of the RST pin as deter-
mined by the VDD voltage, while Table 4-1 shows the
state of the RST pin. The VTRIP specification is for falling
VDD voltages. When the VDD voltage is rising, the RST
will not be driven high until VDD is at VTRIP + VHYS. Once
VDD has crossed the voltage trip point, there is also a
minimal delay time (TRPD) before the RST pin is driven
low.
MCP1XX
MCLR
(Reset input)
(Active-low)
RST
VSS
VSS
Note 1: Resistor RPU may be required with the
MCP121 due to the open-drain output.
Resistor RPU may not be required with
the MCP131 due to the internal pull-up
resistor. The MCP102 and MCP103 do
not require the external pull-up resistor.
TABLE 4-1:
State of RST Pin when:
DD<VTRIP VDD
RST PIN STATES
Device
V
>
Ouput Driver
VTRIP + VHYS
MCP102
MCP103
MCP121
MCP131
L
L
L
L
H
Push-pull
FIGURE 4-1:
Typical Application Circuit.
H
Push-pull
H (1)
H (2)
Open-drain (1)
Open-drain (2)
Note 1: Requires External Pull-up resistor
2: Has Internal Pull-up resistor
VDD
VTRIPAC + VHYSAC
VTRIPMAX
VTRIPMIN
VTRIPAC
VTRIPAC
1V
RST
tRPU
tRPD
tRPU
< 1V is outside the
device specifications
tRPD
FIGURE 4-2:
RST Operation as Determined by the VTRIP and VHYS.
DS21906B-page 12
© 2005 Microchip Technology Inc.
MCP102/103/121/131
4.2
Negative Going VDD Transients
4.3
Reset Power-up Timer (t
)
RPU
The minimum pulse width (time) required to cause a
reset may be an important criteria in the implementa-
tion of a Power-on Reset (POR) circuit. This time is
referred to as transient duration, defined as the amount
of time needed for these supervisory devices to
respond to a drop in VDD. The transient duration time is
dependant on the magnitude of VTRIP – VDD. Generally
speaking, the transient duration decreases with
Figure 4-4 illustrates the device current states. While
the system is powering down, the device has a low
current. This current is dependent on the device VDD
and trip point. When the device VDD rises through the
voltage trip point (VTRIP), an internal timer starts. This
timer consumes additional current until the RST pin is
driven (or released) high. This time is known as the
Reset Power-up Time (tRPU). Figure 4-4 shows when
tRPU is active (device consuming additional current).
increases in VTRIP – VDD
Figure 4-3 shows a typical transient duration vs. reset
comparator overdrive, for which the
.
VDD
MCP102/103/121/131 will not generate a reset pulse. It
shows that the farther below the trip point the transient
pulse goes, the duration of the pulse required to cause
a reset gets shorter. Figure 2-32 shows the transient
response characteristics for the MCP102/103/121/131.
VTRIP
A 0.1 µF bypass capacitor, mounted as close as
possible to the VDD pin, provides additional transient
immunity (refer to Figure 4-1).
RST
tRPU
5V
V
V
TRIP(MAX)
TRIP(MIN)
Reset
Power-up
V
- V
DD
TRIP(MIN)
Reset Power-up
Timer Inactive
Timer
Inactive
t
TRANS
0V
Time (µs)
See Figures 2-1,
2-2 and 2-3
See Figures 2-1,
2-2 and 2-3
FIGURE 4-3:
Transient Duration Waveform.
Example of Typical
See Figures 2-4,
2-5 and 2-6
FIGURE 4-4:
Reset Power-up Timer
Waveform.
4.3.1
EFFECT OF TEMPERATURE ON
RESET POWER-UP TIMER (TRPU
)
The Reset Power-up timer time-out period (tRPU
)
determines how long the device remains in the reset
condition. This is affected by both VDD and temperature.
Typical responses for different VDD values and
temperatures are shown in Figures 2-26, 2-27 and 2-28.
© 2005 Microchip Technology Inc.
DS21906B-page 13
MCP102/103/121/131
®
4.4
Using in PICmicro
Microcontroller, ICSP™
Applications (MCP121 only)
Figure 4-5 shows the typical application circuit for using
the MCP121 for voltage superviory function when the
PICmicro microcontroller will be programmed via the
ICSP feature. Additional information is available in
TB087, “Using Voltage Supervisors with PICmicro®
Microcontroller Systems which Implement In-Circuit
Serial Programming™”, DS91087.
Note:
It is recommended that the current into the
RST pin be current limited by a 1 kΩ
resistor.
VDD/VPP
0.1µF
VDD
RPU
VDD
PICmicro®
MCU
MCP121
MCLR
(Reset Input)
(Active-low)
RST
VSS
1 kΩ
VSS
FIGURE 4-5:
Typical Application Circuit
for PICmicro® Microcontroller with the ICSP™
feature.
DS21906B-page 14
© 2005 Microchip Technology Inc.
MCP102/103/121/131
5.0
5.1
PACKAGING INFORMATION
Package Marking Information
3-Lead TO-92
Example:
MCP102
195I
XXXXXX
XXXXXX
XXXXXX
YWWNNN
e
3
TO^
547256
Example:
MCP1xx =
MCP102 MCP103 MCP121 MCP131
3-Pin SOT-23
Part Number
MCP1xxT-195I/TT
MCP1xxT-240ETT
MCP1xxT-270E/TT
MCP1xxT-300E/TT
MCP1xxT-315E/TT
MCP1xxT-450E/TT
MCP1xxT-475E/TT
JGNN
JHNN
JJNN
JKNN
JLNN
JMNN
JPNN
TGNN
THNN
TJNN
TKNN
TLNN
TMNN
TPNN
LGNN
LHNN
LJNN
LKNN
LLNN
LMNN
LPNN
KGNN
KHNN
KJNN
KKNN
KLNN
KMNN
KPNN
XXNN
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
WW
NNN
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
e
3
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2005 Microchip Technology Inc.
DS21906B-page 15
MCP102/103/121/131
Package Marking Information (Continued)
Example:
MCP1xx =
MCP102 MCP103 MCP121 MCP131
3-Pin SC-70
Part Number
MCP1xxT-195I/LB
MCP1xxT-240E/LB
MCP1xxT-270E/LB
MCP1xxT-300E/LB
MCP1xxT-315E/LB
MCP1xxT-450E/LB
MCP1xxT-475E/LB
BGN
BHN
BJN
BKN
BLN
BMN
BPN
FGN
FHN
FJN
FKN
FLN
FMN
FPN
DGN
DHN
DJN
DKN
DLN
DMN
DPN
CGN
CHN
CJN
CKN
CLN
CMN
CPN
XXN
YWW
Top Side
Bottom Side
Example:
MCP1xx =
MCP102 MCP103 MCP121 MCP131
OR
Part Number
MCP1xxT-195I/LB
BGNN
FGNN
FHNN
FJNN
FKNN
FLNN
FMNN
FPNN
DGNN
DHNN
DJNN
DKNN
DLNN
DMNN
DPNN
CGNN
CHNN
CJNN
CKNN
CLNN
CMNN
CPNN
MCP1xxT-240E/LB BHNN
XXNN
MCP1xxT-270E/LB
MCP1xxT-300E/LB
MCP1xxT-315E/LB
BJNN
BKNN
BLNN
Top Side
MCP1xxT-450E/LB BMNN
MCP1xxT-475E/LB BPNN
DS21906B-page 16
© 2005 Microchip Technology Inc.
MCP102/103/121/131
3-Lead Plastic Small Outline Transistor (TT) (SOT-23)
E
E1
2
B
p1
D
n
p
1
α
c
A
A2
A1
φ
β
L
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
3
MAX
n
p
Number of Pins
3
Pitch
.038
.076
.040
.037
.002
.093
.051
.115
.018
5
0.96
1.92
p1
Outside lead pitch (basic)
Overall Height
A
A2
A1
E
.035
.044
0.89
0.88
1.01
0.95
0.06
2.37
1.30
2.92
0.45
5
1.12
1.02
0.10
2.64
1.40
3.04
0.55
10
Molded Package Thickness
.035
.000
.083
.047
.110
.014
0
.040
.004
.104
.055
.120
.022
10
Standoff
§
0.01
2.10
1.20
2.80
0.35
0
Overall Width
Molded Package Width
Overall Length
E1
D
Foot Length
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.004
.015
0
.006
.017
5
.007
.020
10
0.09
0.37
0
0.14
0.44
5
0.18
0.51
10
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-236
Drawing No. C04-104
© 2005 Microchip Technology Inc.
DS21906B-page 17
MCP102/103/121/131
3-Lead Plastic Small Outline Transistor (LB) (SC-70)
E
E1
B
2
1
p1
D
3
p
a
A2
A
c
A1
b
L
Units
Dimension Limits
INCHES
3
MILLIMETERS*
MIN MAX
MIN
MAX
Number of Pins
Pitch
3
p
.026 BSC.
.051 BSC.
.031
.031
.000
.071
.045
.071
.004
.003
.006
8°
0.65 BSC.
1.30 BSC.
0.80
p1
Outside lead pitch (basic)
Overall Height
A
A2
A1
E
.043
1.10
1.00
.010
2.40
1.35
2.25
0.41
0.25
0.40
12°
Molded Package Thickness
Standoff
.039
.0004
.094
.053
.089
.016
.010
.016
12°
0.80
0.00
Overall Width
1.80
Molded Package Width
Overall Length
E1
D
1.15
1.80
Foot Length
L
c
0.10
Lead Thickness
0.08
Lead Width
B
a
0.15
Mold Draft Angle Top
Mold Draft Angle Bottom
8°
b
8°
12°
8°
12°
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions
shall not exceed .005" (0.127mm) per side.
JEITA (EIAJ) Equivalent: SC70
Drawing No. C04-104
DS21906B-page 18
© 2005 Microchip Technology Inc.
MCP102/103/121/131
3-Lead Plastic Transistor Outline (TO) (TO-92)
E1
D
n
1
L
1
2
3
α
B
p
c
A
R
β
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
Number of Pins
3
3
Pitch
.050
.143
.186
.183
.090
.555
.017
.019
5
1.27
3.62
4.71
4.64
2.29
14.10
0.43
0.48
5
Bottom to Package Flat
Overall Width
A
E1
D
R
L
.130
.155
3.30
3.94
.175
.170
.085
.500
.014
.016
4
.195
.195
.095
.610
.020
.022
6
4.45
4.32
2.16
12.70
0.36
0.41
4
4.95
4.95
2.41
15.49
0.51
0.56
6
Overall Length
Molded Package Radius
Tip to Seating Plane
Lead Thickness
Lead Width
c
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
2
3
4
2
3
4
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-92
Drawing No. C04-101
© 2005 Microchip Technology Inc.
DS21906B-page 19
MCP102/103/121/131
5.2
Product Tape and Reel Specifications
FIGURE 5-1:
EMBOSSED CARRIER DIMENSIONS (8, 12, 16 AND 24 MM TAPE ONLY)
Top
Cover
Tape
A
0
W
B
K
0
0
P
TABLE 1:
CARRIER TAPE/CAVITY DIMENSIONS
Carrier
Cavity
Dimensions
Output
Quantity
Units
Reel
Diameter in
mm
Dimensions
Case
Package
Outline
Type
W
P
A0
B0
mm
K0
mm
mm
mm
mm
TT
LB
SOT-23
SC-70
3L
3L
8
8
4
4
3.15
2.4
2.77
2.4
1.22
1.19
3000
3000
180
180
FIGURE 5-2:
3-LEAD SOT-23/SC70 DEVICE TAPE AND REEL SPECIFICATIONS
User Direction of Feed
Device
Marking
W
PIN 1
P
Standard Reel Component Orientation
DS21906B-page 20
© 2005 Microchip Technology Inc.
MCP102/103/121/131
FIGURE 5-3:
TO-92 DEVICE TAPE AND REEL SPECIFICATIONS
User Direction of Feed
P
Device
Marking
MARK
FACE
MARK
FACE
MARK
FACE
Seal
Tape
Back
Tape
W
Note:
Bent leads are for Tape and Reel only.
© 2005 Microchip Technology Inc.
DS21906B-page 21
MCP102/103/121/131
NOTES:
DS21906B-page 22
© 2005 Microchip Technology Inc.
MCP102/103/121/131
APPENDIX A: REVISION HISTORY
Revision B (March 2005)
The following is the list of modifications:
1. Added Section 4.4 “Using in PICmicro®
Microcontroller,
ICSP™
Applications
(MCP121 only)” on using the MCP121 in
PICmicro microcontroller ICSP applications.
2. Added VODH specifications in Section 1.0
“Electrical
Characteristics” (for
ICSP
applications).
3. Added Figure 2-33.
4. Updated SC-70 package markings and added
Pb-free marking information to Section 5.0
“Packaging information”.
5. Added Appendix A: “Revision History”.
Revision A (August 2004)
• Original Release of this Document.
© 2005 Microchip Technology Inc.
DS21906B-page 23
MCP102/103/121/131
NOTES:
DS21906B-page 24
© 2005 Microchip Technology Inc.
MCP102/103/121/131
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
X
XXX
X
XX
–
/
a)
b)
MCP102T-195I/TT: Tape and Reel,
1.95V MicroPower
Temperature Package
Range
Tape/Reel
Option
Monitoring
Options
Voltage Supervisor,
push-pull, -40°C to +85°C,
SOT-23B-3 package.
MCP102-300E/TO: 3.00V MicroPower
Voltage Supervisor,
push-pull,
Device:
MCP102: MicroPower Voltage Supervisor, push-pull
MCP102T: MicroPower Voltage Supervisor, push-pull
(Tape and Reel)
MCP103: MicroPower Voltage Supervisor, push-pull
MCP103T: MicroPower Voltage Supervisor, push-pull
(Tape and Reel)
MCP121 MicroPower Voltage Supervisor, open-drain
MCP121T: MicroPower Voltage Supervisor, open-drain
(Tape and Reel)
MCP131 MicroPower Voltage Supervisor, open-drain
MCP131T: MicroPower Voltage Supervisor, open-drain
(Tape and Reel)
-40°C to +125°C,
TO-92-3 package.
a)
b)
MCP103T-270E/TT: Tape and Reel,
2.70V MicroPower
Voltage Supervisor,
push-pull,
-40°C to +125°C,
SOT-23B-3 package.
MCP103T-475E/LB: Tape and Reel,
4.75V MicroPower
Voltage Supervisor,
push-pull,
Monitoring Options:
195 = 1.90V
240 = 2.32V
270 = 2.63V
300 = 2.93V
315 = 3.08V
450 = 4.38V
475 = 4.63V
-40°C to +125°C,
SC-70-3 package.
a)
MCP121T-315I/LB: Tape and Reel,
3.15V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +125°C,
SC-70-3 package.
MCP121-300E/TO: 3.00V MicroPower
Voltage Supervisor,
open-drain,
Temperature Range:
Package:
I
E
=
=
-40°C to +85°C (MCP11X-195 only)
-40°C to +125°C (Except MCP11X-195 only)
b)
a)
TT
LB
TO
=
=
=
SOT-23B, 3-lead
SC-70, 3-lead
TO-92, 3-lead
-40°C to +125°C,
TO-92-3 package.
MCP131T-195I/TT: Tape and Reel,
1.95V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +85°C,
SOT-23B-3 package.
b)
MCP131-300E/TO: 3.00V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +125°C,
TO-92-3 package.
© 2005 Microchip Technology Inc.
DS21906B-page 25
MCP102/103/121/131
NOTES:
DS21906B-page 26
© 2005 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,
MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,
PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel, Total
Endurance and WiperLock are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2005 Microchip Technology Inc.
DS21906B-page 27
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ASIA/PACIFIC
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EUROPE
Corporate Office
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Tel: 61-2-9868-6733
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03/01/05
DS21906B-page 28
© 2005 Microchip Technology Inc.
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