MCP1700T-2002E/MB [MICROCHIP]
250MA CMOS LDO, ISUPPLY 1UA & 2% VOUT ACCURACY, -40C to +125C, 3-SOT-89, T/R;
| 型号： | MCP1700T-2002E/MB |
| 厂家： | 
MICROCHIP |
| 描述： | 250MA CMOS LDO, ISUPPLY 1UA & 2% VOUT ACCURACY, -40C to +125C, 3-SOT-89, T/R |
| 文件： | 总30页 (文件大小：1266K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCP1700
Low Quiescent Current LDO
Features
General Description
• AEC-Q100 Qualified and PPAP Capable
• 1.6 µA Typical Quiescent Current
The MCP1700 is a family of CMOS low dropout (LDO)
voltage regulators that can deliver up to 250 mA of
current while consuming only 1.6 µA of quiescent
current (typical). The input operating range is specified
from 2.3V to 6.0V, making it an ideal choice for two and
three primary cell battery-powered applications, as well
as single cell Li-Ion-powered applications.
• Input Operating Voltage Range: 2.3V to 6.0V
• Output Voltage Range: 1.2V to 5.0V
• 250 mA Output Current for Output
Voltages 2.5V
• 200 mA Output Current for Output
Voltages < 2.5V
The MCP1700 is capable of delivering 250 mA with
only 178 mV of input to output voltage differential
(VOUT = 2.8V). The output voltage tolerance of the
MCP1700 is typically ±0.4% at +25°C and ±3%
maximum over the operating junction temperature
range of -40°C to +125°C.
• Low Dropout (LDO) Voltage
- 178 mV Typical @ 250 mA for VOUT = 2.8V
• 0.4% Typical Output Voltage Tolerance
• Standard Output Voltage Options:
- 1.2V, 1.8V, 2.5V, 2.8V, 2.9V, 3.0V, 3.3V, 5.0V
• Stable with 1.0 µF Ceramic Output Capacitor
• Short Circuit Protection
Output voltages available for the MCP1700 range from
1.2V to 5.0V. The LDO output is stable when using only
1 µF output capacitance. Ceramic, tantalum or
aluminum electrolytic capacitors can all be used for
input and output. Overcurrent limit and overtemperature
shutdown provide a robust solution for any application.
• Overtemperature Protection
Applications
Package options include SOT-23, SOT-89, TO-92 and
2x2 DFN-6.
• Battery-Powered Devices
• Battery-Powered Alarm Circuits
• Smoke Detectors
Package Types
• CO2 Detectors
3-Pin SOT-23
3-Pin SOT-89
• Pagers and Cellular Phones
• Smart Battery Packs
• Low Quiescent Current Voltage Reference
• PDAs
VIN
3
VIN
MCP1700
MCP1700
• Digital Cameras
2
1
3
1
2
• Microcontroller Power
GNDVIN VOUT
GND VOUT
Related Literature
3-Pin TO-92
2x2 DFN-6*
• AN765, “Using Microchip’s Micropower LDOs”
(DS00765), Microchip Technology Inc., 2002
VIN
NC
VOUT
NC
1
2
6
MCP1700
EP
7
5
4
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs” (DS00766),
1
2 3
NC
3
GND
Microchip Technology Inc., 2002
• AN792, “A Method to Determine How Much
Power a SOT23 Can Dissipate in an Application”
(DS00792), Microchip Technology Inc., 2001
GND VIN VOUT
* Includes Exposed Thermal Pad (EP); see Table 3-1.
2005-2018 Microchip Technology Inc.
DS20001826E-page 1
MCP1700
Functional Block Diagrams
MCP1700
VOUT
VIN
Error Amplifier
+VIN
Voltage
Reference
-
+
Overcurrent
Overtemperature
GND
Typical Application Circuits
MCP1700
VIN
GND
(2.3V to 3.2V)
VOUT
1.8V
VIN
CIN
VOUT
1 µF Ceramic
IOUT
150 mA
COUT
1 µF Ceramic
2005-2018 Microchip Technology Inc.
DS20001826E-page 2
MCP1700
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only, and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
V
............................................................................................+6.5V
DD
All inputs and outputs w.r.t. ......... (VSS - 0.3V) to (VIN + 0.3V)
Peak Output Current....................................Internally Limited
Storage Temperature ....................................-65°C to +150°C
Maximum Junction Temperature................................... 150°C
Operating Junction Temperature...................-40°C to +125°C
ESD protection on all pins (HBM;MM) 4 kV; 400V
DC CHARACTERISTICS
Electrical Characteristics: Unless otherwise specified, all limits are established for VIN = VR + 1V, ILOAD = 100 µA,
OUT = 1 µF (X7R), CIN = 1 µF (X7R), TA = +25°C.
Boldface type applies for junction temperatures, TJ (Note 6) of -40°C to +125°C.
C
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Input/Output Characteristics
Input Operating
Voltage
VIN
Iq
IOUT_mA
IOUT_SC
2.3
—
6.0
4
V
Note 1
Input Quiescent
Current
—
1.6
µA
mA
mA
IL = 0 mA, VIN = VR + 1V
Maximum Output
Current
250
200
—
—
—
—
For VR 2.5V
For VR 2.5V
Output Short
Circuit Current
—
408
—
VIN = VR + 1V, VOUT = GND
Current (peak current) measured 10 ms
after short is applied.
Output Voltage
Regulation
VOUT
VR - 2.0% VR ± 0.4% VR + 2.0%
V
ppm/°C
%/V
%
Note 2
VR - 3.0%
V
R + 3.0%
VOUT Temperature
Coefficient
TCVOUT
—
50
—
Note 3
Line Regulation
VOUT
(VOUTXVIN
/
-1.0
-1.5
±0.75
±1.0
+1.0
+1.5
(VR + 1)V VIN 6V
)
Load Regulation
VOUT/VOUT
IL = 0.1 mA to 250 mA for VR 2.5V
IL = 0.1 mA to 200 mA for VR 2.5V
Note 4
Dropout Voltage
VR 2.5V
VIN - VOUT
VIN - VOUT
TR
—
—
—
178
150
500
350
350
—
mV
mV
µs
IL = 250 mA, (Note 1, Note 5)
Dropout Voltage
VR 2.5V
IL = 200 mA, (Note 1, Note 5)
Output Rise Time
10% VR to 90% VR VIN = 0V to 6V,
RL = 50 resistive
Note 1: The minimum VIN must meet two conditions: VIN 2.3V and VIN VR + 3.0% VDROPOUT
.
2: VR is the nominal regulator output voltage. For example: VR = 1.2V, 1.5V, 1.8V, 2.5V, 2.8V, 2.9V, 3.0V, 3.3V, 4.0V, 5.0V.
The input voltage VIN = VR + 1.0V; IOUT = 100 µA.
3: TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * Temperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT
.
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured
value with a VR + 1V differential applied.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e. TA, TJ, JA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 150°C can impact the device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the
ambient temperature is not significant.
2005-2018 Microchip Technology Inc.
DS20001826E-page 3
MCP1700
DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise specified, all limits are established for VIN = VR + 1V, ILOAD = 100 µA,
OUT = 1 µF (X7R), CIN = 1 µF (X7R), TA = +25°C.
Boldface type applies for junction temperatures, TJ (Note 6) of -40°C to +125°C.
C
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Output Noise
eN
—
—
3
—
—
µV/(Hz)1/2 IL = 100 mA, f = 1 kHz, COUT = 1 µF
Power Supply
Ripple Rejection
Ratio
PSRR
44
dB
°C
f = 100 Hz, COUT = 1 µF, IL = 50 mA,
V
V
INAC = 100 mV pk-pk, CIN = 0 µF,
R = 1.2V
Thermal
TSD
—
140
—
VIN = VR + 1V, IL = 100 µA
Shutdown
Protection
Note 1: The minimum VIN must meet two conditions: VIN 2.3V and VIN VR + 3.0% VDROPOUT
.
2: R is the nominal regulator output voltage. For example: VR = 1.2V, 1.5V, 1.8V, 2.5V, 2.8V, 2.9V, 3.0V, 3.3V, 4.0V, 5.0V.
V
The input voltage VIN = VR + 1.0V; IOUT = 100 µA.
3: TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * Temperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT
.
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured
value with a VR + 1V differential applied.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e. TA, TJ, JA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 150°C can impact the device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the
ambient temperature is not significant.
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise specified, all limits are established for VIN = VR + 1V, ILOAD = 100 µA,
COUT = 1 µF (X7R), CIN = 1 µF (X7R), TA = +25°C.
Boldface type applies for junction temperatures, TJ (Note 1) of -40°C to +125°C.
Parameters
Temperature Ranges
Sym.
Min.
Typ.
Max.
Units
Conditions
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistance
Thermal Resistance, 2x2 DFN
TA
TJ
TA
-40
-40
-65
+125
+125
+150
°C
°C
°C
EIA/JEDEC® JESD51-7
FR-4 4-Layer Board
JA
JC(Top)
JC(Bottom)
JT
—
—
—
—
—
—
—
—
—
—
—
91
286
28.57
8.95
212
139
11.95
6.15
104
74
—
—
—
—
—
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Thermal Resistance, SOT-23
Thermal Resistance, SOT-89
JA
EIA/JEDEC JESD51-7
FR-4 4-Layer Board
JC(Top)
JC(Bottom)
JT
JA
EIA/JEDEC JESD51-7
FR-4 4-Layer Board
JC(Top)
JT
30
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e. TA, TJ, JA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 150°C can impact the device reliability.
2005-2018 Microchip Technology Inc.
DS20001826E-page 4
MCP1700
TEMPERATURE SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise specified, all limits are established for VIN = VR + 1V, ILOAD = 100 µA,
OUT = 1 µF (X7R), CIN = 1 µF (X7R), TA = +25°C.
Boldface type applies for junction temperatures, TJ (Note 1) of -40°C to +125°C.
C
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Thermal Resistance, TO-92
JA
—
—
92
74
—
—
°C/W
°C/W
EIA/JEDEC JESD51-7
FR-4 4-Layer Board
JC(Top)
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e. TA, TJ, JA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 150°C can impact the device reliability.
2005-2018 Microchip Technology Inc.
DS20001826E-page 5
MCP1700
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated: VR = 1.8V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1V.
Note: Junction Temperature (T ) is approximated by soaking the device under test to an ambient temperature equal to the desired junction
J
temperature. The test time is small enough such that the rise in Junction temperature over the Ambient temperature is not significant.
1.208
1.206
1.204
1.202
1.200
1.198
1.194
1.192
1.190
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
VR = 1.2V
VR = 1.2V
IOUT = 0.1 mA
IOUT = 0 µA
TJ = +125°C
TJ = +25°C
TJ = +125°C
TJ = - 40°C
TJ = +25°C
TJ = - 40°C
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Input Voltage (V)
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Input Voltage (V)
FIGURE 2-1:
Input Quiescent Current vs.
FIGURE 2-4:
Output Voltage vs. Input
Input Voltage.
Voltage (V = 1.2V).
R
50
45
1.800
1.795
1.790
TJ = - 40°C
1.785
VR = 2.8V
VR = 1.8V
TJ = +125°C
IOUT = 0.1 mA
40
35
30
25
20
15
10
5
TJ = +25°C
TJ = - 40°C
TJ = +125°C
1.780
1.775
1.770
TJ = +25°C
0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Input Voltage (V)
0
25 50 75 100 125 150 175 200 225 250
Load Current (mA)
FIGURE 2-2:
Ground Current vs. Load
FIGURE 2-5:
Output Voltage vs. Input
Current.
Voltage (V = 1.8V).
R
2.800
2.798
2.796
2.794
2.792
2.790
2.50
2.25
2.00
1.75
1.50
1.25
VIN = VR + 1V
IOUT = 0 µA
VR = 2.8V
IOUT = 0.1 mA
TJ = +25°C
VR = 5.0V
TJ = - 40°C
VR = 1.2V
2.788
2.786
2.784
2.782
2.780
2.778
TJ = +125°C
VR = 2.8V
-40 -25 -10
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
3.3
3.6
3.9
4.2
4.5
4.8
5.1
5.4
5.7
6.0
Input Voltage (V)
FIGURE 2-3:
Quiescent Current vs.
FIGURE 2-6:
Output Voltage vs. Input
Junction Temperature.
Voltage (V = 2.8V).
R
2005-2018 Microchip Technology Inc.
DS20001826E-page 6
MCP1700
Note: Unless otherwise indicated: VR = 1.8V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1V.
TJ = +25°C
5.000
4.995
4.990
4.985
4.980
4.975
4.965
4.960
4.955
2.798
2.796
2.794
2.792
2.790
2.788
2.786
2.784
2.782
2.780
2.778
VR = 5.0V
TJ = +25°C
TJ = - 40°C
IOUT = 0.1 mA
VR = 2.8V
IN = VR + 1V
V
TJ = - 40°C
TJ = +125°C
TJ = +125°C
5.0
5.2
5.4
5.6
5.8
6.0
0
50
100
150
200
250
Load Current (mA)
Input Voltage (V)
FIGURE 2-7:
Output Voltage vs. Input
FIGURE 2-10:
Output Voltage vs. Load
Voltage (V = 5.0V).
Current (V = 2.8V).
R
R
1.21
1.20
1.19
1.18
1.16
1.15
5.000
VR = 1.2V
TJ = - 40°C
TJ = +25°C
TJ = +25°C
4.995
4.990
4.985
4.980
4.975
4.965
4.960
4.955
VIN = VR + 1V
TJ = - 40°C
VR = 5.0V
VIN = VR + 1V
J
TJ = +125°C
0
25
50
75 100 125 150 175 200
Load Current (mA)
0
50
100
150
200
250
Load Current (mA)
FIGURE 2-8:
Output Voltage vs. Load
FIGURE 2-11:
Output Voltage vs. Load
Current (V = 1.2V).
Current (V = 5.0V).
R
R
0.25
1.792
1.790
VR = 2.8V
0.20
0.15
0.10
0.05
0.00
TJ = +125°C
TJ = +25°C
TJ = +25°C
1.788
TJ = - 40°C
1.786
1.784
TJ = +125°C
TJ = - 40°C
1.782
VR = 1.8V
VIN = VR + 1V
1.780
1.778
0
25 50 75 100 125 150 175 200 225 250
Load Current (mA)
0
25
50
75 100 125 150 175 200
Load Current (mA)
FIGURE 2-9:
Current (V = 1.8V).
Output Voltage vs. Load
FIGURE 2-12:
Current (V = 2.8V).
Dropout Voltage vs. Load
R
R
2005-2018 Microchip Technology Inc.
DS20001826E-page 7
MCP1700
Note: Unless otherwise indicated: VR = 1.8V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1V.
0.16
10.00
VIN = 3.8V
VR = 2.8V
VR = 5.0V
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
IOUT = 50 mA
TJ = +125°C
TJ = - 40°C
VIN = 2.5V
VR = 1.2V
VIN = 2.8V
VR = 1.8V
1.00
0.10
0.01
TJ = +25°C
IOUT = 50 mA IOUT = 50 mA
0.01
0.1
1
10
100
1000
0
25 50 75 100 125 150 175 200 225 250
Load Current (mA)
Frequency (kHz)
FIGURE 2-13:
Dropout Voltage vs. Load
FIGURE 2-16:
Noise vs. Frequency.
Current (V = 5.0V).
R
V
= 2.2V
= 1.2V
IN
+20
+10
C
C
= 1µF Ceramic
IN
= 1µF Ceramic
0
OUT
-10
-20
-30
-40
-50
-60
-70
V
R
I = 100 mA
Load
Step
0.01
0.10
1.00
10.0
Frequency (KHz)
100
1000
FIGURE 2-14:
Power Supply Ripple
FIGURE 2-17:
Dynamic Load Step
Rejection vs. Frequency (V = 1.2V).
(V = 1.2V).
R
R
+20
+10
0
V
= 2.8V
IN
C
C
= 1µF Ceramic
OUT
IN
= 1µF Ceramic
-10
-20
-30
-40
-50
-60
V
= 1.8V
R
I = 100 mA
Load
Step
0.01
0.01
10.00
1ꢀꢁꢁ
Frequency (KHz)
100
1000
FIGURE 2-15:
Power Supply Ripple
FIGURE 2-18:
Dynamic Load Step
Rejection vs. Frequency (V = 2.8V).
(V = 1.8V).
R
R
2005-2018 Microchip Technology Inc.
DS20001826E-page 8
MCP1700
Note: Unless otherwise indicated: VR = 1.8V, COUT = 1 µF Ceramic (X7R), CIN = µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1V.
V
= 6V
= 5V
IN
C
C
= 1 µF Ceramic
IN
V
= 3.8V
= 2.8V
IN
= 22 µF (1 ESR)
OUT
V
R
C
C
= 1µF Ceramic
OUT
IN
= 1µF Ceramic
V
R
I = 100 mA
Load
Step
I
= 200 mA
OUT
Load Step
FIGURE 2-19:
Dynamic Load Step
FIGURE 2-22:
Dynamic Load Step
(V = 2.8V).
(V = 5.0V).
R
R
V
4.8V
= 3.8V to
V
= 2.8V
= 1.8V
IN
IN
C
C
= 1 µF Ceramic
C
= 1 µF Ceramic
IN
OUT
= 22 µF (1 ESR)
OUT
V
R
V
= 2.8V
OUT
R
I
= 200 mA
OUT
I
Load Step
100 mA
FIGURE 2-20:
Dynamic Load Step
FIGURE 2-23:
Dynamic Line Step
(V = 1.8V).
(V = 2.8V).
R
R
V
2.2V
= 0V to
V
= 3.8V
= 2.8V
IN
IN
C
R
= 1 µF Ceramic
OUT
C
C
= 1 µF Ceramic
IN
= 25
LOAD
= 22 µF (1 ESR)
OUT
V
R
V
R
= 1.2V
I
= 200 mA
OUT
Load Step
FIGURE 2-21:
Dynamic Load Step
FIGURE 2-24:
Start-up from V
IN
(V = 2.8V).
(V = 1.2V).
R
R
2005-2018 Microchip Technology Inc.
DS20001826E-page 9
MCP1700
Note: Unless otherwise indicated: VR = 1.8V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1V.
V
2.8V
= 0V to
IN
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
C
R
= 1 µF Ceramic
OUT
VR = 2.8V
IOUT = 0 to 250 mA
= 25
LOAD
VIN = 5.0V
VIN = 4.3V
V= 3.3V
V
= 1.8V
R
-40 -25 -10
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
FIGURE 2-25:
(V = 1.8V).
Start-up from V
FIGURE 2-28:
Junction Temperature (V = 2.8V).
Load Regulation vs.
IN
R
R
V
3.8V
= 0V to
IN
C
R
= 1 µF Ceramic
0.10
OUT
VR = 5.0V
= 25
LOAD
IOUT = 0 to 250 mA
0.05
0.00
VIN = 6.0V
VIN = 5.5V
-0.05
-0.10
-0.15
-0.20
V
= 2.8V
R
-40 -25 -10
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
FIGURE 2-26:
Start-up from V
FIGURE 2-29:
Load Regulation vs.
IN
(V = 2.8V).
Junction Temperature (V = 5.0V).
R
R
0.3
0.2
0.10
0.05
VR = 1.8V
OUT = 0 to 200 mA
I
VIN = 5.0V
0.1
0.0
0.00
VR = 2.8V
VIN = 3.5V
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
VR = 1.8V
-0.1
-0.2
-0.3
-0.4
VIN = 2.2V
VR = 1.2V
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
Junction Temperature (°C)
FIGURE 2-27:
Load Regulation vs.
FIGURE 2-30:
Line Regulation vs.
Junction Temperature (V = 1.8V).
Temperature (V = 1.2V, 1.8V, 2.8V).
R
R
2005-2018 Microchip Technology Inc.
DS20001826E-page 10
MCP1700
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Pin No.
SOT-23
Pin No.
SOT-89
Pin No.
TO-92
Pin No.
2x2 DFN-6
Name
Function
1
2
1
3
1
3
3
GND
VOUT
VIN
Ground Terminal
6
Regulated Voltage Output
Unregulated Supply Voltage
No Connect
3
2
2
1
2, 4, 5
7
—
—
—
—
—
—
NC
EP
Exposed Thermal Pad
3.1
Ground Terminal (GND)
3.4
No Connect (NC)
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current (1.6 µA typical) flows out of
this pin; there is no high current. The LDO output
regulation is referenced to this pin. Minimize voltage
drops between this pin and the negative side of the
load.
No internal connection. The pins marked NC are true
“No Connect” pins.
3.5
Exposed Thermal Pad (EP)
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the GND pin; they
must be connected to the same potential on the Printed
Circuit Board (PCB).
3.2
Regulated Output Voltage (VOUT)
Connect VOUT to the positive side of the load and the
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO VOUT pin as is practical.
The current flowing out of this pin is equal to the DC
load current.
3.3
Unregulated Input Voltage Pin
(VIN)
Connect VIN to the input unregulated source voltage.
As with all low dropout linear regulators, low source
impedance is necessary for the stable operation of the
LDO. The amount of capacitance required to ensure
low source impedance will depend on the proximity of
the input source capacitors or battery type. For most
applications, 1 µF of capacitance will ensure stable
operation of the LDO circuit. For applications that have
load currents below 100 mA, the input capacitance
requirement can be lowered. The type of capacitor
used can be ceramic, tantalum or aluminum
electrolytic. The low ESR characteristics of the ceramic
will yield better noise and PSRR performance at high
frequency.
2005-2018 Microchip Technology Inc.
DS20001826E-page 11
MCP1700
4.0
4.1
DETAILED DESCRIPTION
Output Regulation
4.3
Overtemperature
A portion of the LDO output voltage is fed back to the
internal error amplifier and compared with the precision
internal bandgap reference. The error amplifier output
will adjust the amount of current that flows through the
P-Channel pass transistor, thus regulating the output
voltage to the desired value. Any changes in input
voltage or output current will cause the error amplifier
to respond and adjust the output voltage to the target
voltage (refer to Figure 4-1).
The internal power dissipation within the LDO is a
function of input-to-output voltage differential and load
current. If the power dissipation within the LDO is
excessive, the internal junction temperature will rise
above the typical shutdown threshold of 140°C. At that
point, the LDO will shut down and begin to cool to the
typical turn-on junction temperature of 130°C. If the
power dissipation is low enough, the device will
continue to cool and operate normally. If the power
dissipation remains high, the thermal shutdown
protection circuitry will again turn off the LDO,
protecting it from catastrophic failure.
4.2
Overcurrent
The MCP1700 internal circuitry monitors the amount of
current flowing through the P-Channel pass transistor.
In the event of a short circuit or excessive output
current, the MCP1700 will turn off the P-Channel
device for a short period, after which the LDO will
attempt to restart. If the excessive current remains, the
cycle will repeat itself.
MCP1700
VOUT
VIN
Error Amplifier
+VIN
Voltage
Reference
-
+
Overcurrent
Overtemperature
GND
FIGURE 4-1:
Block Diagram.
2005-2018 Microchip Technology Inc.
DS20001826E-page 12
MCP1700
5.0
FUNCTIONAL DESCRIPTION
The MCP1700 CMOS low dropout linear regulator is
intended for applications that need the lowest current
consumption while maintaining output voltage
regulation. The operating continuous load of the
MCP1700 ranges from 0 mA to 250 mA (VR 2.5V).
The input operating voltage ranges from 2.3V to 6.0V,
making it capable of operating from two, three or four
alkaline cells or a single Li-Ion cell battery input.
5.1
Input
The input of the MCP1700 is connected to the source
of the P-Channel PMOS pass transistor. As with all
LDO circuits, a relatively low source impedance (10)
is needed to prevent the input impedance from causing
the LDO to become unstable. The size and type of the
required capacitor depend heavily on the input source
type (battery, power supply) and the output current
range of the application. For most applications (up to
100 mA), a 1 µF ceramic capacitor will be sufficient to
ensure circuit stability. Larger values can be used to
improve circuit AC performance.
5.2
Output
The maximum rated continuous output current for the
MCP1700 is 250 mA (VR 2.5V). For applications
where VR < 2.5V, the maximum output current is
200 mA.
A minimum output capacitance of 1.0 µF is required for
small signal stability in applications that have up to
250 mA output current capability. The capacitor type
can be ceramic, tantalum or aluminum electrolytic. The
ESR range on the output capacitor can range from 0
to 2.0.
5.3
Output Rise time
When powering up the internal reference output, the
typical output rise time of 500 µs is controlled to
prevent overshoot of the output voltage.
2005-2018 Microchip Technology Inc.
DS20001826E-page 13
MCP1700
The maximum continuous operating junction
temperature specified for the MCP1700 is +125°C. To
estimate the internal junction temperature of the
MCP1700, the total internal power dissipation is
multiplied by the thermal resistance from junction to
ambient (RJA). The thermal resistance from junction to
ambient for the SOT-23 pin package is estimated at
230°C/W.
6.0
6.1
APPLICATION CIRCUITS AND
ISSUES
Typical Application
The MCP1700 is most commonly used as a voltage
regulator. Its low quiescent current and low dropout
voltage make it ideal for many battery-powered
applications.
EQUATION 6-2:
MCP1700
TJMAX = PTOTAL RJA + TAMAX
VIN
GND
(2.3V to 3.2V)
VOUT
1.8V
TJ(MAX)
=
Maximum continuous junction
temperature
VIN
CIN
V
OUT
1 µF Ceramic
IOUT
150 mA
PTOTAL
=
=
Total power dissipation of the device
COUT
1 µF Ceramic
RJA
Thermal resistance from junction to
ambient
TA(MAX)
=
Maximum ambient temperature
FIGURE 6-1:
Typical Application Circuit.
The maximum power dissipation capability for a
package can be calculated given the junction-to-
ambient thermal resistance and the maximum ambient
temperature for the application. The following equation
can be used to determine the maximum internal power
dissipation of the package.
6.1.1
APPLICATION INPUT CONDITIONS
Package Type = SOT-23
Input Voltage Range = 2.3V to 3.2V
IN maximum = 3.2V
OUT typical = 1.8V
IOUT = 150 mA maximum
V
V
EQUATION 6-3:
TJMAX – TAMAX
PDMAX = ---------------------------------------------------
RJA
6.2
Power Calculations
6.2.1
POWER DISSIPATION
PD(MAX)
TJ(MAX)
=
=
Maximum power dissipation of the
device
The internal power dissipation of the MCP1700 is a
function of input voltage, output voltage and output
current. The power dissipation resulting from the
quiescent current draw is so low it is insignificant
(1.6 µA x VIN). The following equation can be used to
calculate the internal power dissipation of the LDO.
Maximum continuous junction
temperature
TA(MAX)
=
=
Maximum ambient temperature
RJA
Thermal resistance from junction to
ambient
EQUATION 6-1:
PLDO = VINMAX – VOUTMIN IOUTMAX
EQUATION 6-4:
TJRISE = PDMAX RJA
PLDO = Internal power dissipation of the
LDO Pass device
TJ(RISE) = Rise in the device’s junction
temperature over the ambient
temperature
VIN(MAX) = Maximum input voltage
VOUT(MIN) = Minimum output voltage of the
LDO
PTOTAL = Maximum power dissipation of the
device
RJA = Thermal resistance from junction to
ambient
2005-2018 Microchip Technology Inc.
DS20001826E-page 14
MCP1700
EQUATION 6-5:
TJ = TJRISE + TA
TJ(RISE) = PTOTAL x RJA
TJ(RISE) = 218.1 milliwatts x 212.0°C/Watt
TJ(RISE) = 46.2°C
TJ = Junction Temperature
Junction Temperature Estimate
TJ(RISE) = Rise in the device’s junction
temperature over the ambient
temperature
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below.
TA = Ambient temperature
6.3
Voltage Regulator
TJ = TJ(RISE) + TA(MAX)
Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
are calculated in the following example. The power
dissipation resulting from ground current is small
enough to be neglected.
TJ = 86.2°C
Maximum Package Power Dissipation at +40°C
Ambient Temperature
2x2 DFN-6 (91°C/Watt = JA
)
P
D(MAX) = (125°C - 40°C) / 91°C/W
D(MAX) = 934 milliwatts
6.3.1
POWER DISSIPATION EXAMPLE
P
Package
SOT-23 (212.0°C/Watt = JA
PD(MAX) = (125°C - 40°C) / 212°C/W
D(MAX) = 401 milliwatts
SOT-89 (104°C/Watt = JA
PD(MAX) = (125°C - 40°C) / 104°C/W
D(MAX) = 817 milliwatts
TO-92 (92°C/Watt = JA
PD(MAX) = (125°C - 40°C) / 92°C/W
D(MAX) = 924 milliwatts
)
Package Type = SOT-23
Input Voltage
P
VIN = 2.3V to 3.2V
)
LDO Output Voltages and Currents
V
OUT = 1.8V
P
I
OUT = 150 mA
)
Maximum Ambient Temperature
A(MAX) = +40°C
T
P
Internal Power Dissipation
Internal Power dissipation is the product of the LDO
output current times the voltage across the LDO
(VIN to VOUT).
PLDO(MAX) = (VIN(MAX) - VOUT(MIN)) x IOUT(MAX)
PLDO = (3.2V - (0.97 x 1.8V)) x 150 mA
PLDO = 218.1 milliwatts
Device Junction Temperature Rise
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction to ambient for the application. The thermal
resistance from junction to ambient (RJA) is derived
from an EIA/JEDEC® standard for measuring thermal
resistance for small surface mount packages. The EIA/
JEDEC specification is JESD51-7, “High Effective
Thermal Conductivity Test Board for Leaded Surface
Mount Packages”. The standard describes the test
method and board specifications for measuring the
thermal resistance from junction to ambient. The actual
thermal resistance for a particular application can vary
depending on many factors, such as copper area and
thickness. Refer to AN792, “A Method to Determine
How Much Power a SOT-23 Can Dissipate in an
Application” (DS00792), for more information regarding
this subject.
2005-2018 Microchip Technology Inc.
DS20001826E-page 15
MCP1700
6.4
Voltage Reference
The MCP1700 can be used not only as a regulator, but
also as a low quiescent current voltage reference. In
many microcontroller applications, the initial accuracy
of the reference can be calibrated using production test
equipment or by using a ratio measurement. When the
initial accuracy is calibrated, the thermal stability and
line regulation tolerance are the only errors introduced
by the MCP1700 LDO. The low cost, low quiescent
current and small ceramic output capacitor are all
advantages when using the MCP1700 as a voltage
reference.
Ratio Metric Reference
PIC®
Microcontroller
1 µA Bias
MCP1700
VIN
CIN
1 µF
VREF
VOUT
COUT
1 µF
GND
AD0
AD1
Bridge Sensor
FIGURE 6-2:
Using the MCP1700 as a
voltage reference.
6.5
Pulsed Load Applications
For some applications, there are pulsed load current
events that may exceed the specified 250 mA
maximum specification of the MCP1700. The internal
current limit of the MCP1700 will prevent high peak
load demands from causing non-recoverable damage.
The 250 mA rating is a maximum average continuous
rating. As long as the average current does not exceed
250 mA, pulsed higher load currents can be applied to
the MCP1700. The typical current limit for the
MCP1700 is 550 mA (TA + 25°C).
2005-2018 Microchip Technology Inc.
DS20001826E-page 16
MCP1700
7.0
7.1
PACKAGING INFORMATION
Package Marking Information
3-Pin SOT-23
Standard
Extended Temp
Symbol
CK
Voltage *
1.2
CKNN
CM
CP
CQ
GC
CR
CS
CU
1.8
2.5
2.8
2.9
3.0
3.3
5.0
3-Pin SOT-89
CUYYWW
NNN
* Custom output voltages available upon request.
Contact your local Microchip sales office for more
information.
Example
3-Pin TO-92
1700
XXXXXX
XXXXXX
XXXXXX
YWWNNN
1202E
e
3
TO^
322256
6-Lead DFN (2x2x0.9 mm)
Example
Part Number
Code
ABB
256
MCP1700T-1202E/MAY
MCP1700T-1802E/MAY
MCP1700T-2502E/MAY
MCP1700T-2802E/MAY
MCP1700T-3002E/MAY
MCP1700T-3302E/MAY
MCP1700T-5002E/MAY
ABB
ABC
ABD
ABF
ABE
AAZ
ABA
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
e
3
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
2005-2018 Microchip Technology Inc.
DS20001826E-page 17
MCP1700
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2005-2018 Microchip Technology Inc.
DS20001826E-page 18
MCP1700
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2005-2018 Microchip Technology Inc.
DS20001826E-page 19
MCP1700
3-Lead Plastic Small Outline Transistor (MB) - [SOT-89]
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2005-2018 Microchip Technology Inc.
DS20001826E-page 20
MCP1700
3-Lead Plastic Small Outline Transistor (MB) - [SOT-89]
Note: )RUꢀWKHꢀPRVWꢀFXUUHQWꢀSDFNDJHꢀGUDZLQJVꢇꢀSOHDVHꢀVHHꢀWKHꢀ0LFURFKLSꢀ3DFNDJLQJꢀ6SHFLILFDWLRQꢀORFDWHGꢀDW
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2005-2018 Microchip Technology Inc.
DS20001826E-page 21
MCP1700
3-Lead Plastic Small Outline Transistor (MB) - [SOT-89]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X1
X2
Y1
Y3
Y4
Y2
Y
G
X
SILK SCREEN
C
RECOMMENDED LAND PATTERN
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
C
1.50 (BSC)
0.900
X (3 PLACES)
X1
1.733
X2 (2 PLACES)
0.416
G (2 PLACES)
0.600
Y (2 PLACES)
1.300
Y1
Y2
Y3
Y4
3.125
1.475
0.825
1.000
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2029C
2005-2018 Microchip Technology Inc.
DS20001826E-page 22
MCP1700
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2005-2018 Microchip Technology Inc.
DS20001826E-page 23
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2005-2018 Microchip Technology Inc.
DS20001826E-page 24
MCP1700
2005-2018 Microchip Technology Inc.
DS20001826E-page 25
MCP1700
2005-2018 Microchip Technology Inc.
DS20001826E-page 26
MCP1700
APPENDIX A: REVISION HISTORY
Revision E (November 2018)
The following is the list of modifications:
• Added information related to the 2.9V option
throughout the document
• Updated Features.
• Updated DC Characteristics.
• Updated Temperature Specifications.
• Updated Power Dissipation example in
Section 6.3 “Voltage Regulator”.
• Updated Package Marking Information in
Section 7.0 “Packaging Information”.
• Updated Product Identification System.
Revision D (September 2016)
The following is the list of modifications:
• Updated DC Characteristics.
• Updated Product Identification System.
• Minor typographical changes.
Revision C (October 2013)
The following is the list of modifications:
• Added new package to the family (2x2 DFN-6)
and related information throughout the document.
• Updated thermal package resistance information
in Temperature Specifications.
• Updated Section 3.0 “Pin Descriptions”.
• Added package markings and drawings for the
2x2 DFN-6 package.
• Added information related to the 2.8V option
throughout the document.
• Updated Product Identification System.
• Minor typographical changes.
Revision B (February 2007)
• Updated Packaging Information.
• Corrected Product Identification System.
• Changed X5R to X7R in Notes to DC
Characteristics, Temperature Specifications, and
Section 2.0 “Typical Performance Curves”.
Revision A (November 2005)
• Original release of this document.
2005-2018 Microchip Technology Inc.
DS20001826E-page 27
MCP1700
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
MCP1700
X-
XXX
X
X
/XX
Examples:
2x2 DFN-6 Package:
Tape & Voltage Tolerance Temp. Package
Output
a)
b)
c)
d)
e)
f)
MCP1700T-1202E/MAY:
1.2V V
1.8V V
Reel
Range
OUT
OUT
OUT
MCP1700T-1802E/MAY:
MCP1700T-2502E/MAY:
MCP1700T-2802E/MAY:
MCP1700T-3002E/MAY:
MCP1700T-3302E/MAY:
MCP1700T-5002E/MAY:
2.5V V
2.8V V
OUT
3.0V V
3.3V V
Device:
MCP1700: Low Quiescent Current LDO
OUT
OUT
g)
5.0V V
OUT
Tape and Reel:
T:
Tape and Reel only applies to SOT-23 and SOT-89
devices
SOT-89 Package:
a)
b)
c)
d)
e)
f)
MCP1700T-1202E/MB:
1.2V V
1.8V V
2.5V V
2.8V V
3.0V V
3.3V V
5.0V V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MCP1700T-1802E/MB:
MCP1700T-2502E/MB:
MCP1700T-2802E/MB:
MCP1700T-3002E/MB:
MCP1700T-3302E/MB:
MCP1700T-5002E/MB:
Standard Output
Voltage: *
120 = 1.2V
180 = 1.8V
250 = 2.5V
280 = 2.8V
290 = 2.9V
300 = 3.0V
330 = 3.3V
500 = 5.0V
g)
TO-92 Package:
a)
b)
c)
d)
e)
f)
MCP1700-1202E/TO:
1.2V V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MCP1700-1802E/TO:
MCP1700-2502E/TO:
MCP1700-2802E/TO:
MCP1700-3002E/TO:
MCP1700-3302E/TO:
MCP1700-5002E/TO:
1.8V V
2.5V V
2.8V V
3.0V V
3.3V V
5.0V V
* Custom output voltages available upon request. Contact
your local Microchip sales office for more information
Tolerance:
2
=
=
2% (Standard)
g)
SOT-23 Package:
Temperature Range:
Package:
E
-40°C to +125°C (Extended)
a)
b)
c)
d)
e)
f)
MCP1700T-1202E/TT:
1.2V V
1.8V V
2.5V V
2.8V V
2.9V V
3.0V V
3.3V V
5.0V V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MCP1700T-1802E/TT:
MCP1700T-2502E/TT:
MCP1700T-2802E/TT:
MCP1700T-2902E/TT:
MCP1700T-3002E/TT:
MCP1700T-3302E/TT:
MCP1700T-5002E/TT:
MAY = Plastic Small Outline Transistor (DFN), 6-lead
MB
TO
TT
=
=
=
Plastic Small Outline Transistor (SOT-89), 3-lead
Plastic Small Outline Transistor (TO-92), 3-lead
Plastic Small Outline Transistor (SOT-23), 3-lead
g)
h)
2005-2018 Microchip Technology Inc.
DS20001826E-page 28
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo,
CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo,
JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo,
SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity,
JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation,
PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon,
QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O,
SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
QUALITYꢀMANAGEMENTꢀꢀSYSTEMꢀ
CERTIFIEDꢀBYꢀDNVꢀ
© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-3876-2
== ISO/TSꢀ16949ꢀ==ꢀ
2005-2018 Microchip Technology Inc.
DS20001826E-page 29
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
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Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
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Tel: 61-2-9868-6733
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Tel: 91-80-3090-4444
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Tel: 43-7242-2244-39
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08/15/18
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