MCP1754-3302E-DC_技术文档

MCP1754/MCP1754S

150 mA, 16V, High Performance LDO

Description

Features

• High PSRR: >70 dB @ 1 kHz typical

The MCP1754/MCP1754S is a family of CMOS low

dropout (LDO) voltage regulators that can deliver up to

150 mA of current while consuming only 56.0 µA of

quiescent current (typical). The input operating range is

specified from 3.6V to 16.0V, making it an ideal choice

for four to six primary cell battery-powered applications,

12V mobile applications and one- to three-cell Li-Ion-

powered applications.

• 56.0 µA Typical Quiescent Current

• Input Operating Voltage Range: 3.6V to16.0V

• 150 mA Output Current for All Output Voltages

• Low Drop Out Voltage, 300 mV Typical @ 150 mA

• 0.4% Typical Output Voltage Tolerance

• Standard Output Voltage Options (1.8V, 2.5V,

2.8V, 3.0V, 3.3V, 4.0V, 5.0V)

The MCP1754/MCP1754S is capable of delivering

150 mA with only 300 mV (typical) of input to output

voltage differential. The output voltage tolerance of the

MCP1754/MCP1754S is typically ±0.4% at +25°C and

±2.0% maximum over the operating junction

temperature range of -40°C to +125°C. Line regulation

is ±0.01% typical at +25°C.

• Output Voltage Range 1.8V to 5.5V in 0.1V

Increments (tighter increments also possible per

design)

• Output Voltage Tolerances of ±2.0% Over Entire

Temperature Range

• Stable with Minimum 1.0 µF Output Capacitance

• Power Good Output

Output voltages available for the MCP1754/MCP1754S

range from 1.8V to 5.5V. The LDO output is stable when

using only 1 µF of output capacitance. Ceramic,

tantalum or aluminum electrolytic capacitors may all be

used for input and output. Overcurrent limit and

overtemperature shutdown provide a robust solution for

any application.

• Shutdown Input

• True Current Foldback Protection

• Short-Circuit Protection

• Overtemperature Protection

Applications

The MCP1754/MCP1754S family introduces a true

current foldback feature. When the load impedance

decreases beyond the MCP1754/MCP1754S load

rating, the output current and voltage will gracefully

foldback towards 30 mA at about 0V output. When the

load impedance decreases and returns to the rated

load, the MCP1754/MCP1754S will follow the same

foldback curve as the device comes out of current

foldback.

• Battery-powered Devices

• Battery-powered Alarm Circuits

• Smoke Detectors

• CO²Detectors

• Pagers and Cellular Phones

• Smart Battery Packs

• PDAs

Package options for the MCP1754S include the SOT-

23A, SOT-89-3, SOT-223-3 and 2x3 DFN-8.

• Digital Cameras

• Microcontroller Power

• Consumer Products

• Battery-powered Data Loggers

Package options for the MCP1754 include the SOT-23-

5, SOT-223-5, and 2x3 DFN-8.

Related Literature

• AN765, “Using Microchip’s Micropower LDOs”,

DS00765, Microchip Technology Inc., 2007

• AN766, “Pin-Compatible CMOS Upgrades to

BiPolar LDOs”, DS00766,

Microchip Technology Inc., 2003

• AN792, “A Method to Determine How Much

Power a SOT23 Can Dissipate in an Application”,

DS00792, Microchip Technology Inc., 2001

DS22276A-page 1

MCP1754/MCP1754S

Package Types - MCP1754S

SOT-223-3

8-Lead 2X3 DFN(*)

3-Pin SOT-89

3-Pin SOT-23A

GND

V_IN

3

4

GND

2

V

IN

1

2

8

7

OUT

NC

EP

9

NC

3

4

6

5

GND

1

2

3

1

2

3

1

2

Tab will be connected to GND

V_IN

GNDV_OUT

GND V_OUT

(Note: The 3-lead SOT-223 (DB) is not a

standard package for output voltages

below 3.0V)

* Includes Exposed Thermal Pad (EP); see Table 3-2.

Package Types - MCP1754

SOT23-5

SOT-223-5

8-Lead 2X3 DFN(*)

4

3

5

1

3

V

IN

1

2

8

7

OUT

PWRGD

NC

EP

9

NC

3

4

6

5

GND

SHDN

2

1

2

3

4

5

Tab will be connected to GND

PIN FUNCTION

1

2

3

4

5

VIN

GND

/SHDN

PWRGD

VOUT

1

2

3

4

5

/SHDN

VIN

GND

VOUT

PWRGD

* Includes Exposed Thermal Pad (EP); see Table 3-1.

DS22276A-page 2

MCP1754/MCP1754S

Functional Block Diagrams

MCP1754S

V_OUT

V_IN

Error Amplifier

+V_IN

Voltage

Reference

-

+

Over Current

Over Temperature

GND

DS22276A-page 3

MCP1754/MCP1754S

PMOS

MCP1754

V_IN

V_OUT

Undervoltage

Lock Out

Sense

(UVLO)

I_SNS

C_f

R_f

SHDN

+

–

Driver w/limit

and SHDN

EA

Overtemperature

Sensing

SHDN

V_REF

V

IN

Reference

SHDN

Soft-Start

PWRGD

Comp

T_DELAY

GND

92% of V_REF

Typical Application Circuits

+

C_IN

12V

1 µF Ceramic

MCP1754S

V_OUT

5.0V

I_OUT

C_OUT

1 µF Ceramic

30 mA

DS22276A-page 4

MCP1754/MCP1754S

† Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied.

Exposure to maximum rating conditions for extended periods

may affect device reliability.

1.0

ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

Input Voltage, V ..................................................................+17.6V

IN

VIN, PWRGD, SHDN .....................(GND-0.3V) to (V +0.3V)

IN

VOUT .................................................. (GND-0.3V) to (+5.5V)

Internal Power Dissipation ............ Internally-Limited (Note 6)

Output Short Circuit Current .................................Continuous

Storage temperature .....................................-55°C to +150°C

Maximum Junction Temperature......................165°C(Note 7)

Operating Junction Temperature...................-40°C to +150°C

ESD protection on all pins..........≥ 4 kV HBM and ≥ 200V MM

AC/DC CHARACTERISTICS

Electrical Specifications: Unless otherwise specified, all limits are established for V = V + 1V, Note 1, I

= 1 mA, C

=

IN

R

LOAD

OUT

1 µF (X7R), C = 1 µF (X7R), T = 25°C, t

= 0.5V/µs, SHDN = V , PWRGD = 10K to V

.

IN

A

r(VIN)

IN

OUT

Boldface type applies for junction temperatures, T (Note 7) of -40°C to +125°C.

J

Parameters

Sym

Min

Typ

Max

Units

Conditions

Input / Output Characteristics

Input Operating Voltage

V_IN

3.6

1.8

—

16.0

5.5

V

Output Voltage Operating

Range

V_OUT-RANGE

Input Quiescent Current

I_q

—

56

90

5

µA

I_L= 0 mA

Input Quiescent Current

for SHDN mode

I_SHDN

0.1

SHDN = GND

Ground Current

I_GND

—

150

—

150

—

250

—

µA

mA

I_LOAD= 150 mA

Maximum Output Current

Output Soft Current Limit

I_{OUT_mA}

I_{OUT_CL}

250

—

V_IN= V_IN(MIN), V_OUT≥ 0.1V,

Current measured 10 ms after

load is applied

Output Pulse Current Limit

I_{OUT_CL}

—

250

—

mA

Pulse Duration < 100 ms, Duty

Cycle < 50%, V_OUT≥ 0.1V,

Note 6

Output Short Circuit

Foldback Current

I_{OUT_SC}

V_OVER

—

30

—

V_IN= V_IN(MIN), V_OUT= GND

Output Voltage Overshoot

on Startup

0.5

%V_OUTV_IN= 0 to 16V, I_LOAD= 150 mA

Note 1: The minimum V must meet two conditions: V ≥ 3.6V and V ≥ V + V

.

IN

R

DROPOUT(MAX)

2:

V

is the nominal regulator output voltage when the input voltage V = V

+ V

or Vi = 3.6V (which-

R

IN

Rated

DROPOUT(MAX) IN

ever is greater); I

= 1 mA.

- V

OUT

6

3: TCV

= (V

) *10 / (V * ΔTemperature), V

= highest voltage measured over the

OUT-HIGH

OUT

OUT-HIGH

OUT-LOW

R

temperature range. V

= lowest voltage measured over the temperature range.

OUT-LOW

4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output

voltage due to heating effects are determined using thermal regulation specification TCV

.

OUT

5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal V

measured value. The nominal VR measured value is obtained with

R

6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction to air (i.e., T , T , θ ). Exceeding the maximum allowable power

A

J

JA

dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained

junction temperatures above 150°C can impact the device reliability.

7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the

desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the

ambient temperature is not significant.

DS22276A-page 5

MCP1754/MCP1754S

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise specified, all limits are established for V = V + 1V, Note 1, I

= 1 mA, C

=

IN

R

LOAD

OUT

1 µF (X7R), C = 1 µF (X7R), T = 25°C, t

= 0.5V/µs, SHDN = V , PWRGD = 10K to V

.

IN

A

r(VIN)

IN

OUT

Boldface type applies for junction temperatures, T (Note 7) of -40°C to +125°C.

J

Parameters

Sym

Min

Typ

Max

Units

Conditions

Output Voltage Regulation

V_OUT

V_R-

V_R±0. V_R+2.0

V

Note 2

2.0%

2%

22

%

V_OUTTemperature

TCV_OUT

—

ppm/°C Note 3

Coefficient

Line Regulation

ΔV_OUT

/

-0.05

±0.01

+0.05

%/V

V_R+ 1V ≤ V_IN≤ 16V

(V_OUTXΔV_IN)

ΔV_OUT/V_OUT

V_DROPOUT

I_DO

Load Regulation

-1.1

—

-0.4

300

50

0

%

mV

µA

I_L= 1.0 mA to 150 mA, Note 4

I_L= 150 mA

Dropout Voltage (Note 5)

Dropout Current

500

85

—

V_IN= 0.95V_R, I_OUT= 0 mA

Undervoltage Lockout

UVLO

—

2.95

285

—

V

Rising V_IN

Falling V_IN

Undervoltage Lockout

Hysterisis

UVLO_HYS

mV

Shutdown Input

Logic High Input

Logic Low Input

V_SHDN-HIGH

V_SHDN-LOW

SHDN_ILK

2.4

—

V_IN(MAX)

V

0.0

0.8

Shutdown Input Leakage

Current

—

0.100

0.500

2.0

µA

SHDN = GND

SHDN = 16V

Power Good Output

PWRGD Input Voltage

Operating Range

V_{PWRGD_VIN}

V_{PWRGD_TH}

V_{PWRGD_HYS}

V_{PWRGD_L}

I_{PWRGD_L}

1.7

90

—

92

2.0

0.2

—

V_IN

94

V

I_SINK= 1 mA

PWRGD Threshold Volt-

age (Referenced to V_OUT

%V_OUTFalling Edge of V_OUT

%V_OUTRising Edge of V_OUT

)

PWRGD Threshold

Hysteresis

—

PWRGD Output Voltage

Low

—

0.6

—

V

I_{PWRGD_SINK}= 5.0 mA,

V_OUT= 0V

PWRGD Output Sink

Current

5.0

—

mA

nA

V_PWRGD≤ 0.4V

PWRGD Leakage Current

I_{PWRGD_LK}

40

700

V_PWRGDPullup = 10 KΩ to V_IN,

V_IN= 16V

Note 1: The minimum V must meet two conditions: V ≥ 3.6V and V ≥ V + V

.

IN

R

DROPOUT(MAX)

2:

V

is the nominal regulator output voltage when the input voltage V = V

+ V

or Vi = 3.6V (which-

R

IN

Rated

DROPOUT(MAX) IN

ever is greater); I

= 1 mA.

- V

OUT

6

3: TCV

= (V

) *10 / (V * ΔTemperature), V

= highest voltage measured over the

OUT-HIGH

OUT

OUT-HIGH

OUT-LOW

R

temperature range. V

= lowest voltage measured over the temperature range.

OUT-LOW

4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output

voltage due to heating effects are determined using thermal regulation specification TCV

.

OUT

5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal V

measured value. The nominal VR measured value is obtained with

R

6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction to air (i.e., T , T , θ ). Exceeding the maximum allowable power

A

J

JA

dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained

junction temperatures above 150°C can impact the device reliability.

7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the

desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the

ambient temperature is not significant.

DS22276A-page 6

MCP1754/MCP1754S

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise specified, all limits are established for V = V + 1V, Note 1, I

= 1 mA, C

=

IN

R

LOAD

OUT

1 µF (X7R), C = 1 µF (X7R), T = 25°C, t

= 0.5V/µs, SHDN = V , PWRGD = 10K to V

.

IN

A

r(VIN)

IN

OUT

Boldface type applies for junction temperatures, T (Note 7) of -40°C to +125°C.

J

Parameters

Sym

Min

Typ

Max

Units

Conditions

Rising Edge of V_OUT

_PULLUP= 10 kΩ

PWRGD Time Delay

T_PG

—

100

—

µs

,

R

Detect Threshold to

PWRGD Active Time

Delay

T_{VDET_PWRGD}

—

200

240

—

µs

Falling Edge of V_OUTafter

Transition from

V_OUT= V_{PRWRGD_TH}+ 50 mV,

to V_{PWRGD_TH}- 50 mV,

R_PULLUP= 10kΩ to V_IN

AC Performance

Output Delay From V_INTo

V_OUT= 90% V_REG

T_DELAY

V_IN= 0V to 16V, V_OUT= 90%

V_R,

t

_{r (VIN)}= 5V/µs,

C_OUT= 1 µF, SHDN = V_IN

Output Delay From V_INTo T_{DELAY_START}

_OUT> 0.1V

—

80

—

µs

V_IN= 0V to 16V, V_OUT≥ 0.1V,

t_{r (VIN)}= 5V/µs,

C_OUT= 1 µF, SHDN = V_IN

V

Output Delay From SHDN T_{DELAY_SHDN}

160

V_IN= 16V, V_OUT= 90% V_R,

C

_OUT= 1 µF, SHDN = GND to

V_IN

µV/(Hz)^1/2I_L= 50 mA, f = 1 kHz,

_OUT= 1 µF

Output Noise

e_N

—

3

—

C

Power Supply Ripple

Rejection Ratio

PSRR

72

dB

V_R= 5V, f = 1 kHz, I_L=

150 mA,

V_INAC= 1V pk-pk, C_IN= 0 µF,

V_IN= V_R+ 1.5V

Thermal Shutdown

Temperature

T_SD

—

150

10

—

°C

Note 6

Thermal Shutdown

Hysteresis

ΔTSD

Note 1: The minimum V must meet two conditions: V ≥ 3.6V and V ≥ V + V

.

IN

R

DROPOUT(MAX)

2:

V

is the nominal regulator output voltage when the input voltage V = V

+ V

or Vi = 3.6V (which-

R

IN

Rated

DROPOUT(MAX) IN

ever is greater); I

= 1 mA.

- V

OUT

6

3: TCV

= (V

) *10 / (V * ΔTemperature), V

= highest voltage measured over the

OUT-HIGH

OUT

OUT-HIGH

OUT-LOW

R

temperature range. V

= lowest voltage measured over the temperature range.

OUT-LOW

4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output

voltage due to heating effects are determined using thermal regulation specification TCV

.

OUT

5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal V

measured value. The nominal VR measured value is obtained with

R

6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction to air (i.e., T , T , θ ). Exceeding the maximum allowable power

A

J

JA

dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained

junction temperatures above 150°C can impact the device reliability.

7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the

desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the

ambient temperature is not significant.

DS22276A-page 7

MCP1754/MCP1754S

TEMPERATURE SPECIFICATIONS (Note 1)

Parameters

Sym

Min

Typ

Max

Units

Conditions

Temperature Ranges

Specified Temperature Range

Operating Temperature Range

Storage Temperature Range

Thermal Package Resistance

Thermal Resistance, SOT-223-3

T_A

T_J

T_A

-40

-55

+125

+150

°C

θ_JA

θ_JC

—

62

15

—

°C/W

Thermal Resistance, SOT-223-5

Thermal Resistance, SOT-23A-3

Thermal Resistance, SOT-89-3

Thermal Resistance, 2X3 DFN

θ_JA

θ_JC

—

62

15

—

θ_JA

θ_JC

—

336

110

—

θ_JA

θ_JC

—

153.3

100

—

θ_JA

θ_JC

—

93

26

—

Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction to air (i.e., T , T , θ ). Exceeding the maximum allowable power

A

J

JA

dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained

junction temperatures above 150°C can impact the device reliability.

DS22276A-page 8

MCP1754/MCP1754S

2.0 TYPICAL PERFORMANCE CURVES

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

Note:

Unless otherwise indicated V = 3.3V, C

= 1 µF Ceramic (X7R), C = 1 µF Ceramic (X7R), I = 1 mA, T = +25 °C,

OUT IN L A

R

V

= V + 1V or V = 3.6V (whichever is greater), SHDN = V , package = SOT223.

R IN IN

IN

Note:

Junction Temperature (T ) is approximated by soaking the device under test to an ambient temperature equal to the

J

desired Junction temperature. The test time is small enough such that the rise in Junction temperature over the ambient

temperature is not significant.

80

70

60

50

40

180

+90°C

160

140

120

100

80

+25°C

+130°C

0°C

V_OUT= 5.0V

-45°C

V_OUT= 3.3V

V_OUT= 1.8V

I_OUT= 0 µA

60

40

3

4

5

6

7

8

9

10 11 12 13 14 15 16

0

20

40

60

80 100 120 140 160

Input Voltage (V)

Load Current (mA)

FIGURE 2-1:

Quiescent Current vs. Input

FIGURE 2-4:

Ground Current vs. Load

Voltage.

Current.

70

80

V_OUT= 3.3V

_OUT= 0 µA

V_OUT= 5.0V

V_OUT= 1.8V

I

70

60

50

40

30

20

10

0

65

60

55

50

45

40

+130°C

+90°C

+25°C

0°C

V_OUT= 3.3V

-45°C

3

5

7

9

11

13

15

-45

-20

5

30

55

80

105 130

Input Voltage (V)

Junction Temperature (°C)

FIGURE 2-5:

Quiescent Current vs.

FIGURE 2-2:

Quiescent Current vs. Input

Junction Temperature.

Voltage.

80

70

60

50

40

30

20

10

V_OUT= 5.0V

+130°C +90°C

V_OUT= 5.0V

70 I_OUT= 0 µA

60

50

40

30

20

10

0

+25°C

0°C

+25°C

-45°C

0

1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0 17.0

Input Voltage (V)

18 16 14 12 10

8

6

4

2

0

Input Voltage (V)

FIGURE 2-6:

Voltage.

Quiescent Current vs. Input

FIGURE 2-3:

Voltage.

Quiescent Current vs. Input

DS22276A-page 9

MCP1754/MCP1754S

Note:

Unless otherwise indicated V = 3.3V, C

= 1 µF Ceramic (X7R), C = 1 µF Ceramic (X7R), I = 1 mA, T = +25 °C,

R

OUT

IN

L

A

V

= V + 1V or V = 3.6V (whichever is greater), SHDN = V , package = SOT223.

IN

R

IN

1.814

1.815

1.810

1.805

1.800

1.795

1.790

V_OUT= 1.8V

+90°C

25°C

+25°C

1.812

1.810

1.808

1.806

1.804

1.802

1.800

90°C

+130°C

0°C

130°C

-45°C

3

4

5

6

7

8

9

10 11 12 13 14 15 16

0

25

50

75

100

125

150

Input Voltage (V)

Load Current (mA)

FIGURE 2-7:

Output Voltage vs. Input

FIGURE 2-10:

Output Voltage vs. Load

Voltage.

Current.

3.310

3.308

3.306

3.310

3.305

V_OUT= 3.3V

+90°C

25°C

+130°C

90°C

3.304

3.302

3.300

3.298

3.296

3.294

3.292

3.290

3.300

3.295

3.290

3.285

3.280

+25°C

0°C

-45°C

0°C

-45°C

130°C

4

5

6

7

8

9

10 11 12 13 14 15 16

0

25

50

75

100

125

150

Input Voltage (V)

Load Current (mA)

FIGURE 2-8:

Output Voltage vs. Input

FIGURE 2-11:

Output Voltage vs. Load

Voltage.

Current.

5.020

5.016

5.020

5.015

V_OUT= 5.0V

130°C

5.010

5.005

5.000

4.995

4.990

4.985

4.980

90°C

+130°C

+90°C

5.012

5.008

5.004

5.000

25°C

+25°C

-45°C

0°C

6

7

8

9

10 11 12 13 14 15 16

Input Voltage (V)

0

25

50

75

100

125

150

Load Current (mA)

FIGURE 2-9:

Output Voltage vs. Input

FIGURE 2-12:

Output Voltage vs. Load

Voltage.

Current.

DS22276A-page 10

MCP1754/MCP1754S

Note:

Unless otherwise indicated V = 3.3V, C

= 1 µF Ceramic (X7R), C = 1 µF Ceramic (X7R), I = 1 mA, T = +25 °C,

OUT IN L A

R

V

= V + 1V or V = 3.6V (whichever is greater), SHDN = V , package = SOT223.

IN

R

IN

0.500

V_OUT= 3.3V

0.400

0.300

0.200

0.100

0.000

+25°C

0°C

+90°C

+130°C

-45°C

0

15 30 45 60 75 90 105 120 135 150

Load Current (mA)

FIGURE 2-13:

Dropout Voltage vs. Load

FIGURE 2-16:

Dynamic Line Response.

Current.

50

40

30

20

10

0

0.400

0.350

0.300

0.250

0.200

0.150

0.100

0.050

0.000

0°C

25°C

90°C

130°C

V_OUT= 3.3V

+25°C

+90°C

-45°C

+130°C

0°C

4

6

8

10

12

14

16

0

15 30 45 60 75 90 105 120 135 150

Load Current (mA)

Input Voltage (V)

FIGURE 2-17:

Input Voltage.

Short Circuit Current vs.

FIGURE 2-14:

Current.

Dropout Voltage vs. Load

FIGURE 2-15:

Dynamic Line Response.

DS22276A-page 11

MCP1754/MCP1754S

Note:

Unless otherwise indicated V = 3.3V, C

= 1 µF Ceramic (X7R), C = 1 µF Ceramic (X7R), I = 1 mA, T = +25 °C,

R

OUT

IN

L

A

V

= V + 1V or V = 3.6V (whichever is greater), SHDN = V , package = SOT223.

IN

R

IN

0.01

-0.50

-0.60

-0.70

-0.80

-0.90 V_IN= 16V

-1.00

-1.10

-1.20

-1.30

-1.40

V_OUT=1.8V

10 mA

V_IN= 3.6V

V_OUT=1.8V

0 mA

Iout = 1 mA to 150 mA

0.00

-0.01

-0.02

-0.03

V_IN= 5V

V_IN= 12V

50 mA

150 mA

V_IN= 10V

100 mA

-1.50

-45

-20

5

30

55

80

105 130

-45

-20

5

30

55

80

105 130

Temperature (°C)

FIGURE 2-18:

Load Regulation vs.

FIGURE 2-21:

Line Regulation vs.

Temperature.

0.00

0.01

0 mA

V_OUT=3.3V

Iout = 1 mA to 150 mA

V_IN= 4.3V

-0.20

-0.40

-0.60

-0.80

-1.00

0.00

V_IN= 5V

V_IN= 10V

10 mA

-0.01

50 mA

V_IN= 16V

V_IN= 12V

150 mA

-0.02

100 mA

105

-0.03

-45

-20

5

30

55

80

105 130

-45

-20

5

30

55

80

130

Temperature (°C)

FIGURE 2-19:

Load Regulation vs.

FIGURE 2-22:

Line Regulation vs.

Temperature.

0.00

0.01

0 mA

V_OUT=3.3V

V_OUT=5V

Iout = 1 mA to 150 mA

V_IN= 4.3V

-0.20

-0.40

-0.60

-0.80

-1.00

0.00

V_IN= 5V

V_IN= 10V

10 mA

-0.01

50 mA

V_IN= 16V

V_IN= 12V

150 mA

-0.02

-0.03

100 mA

105

-45

-20

5

30

55

80

105 130

-45

-20

5

30

55

80

130

Temperature (°C)

FIGURE 2-20:

Temperature.

Load Regulation vs.

FIGURE 2-23:

Temperature.

Line Regulation vs.

DS22276A-page 12

MCP1754/MCP1754S

Note:

Unless otherwise indicated V = 3.3V, C

= 1 µF Ceramic (X7R), C = 1 µF Ceramic (X7R), I = 1 mA, T = +25 °C,

R

OUT

IN

L

A

V

= V + 1V or V = 3.6V (whichever is greater), SHDN = V , package = SOT223.

R IN IN

IN

0

V_OUT=1.8V

V_IN=6.5V

-10

-20

I_OUT= 150 mA

V_INAC= 1 V p-p

C

_IN=0 μF

-30

-40

-50

-60

-70

-80

I_OUT= 10 mA

-90

-100

-110

0.01

0.1

1

10

100

1000

Frequency (KHz)

FIGURE 2-24:

Power Supply Ripple

FIGURE 2-27:

Power Up Timing.

Rejection vs. Frequency.

0

-10

V_OUT=5.0V

V_IN=6.5V

V_INAC= 1V p-p

-20

-30

-40

-50

-60

-70

-80

-90

-100

I_OUT= 160 mA

C

_IN=0 μF

I_OUT= 40 mA

0.01

0.1

1

10

100

1000

Frequency (KHz)

FIGURE 2-28:

Startup From Shutdown.

FIGURE 2-25:

Power Supply Ripple

Rejection vs. Frequency.

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0.00

10.000

I_OUT=50mA

V_OUT=5.0V, V_IN=6.0V

1.000

V_IN= 3.6V

V_OUT= 1.8V

V_OUT=3.3V, V_IN=4.3V

0.100

V_OUT=1.8V, V_IN=3.6V

Increasing Load

Decreasing Load

0.010

0.001

0.00 0.05 0.10 0.15 0.20 0.25 0.30

Output Current (A)

0.01

0.1

1

10

100

1000

Frequency (KHz)

FIGURE 2-29:

Foldback.

Short Circuit Current

FIGURE 2-26:

(3 lines, V_R= 1.2V, 3.3V, 5.0V).

Output Noise vs. Frequency

DS22276A-page 13

MCP1754/MCP1754S

Note:

Unless otherwise indicated V = 3.3V, C

= 1 µF Ceramic (X7R), C = 1 µF Ceramic (X7R), I = 1 mA, T = +25 °C,

OUT IN L A

R

V

= V + 1V or V = 3.6V (whichever is greater), SHDN = V , package = SOT223.

R IN IN

IN

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

V_IN= 4.3V

_OUT= 3.3V

V

Increasing Load

Decreasing Load

0.00 0.05 0.10 0.15 0.20 0.25 0.30

Output Current (A)

FIGURE 2-30:

Short Circuit Current

FIGURE 2-32:

Dynamic Load Response.

Foldback.

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

V_IN= 6V

V

_OUT= 5V

Increasing Load

Decreasing Load

0.00 0.05 0.10 0.15 0.20 0.25 0.30

Output Current (A)

FIGURE 2-33:

Dynamic Load Response.

FIGURE 2-31:

Short Circuit Current

Foldback.

DS22276A-page 14

MCP1754/MCP1754S

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1 and Table 3-2.

TABLE 3-1:

MCP1754 PIN FUNCTION TABLE

Pin No.

SOT223-5

Pin No.

SOT23-5

Pin No.

2X3 DFN

Name

Function

3

4

2

5

4

1

GND

V_OUT

V_IN

Ground Terminal

Regulated Voltage Output

Unregulated Supply Voltage

No Connection

2

1

8

—

5

—

4

3,6,7

2

NC

PWRGD

SHDN

GND

Open Drain Power Good Output

Shutdown Input

1

3

5

EP

—

EP

Exposed Pad, Connected to GND

TABLE 3-2:

MCP1754S PIN FUNCTION TABLE

Pin No.

SOT223-3

Pin No.

SOT23A

Pin No.

SOT89

Pin No.

2X3 DFN

Name

Function

Ground Terminal

2

3

1

2

3

4

GND

V_OUT

V_IN

1

8

Regulated Voltage Output

Unregulated Supply Voltage

No Connection

1

3

1

—

EP

—

EP

2,3,5,6,7

EP

NC

GND

Exposed Pad, Connected to GND

3.1

Ground Terminal (GND)

3.3

Unregulated Input Voltage (V )

IN

Regulator ground. Tie GND to the negative side of the

output and the negative side of the input capacitor.

Only the LDO bias current flows out of this pin; there is

no high current. The LDO output regulation is

referenced to this pin. Minimize voltage drops between

this pin and the negative side of the load.

Connect V_INto the input unregulated source voltage.

Like all low dropout linear regulators, low source

impedance is necessary for the stable operation of the

LDO. The amount of capacitance required to ensure

low source impedance will depend on the proximity of

the input source capacitors or battery type. For most

applications, 1 µF of capacitance will ensure stable

operation of the LDO circuit. The input capacitor should

have a capacitance value equal to or larger than the

output capacitor for performance applications. The

input capacitor will supply the load current during

transients and improve performance. For applications

that have load currents below 10 mA, the input

capacitance requirement can be lowered. The type of

capacitor used may be ceramic, tantalum or aluminum

electrolytic. The low ESR characteristics of the ceramic

will yield better noise and PSRR performance at high-

frequency.

3.2

Regulated Output Voltage (V

)

OUT

Connect V_OUTto the positive side of the load and the

positive terminal of the output capacitor. The positive

side of the output capacitor should be physically

located as close to the LDO V_OUTpin as is practical.

The current flowing out of this pin is equal to the DC

load current.

DS22276A-page 15

MCP1754/MCP1754S

3.4

Shutdown Input (SHDN)

3.6

Exposed Pad (EP)

The SHDN input is used to turn the LDO output voltage

on and off. When the SHDN input is at a logic-high

level, the LDO output voltage is enabled. When the

SHDN input is pulled to a logic-low level, the LDO

output voltage is disabled. When the SHDN input is

pulled low, the PWRGD output also goes low and the

LDO enters a low quiescent current shutdown state.

Some of the packages have an exposed metal pad on

the bottom of the package. The exposed metal pad

gives the device better thermal characteristics by

providing a good thermal path to either the PCB or heat

sink to remove heat from the device. The exposed pad

of the package is internally connected to GND.

3.5

Power Good Output (PWRGD)

For fixed applications, the PWRGD output is an open-

drain output used to indicate when the LDO output

voltage is within 92% (typically) of its nominal

regulation value. The PWRGD threshold has a typical

hysteresis value of 2%. The PWRGD output is delayed

by 100 µs (typical) from the time the LDO output is

within 92% + 2% (typical hysteresis) of the regulated

output value on power-up. This delay time is internally

fixed. The PWRGD pin may be pulled up to V_INor

V_OUT. Pulling up to V_OUTconserves power when the

device is in shutdown (/SHDN = 0V) mode.

DS22276A-page 16

MCP1754/MCP1754S

MCP1754S will supply higher load currents of up to

typically 250 mA. This allows for device usage in

applications that have pulsed load currents having an

average output current value of 150 mA or less.

4.0

DEVICE OVERVIEW

The MCP1754/MCP1754S is a 150 mA output current,

Low Dropout (LDO) voltage regulator. The low dropout

voltage of 300 mV typical at 150 mA of current makes

it ideal for battery-powered applications. The input

voltage range is 3.6V to 16.0V. Unlike other high output

current LDOs, the MCP1754/MCP1754S typically

draws only 150 µA of quiescent current for a 150 mA

load. The MCP1754 adds a shutdown control input pin

and a power good output pin. The output voltage

options are fixed.

Output overload conditions may also result in an over-

temperature shutdown of the device. If the junction

temperature rises above 150°C (typical), the LDO will

shut

down

the

output.

See

Section 4.8

“Overtemperature Protection” for more information

on overtemperature shutdown.

4.3

Output Capacitor

4.1

LDO Output Voltage

The MCP1754/MCP1754S requires a minimum output

capacitance of 1 µF for output voltage stability. Ceramic

capacitors are recommended because of their size,

cost and environmentally robust qualities.

The MCP1754/MCP1754S LDO has a fixed output

voltage. The output voltage range is 1.8V to 5.5V.

Aluminum-electrolytic and tantalum capacitors can be

used on the LDO output as well. The Equivalent Series

Resistance (ESR) of the electrolytic output capacitor

should be no greater than 2.0 Ω. The output capacitor

should be located as close to the LDO output as is

practical. Ceramic materials X7R and X5R have low

temperature coefficients and are well within the

acceptable ESR range required. A typical 1 µF X7R

0805 capacitor has an ESR of 50 milliohms.

4.2

Output Current and Current

Limiting

The MCP1754/MCP1754S LDO is tested and ensured

to supply a minimum of 150 mA of output current. The

MCP1754/MCP1754S has no minimum output load, so

the output load current can go to 0 mA and the LDO will

continue to regulate the output voltage to within

tolerance.

Larger LDO output capacitors can be used with the

The MCP1754/MCP1754S also incorporates a true

output current foldback. If the output load presents an

excessive load due to a low impedance short circuit

condition, the output current and voltage will fold back

towards 30 mA and 0V respectively.

MCP1754/MCP1754S

performance and power supply ripple rejection

performance. maximum of 1000 µF is

to

improve

dynamic

A

recommended. Aluminum-electrolytic capacitors are

not recommended for low temperature applications of

< -25°C.

The output voltage and current will resume normal

levels when the excessive load is removed. If the

overload condition is a soft overload, the MCP1754/

Typical Current FoldBack - 5V Output

Increasing Load Decreasing Load

6

5

4

3

2

1

0

0.000

0.050

0.100

0.150

0.200

0.250

I_OUT(A)

FIGURE 4-1:

Typical Current Foldback.

DS22276A-page 17

MCP1754/MCP1754S

out of regulation. The timing diagram for the power

good output when using the shutdown input is shown in

Figure 4-3.

4.4

Input Capacitor

Low input source impedance is necessary for the LDO

output to operate properly. When operating from

batteries, or in applications with long lead length

(> 10 inches) between the input source and the LDO,

some input capacitance is recommended. A minimum

of 1.0 µF to 4.7 µF is recommended for most

applications.

The power good output is an open-drain output that can

be pulled up to any voltage that is equal to or less than

the LDO input voltage. This output is capable of sinking

1.2 mA minimum (V_PWRGD< 0.4V maximum).

For applications that have output step load

requirements, the input capacitance of the LDO is very

important. The input capacitance provides the LDO

with a good local low-impedance source to pull the

transient currents from in order to respond quickly to

the output load step. For good step response

performance, the input capacitor should be of

equivalent or higher value than the output capacitor.

The capacitor should be placed as close to the input of

the LDO as is practical. Larger input capacitors will also

help reduce any high-frequency noise on the input and

output of the LDO and reduce the effects of any

inductance that exists between the input source

voltage and the input capacitance of the LDO.

VPWRGD_TH

VOUT

TPG

VOH

TVDET_PWRGD

PWRGD

VOL

FIGURE 4-2:

Power Good Timing.

4.5

Power Good Output (PWRGD)

The open drain PWRGD output is used to indicate

when the output voltage of the LDO is within 94%

V

IN

T

DELAY_SHDN

(typical

value,

see

Section 1.0

“Electrical

Characteristics” for minimum and maximum

specifications) of its nominal regulation value.

As the output voltage of the LDO rises, the open drain

PWRGD output will actively be held low until the output

voltage has exceeded the power good threshold plus

the hysteresis value. Once this threshold has been

exceeded, the power good time delay is started (shown

as T_PGin the Electrical Characteristics table). The

power good time delay is fixed at 100 µs (typical). After

the time delay period, the PWRGD open drain output

becomes inactive and may be pulled high by an

external pullup resistor, indicating that the output

voltage is stable and within regulation limits. The power

good output is typically pulled up to V_INor V_OUT. Pulling

the signal up to V_OUTconserves power during

shutdown mode.

T

PG

SHDN

V

OUT

PWRGD

FIGURE 4-3:

Shutdown.

Power Good Timing from

If the output voltage of the LDO falls below the power

good threshold, the power good output will transition

low. The power good circuitry has a 200 µs delay when

detecting a falling output voltage, which helps to

increase noise immunity of the power good output and

avoid false triggering of the power good output during

fast output transients. See Figure 4-2 for power good

timing characteristics.

4.6

Shutdown Input (SHDN)

The SHDN input is an active-low input signal that turns

the LDO on and off. The SHDN threshold is a fixed

voltage level. The minimum value of this shutdown

threshold required to turn the output ON is 2.4V. The

maximum value required to turn the output OFF is 0.8V.

When the LDO is put into Shutdown mode using the

SHDN input, the power good output is pulled low

immediately, indicating that the output voltage will be

DS22276A-page 18

MCP1754/MCP1754S

The SHDN input will ignore low-going pulses (pulses

meant to shut down the LDO) that are up to 400 ns in

pulse width. If the shutdown input is pulled low for more

than 400 ns, the LDO will enter Shutdown mode. This

small bit of filtering helps to reject any system noise

spikes on the shutdown input signal.

For high-current applications, voltage drops across the

PCB traces must be taken into account. The trace

resistances can cause significant voltage drops

between the input voltage source and the LDO. For

applications with input voltages near 3.0V, these PCB

trace voltage drops can sometimes lower the input

voltage enough to trigger

undervoltage lockout.

a shutdown due to

On the rising edge of the SHDN input, the shutdown

circuitry has a 30 µs delay before allowing the LDO

output to turn on. This delay helps to reject any false

turn-on signals or noise on the SHDN input signal. After

the 30 µs delay, the LDO output enters its soft-start

period as it rises from 0V to its final regulation value. If

the SHDN input signal is pulled low during the 30 µs

delay period, the timer will be reset and the delay time

will start over again on the next rising edge of the

SHDN input. The total time from the SHDN input going

high (turn-on) to the LDO output being in regulation is

typically 100 µs. See Figure 4-4 for a timing diagram of

the SHDN input.

4.8

Overtemperature Protection

The MCP1754/MCP1754S LDO has temperature-

sensing circuitry to prevent the junction temperature

from exceeding approximately 150°C. If the LDO

junction temperature does reach 150°C, the LDO

output will be turned off until the junction temperature

cools to approximately 137°C, at which point the LDO

output will automatically resume normal operation. If

the internal power dissipation continues to be

excessive, the device will again shut off. The junction

temperature of the die is a function of power

dissipation, ambient temperature and package thermal

resistance. See Section 5.0 “Application Circuits &

Issues” for more information on LDO power

dissipation and junction temperature.

T_{DELAY_SHDN}

400 ns (typ)

70 µs

30 µs

SHDN

V_OUT

FIGURE 4-4:

Shutdown Input Timing

Diagram.

4.7

Dropout Voltage and Undervoltage

Lockout

Dropout voltage is defined as the input-to-output

voltage differential at which the output voltage drops

2% below the nominal value that was measured with a

V_R

+ 1.0V differential applied. The MCP1754/

MCP1754S LDO has a very low dropout voltage

specification of 300 mV (typical) at 150 mA of output

current. See Section 1.0 “Electrical Characteristics”

for maximum dropout voltage specifications.

The MCP1754/MCP1754S LDO operates across an

input voltage range of 3.6V to 16.0V and incorporates

input Undervoltage Lockout (UVLO) circuitry that keeps

the LDO output voltage off until the input voltage

reaches a minimum of 2.95V (typical) on the rising

edge of the input voltage. As the input voltage falls, the

LDO output will remain on until the input voltage level

reaches 2.70V (typical).

DS22276A-page 19

MCP1754/MCP1754S

NOTES:

DS22276A-page 20

MCP1754/MCP1754S

EQUATION

5.0

5.1

APPLICATION CIRCUITS &

ISSUES

T_J(MAX)= P_TOTAL× Rθ_JA+ T_AMAX

T_J(MAX)= Maximum continuous junction

Typical Application

temperature

The MCP1754/MCP1754S is most commonly used as

a voltage regulator. It’s low quiescent current and low

dropout voltage make it ideal for many battery-powered

applications.

P_TOTAL= Total device power dissipation

Rθ_JA= Thermal resistance from junction to ambient

T_AMAX= Maximum ambient temperature

MCP1754S

The maximum power dissipation capability for a

package can be calculated given the junction-to-

ambient thermal resistance and the maximum ambient

temperature for the application. The following equation

can be used to determine the package maximum

internal power dissipation.

V_IN

3.6V to 4.8V

GND

V_OUT

1.8V

V

IN

C_IN

V

OUT

1 µF Ceramic

I_OUT

50 mA

C_OUT

1 µF Ceramic

EQUATION

FIGURE 5-1: Typical Application Circuit.

(T_J(MAX)– T_A(MAX)

)

P_D(MAX)= ---------------------------------------------------

Rθ_JA

5.1.1

APPLICATION INPUT CONDITIONS

P_D(MAX)= Maximum device power dissipation

Package Type = SOT23

Input Voltage Range = 3.6V to 4.8V

V_INmaximum = 4.8V

T_J(MAX)= Maximum continuous junction

temperature

T_A(MAX)= Maximum ambient temperature

V_OUTtypical = 1.8V

Rθ_JA= Thermal resistance from junction to ambient

I_OUT= 50 mA maximum

5.2

Power Calculations

EQUATION

5.2.1

POWER DISSIPATION

T_J(RISE)= P_D(MAX)× Rθ_JA

The internal power dissipation of the MCP1754/

MCP1754S is a function of input voltage, output

voltage and output current. The power dissipation, as

a result of the quiescent current draw, is so low, it is

insignificant (56.0 µA x V_IN). The following equation

can be used to calculate the internal power dissipation

of the LDO.

T_J(RISE)= Rise in device junction temperature over

the ambient temperature

P_D(MAX)= Maximum device power dissipation

Rθ_JA= Thermal resistance from junction to ambient

EQUATION

T_J= T_J(RISE)+ T_A

T_J= Junction Temperature

P_LDO= (V_IN(MAX))– V_OUT(MIN)) × I_{OUT(MAX ))}

T_J(RISE)= Rise in device junction temperature over

the ambient temperature

P_LDO= LDO Pass device internal power dissipation

V_IN(MAX)= Maximum input voltage

T_A= Ambient temperature

V_OUT(MIN)= LDO minimum output voltage

The maximum continuous operating junction

temperature specified for the MCP1754/MCP1754S is

+150°C. To estimate the internal junction temperature

of the MCP1754/MCP1754S, the total internal power

dissipation is multiplied by the thermal resistance from

junction to ambient (Rθ_JA). The thermal resistance from

junction to ambient for the SOT23A pin package is

estimated at 336 °C/W.

DS22276A-page 21

MCP1754/MCP1754S

5.3

Voltage Regulator

T_J= T_JRISE+ T_A(MAX)

T_J= 91.3°C

Internal power dissipation, junction temperature rise,

junction temperature and maximum power dissipation

are calculated in the following example. The power

dissipation, as a result of ground current, is small

enough to be neglected.

Maximum Package Power Dissipation Examples at

+40°C Ambient Temperature

SOT23 (336.0°C/Watt = Rθ_JA

)

P

_D(MAX)= (125°C - 40°C) / 336°C/W

5.3.1

POWER DISSIPATION EXAMPLE

P_D(MAX)= 253 milliwatts

Package

SOT89 (153.3°C/Watt = Rθ_JA

)

Package Type = SOT23

Input Voltage

P

_D(MAX)= (125°C - 40°C) / 153.3°C/W

P_D(MAX)= 554 milliwatts

V_IN= 3.6V to 4.8V

LDO Output Voltages and Currents

5.4

Voltage Reference

V_OUT= 1.8V

The MCP1754/MCP1754S can be used not only as a

regulator, but also as a low quiescent current voltage

reference. In many microcontroller applications, the

initial accuracy of the reference can be calibrated using

I

_OUT= 50 mA

Maximum Ambient Temperature

T_A(MAX)= +40°C

production test equipment or by using

a ratio

Internal Power Dissipation

measurement. When the initial accuracy is calibrated,

the thermal stability and line regulation tolerance are

the only errors introduced by the MCP1754/

MCP1754S LDO. The low cost, low quiescent current

and small ceramic output capacitor are all advantages

when using the MCP1754/MCP1754S as a voltage

reference.

Internal Power dissipation is the product of the LDO

output current times the voltage across the LDO

(V_INto V_OUT).

P_LDO(MAX)= (V_IN(MAX)- V_OUT(MIN)) x I_OUT(MAX)

P_LDO= (4.8V - (0.97 x 1.8V)) x 50 mA

P_LDO= 152.7 milli-Watts

Ratio Metric Reference

Device Junction Temperature Rise

®

MCP1754S

PICmicro

microcontroller

The internal junction temperature rise is a function of

internal power dissipation and the thermal resistance

from junction to ambient for the application. The thermal

resistance from junction to ambient (Rθ_JA) is derived

from an EIA/JEDEC standard for measuring thermal

resistance for small surface mount packages. The EIA/

JEDEC specification is JESD51-7, “High Effective

Thermal Conductivity Test Board for Leaded Surface

Mount Packages”. The standard describes the test

method and board specifications for measuring the

thermal resistance from junction to ambient. The actual

thermal resistance for a particular application can vary

depending on many factors, such as copper area and

thickness. Refer to AN792, “A Method to Determine

How Much Power a SOT23 Can Dissipate in an

Application”, (DS00792), for more information regarding

this subject.

56 µA Bias

V

IN

V

C

V

IN

REF

OUT

C

1 µF

OUT

GND

1 µF

ADO

AD1

Bridge Sensor

FIGURE 5-2: Using the MCP1754/MCP1754S

as a Voltage Reference.

5.5

Pulsed Load Applications

For some applications, there are pulsed load current

events that may exceed the specified 150 mA

maximum specification of the MCP1754/MCP1754S.

The internal current limit of the MCP1754/MCP1754S

will prevent high peak load demands from causing non-

recoverable damage. The 150 mA rating is a maximum

average continuous rating. As long as the average

current does not exceed 150 mA, pulsed higher load

currents can be applied to the MCP1754/MCP1754S.

The typical current limit for the MCP1754/MCP1754S is

250 mA (T_A+25°C).

T_J(RISE)= P_TOTALx Rq_JA

T_JRISE= 152.7 milliwatts x 336.0°C/Watt

T_JRISE= 51.3°C

Junction Temperature Estimate

To estimate the internal junction temperature, the

calculated temperature rise is added to the ambient or

offset temperature. For this example, the worst-case

junction temperature is estimated below.

DS22276A-page 22

MCP1754/MCP1754S

6.0

6.1

PACKAGING INFORMATION

Package Marking Information

Example:

3-Lead SOT-223 (MCP1754S)

Part Number

Code

1754S18

XXXXXXX

MCP1754ST-3302E/DB

MCP1754ST-5002E/DB

1754S33

1754S50

XXXYYWW

NNN

EDB1130

256

3-Lead SOT-23A (MCP1754S)

Example:

Part Number

Code

JC25

MCP1754ST-1802E/CB JCNN

MCP1754ST-3302E/CB JDNN

MCP1754ST-5002E/CB JENN

XXNN

3-Lead SOT-89 (MCP1754S)

Example:

Part Number

Code

MT1130

256

MCP1754ST-1802E/MB MTYYWW

MCP1754ST-3302E/MB MUYYWW

MCP1754ST-5002E/MB MVYYWW

NNN

Legend: XX...X Customer-specific information

Y

YY

WW

NNN

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

e

3

Pb-free JEDEC designator for Matte Tin (Sn)

*

This package is Pb-free. The Pb-free JEDEC designator (

can be found on the outer packaging for this package.

)

e3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available characters

for customer-specific information.

DS22276A-page 23

MCP1754/MCP1754S

Package Marking Information (Continued)

Example:

YQ25

5-Lead SOT-23 (2x3) (MCP1754)

Part Number

Code

MCP1754T-1802E/OT

MCP1754T-3302E/OT

MCP1754T-5002E/OT

YQNN

YRNN

YSNN

XXNN

5-Lead SOT-223 (MCP1754)

Example:

Part Number

Code

175418

XXXXXXX

XXXYYWW

MCP1754T-1802E/DC

MCP1754T-3302E/DC

MCP1754T-5002E/DC

175418

175433

175450

EDC1130

256

NNN

Example:

8-Lead DFN (2x3) (MCP1754)

Part Number

Code

Part Number

Code

MCP1754-1802E/MC AKG MCP1754S-1802E/MC ALN

MCP1754-3302E/MC AKH MCP1754S-3302E/MC ALM

MCP1754-5002E/MC AKJ MCP1754S-5002E/MC ALL

MCP1754T-1802E/MC AKG MCP1754ST-1802E/MC ALN

MCP1754T-3302E/MC AKH MCP1754ST-3302E/MC ALM

MCP1754T-5002E/MC AKJ MCP1754ST-5002E/MC ALL

AKJ

130

25

Legend: XX...X Customer-specific information

Y

YY

WW

NNN

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

e

3

Pb-free JEDEC designator for Matte Tin (Sn)

*

This package is Pb-free. The Pb-free JEDEC designator (

can be found on the outer packaging for this package.

)

e3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available characters

for customer-specific information.

DS22276A-page 24

MCP1754/MCP1754S

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DS22276A-page 25

MCP1754/MCP1754S

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DS22276A-page 26

MCP1754/MCP1754S

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DS22276A-page 27

MCP1754/MCP1754S

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS22276A-page 28

MCP1754/MCP1754S

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)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ

ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢞꢐꢑꢜ)

DS22276A-page 29

MCP1754/MCP1754S

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS22276A-page 30

MCP1754/MCP1754S

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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

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ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢞꢐꢜꢀ)

DS22276A-page 31

MCP1754/MCP1754S

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS22276A-page 32

MCP1754/MCP1754S

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DS22276A-page 33

MCP1754/MCP1754S

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DS22276A-page 34

MCP1754/MCP1754S

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DS22276A-page 35

MCP1754/MCP1754S

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS22276A-page 36

MCP1754/MCP1754S

APPENDIX A: REVISION HISTORY

Revision A (August 2011)

• Original data sheet for the MCP1754/MCP1754S

family of devices.

DS22276A-page 37

MCP1754/MCP1754S

NOTES:

DS22276A-page 38

MCP1754/MCP1754S

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Examples:

PART NO.

X-

XX

X

X/

XX

a) MCP1754T-1802E/DC: 1.8V, 5LD SOT-223,

Tape and Reel

Device

Tape

Output Feature Tolerance Temp. Package

Code

b) MCP1754T-3302E/DC: 3.3V, 5LD SOT-223,

Tape and Reel

and Reel Voltage

c) MCP1754T-5002E/DC: 5.0V, 5LD SOT-223,

Tape and Reel

MCP1754:

150 mA, 16V High Performance LDO

MCP1754T:

150 mA, 16V High Performance LDO

(Tape and Reel) (SOT)

150 mA, 16V High Performance LDO

(Tape and Reel) (SOT)

a) MCP1754T-1802E/CB: 1.8V, 3LD SOT-23A,

Tape and Reel

b) MCP1754T-3302E/CB: 3.3V, 3LD SOT-23A,

Tape and Reel

c) MCP1754T-5002E/CB: 5.0V, 3LD SOT-23A,

Tape and Reel

MCP1754S:

MCP1754ST:

Tape and Reel:

Output Voltage*:

T

=

Tape and Reel

a) MCP1754T-1802E/MB: 1.8V, 3LD SOT-89,

Tape and Reel

b) MCP1754T-3302E/MB: 3.3V, 3LD SOT-89,

Tape and Reel

c) MCP1754T-5002E/MB: 5.0V, 3LD SOT-89,

Tape and Reel

18

33

50

=

1.8V “Standard”

3.3V “Standard”

5.0V “Standard”

a) MCP1754T-1802E/OT: 1.8V, 5LD SOT-23,

Tape and Reel

*Contact factory for other voltage options

b) MCP1754T-3302E/OT: 3.3V, 5LD SOT-23,

Tape and Reel

c) MCP1754T-5002E/OT: 5.0V, 5LD SOT-23,

Tape and Reel

Extra Feature Code:

Tolerance:

0

2

E

=

Fixed

2% (Standard)

-40°C to +125°C

a) MCP1754T-1802E/MC: 1.8V, 8LD DFN,

Tape and Reel

b) MCP1754T-3302E/MC: 3.3V, 8LD DFN,

Tape and Reel

c) MCP1754T-5002E/MC: 5.0V, 8LD DFN,

Tape and Reel

Temperature Range:

Package:

*DB = Plastic Small Outline, (SOT-223), 3-lead

CB = Plastic Small Outline, (SOT-23A), 3-lead

MB = Plastic Small Outline, (SOT-89), 3-lead

DC = Plastic Small Outline, (SOT223), 5-lead

OT = Plastic Small Outline, (SOT-23), 5-lead

MC = Plastic Dual Flat, No Lead, (2x3 DFN), 8-lead

a) MCP1754ST-1802E/MC: 1.8V, 8LD DFN,

Tape and Reel

b) MCP1754ST-3302E/MC: 3.3V, 8LD DFN,

Tape and Reel

c) MCP1754ST-5002E/MC: 5.0V, 8LD DFN,

Tape and Reel

*Note: The3-lead SOT-223(DB) isnot astandard package

for output voltages below 3.0V

a) MCP1754ST-3302E/DB: 3.3V, 3LD SOT-223,

Tape and Reel

b) MCP1754ST-5002E/DB: 5.0V, 3LD SOT-223,

Tape and Reel

DS22276A-page 39

MCP1754/MCP1754S

NOTES:

DS22276A-page 40

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,

32

PIC logo, rfPIC and UNI/O are registered trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, chipKIT,

chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,

dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,

FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,

Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,

MPLINK, mTouch, Omniscient Code Generation, PICC,

PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,

rfLAB, Select Mode, Total Endurance, TSHARC,

UniWinDriver, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

ISBN: 978-1-61341-570-2

Microchip received ISO/TS-16949:2009 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC^®MCUs and dsPIC^®DSCs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS22276A-page 41

Worldwide Sales and Service

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://www.microchip.com/

support

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4123

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

Web Address:

www.microchip.com

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

China - Beijing

Tel: 86-10-8569-7000

Fax: 86-10-8528-2104

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

Boston

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Korea - Seoul

China - Chongqing

Tel: 86-23-8980-9588

Fax: 86-23-8980-9500

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

China - Hangzhou

Tel: 86-571-2819-3187

Fax: 86-571-2819-3189

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Cleveland

Independence, OH

Tel: 216-447-0464

Fax: 216-447-0643

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Detroit

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

Taiwan - Hsin Chu

Tel: 886-3-5778-366

Fax: 886-3-5770-955

Indianapolis

Noblesville, IN

Tel: 317-773-8323

Fax: 317-773-5453

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-330-9305

Los Angeles

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

Santa Clara

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

Toronto

Mississauga, Ontario,

Canada

China - Xiamen

Tel: 905-673-0699

Fax: 905-673-6509

Tel: 86-592-2388138

Fax: 86-592-2388130

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

08/02/11

DS22276A-page 42


型号：	MCP1754-3302E-DC
厂家：	MICROCHIP
描述：	150 mA, 16V, High Performance LDO 150毫安， 16V ，高性能LDO
文件：	总42页 (文件大小：1674K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MCP1754-3302E-DC [MICROCHIP]

相关型号：

MCP1754-3302E-MB

MCP1754-3302E-MC

MCP1754-3302E-OR

MCP1754-5002E-CB

MCP1754-5002E-DB

MCP1754-5002E-DC

MCP1754-5002E-MB

MCP1754-5002E-MC

MCP1754-5002E-OR

MCP1754-5002E/MC

MCP1754S

MCP1754S-1802E-CB