MCP1755T [MICROCHIP]

300 mA, 16V, High-Performance LDO;
MCP1755T
型号: MCP1755T
厂家: MICROCHIP    MICROCHIP
描述:

300 mA, 16V, High-Performance LDO

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中文:  中文翻译
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MCP1755/1755S  
300 mA, 16V, High-Performance LDO  
Features:  
Description:  
• High PSRR: >70 dB @ 1 kHz, typical  
The MCP1755/1755S is a family of CMOS low-dropout  
(LDO) voltage regulators that can deliver up to 300 mA  
of current while consuming only 68.0 µA of quiescent  
current (typical). The input operating range is specified  
from 3.6V to 16.0V, making it an ideal choice for four to  
six primary cell battery-powered applications, 12V  
mobile applications and one to three cell Li-Ion-  
powered applications.  
• 68.0 µA Typical Quiescent Current  
• Input Operating Voltage Range: 3.6V to 16.0V  
• 300 mA Output Current for all Output Voltages  
• Low Dropout Voltage, 300 mV typical @ 300 mA  
• Standard Output Voltage Options (1.8V, 2.5V,  
2.8V, 3.0V, 3.3V, 4.0V, 5.0V)  
• Output Voltage Range 1.8V to 5.5V in 0.1V  
Increments (tighter increments are also possible  
per design)  
The MCP1755/1755S is capable of delivering 300 mA  
with only 300 mV (typical) of input-to-output voltage  
differential. The output voltage tolerance of the  
MCP1755 is typically +0.85% at +25°C and ±2.0%  
maximum over the operating junction temperature  
range of -40°C to +125°C. Line regulation is ±0.01%  
typical at +25°C.  
• Output Voltage Tolerances of ±2.0% over entire  
Temperature Range  
• Stable with Minimum 1.0 µF Output Capacitance  
• Power Good Output  
Output voltages available for the MCP1755/1755S  
range from 1.8V to 5.5V. The LDO output is stable when  
using only 1 µF of output capacitance. Ceramic,  
tantalum or aluminum electrolytic capacitors may all be  
used for input and output. Overcurrent limit and  
overtemperature shutdown provide a robust solution for  
any application.  
• Shutdown Input  
• True Current Foldback Protection  
• Short-Circuit Protection  
• Overtemperature Protection  
Applications:  
The MCP1755/1755S family has a true current foldback  
feature. When the load impedance decreases beyond  
the MCP1755/1755S load rating, the output current and  
voltage will gracefully foldback towards 30 mA at about  
0V output. When the load impedance increases and  
returns to the rated load, the MCP1755/1755S will  
follow the same foldback curve as the device comes out  
of current foldback.  
• Battery-powered Devices  
• Battery-powered Alarm Circuits  
• Smoke Detectors  
• CO2 Detectors  
• Pagers and Cellular Phones  
• Smart Battery Packs  
• Portable Digital Assistant (PDA)  
• Digital Cameras  
Package options for the MCP1755 include the  
SOT-23-5, SOT-223-5 and 8-lead 2 x 3 DFN.  
• Microcontroller Power  
• Consumer Products  
Package options for the MCP1755S device include the  
SOT-223-3 and 8-lead 2 x 3 DFN.  
• Battery-powered Data Loggers  
Related Literature:  
• AN765, “Using Microchip’s Micropower LDOs”  
(DS00765), Microchip Technology Inc., 2007  
• AN766, “Pin-Compatible CMOS Upgrades to  
BiPolar LDOs” (DS00766), Microchip Technology  
Inc., 2003  
• AN792, “A Method to Determine How Much  
Power a SOT-23 Can Dissipate in an Application”  
(DS00792), Microchip Technology Inc., 2001  
2012 Microchip Technology Inc.  
DS25160A-page 1  
MCP1755/1755S  
Package Types – MCP1755  
SOT23-5  
SOT-223-5  
EP-6  
VOUT  
5
PWRGD  
4
2 x 3 DFN*  
VOUT  
PWRGD  
NC  
1
8
VIN  
NC  
NC  
2
3
4
7
6
5
EP  
9
GND  
SHDN  
1
4
1
2
3
5
2
3
* Includes Exposed Thermal Pad (EP); see Table 3-1  
GND VOUT PWRGD  
VIN  
V
SHDN  
GND SHDN  
IN  
Package Types – MCP1755S  
SOT-223-3  
EP-4  
2 x 3 DFN*  
VOUT  
NC  
1
8
VIN  
NC  
NC  
2
3
4
7
6
5
EP  
9
NC  
GND  
NC  
3
1
2
VIN  
* Includes Exposed Thermal Pad (EP); see Table 3-2  
GND  
VOUT  
DS25160A-page 2  
2012 Microchip Technology Inc.  
MCP1755/1755S  
Functional Block Diagrams  
MCP1755S  
VOUT  
VIN  
Error Amplifier  
+VIN  
Voltage  
Reference  
-
+
Over Current  
Over Temperature  
GND  
MCP1755  
PMOS  
VIN  
VOUT  
Undervoltage  
Lock Out  
(UVLO)  
Sense  
ISNS  
Cf  
Rf  
SHDN  
+
EA  
Driver w/limit  
and SHDN  
Overtemperature  
Sensing  
SHDN  
VREF  
V
IN  
Reference  
SHDN  
Soft-Start  
PWRGD  
Comp  
TDELAY  
GND  
92% of VREF  
2012 Microchip Technology Inc.  
DS25160A-page 3  
MCP1755/1755S  
Typical Application Circuits  
+
CIN  
1 µF Ceramic  
12V  
MCP1755S  
VOUT  
5.0V  
IOUT  
COUT  
1 µF Ceramic  
30 mA  
DS25160A-page 4  
2012 Microchip Technology Inc.  
MCP1755/1755S  
† Notice: Stresses above those listed under “Maximum  
Ratings” may cause permanent damage to the device.  
This is a stress rating only and functional operation of  
the device at those or any other conditions above those  
indicated in the operational listings of this specification  
is not implied. Exposure to maximum rating conditions  
for extended periods may affect device reliability.  
1.0  
ELECTRICAL  
CHARACTERISTICS  
Absolute Maximum Ratings †  
Input Voltage, V .........................................................+17.6V  
IN  
V
V
, PWRGD, SHDN................. (GND – 0.3V) to (V + 0.3V)  
IN  
IN  
................................................. (GND – 0.3V) to (+5.5V)  
OUT  
Internal Power Dissipation ............ Internally-Limited (Note 6)  
Output Short Circuit Current .................................Continuous  
Storage temperature .....................................-55°C to +150°C  
Maximum Junction Temperature....................+165°C(Note 7)  
Operating Junction Temperature...................-40°C to +150°C  
ESD protection on all pins kV HBM and 400V MM  
AC/DC CHARACTERISTICS  
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1,  
ILOAD = 1 mA, COUT = 1 µF (X7R), CIN = 1 µF (X7R), TA = +25°C, tr(VIN) = 0.5 V/µs, SHDN = VIN,  
PWRGD = 10K to VOUT. Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.  
Parameters  
Sym.  
Min.  
Typ.  
Max.  
Units  
Conditions  
Input/Output Characteristics  
Input Operating Voltage  
VIN  
3.6  
1.8  
16.0  
5.5  
V
V
Output Voltage Operating  
Range  
VOUT-RANGE  
Input Quiescent Current  
Iq  
68  
100  
4
µA  
µA  
IL = 0 mA  
Input Quiescent Current  
for SHDN mode  
ISHDN  
0.1  
SHDN = GND  
Ground Current  
IGND  
IOUT_mA  
SCL  
300  
300  
400  
µA  
mA  
mA  
ILOAD = 300 mA  
Maximum Output Current  
Output Soft Current Limit  
450  
VOUT 0.1V,  
VIN = VIN(MIN)  
,
Current measured 10 ms after  
the load is applied  
Output Pulse Current Limit  
PCL  
350  
mA  
mA  
Pulse Duration < 100 ms,  
Duty Cycle < 50%,  
VOUT 0.1V, Note 6  
Output Short Circuit  
Foldback Current  
IOUT_SC  
VOVER  
30  
VIN = VIN(MIN)  
,
VOUT = GND  
Output Voltage Overshoot  
on Start-up  
0.5  
%VOUT VIN = 0 to 16V,  
ILOAD = 300 mA  
Note 1: The minimum V must meet two conditions: V 3.6V and V V + V  
DROPOUT(MAX)  
.
IN  
IN  
IN  
R
2:  
V
is the nominal regulator output voltage when the input voltage V = V  
+ V  
or V = 3.6V (whichever is  
DROPOUT(MAX) IN  
R
IN  
Rated  
greater); I  
= 1 mA.  
OUT  
6
3: TCV  
= (V  
– V  
) x 10 /(V x   
), V  
= highest voltage measured over the temperature  
OUT-HIGH  
OUT  
OUT-HIGH  
OUT-LOW  
R
Temperature  
range. V  
= lowest voltage measured over the temperature range.  
OUT-LOW  
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Changes in output  
voltage due to heating effects are determined using thermal regulation specification TCV  
.
OUT  
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output voltage  
value that was measured with an applied input voltage of V = V + 1V or V = 3.6V (whichever is greater).  
IN  
R
IN  
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction  
temperature and the thermal resistance from junction to air (i.e., T , T , ). Exceeding the maximum allowable power  
A
J
JA  
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction  
temperatures above +150°C can impact the device reliability.  
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired  
junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient  
temperature is not significant.  
8: See Section 4.6 “Shutdown Input (SHDN)” and Figure 2-34.  
2012 Microchip Technology Inc.  
DS25160A-page 5  
MCP1755/1755S  
AC/DC CHARACTERISTICS (CONTINUED)  
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1,  
I
LOAD = 1 mA, COUT = 1 µF (X7R), CIN = 1 µF (X7R), TA = +25°C, tr(VIN) = 0.5 V/µs, SHDN = VIN,  
PWRGD = 10K to VOUT. Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.  
Parameters  
Sym.  
Min.  
VR  
Typ.  
Max.  
Units  
Conditions  
Output Voltage Regulation  
VOUT  
VR +0.85% VR +2.0  
V
Note 2  
2.0%  
%
VOUT Temperature  
TCVOUT  
35  
ppm/°C Note 3  
Coefficient  
Line Regulation  
VOUT  
/
-0.05  
±0.01  
+0.05  
%/V  
VR + 1V VIN 16V  
(VOUT x VIN)  
VOUT/VOUT  
VDROPOUT  
IDO  
Load Regulation  
-0.5  
±0.1  
300  
75  
+0.5  
500  
120  
%
mV  
µA  
IL = 1.0 mA to 300 mA, Note 4  
IL = 300 mA  
Dropout Voltage (Note 5)  
Dropout Current  
VIN = 0.95VR, IOUT = 0 mA  
Undervoltage Lockout  
Undervoltage Lockout  
UVLO  
3.0  
V
Rising VIN  
Falling VIN  
Undervoltage Lockout  
Hysterisis  
UVLOHYS  
300  
mV  
Shutdown Input  
Logic High Input  
Logic Low Input  
VSHDN-HIGH  
VSHDN-LOW  
SHDNILK  
2.4  
0.0  
VIN(MAX)  
0.8  
V
V
Shutdown Input Leakage  
Current  
0.02  
0.2  
µA  
SHDN = 16V  
ISINK = 1 mA  
Power Good Output  
PWRGD Input  
Voltage Operating Range  
VPWRGD_VIN  
VPWRGD_TH  
1.7  
90  
VIN  
V
PWRGD Threshold  
Voltage  
92  
94  
%VOUT Falling Edge of VOUT  
%VOUT Rising Edge of VOUT  
(Referenced to VOUT  
)
PWRGD Threshold  
Hysteresis  
VPWRGD_HYS  
VPWRGD_L  
IPWRGD_L  
2.0  
0.2  
0.45  
PWRGD Output  
Voltage Low  
V
IPWRGD_SINK = 5.0 mA,  
VOUT = 0V  
PWRGD Output  
Sink Current  
5.0  
mA  
VPWRGD 0.45V  
Note 1: The minimum V must meet two conditions: V 3.6V and V V + V  
.
IN  
IN  
IN  
R
DROPOUT(MAX)  
2:  
V
is the nominal regulator output voltage when the input voltage V = V  
+ V  
or V = 3.6V (whichever is  
DROPOUT(MAX) IN  
R
IN  
Rated  
greater); I  
= 1 mA.  
OUT  
6
3: TCV  
= (V  
– V  
) x 10 /(V x   
), V  
= highest voltage measured over the temperature  
OUT-HIGH  
OUT  
OUT-HIGH  
OUT-LOW  
R
Temperature  
range. V  
= lowest voltage measured over the temperature range.  
OUT-LOW  
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Changes in output  
voltage due to heating effects are determined using thermal regulation specification TCV  
.
OUT  
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output voltage  
value that was measured with an applied input voltage of V = V + 1V or V = 3.6V (whichever is greater).  
IN  
R
IN  
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction  
temperature and the thermal resistance from junction to air (i.e., T , T , ). Exceeding the maximum allowable power  
A
J
JA  
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction  
temperatures above +150°C can impact the device reliability.  
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired  
junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient  
temperature is not significant.  
8: See Section 4.6 “Shutdown Input (SHDN)” and Figure 2-34.  
DS25160A-page 6  
2012 Microchip Technology Inc.  
MCP1755/1755S  
AC/DC CHARACTERISTICS (CONTINUED)  
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1,  
LOAD = 1 mA, COUT = 1 µF (X7R), CIN = 1 µF (X7R), TA = +25°C, tr(VIN) = 0.5 V/µs, SHDN = VIN,  
PWRGD = 10K to VOUT. Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.  
I
Parameters  
Sym.  
Min.  
Typ.  
Max.  
200  
Units  
Conditions  
PWRGD Leakage Current  
IPWRGD_LK  
50  
nA  
VPWRGD Pullup = 10 kto VIN  
VIN = 16V  
PWRGD Time Delay  
TPG  
100  
200  
µs  
µs  
Rising Edge of VOUT  
Detect Threshold to  
PWRGD Active Time  
Delay  
TVDET_PWRGD  
Falling Edge of VOUT  
after Transition from  
VOUT = VPRWRGD_TH + 50 mV  
to VPWRGD_TH – 50 mV,  
RPULLUP = 10 kto VIN  
AC Performance  
Output Delay from VIN  
to VOUT = 90% VREG  
TDELAY  
200  
µs  
VIN = 0V to 16V,  
OUT = 90% VR,  
V
tr(VIN) = 5 V/µs,  
Output Delay From VIN to TDELAY_START  
OUT > 0.1V  
80  
µs  
µs  
µs  
µs  
VIN = 0V to 16V,  
VOUT 0.1V, tr(VIN) = 5 V/µs,  
V
Output Delay From SHDN TDELAY_SHDN  
(Note 8)  
235  
940  
210  
VIN = 6V, VOUT = 90% VR,  
VR=5V,SHDN = GND to VIN  
VIN = 7V, VOUT = 90% VR,  
VR=5V, SHDN = GND to VIN  
VIN = 16V,VOUT = 90% VR,  
VR=5V, SHDN = GND to VIN  
Output Noise  
eN  
0.3  
80  
µV/(Hz) IL = 50 mA, f = 1 kHz,  
Power Supply Ripple  
Rejection Ratio  
PSRR  
dB  
VR = 5V, f = 1 kHz,  
IL = 100 mA, VINAC = 1VPK-PK  
CIN = 0 µF,  
,
VIN VR + 1.5V 3.6V  
Thermal Shutdown  
Temperature  
TSD  
150  
10  
°C  
°C  
Note 6  
Thermal Shutdown  
Hysteresis  
TSD  
Note 1: The minimum V must meet two conditions: V 3.6V and V V + V  
.
IN  
IN  
IN  
R
DROPOUT(MAX)  
2:  
V
is the nominal regulator output voltage when the input voltage V = V  
+ V  
or V = 3.6V (whichever is  
DROPOUT(MAX) IN  
R
IN  
Rated  
greater); I  
= 1 mA.  
OUT  
6
3: TCV  
= (V  
– V  
) x 10 /(V x   
), V  
= highest voltage measured over the temperature  
OUT-HIGH  
OUT  
OUT-HIGH  
OUT-LOW  
R
Temperature  
range. V  
= lowest voltage measured over the temperature range.  
OUT-LOW  
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Changes in output  
voltage due to heating effects are determined using thermal regulation specification TCV  
.
OUT  
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output voltage  
value that was measured with an applied input voltage of V = V + 1V or V = 3.6V (whichever is greater).  
IN  
R
IN  
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction  
temperature and the thermal resistance from junction to air (i.e., T , T , ). Exceeding the maximum allowable power  
A
J
JA  
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction  
temperatures above +150°C can impact the device reliability.  
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired  
junction temperature. The test time is small enough such that the rise in the junction temperature over the ambient  
temperature is not significant.  
8: See Section 4.6 “Shutdown Input (SHDN)” and Figure 2-34.  
2012 Microchip Technology Inc.  
DS25160A-page 7  
MCP1755/1755S  
TEMPERATURE SPECIFICATIONS (Note 1)  
Parameters  
Temperature Ranges  
Sym.  
Min.  
Typ.  
Max. Units  
Conditions  
Specified Temperature Range  
Operating Temperature Range  
Storage Temperature Range  
Thermal Package Resistance  
Thermal Resistance, SOT-223-3  
TA  
TJ  
TA  
-40  
-40  
-55  
+125  
+150  
+150  
°C  
°C  
°C  
JA  
JC  
JA  
JC  
JA  
JC  
JA  
JC  
62  
15  
°C/W  
°C/W  
°C/W  
°C/W  
Thermal Resistance, SOT-223-5  
Thermal Resistance, SOT-23-5  
Thermal Resistance, 2 x 3 DFN-8  
62  
15  
256  
81  
70  
13.4  
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable  
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the  
maximum allowable power dissipation will cause the device operating junction temperature to exceed the  
maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.  
DS25160A-page 8  
2012 Microchip Technology Inc.  
MCP1755/1755S  
2.0  
TYPICAL PERFORMANCE CURVES  
Note:  
The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
Note 1: Unless otherwise indicated V = 3.3V, C  
= 1 µF Ceramic (X7R), C = 1 µF Ceramic (X7R), I = 1 mA, T = +25°C,  
IN L A  
R
OUT  
V
= V + 1V or V = 3.6V (whichever is greater), SHDN = V , package = SOT-223.  
R IN IN  
IN  
2: Junction Temperature (T ) is approximated by soaking the device under test to an ambient temperature equal to the  
J
desired junction temperature. The test time is small enough such that the rise in junction temperature over the ambient  
temperature is not significant.  
350  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
+130°C  
300  
250  
200  
150  
100  
50  
VOUT = 5.0V  
VOUT = 3.3V  
VOUT = 1.8V  
+90°C  
+25°C  
0°C  
-45°C  
VOUT = 1.8V  
IOUT = 0 µA  
0
0
2
4
6
8
10  
12  
14  
16  
0
50  
100  
150  
200  
250  
300  
Load Current (mA)  
Input Voltage (V)  
FIGURE 2-1:  
Quiescent Current vs.  
FIGURE 2-4:  
Ground Current vs. Load  
Input Voltage.  
Current.  
90  
80  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
VOUT = 5.0V  
+130°C  
-45°C  
VOUT = 1.8V  
70  
60  
50  
40  
30  
20  
10  
0
+90°C  
VOUT = 3.3V  
+25°C  
0°C  
VOUT = 3.3V  
IOUT = 0 µA  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
0
2
4
6
8
10  
12  
14  
16  
Junction Temperature (°C)  
Input Voltage (V)  
FIGURE 2-2:  
Quiescent Current vs.  
FIGURE 2-5:  
Quiescent Current vs.  
Input Voltage.  
Junction Temperature.  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
+130°C  
+90°C  
-45°C  
0°C  
+25°C  
0°C  
-45°C  
+25°C  
+90°C  
+130°C  
VOUT = 1.8V  
IOUT = 1 mA  
VOUT = 5.0V  
IOUT = 0 µA  
0
2
4
6
8
10  
12  
14  
16  
0
2
4
6
8
10  
12  
14  
16  
Input Voltage (V)  
Input Voltage (V)  
FIGURE 2-3:  
Quiescent Current vs.  
FIGURE 2-6:  
Output Voltage vs. Input  
Input Voltage.  
Voltage.  
2012 Microchip Technology Inc.  
DS25160A-page 9  
MCP1755/1755S  
Note 1: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA,  
TA = +25°C, VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT-223  
3.330  
3.5  
+90°C  
+130°C  
-45°C  
+25°C  
3.320  
3.310  
3.300  
3.290  
3.280  
3.270  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
-45°C  
0°C  
+25°C  
+90°C  
+130°C  
0°C  
VOUT = 3.3V  
VIN = 4.3V  
VOUT = 3.3V  
IOUT = 1 mA  
0
50  
100  
150  
200  
250  
300  
0
2
4
6
8
10  
12  
14  
16  
Load Current (mA)  
Input Voltage (V)  
FIGURE 2-10:  
Output Voltage vs. Load  
FIGURE 2-7:  
Output Voltage vs. Input  
Current.  
Voltage.  
5.02  
6
5
4
3
2
1
0
+90°C  
+25°C  
5.01  
5.00  
4.99  
4.98  
4.97  
4.96  
4.95  
-45°C  
0°C  
+25°C  
+90°C  
+130°C  
+130°C  
0°C  
-45°C  
VOUT = 5.0V  
VIN = 6.0V  
VOUT = 5.0V  
IOUT = 1 mA  
0
50  
100  
150  
200  
250  
300  
0
2
4
6
8
10  
12  
14  
16  
Load Current (mA)  
Input Voltage (V)  
FIGURE 2-11:  
Output Voltage vs. Load  
FIGURE 2-8:  
Output Voltage vs. Input  
Current.  
Voltage.  
1.830  
0.6  
VOUT = 3.3V  
+90°C  
+25°C  
+130°C  
0.5  
0.4  
0.3  
0.2  
0.1  
0
1.820  
1.810  
1.800  
1.790  
1.780  
+25°C  
0°C  
-45°C  
+90°C  
+130°C  
0°C  
VOUT = 1.8V  
VIN = 3.6V  
-45°C  
0
50  
100  
150  
200  
250  
300  
0
50  
100  
150  
200  
250  
300  
Load Current (mA)  
Load Current (mA)  
FIGURE 2-12:  
Dropout Voltage vs. Load  
FIGURE 2-9:  
Output Voltage vs. Load  
Current.  
Current.  
DS25160A-page 10  
2012 Microchip Technology Inc.  
MCP1755/1755S  
Note 1: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA,  
TA = +25°C, VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT-223  
0.50  
0.45  
0.40  
1.0  
0.9  
VOUT = 5.0V  
VOUT = 3.3V  
Hard Short Circuit  
ROUT < 0.1ꢀꢁ  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
-40 C  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
+25°C  
0°C  
+125 C  
+25 C  
+90°C  
+130°C  
-45°C  
0
50  
100  
150  
200  
250  
300  
2
4
6
8
10  
12  
14  
16  
Load Current (mA)  
Input Voltage (V)  
FIGURE 2-13:  
Dropout Voltage vs. Load  
FIGURE 2-16:  
Short Circuit Current vs.  
Current.  
Input Voltage.  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
VOUT = 3.3V  
V
V
I
=3.3V  
OUT  
Soft Short Circuit  
ROUT = 5.5  
=4.3V to 5.3V  
=10 mA  
IN  
5.3V  
OUT  
V
4.3V  
IN  
+125°C  
-40°C  
+25°C  
V
(AC coupled, 20 mV/Div)  
OUT  
Time=10 µs/Div  
2
4
6
8
10  
12  
14  
16  
Input Voltage (V)  
FIGURE 2-14:  
Dynamic Line Response.  
FIGURE 2-17:  
Short Circuit Current vs.  
Input Voltage.  
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
-0.05  
VIN = 16V  
V
V
=3.3V  
OUT  
=4.3V to 5.3V  
=100 mA  
IN  
VIN = 12V  
VIN = 10V  
I
5.3V  
OUT  
4.3V  
V
V
IN  
VIN = 6V  
VIN = 4.3V  
VIN = 3.6V  
(AC coupled, 20 mv/Div)  
OUT  
VOUT = 1.8V  
IOUT = 1 mA to 300 mA  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Time=10 µs/Div  
Temperature (ºC)  
FIGURE 2-15:  
Dynamic Line Response.  
FIGURE 2-18:  
Load Regulation vs.  
Temperature.  
2012 Microchip Technology Inc.  
DS25160A-page 11  
MCP1755/1755S  
Note 1: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA,  
TA = +25°C, VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT-223  
0.030  
0.025  
0.020  
0.015  
0.010  
0.005  
0.000  
-0.005  
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
-0.05  
-0.10  
VOUT = 3.3V  
VIN = 16V  
300 mA  
150 mA  
VIN = 12V  
100 mA  
VIN = 10V  
50 mA  
0 mA  
VIN = 6V  
VIN = 4.3V  
VOUT = 3.3V  
10 mA  
IOUT = 1 mA to 300 mA  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (°C)  
Temperature (°C)  
FIGURE 2-19:  
Load Regulation vs.  
FIGURE 2-22:  
Line Regulation vs.  
Temperature.  
Temperature.  
0.35  
0.30  
0.03  
0.03  
VIN = 16V  
VOUT = 5.0V  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
-0.05  
-0.10  
VIN = 12V  
300 mA  
150 mA  
0.02  
0.02  
0.01  
0.01  
0.00  
-0.01  
100 mA  
50 mA  
VIN = 10V  
10 mA  
VIN = 6V  
VOUT = 5.0V  
IOUT = 1 mA to 300 mA  
0 mA  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature ( C)  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature ( C)  
FIGURE 2-23:  
Temperature.  
Line Regulation vs.  
FIGURE 2-20:  
Temperature.  
Load Regulation vs.  
0
0.045  
VOUT = 1.8V  
VIN = 4.1V  
INAC = 1Vpk-pk  
IN = 0 µF  
VOUT = 1.8V  
300 mA  
0.040  
0.035  
0.030  
0.025  
0.020  
0.015  
0.010  
0.005  
0.000  
-20  
-40  
V
C
150 mA  
-60  
IOUT = 300 mA  
100 mA  
-80  
50 mA  
0 mA  
-100  
-120  
-140  
IOUT = 10 mA  
10 mA  
0.01  
0.1  
1
10  
100  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Frequency (kHz)  
Temperature (°C)  
FIGURE 2-24:  
Rejection vs. Frequency.  
Power Supply Ripple  
FIGURE 2-21:  
Temperature.  
Line Regulation vs.  
DS25160A-page 12  
2012 Microchip Technology Inc.  
MCP1755/1755S  
Note 1: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA,  
TA = +25°C, VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT-223  
0
VOUT = 5.0V  
V
V
=3.3V  
=4.3V  
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
OUT  
VIN = 6.5V  
VINAC = 1Vpk-pk  
4.3V  
IN  
C
IN = 0 µF  
IOUT = 10 mA  
I
=1 mA  
LOAD  
PWRGD=10K to V  
OUT  
SHDN  
0V  
3.3V  
I
OUT
= 300 mA  
3.3V  
V
0V  
OUT  
0V  
PWRGD  
0.01  
0.1  
1
10  
100  
Time=80 µs/Div  
Frequency (kHz)  
FIGURE 2-25:  
Power Supply Ripple  
FIGURE 2-28:  
Start-up from SHDN.  
Rejection vs. Frequency.  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
0
10.000  
CIN = 1 μF, COUT = 1 μF, IOUT = 50 mA  
VIN = 3.6V  
1.000  
0.100  
0.010  
VOUT = 1.8V  
VOUT = 1.8V  
IN = 3.6V  
V
V
OUT
= 5.0V  
VIN = 6.0V  
Increasing Load  
Decreasing Load  
VOUT = 3.3V  
VIN = 4.3V  
0.1  
0.2  
0.3  
0.4  
0.5  
Output Current (A)  
0.01  
0.1  
1
10  
100  
1000  
Frequency (kHz)  
FIGURE 2-29:  
Short Circuit Current  
FIGURE 2-26:  
Output Noise vs. Frequency  
Foldback.  
(3 lines, VR = 1.8V, 3.3V, 5.0V).  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
V
V
=3.3V  
=0 to 4.3V  
OUT  
IN  
4.3V  
VIN = 4.3V  
I
=1 mA  
VOUT = 3.3V  
LOAD  
PWRGD=10K to V  
OUT  
V
0V  
3.3V  
IN  
3.3V  
Increasing Load  
Decreasing Load  
V
0V  
OUT  
0.0  
0
0V  
PWRGD  
0.1  
0.2  
0.3  
0.4  
0.5  
Output Current (A)  
Time=80 µs/Div  
FIGURE 2-30:  
Foldback.  
Short Circuit Current  
FIGURE 2-27:  
Start-up from VIN.  
2012 Microchip Technology Inc.  
DS25160A-page 13  
MCP1755/1755S  
Note 1: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA,  
TA = +25°C, VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT-223  
6.0  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
VOUT = 5.0V  
-20 °C  
+25 °C  
VIN = 6.0V  
VOUT = 5.0V  
+90 °C  
Increasing Load  
Decreasing Load  
+125 °C  
12  
-40 °C  
14  
0
0.1  
0.2  
0.3  
0.4  
0.5  
6
8
10  
16  
Output Current (A)  
Input Voltage (V)  
FIGURE 2-31:  
Foldback.  
Short Circuit Current  
FIGURE 2-34:  
to 90% VOUT  
Start-up Delay From SHDN  
.
V
I
(AC coupled, 200 mV/Div)  
OUT  
V
=3.3V  
(200 mA/Div)  
OUT  
OUT  
I
=100 µA to 300 mA  
OUT  
Time=20 µs/Div  
FIGURE 2-32:  
Dynamic Load Response.  
V
(AC coupled, 200 mV/Div)  
OUT  
V
=3.3V  
I
(200 mA/Div)  
OUT  
OUT  
I
=1 mA to 300 mA  
OUT  
Time=20 µs/Div  
FIGURE 2-33:  
Dynamic Load Response.  
DS25160A-page 14  
2012 Microchip Technology Inc.  
MCP1755/1755S  
3.0  
PIN DESCRIPTIONS  
The descriptions of the pins are listed in Table 3-1 and Table 3-2.  
TABLE 3-1: MCP1755 PIN FUNCTION TABLE  
SOT-223-5  
SOT-23-5  
2 x 3 DFN  
Name  
Function  
4
5
5
4
1
VOUT  
PWRGD  
NC  
Regulated Voltage Output  
2
3, 6, 7  
4
Open Drain Power Good Output  
No connection  
3
2
GND  
Ground Terminal  
1
2
6
3
1
5
8
9
SHDN  
VIN  
Shutdown Input  
Unregulated Supply Voltage  
Exposed Pad, Connected to GND  
EP  
TABLE 3-2: MCP1755S PIN FUNCTION TABLE  
SOT-223-3  
2 x 3 DFN  
Name  
Function  
3
2
1
VOUT  
NC  
Regulated Voltage Output  
2, 3, 5, 6, 7  
No connection  
4
8
9
GND  
VIN  
Ground Terminal  
1
Unregulated Supply Voltage  
Exposed Pad, Connected to GND  
4
EP  
3.1  
Regulated Output Voltage (V  
)
3.3  
Ground Terminal (GND)  
OUT  
Connect VOUT to the positive side of the load and the  
positive side of the output capacitor. The positive side  
of the output capacitor should be physically located as  
close to the LDO VOUT pin as is practical. The current  
flowing out of this pin is equal to the DC load current.  
Regulator ground. Tie GND to the negative side of the  
output capacitor and also to the negative side of the  
input capacitor. Only the LDO bias current flows out of  
this pin; there is no high current. The LDO output  
regulation is referenced to this pin. Minimize voltage  
drops between this pin and the negative side of the  
load.  
3.2  
Power Good Output (PWRGD)  
The PWRGD output is an open-drain output used to  
indicate when the LDO output voltage is within 92%  
(typically) of its nominal regulation value. The PWRGD  
threshold has a typical hysteresis value of 2%. The  
PWRGD output is delayed by 100 µs (typical) from the  
time the LDO output is within 92% + 3% (maximum  
hysteresis) of the regulated output value on power-up.  
This delay time is internally fixed. The PWRGD pin may  
be pulled up to VIN or VOUT. Pulling up to VOUT  
conserves power when the device is in Shutdown  
(SHDN = 0V) mode.  
3.4  
Shutdown Input (SHDN)  
The SHDN input is used to turn the LDO output voltage  
on and off. When the SHDN input is at a logic-high  
level, the LDO output voltage is enabled. When the  
SHDN input is pulled to a logic-low level, the LDO  
output voltage is disabled. When the SHDN input is  
pulled low, the PWRGD output also goes low and the  
LDO enters a low quiescent current shutdown state.  
2012 Microchip Technology Inc.  
DS25160A-page 15  
MCP1755/1755S  
3.5  
Unregulated Input Voltage (V )  
IN  
Connect VIN to the input unregulated source voltage.  
Like all low dropout linear regulators, low source  
impedance is necessary for the stable operation of the  
LDO. The amount of capacitance required to ensure  
low source impedance will depend on the proximity of  
the input source capacitors or battery type. For most  
applications, 1 µF of capacitance will ensure stable  
operation of the LDO circuit. The input capacitor should  
have a capacitance value equal to or larger than the  
output capacitor for performance applications. The  
input capacitor will supply the load current during  
transients and improve performance. For applications  
that have load currents below 10 mA, the input  
capacitance requirement can be lowered. The type of  
capacitor used may be ceramic, tantalum or aluminum  
electrolytic. The low ESR characteristics of the ceramic  
will yield better noise and PSRR performance at high  
frequency.  
3.6  
Exposed Pad (EP)  
Some of the packages have an exposed metal pad on  
the bottom of the package. The exposed metal pad  
gives the device better thermal characteristics by  
providing a good thermal path to either the PCB or  
heatsink to remove heat from the device. The exposed  
pad of the package is internally connected to GND.  
DS25160A-page 16  
2012 Microchip Technology Inc.  
MCP1755/1755S  
4.3  
Output Capacitor  
4.0  
DEVICE OVERVIEW  
The MCP1755/1755S requires a minimum output  
capacitance of 1 µF for output voltage stability. Ceramic  
capacitors are recommended because of their size,  
cost and environmental robustness qualities.  
The MCP1755/1755S is a 300 mA output current, low-  
dropout (LDO) voltage regulator. The low-dropout  
voltage of 300 mV typical at 300 mA of current makes  
it ideal for battery-powered applications. The input  
voltage range is 3.6V to 16.0V. Unlike other high output  
current LDOs, the MCP1755/1755S typically draws  
only 300 µA of quiescent current for a 300 mA load.  
The MCP1755 adds a shutdown control input pin and a  
power good output pin. The output voltage options are  
fixed.  
Aluminum-electrolytic and tantalum capacitors can be  
used on the LDO output as well. The Equivalent Series  
Resistance (ESR) of the electrolytic output capacitor  
should be no greater than 2 ohms. The output capacitor  
should be located as close to the LDO output as is  
practical. Ceramic materials X7R and X5R have low  
temperature coefficients and are well within the  
acceptable ESR range required. A typical 1 µF  
X7R 0805 capacitor has an ESR of 50 milli-ohms.  
4.1  
LDO Output Voltage  
The MCP1755 LDO has a fixed output voltage. The  
output voltage range is 1.8V to 5.5V. The MCP1755S  
LDO is available as a fixed voltage device.  
Larger LDO output capacitors can be used with the  
MCP1755/1755S to improve dynamic performance  
and power supply ripple rejection performance. A  
maximum of 1000 µF is recommended. Aluminum-  
electrolytic capacitors are not recommended for low  
temperature applications of < -25°C.  
4.2  
Output Current and  
Current Limiting  
The MCP1755/1755S LDO is tested and ensured to  
supply a minimum of 300 mA of output current. The  
MCP1755/1755S has no minimum output load, so the  
output load current can go to 0 mA and the LDO will  
continue to regulate the output voltage to within  
tolerance.  
4.4  
Input Capacitor  
Low input source impedance is necessary for the LDO  
output to operate properly. When operating from  
batteries, or in applications with long lead length  
(> 10 inches) between the input source and the LDO,  
some input capacitance is recommended. A minimum  
of 1.0 µF to 4.7 µF is recommended for most  
applications.  
The MCP1755/1755S also incorporates a true output  
current foldback. If the output load presents an  
excessive load due to a low-impedance short circuit  
condition, the output current and voltage will fold back  
towards 30 mA and 0V, respectively. The output  
voltage and current will resume normal levels when the  
excessive load is removed. If the overload condition is  
a soft overload, the MCP1755/1755S will supply higher  
load currents of up to typically 350 mA. This allows for  
device usage in applications that have pulsed load  
currents having an average output current value of  
300 mA or less.  
For applications that have output step load  
requirements, the input capacitance of the LDO is very  
important. The input capacitance provides the LDO  
with a good local low-impedance source to pull the  
transient currents from, in order to respond quickly to  
the output load step. For good step response  
performance, the input capacitor should be of  
equivalent or higher value than the output capacitor.  
The capacitor should be placed as close to the input of  
the LDO as is practical. Larger input capacitors will also  
help reduce any high-frequency noise on the input and  
output of the LDO and reduce the effects of any  
inductance that exists between the input source  
voltage and the input capacitance of the LDO.  
Output overload conditions may also result in an  
overtemperature shutdown of the device. If the junction  
temperature rises above +150°C (typical), the LDO will  
shut  
down  
the  
output.  
See  
Section 4.8,  
Overtemperature Protection for more information on  
overtemperature shutdown.  
6.0  
5.0  
4.0  
VIN = 6.0V  
OUT = 5.0V  
3.0  
V
2.0  
1.0  
0.0  
Increasing Load  
Decreasing Load  
0
0.1  
0.2  
0.3  
0.4  
0.5  
Output Current (A)  
FIGURE 4-1:  
Typical Current Foldback.  
2012 Microchip Technology Inc.  
DS25160A-page 17  
MCP1755/1755S  
4.5  
Power Good Output (PWRGD)  
The open drain PWRGD output is used to indicate  
when the output voltage of the LDO is within 92%  
VIN  
TDELAY_SHDN  
(typical  
value,  
see  
Section 1.0  
“Electrical  
Characteristics” for Minimum and Maximum  
specifications) of its nominal regulation value.  
As the output voltage of the LDO rises, the open-drain  
PWRGD output will actively be held low until the output  
voltage has exceeded the power good threshold plus  
the hysteresis value. Once this threshold has been  
exceeded, the power good time delay is started (shown  
as TPG in the AC/DC Characteristics table). The  
power good time delay is fixed at 100 µs (typical). After  
the time delay period, the PWRGD open-drain output  
becomes inactive and may be pulled high by an  
external pullup resistor, indicating that the output  
voltage is stable and within regulation limits. The power  
good output is typically pulled up to VIN or VOUT. Pulling  
the signal up to VOUT conserves power during  
Shutdown mode.  
TPG  
SHDN  
VOUT  
PWRGD  
CLOAD = 1.0 µF  
If the output voltage of the LDO falls below the power  
good threshold, the power good output will transition  
low. The power good circuitry has a 200 µs delay when  
detecting a falling output voltage, which helps to  
increase noise immunity of the power good output and  
avoid false triggering of the power good output during  
fast output transients. See Figure 4-2 for power good  
timing characteristics.  
FIGURE 4-3:  
Shutdown.  
Power Good Timing from  
4.6  
Shutdown Input (SHDN)  
The SHDN input is an active-low input signal that turns  
the LDO on and off. The SHDN threshold is a fixed  
voltage level. The minimum value of this shutdown  
threshold required to turn the output ON is 2.4V. The  
maximum value required to turn the output OFF is 0.8V.  
When the LDO is put into Shutdown mode using the  
SHDN input, the power good output is pulled low  
immediately, indicating that the output voltage will be  
out of regulation. The timing diagram for the power  
good output when using the shutdown input is shown in  
Figure 4-3.  
The SHDN input will ignore low-going pulses (pulses  
meant to shut down the LDO) that are up to 400 ns in  
pulse width. If the shutdown input is pulled low for more  
than 400 ns, the LDO will enter Shutdown mode. This  
small bit of filtering helps to reject any system noise  
spikes on the shutdown input signal.  
The power good output is an open-drain output that can  
be pulled up to any voltage that is equal to or less than  
the LDO input voltage. This output is capable of sinking  
a minimum of 5 mA (VPWRGD < 0.45V).  
On the rising edge of the SHDN input, the shutdown  
circuitry has a 135 µs delay before allowing the LDO  
output to turn on. This delay helps to reject any false  
turn-on signals or noise on the SHDN input signal. After  
the 135 µs delay, the LDO output enters its soft-start  
period as it rises from 0V to its final regulation value. If  
the SHDN input signal is pulled low during the 135 µs  
delay period, the timer will be reset and the delay time  
will start over again on the next rising edge of the  
SHDN input. The total time from the SHDN input going  
high (turn-on) to the LDO output being in regulation is  
typically 235 µs. See Figure 4-4 for a timing diagram of  
the SHDN input.  
V
PWRGD_TH  
V
OUT  
T
PG  
V
OH  
TV  
DET_PWRGD  
PWRGD  
V
OL  
FIGURE 4-2:  
Power Good Timing.  
DS25160A-page 18  
2012 Microchip Technology Inc.  
MCP1755/1755S  
4.8  
Overtemperature Protection  
TDELAY_SHDN  
The MCP1755/1755S LDO has temperature-sensing  
circuitry to prevent the junction temperature from  
exceeding approximately +150°C. If the LDO junction  
temperature does reach +150°C, the LDO output will  
be turned off until the junction temperature cools to  
approximately +140°C, at which point the LDO output  
will automatically resume normal operation. If the  
internal power dissipation continues to be excessive,  
the device will again shut off. The junction temperature  
of the die is a function of power dissipation, ambient  
temperature and package thermal resistance. See  
Section 5.0 “Application Circuits and Issues” for  
more information on LDO power dissipation and  
junction temperature.  
400 ns (typical)  
135 µs  
SHDN  
VOUT  
CLOAD = 1.0 µF  
Shutdown Input Timing  
FIGURE 4-4:  
Diagram.  
4.7  
Dropout Voltage and Undervoltage  
Lockout  
Dropout voltage is defined as the input-to-output  
voltage differential at which the output voltage drops  
2% below the nominal value that was measured with a  
VR + 1.0V differential applied. The MCP1755/1755S  
LDO has a very low dropout voltage specification of  
300 mV (typical) at 300 mA of output current. See  
Section 1.0  
“Electrical  
Characteristics”  
for  
maximum dropout voltage specifications.  
The MCP1755/1755S LDO operates across an input  
voltage range of 3.6V to 16.0V and incorporates input  
undervoltage lockout (UVLO) circuitry that keeps the  
LDO output voltage off until the input voltage reaches a  
minimum of 3.00V (typical) on the rising edge of the  
input voltage. As the input voltage falls, the LDO output  
will remain on until the input voltage level reaches  
2.70V (typical).  
For high-current applications, voltage drops across the  
PCB traces must be taken into account. The trace  
resistances can cause significant voltage drops  
between the input voltage source and the LDO. For  
applications with input voltages near 3.0V, these PCB  
trace voltage drops can sometimes lower the input  
voltage enough to trigger  
undervoltage lockout.  
a shutdown due to  
2012 Microchip Technology Inc.  
DS25160A-page 19  
MCP1755/1755S  
NOTES:  
DS25160A-page 20  
2012 Microchip Technology Inc.  
MCP1755/1755S  
The maximum continuous operating junction  
temperature specified for the MCP1755/1755S is  
+150°C. To estimate the internal junction temperature  
of the MCP1755/1755S, the total internal power  
dissipation is multiplied by the thermal resistance from  
junction to ambient (RJA). The thermal resistance from  
junction to ambient for the SOT-23 package is  
estimated at 336°C/W.  
5.0  
5.1  
APPLICATION CIRCUITS  
AND ISSUES  
Typical Application  
The MCP1755/1755S is most commonly used as a  
voltage regulator. The low quiescent current and low  
dropout voltage make it ideal for many battery-powered  
applications.  
EQUATION 5-2:  
TJMAX= PTOTAL RJA + TAMAX  
MCP1755S  
VIN  
3.6V to 4.8V  
GND  
VOUT  
1.8V  
TJ(MAX) = Maximum continuous junction  
temperature  
VIN  
CIN  
VOUT  
1 µF Ceramic  
PTOTAL = Total device power dissipation  
IOUT  
50 mA  
COUT  
1 µF Ceramic  
RJA = Thermal resistance from junction  
to ambient  
TAMAX = Maximum ambient temperature  
FIGURE 5-1:  
Typical Application Circuit.  
5.1.1  
APPLICATION INPUT CONDITIONS  
Package Type = SOT-23  
The maximum power dissipation capability for a  
package can be calculated given the junction-to-  
ambient thermal resistance and the maximum ambient  
temperature for the application. The following equation  
can be used to determine the package maximum  
internal power dissipation.  
Input Voltage Range = 3.6V to 4.8V  
VIN maximum = 4.8V  
VOUT typical = 1.8V  
IOUT = 50 mA maximum  
EQUATION 5-3:  
TJMAXTAMAX  
5.2  
5.2.1  
Power Calculations  
PDMAX= ---------------------------------------------------  
RJA  
POWER DISSIPATION  
PD(MAX) = Maximum device power dissipation  
The internal power dissipation of the MCP1755/1755S  
is a function of input voltage, output voltage and output  
current. The power dissipation, as a result of the  
quiescent current draw, is so low, it is insignificant  
(68.0 µA x VIN). The following equation can be used to  
calculate the internal power dissipation of the LDO.  
TJ(MAX) = Maximum continuous junction  
temperature  
TA(MAX) = Maximum ambient temperature  
RJA = Thermal resistance from junction  
to ambient  
EQUATION 5-1:  
EQUATION 5-4:  
PLDO = VINMAX VOUTMIN  IOUTMAX   
TJRISE= PDMAXRJA  
TJ(RISE) = Rise in device junction temperature  
over the ambient temperature  
PLDO = LDO Pass device internal power  
dissipation  
PD(MAX) = Maximum device power dissipation  
VIN(MAX) = Maximum input voltage  
RJA = Thermal resistance from junction  
VOUT(MIN) = LDO minimum output voltage  
to ambient  
EQUATION 5-5:  
TJ = TJRISE+ TA  
TJ = Junction temperature  
TJ(RISE) = Rise in device junction temperature  
over the ambient temperature  
TA = Ambient temperature  
2012 Microchip Technology Inc.  
DS25160A-page 21  
MCP1755/1755S  
5.3.2  
JUNCTION TEMPERATURE  
ESTIMATE  
5.3  
Voltage Regulator  
Internal power dissipation, junction temperature rise,  
junction temperature and maximum power dissipation  
are calculated in the following example. The power  
dissipation, as a result of ground current, is small  
enough to be neglected.  
To estimate the internal junction temperature, the  
calculated temperature rise is added to the ambient or  
offset temperature. For this example, the worst-case  
junction temperature is estimated below.  
EXAMPLE 5-3:  
EXAMPLE 5-1:  
Package  
POWER DISSIPATION  
TJ = TJRISE + TA(MAX)  
TJ = 91.3°C  
Package Type = SOT-23  
Input Voltage  
Maximum Package Power Dissipation Examples at  
+40°C Ambient Temperature  
VIN = 3.6V to 4.8V  
SOT-23 (336.0°C/Watt = RJA  
PD(MAX) = (125°C – 40°C)/336°C/W  
D(MAX) = 253 mW  
SOT-89 (153.3°C/Watt = RJA  
)
LDO Output Voltages and Currents  
V
OUT = 1.8V  
P
IOUT = 50 mA  
)
Maximum Ambient Temperature  
PD(MAX) = (125°C – 40°C)/153.3°C/W  
PD(MAX) = 554 mW  
T
A(MAX) = +40°C  
Internal Power Dissipation  
5.4  
Voltage Reference  
Internal Power dissipation is the product of the LDO  
output current times the voltage across the LDO  
(VIN to VOUT).  
The MCP1755/1755S can be used not only as a  
regulator, but also as a low quiescent current voltage  
reference. In many microcontroller applications, the  
initial accuracy of the reference can be calibrated using  
PLDO(MAX) = (VIN(MAX) – VOUT(MIN)) x IOUT(MAX)  
PLDO = (4.8V – (0.97 x 1.8V)) x 50 mA  
PLDO = 152.7 mW  
production test equipment or by using  
a ratio  
measurement. When the initial accuracy is calibrated,  
the thermal stability and line regulation tolerance are  
the only errors introduced by the MCP1755/1755S  
LDO. The low-cost, low quiescent current and small  
ceramic output capacitor are all advantages when  
using the MCP1755/1755S as a voltage reference.  
5.3.1  
DEVICE JUNCTION  
TEMPERATURE RISE  
The internal junction temperature rise is a function of  
internal power dissipation and the thermal resistance  
from junction to ambient for the application. The thermal  
resistance from junction to ambient (RJA) is derived  
from an EIA/JEDEC standard for measuring thermal  
resistance for small surface mount packages. The EIA/  
JEDEC specification is JESD51-7, “High Effective  
Thermal Conductivity Test Board for Leaded Surface  
Mount Packages”. The standard describes the test  
method and board specifications for measuring the  
thermal resistance from junction to ambient. The actual  
thermal resistance for a particular application can vary  
depending on many factors, such as copper area and  
thickness. Refer to AN792, “A Method to Determine  
How Much Power a SOT-23 Can Dissipate in an  
Application” (DS00792), for more information regarding  
this subject.  
Ratio Metric Reference  
®
PIC  
MCP1755S  
Microcontroller  
68 µA Bias  
V
IN  
V
C
IN  
V
REF  
OUT  
GND  
C
1 µF  
1 µF  
OUT  
ADO  
AD1  
Bridge Sensor  
FIGURE 5-2:  
as a Voltage Reference.  
Using the MCP1755/1755S  
EXAMPLE 5-2:  
T
J(RISE) = PTOTAL x RJA  
TJRISE = 152.7 mW x 336.0°C/Watt  
TJRISE = 51.3°C  
DS25160A-page 22  
2012 Microchip Technology Inc.  
MCP1755/1755S  
5.5  
Pulsed Load Applications  
For some applications, there are pulsed load current  
events that may exceed the specified 300 mA  
maximum specification of the MCP1755/1755S. The  
internal current limit of the MCP1755/1755S will  
prevent high peak load demands from causing non-  
recoverable damage. The 300 mA rating is a maximum  
average continuous rating. As long as the average  
current does not exceed 300 mA, higher pulsed load  
currents can be applied to the MCP1755/1755S. The  
typical foldback current limit for the MCP1755/1755S is  
350 mA (TA = +25°C).  
2012 Microchip Technology Inc.  
DS25160A-page 23  
MCP1755/1755S  
NOTES:  
DS25160A-page 24  
2012 Microchip Technology Inc.  
MCP1755/1755S  
6.0  
6.1  
PACKAGING INFORMATION  
Package Marking Information  
Example:  
3-Lead SOT-223 (MCP1755S only)  
First Line  
Code  
Part Number  
1755S18  
EDBY1240  
256  
MCP1755S-1802E/DB  
MCP1755ST-1802E/DB  
MCP1755S-3302E/DB  
MCP1755ST-3302E/DB  
MCP1755S-5002E/DB  
MCP1755ST-5002E/DB  
1755S18  
1755S18  
1755S33  
1755S33  
1755S50  
1755S50  
5-Lead SOT-223 (MCP1755 only)  
Example:  
First Line  
Code  
Part Number  
175518  
EDCY1240  
256  
MCP1755T-1802E/DC  
MCP1755T-3302E/DC  
MCP1755T-5002E/DC  
175518  
175533  
175550  
Example:  
2S25  
5-Lead SOT-23 (MCP1755 only)  
Part Number  
Code  
MCP1755T-1802E/OT  
MCP1755T-3302E/OT  
MCP1755T-5002E/OT  
2SNN  
3CNN  
3DNN  
Legend: XX...X Customer-specific information  
Y
YY  
Year code (last digit of calendar year)  
Year code (last 2 digits of calendar year)  
WW  
NNN  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
e
3
Pb-free JEDEC designator for Matte Tin (Sn)  
This package is Pb-free. The Pb-free JEDEC designator (  
can be found on the outer packaging for this package.  
*
)
3
e
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line, thus limiting the number of available characters  
for customer-specific information.  
2012 Microchip Technology Inc.  
DS25160A-page 25  
MCP1755/1755S  
Package Marking Information (Continued)  
Example:  
8-Lead DFN (2x3)  
First Line  
Code  
Part Number  
ALZ  
240  
256  
MCP1755-1802E/MC  
MCP1755T-1802E/MC  
MCP1755-3302E/MC  
MCP1755T-3302E/MC  
MCP1755-5002E/MC  
MCP1755T-5002E/MC  
MCP1755S-1802E/MC  
MCP1755ST-1802E/MC  
MCP1755S-3302E/MC  
MCP1755ST-3302E/MC  
MCP1755S-5002E/MC  
MCP1755ST-5002E/MC  
ALZ  
ALZ  
AKA  
AKA  
AKB  
AKB  
AMA  
AMA  
AMB  
AMB  
AMC  
AMC  
DS25160A-page 26  
2012 Microchip Technology Inc.  
MCP1755/1755S  
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2012 Microchip Technology Inc.  
DS25160A-page 27  
MCP1755/1755S  
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DS25160A-page 28  
2012 Microchip Technology Inc.  
MCP1755/1755S  
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5$ꢄ8ꢅꢍꢈꢇ%ꢈ4ꢅꢉ!  
4ꢅꢉ!ꢈ1ꢃ#ꢊꢌ  
6$# ꢃ!ꢅꢈ4ꢅꢉ!ꢈ1ꢃ#ꢊꢌ  
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#  
ꢕ#ꢉꢆ!ꢇ%%  
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ:ꢅꢃꢓꢌ#  
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ  
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ  
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ  
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ    
4ꢅꢉ!ꢈ=ꢃ!#ꢌ  
5
ꢅꢀ  
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"ꢀ  
8
8ꢑ  
4
M
ꢀꢁ<ꢐ  
ꢐꢁꢀꢐ  
ꢀꢁ9(  
ꢒꢁꢑ9  
ꢛꢁ((  
9ꢁ((  
ꢐꢁꢛꢑ  
ꢐꢁ(ꢀ  
ꢛꢁꢐ(  
ꢀꢁꢀꢖ  
<ꢝ  
ꢐꢁꢐꢑ  
ꢀꢁ((  
9ꢁ<9  
ꢛꢁꢖ(  
9ꢁꢖ(  
ꢐꢁꢑꢖ  
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ꢑꢁꢜ(  
ꢐꢁꢜꢀ  
ꢐꢝ  
8ꢈ4ꢅꢉ!ꢈ=ꢃ!#ꢌ  
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ  
4ꢅꢉ!ꢈꢔꢆꢓꢋꢅ  
ꢖꢝ  
ꢝꢕꢋꢄꢊ!  
ꢀꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀꢑꢒꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ  
ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ  
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ  
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢞꢀꢛꢒ)  
2012 Microchip Technology Inc.  
DS25160A-page 29  
MCP1755/1755S  
"ꢂꢃꢄꢅꢆꢇꢈꢉꢅꢊꢋꢌꢍꢇꢎꢏꢅꢉꢉꢇꢐꢑꢋꢉꢌꢒꢄꢇꢓꢔꢅꢒꢊꢌꢊꢋꢕꢔꢇꢖꢗ#ꢙꢇꢚꢎꢐꢓꢂꢛꢛꢁꢜ  
ꢝꢕꢋꢄ! .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ  
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ  
DS25160A-page 30  
2012 Microchip Technology Inc.  
MCP1755/1755S  
"ꢂꢃꢄꢅꢆꢇꢈꢉꢅꢊꢋꢌꢍꢇꢎꢏꢅꢉꢉꢇꢐꢑꢋꢉꢌꢒꢄꢇꢓꢔꢅꢒꢊꢌꢊꢋꢕꢔꢇꢖꢐꢓꢙꢇꢚꢎꢐꢓꢂꢛꢁꢜ  
ꢝꢕꢋꢄ! .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ  
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ  
b
N
E
E1  
3
2
1
e
e1  
D
A2  
c
A
φ
A1  
L
L1  
3ꢆꢃ#  
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ  
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ꢏꢙ5  
56ꢏ  
ꢏꢔ7  
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ  
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(
ꢐꢁꢜ(ꢈ)ꢕ*  
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ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ    
ꢕ#ꢉꢆ!ꢇ%%  
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ  
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ  
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ  
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ  
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.ꢇꢇ#ꢈꢔꢆꢓꢋꢅ  
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ    
4ꢅꢉ!ꢈ=ꢃ!#ꢌ  
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"ꢀ  
4
ꢀꢁꢜꢐꢈ)ꢕ*  
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M
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M
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M
M
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M
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8
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ꢝꢕꢋꢄꢊ!  
ꢀꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀꢑꢒꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ  
ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ  
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ  
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢞꢐꢜꢀ)  
2012 Microchip Technology Inc.  
DS25160A-page 31  
MCP1755/1755S  
Note: For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging  
DS25160A-page 32  
2012 Microchip Technology Inc.  
MCP1755/1755S  
$ꢂꢃꢄꢅꢆꢇꢈꢉꢅꢊꢋꢌꢍꢇꢗꢑꢅꢉꢇ%ꢉꢅꢋ&ꢇꢝꢕꢇꢃꢄꢅꢆꢇꢈꢅꢍ'ꢅ*ꢄꢇꢖ+#ꢙꢇMꢇꢛ2ꢁ279:ꢇꢏꢏꢇꢘꢕꢆ;ꢇꢚꢗ%ꢝꢜ  
ꢝꢕꢋꢄ! .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ  
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ  
e
D
b
N
N
L
K
E2  
E
EXPOSED PAD  
NOTE 1  
NOTE 1  
2
1
1
2
D2  
BOTTOM VIEW  
TOP VIEW  
A
NOTE 2  
A3  
A1  
3ꢆꢃ#  
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ  
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#  
ꢏꢙ5  
56ꢏ  
<
ꢐꢁ(ꢐꢈ)ꢕ*  
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5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ  
1ꢃ#ꢊꢌ  
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#  
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*ꢇꢆ#ꢉꢊ#ꢈꢗꢌꢃꢊ/ꢆꢅ    
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ  
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ  
5
ꢔꢀ  
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ꢐꢁꢑꢐꢈꢚ".  
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*ꢇꢆ#ꢉꢊ#ꢈ=ꢃ!#ꢌ  
*ꢇꢆ#ꢉꢊ#ꢈ4ꢅꢆꢓ#ꢌ  
*ꢇꢆ#ꢉꢊ#ꢞ#ꢇꢞ"&ꢎꢇ ꢅ!ꢈ1ꢉ!  
ꢂꢑ  
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8
4
?
ꢀꢁꢛꢐ  
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ꢀꢁ((  
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M
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M
ꢝꢕꢋꢄꢊ!  
ꢀꢁ 1ꢃꢆꢈꢀꢈ,ꢃ $ꢉꢋꢈꢃꢆ!ꢅ&ꢈ%ꢅꢉ#$ꢍꢅꢈꢄꢉꢘꢈ,ꢉꢍꢘ0ꢈ8$#ꢈꢄ$ #ꢈ8ꢅꢈꢋꢇꢊꢉ#ꢅ!ꢈ-ꢃ#ꢌꢃꢆꢈ#ꢌꢅꢈꢌꢉ#ꢊꢌꢅ!ꢈꢉꢍꢅꢉꢁ  
ꢑꢁ 1ꢉꢊ/ꢉꢓꢅꢈꢄꢉꢘꢈꢌꢉ,ꢅꢈꢇꢆꢅꢈꢇꢍꢈꢄꢇꢍꢅꢈꢅ&ꢎꢇ ꢅ!ꢈ#ꢃꢅꢈ8ꢉꢍ ꢈꢉ#ꢈꢅꢆ! ꢁ  
ꢛꢁ 1ꢉꢊ/ꢉꢓꢅꢈꢃ ꢈ ꢉ-ꢈ ꢃꢆꢓ$ꢋꢉ#ꢅ!ꢁ  
ꢖꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ  
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ  
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ  
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢞꢀꢑꢛ*  
2012 Microchip Technology Inc.  
DS25160A-page 33  
MCP1755/1755S  
Note: For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging  
DS25160A-page 34  
2012 Microchip Technology Inc.  
MCP1755/1755S  
APPENDIX A: REVISION HISTORY  
Revision A (December 2012)  
• Original Release of this Document.  
2012 Microchip Technology Inc.  
DS25160A-page 35  
MCP1755/1755S  
NOTES:  
DS25160A-page 36  
2012 Microchip Technology Inc.  
MCP1755/1755S  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
Examples:  
PART NO.  
Device  
X-  
XX  
X
X
X/  
XX  
a) MCP1755ST-1802E/DB: Tape and Reel,  
1.8V Output Voltage,  
Tape  
Output Feature Tolerance Temp. Package  
Fixed, 2% Tolerance,  
3LD SOT-223 Package.  
Code  
Range  
and Reel Voltage  
b) MCP1755ST-3302E/DB: Tape and Reel,  
3.3V Output Voltage,  
Fixed, 2% Tolerance,  
3LD SOT-223 Package.  
Device:  
MCP1755:  
MCP1755T:  
300 mA, 16V, High-Performance LDO  
300 mA, 16V, High-Performance LDO  
(Tape and Reel)  
300 mA, 16V, High-Performance LDO  
300 mA, 16V, High-Performance LDO  
(Tape and Reel)  
c) MCP1755ST-5002E/DB: Tape and Reel,  
MCP1755S:  
MCP1755ST:  
5.0V Output Voltage,  
Fixed, 2% Tolerance,  
3LD SOT-223 Package.  
Tape and Reel:  
T
=
Tape and Reel  
a) MCP1755T-1802E/DC: Tape and Reel,  
1.8V Output Voltage,  
Fixed, 2% Tolerance,  
5LD SOT-223 Package  
Output Voltage*:  
18  
33  
50  
=
=
=
1.8V “Standard”  
3.3V “Standard”  
5.0V “Standard”  
b) MCP1755T-3302E/DC: Tape and Reel,  
3.3V Output Voltage,  
Fixed, 2% Tolerance,  
5LD SOT-223 Package  
*Contact factory for other voltage options  
c) MCP1755T-5002E/DC: Tape and Reel,  
5.0V Output Voltage,  
Fixed, 2% Tolerance,  
5LD SOT-223 Package  
Extra Feature Code:  
Tolerance:  
0
2
E
=
=
=
Fixed  
2% (Standard)  
-40°C to +125°C  
a) MCP1755T-1802E/OT: Tape and Reel,  
1.8V Output Voltage,  
Fixed, 2% Tolerance,  
5LD SOT-23 Package  
Temperature Range:  
Package:  
b) MCP1755T-3302E/OT: Tape and Reel,  
3.3V Output Voltage,  
Fixed, 2% Tolerance,  
5LD SOT-23 Package  
DB = Plastic Small Outline (SOT-223), 3-lead  
DC = Plastic Small Outline (SOT-223), 5-lead  
OT = Plastic Small Outline (SOT-23), 5-lead  
MC = Plastic Dual Flat, No Lead (2x3 DFN), 8-lead  
c) MCP1755T-5002E/OT: Tape and Reel,  
5.0V Output Voltage,  
Fixed, 2% Tolerance,  
5LD SOT-23 Package  
a) MCP1755T-1802E/MC: Tape and Reel,  
1.8V Output Voltage,  
Fixed, 2% Tolerance,  
8LD 2x3 DFN Package  
b) MCP1755T-3302E/MC: Tape and Reel,  
3.3V Output Voltage,  
Fixed, 2% Tolerance,  
8LD 2x3 DFN Package  
c) MCP1755T-5002E/MC: Tape and Reel,  
5.0V Output Voltage,  
Fixed, 2% Tolerance,  
8LD 2x3 DFN Package  
a) MCP1755ST-1802E/MC: Tape and Reel,  
1.8V Output Voltage,  
Fixed, 2% Tolerance,  
8LD 2x3 DFN Package  
2012 Microchip Technology Inc.  
DS25160A-page 37  
MCP1755/1755S  
NOTES:  
DS25160A-page 38  
2012 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is provided only for your convenience  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
MICROCHIP MAKES NO REPRESENTATIONS OR  
WARRANTIES OF ANY KIND WHETHER EXPRESS OR  
IMPLIED, WRITTEN OR ORAL, STATUTORY OR  
OTHERWISE, RELATED TO THE INFORMATION,  
INCLUDING BUT NOT LIMITED TO ITS CONDITION,  
QUALITY, PERFORMANCE, MERCHANTABILITY OR  
FITNESS FOR PURPOSE. Microchip disclaims all liability  
arising from this information and its use. Use of Microchip  
devices in life support and/or safety applications is entirely at  
the buyer’s risk, and the buyer agrees to defend, indemnify and  
hold harmless Microchip from any and all damages, claims,  
suits, or expenses resulting from such use. No licenses are  
conveyed, implicitly or otherwise, under any Microchip  
intellectual property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, dsPIC,  
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,  
PICSTART, PIC logo, rfPIC, SST, SST Logo, SuperFlash  
and UNI/O are registered trademarks of Microchip Technology  
Incorporated in the U.S.A. and other countries.  
32  
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,  
MTP, SEEVAL and The Embedded Control Solutions  
Company are registered trademarks of Microchip Technology  
Incorporated in the U.S.A.  
Silicon Storage Technology is a registered trademark of  
Microchip Technology Inc. in other countries.  
Analog-for-the-Digital Age, Application Maestro, BodyCom,  
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,  
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,  
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial  
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB  
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code  
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,  
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,  
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA  
and Z-Scale are trademarks of Microchip Technology  
Incorporated in the U.S.A. and other countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
GestIC and ULPP are registered trademarks of Microchip  
Technology Germany II GmbH & Co. & KG, a subsidiary of  
Microchip Technology Inc., in other countries.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2012, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
ISBN: 9781620768181  
QUALITY MANAGEMENT SYSTEM  
CERTIFIED BY DNV  
Microchip received ISO/TS-16949:2009 certification for its worldwide  
headquarters, design and wafer fabrication facilities in Chandler and  
Tempe, Arizona; Gresham, Oregon and design centers in California  
and India. The Company’s quality system processes and procedures  
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
== ISO/TS 16949 ==  
2012 Microchip Technology Inc.  
DS25160A-page 39  
Worldwide Sales and Service  
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ASIA/PACIFIC  
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http://www.microchip.com/  
support  
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Suites 3707-14, 37th Floor  
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Tel: 852-2401-1200  
Fax: 852-2401-3431  
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Tel: 91-80-3090-4444  
Fax: 91-80-3090-4123  
Austria - Wels  
Tel: 43-7242-2244-39  
Fax: 43-7242-2244-393  
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Tel: 45-4450-2828  
Fax: 45-4485-2829  
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Tel: 91-11-4160-8631  
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Tel: 33-1-69-53-63-20  
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Tel: 81-6-6152-7160  
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Tel: 86-25-8473-2460  
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Tel: 60-4-227-8870  
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Tel: 86-532-8502-7355  
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Tel: 63-2-634-9065  
Fax: 63-2-634-9069  
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Tel: 248-538-2250  
Fax: 248-538-2260  
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Tel: 86-21-5407-5533  
Fax: 86-21-5407-5066  
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Tel: 65-6334-8870  
Fax: 65-6334-8850  
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Tel: 317-773-8323  
Fax: 317-773-5453  
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Tel: 86-24-2334-2829  
Fax: 86-24-2334-2393  
Taiwan - Hsin Chu  
Tel: 886-3-5778-366  
Fax: 886-3-5770-955  
Los Angeles  
China - Shenzhen  
Tel: 86-755-8864-2200  
Fax: 86-755-8203-1760  
Taiwan - Kaohsiung  
Tel: 886-7-213-7828  
Fax: 886-7-330-9305  
Mission Viejo, CA  
Tel: 949-462-9523  
Fax: 949-462-9608  
China - Wuhan  
Tel: 86-27-5980-5300  
Fax: 86-27-5980-5118  
Taiwan - Taipei  
Tel: 886-2-2508-8600  
Fax: 886-2-2508-0102  
Santa Clara  
Santa Clara, CA  
Tel: 408-961-6444  
Fax: 408-961-6445  
China - Xian  
Tel: 86-29-8833-7252  
Fax: 86-29-8833-7256  
Thailand - Bangkok  
Tel: 66-2-694-1351  
Fax: 66-2-694-1350  
Toronto  
Mississauga, Ontario,  
Canada  
China - Xiamen  
Tel: 905-673-0699  
Fax: 905-673-6509  
Tel: 86-592-2388138  
Fax: 86-592-2388130  
China - Zhuhai  
Tel: 86-756-3210040  
Fax: 86-756-3210049  
11/29/12  
DS25160A-page 40  
2012 Microchip Technology Inc.  

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