MCP1827_13 [MICROCHIP]
1.5A, Low-Voltage, Low Quiescent Current LDO Regulator; 1.5A ,低电压,低静态电流LDO稳压器型号: | MCP1827_13 |
厂家: | MICROCHIP |
描述: | 1.5A, Low-Voltage, Low Quiescent Current LDO Regulator |
文件: | 总34页 (文件大小:710K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MCP1827/MCP1827S
1.5A, Low-Voltage, Low Quiescent Current LDO Regulator
Features:
Description:
• 1.5A Output Current Capability
The MCP1827/MCP1827S is a 1.5A Low Dropout
(LDO) linear regulator that provides high current and
low output voltages. The MCP1827 comes in a fixed or
adjustable output voltage version, with an output
voltage range of 0.8V to 5.0V. The 1.5A output current
capability, combined with the low output voltage
capability, make the MCP1827 a good choice for new
sub-1.8V output voltage LDO applications that have
high current demands. The MCP1827S is a 3-pin fixed
voltage version. The MCP1827/MCP1827S is based
upon the MCP1727 LDO device.
• Input Operating Voltage Range: 2.3V to 6.0V
• Adjustable Output Voltage Range: 0.8V to 5.0V
(MCP1827 only)
• Standard Fixed Output Voltages:
- 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V
• Other Fixed Output Voltage Options Available
Upon Request
• Low Dropout Voltage: 330 mV Typical at 1.5A
• Typical Output Voltage Tolerance: 0.5%
• Stable with 1.0 µF Ceramic Output Capacitor
• Fast response to Load Transients
The MCP1827/MCP1827S is stable using ceramic
output capacitors that inherently provide lower output
noise and reduce the size and cost of the entire
regulator solution. Only 1 µF of output capacitance is
needed to stabilize the LDO.
• Low Supply Current: 120 µA (typ)
• Low Shutdown Supply Current: 0.1 µA (typ)
(MCP1827 only)
Using CMOS construction, the quiescent current
consumed by the MCP1827/MCP1827S is typically
less than 120 µA over the entire input voltage range,
making it attractive for portable computing applications
that demand high output current. The MCP1827
versions have a Shutdown (SHDN) pin. When shut
down, the quiescent current is reduced to less than
0.1 µA.
• Fixed Delay on Power Good Output
(MCP1827 only)
• Short Circuit Current Limiting and
Overtemperature Protection
• 5-Lead Plastic DDPAK, 5-Lead TO-220 Package
Options (MCP1827)
• 3-Lead Plastic DDPAK, 3-Lead TO-220 Package
Options (MCP1827S)
On the MCP1827 fixed output versions the scaled-
down output voltage is internally monitored and a
power good (PWRGD) output is provided when the
output is within 92% of regulation (typical). The
PWRGD delay is internally fixed at 200 µs (typical).
Applications:
• High-Speed Driver Chipset Power
• Networking Backplane Cards
• Notebook Computers
The overtemperature and short circuit current-limiting
provide additional protection for the LDO during system
Fault conditions.
• Network Interface Cards
• Palmtop Computers
Package Types
• 2.5V to 1.XV Regulators
5-LD DDPAK
5-LD TO-220
Fixed/Adjustable
3-LD DDPAK 3-LD TO-220
MCP1827
MCP1827S
MCP1827S
MCP1827
1
2
3
1
2 3 4 5
1
2
3
1 2 3 4 5
2006-2013 Microchip Technology Inc.
DS22001D-page 1
MCP1827/MCP1827S
Typical Application
MCP1827 Fixed Output Voltage
PWRGD
R1
100 k
On
1
2 3 4 5
SHDN
VIN
Off
VOUT = 1.8V @ 1A
VOUT
VIN = 2.3V to 2.8V
GND
C1
C2
1 µF
4.7 µF
MCP1827 Adjustable Output Voltage
VADJ
R2
20 k
R1
On
40 k
1
2 3 4 5
SHDN
VIN
Off
VOUT = 1.2V @ 1A
VOUT
VIN = 2.3V to 2.8V
GND
C1
C2
1 µF
4.7 µF
DS22001D-page 2
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
Functional Block Diagram – Adjustable Output
PMOS
VIN
VOUT
Undervoltage
Lock Out
(UVLO)
ISNS
Cf
Rf
SHDN
ADJ
+
–
Driver w/limit
and SHDN
EA
Overtemperature
Sensing
SHDN
VREF
V
IN
Reference
SHDN
Soft-Start
Comp
TDELAY
GND
92% of VREF
2006-2013 Microchip Technology Inc.
DS22001D-page 3
MCP1827/MCP1827S
Functional Block Diagram – Fixed Output (5-pin)
PMOS
VIN
VOUT
Undervoltage
Lock Out
Sense
(UVLO)
ISNS
Cf
Rf
SHDN
+
–
Driver w/limit
and SHDN
EA
Overtemperature
Sensing
SHDN
VREF
V
IN
Reference
SHDN
Soft-Start
PWRGD
Comp
TDELAY
GND
92% of VREF
DS22001D-page 4
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
Functional Block Diagram – Fixed Output (3-Pin)
PMOS
VIN
VOUT
Undervoltage
Lock Out
Sense
(UVLO)
ISNS
Cf
Rf
SHDN
+
–
Driver w/limit
and SHDN
EA
Overtemperature
Sensing
SHDN
VREF
VIN
Reference
SHDN
Soft-Start
Comp
TDELAY
GND
92% of VREF
2006-2013 Microchip Technology Inc.
DS22001D-page 5
MCP1827/MCP1827S
† Notice: Stresses above those listed under “Maximum Rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
V
....................................................................................6.5V
IN
Maximum Voltage on Any Pin ..(GND – 0.3V) to (V + 0.3)V
DD
Maximum Power Dissipation......... Internally-Limited (Note 6)
Output Short Circuit Duration................................Continuous
Storage temperature .....................................-65°C to +150°C
Maximum Junction Temperature, T ...........................+150°C
J
ESD protection on all pins (HBM/MM) 2 kV; 200V
AC/DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, V = V
+ V
Note 1, V =1.8V for Adjustable Output,
IN
OUT(MAX)
DROPOUT(MAX) R
I
= 1 mA, C = C
= 4.7 µF (X7R Ceramic), T = +25°C. Boldface type applies for junction temperatures, T (Note 7) of
OUT
IN
OUT
A
J
-40°C to +125°C
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Input Operating Voltage
Input Quiescent Current
V
I
2.3
6.0
V
IN
—
120
0.1
220
µA
I = 0 mA,
L
q
V
= 0.8V to 5.0V
OUT
Input Quiescent Current for
SHDN Mode
I
—
1.5
—
3
—
µA
A
SHDN = GND
SHDN
Maximum Output Current
I
—
V
V
= 2.3V to 6.0V
= 0.8V to 5.0V
OUT
IN
R
Line Regulation
V
OUT
/
0.05
±0.5
2.2
0.16
1.0
—
%/V
%
(Note 1) VIN 6V
I = 1 mA to 1.5A
OUT
OUT
x V )
(V
IN
Load Regulation
V
/V
-1.0
—
OUT OUT
OUT_SC
(Note 4)
Output Short Circuit Current
I
A
R
LOAD
< 0.1, Peak Current
Adjust Pin Characteristics (Adjustable Output Only)
Adjust Pin Reference Voltage
V
0.402
0.410
0.418
V
V
= 2.3V to V = 6.0V,
IN
ADJ
IN
I
= 1 mA
OUT
Adjust Pin Leakage Current
I
-10
—
±0.01
40
+10
—
nA
V
= 6.0V, V
= 0V to 6V
ADJ
IN
ADJ
Adjust Temperature Coefficient
TCV
ppm/°C Note 3
OUT
Fixed-Output Characteristics (Fixed Output Only)
Voltage Regulation
V
V
- 2.5%
V
V + 2.5%
R
V
Note 2
OUT
R
R
±0.5%
Note 1: The minimum V must meet two conditions: V 2.3V and VIN VOUT(MAX)V
IN
IN
DROPOUT(MAX).
2:
V
is the nominal regulator output voltage for the fixed cases. V = 1.2V, 1.8V, etc. V is the desired set point output
R
R
R
voltage for the adjustable cases. V = V
((R /R )+1). Figure 4-1.
R
ADJ *
6
1 2
3: TCV
= (V
– V
) *10 / (V * Temperature). V is the highest voltage measured over the
OUT
OUT-HIGH
OUT-LOW
R
OUT-HIGH
temperature range. V
is the lowest voltage measured over the temperature range.
OUT-LOW
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is
tested over a load range from 1 mA to the maximum specified output current.
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its
nominal value that was measured with an input voltage of V
V
+ V
.
IN = OUTMAX
DROPOUT(MAX)
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e., T , T , ). Exceeding the maximum allowable power
A
J
JA
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained
junction temperatures above 150°C can impact device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the
ambient temperature is not significant.
DS22001D-page 6
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
AC/DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, V = V
+ V
Note 1, V =1.8V for Adjustable Output,
IN
OUT(MAX)
DROPOUT(MAX) R
I
= 1 mA, C = C
= 4.7 µF (X7R Ceramic), T = +25°C. Boldface type applies for junction temperatures, T (Note 7) of
OUT
IN
OUT
A
J
-40°C to +125°C
Parameters
Sym.
Min.
Typ.
Max.
600
Units
Conditions
Dropout Characteristics
Dropout Voltage
V
-V
—
330
mV
Note 5, I
= 1.5A,
IN OUT
OUT
V
= 2.3V
IN(MIN)
Power Good Characteristics
PWRGD Input Voltage Operat-
ing Range
V
1.0
—
—
6.0
V
T = +25°C
A
PWRGD_VIN
1.2
6.0
T = -40°C to +125°C
A
For V < 2.3V, I
= 100 µA
SINK
IN
PWRGD Threshold Voltage
V
%V
Falling Edge
PWRGD_TH
OUT
(Referenced to V
)
OUT
89
90
1.0
—
92
92
95
94
V
V
< 2.5V Fixed, V
= Adj.
OUT
OUT
OUT
>= 2.5V Fixed
PWRGD Threshold Hysteresis
PWRGD Output Voltage Low
V
2.0
0.2
3.0
0.4
%V
PWRGD_HYS
OUT
V
V
I
= 1.2 mA,
PWRGD_L
PWRGD SINK
ADJ = 0V
PWRGD Leakage
P
_
—
—
1
—
—
nA
µs
V
PWRGD
= V = 6.0V
WRGD LK
IN
PWRGD Time Delay
T
200
Rising Edge
= 10 k
PG
R
PULLUP
Detect Threshold to PWRGD
Active Time Delay
T
—
200
—
µs
V
or V
= V
+
PWRGD_TH
VDET-PWRGD
ADJ
OUT
20 mV to V
- 20 mV
PWRGD_TH
Shutdown Input
Logic High Input
V
45
%V
%V
V
V
V
= 2.3V to 6.0V
SHDN-HIGH
IN
IN
IN
IN
Logic Low Input
V
15
= 2.3V to 6.0V
= 6V, SHDN =V ,
IN
SHDN-LOW
IN
SHDN Input Leakage Current
SHDN
-0.1
±0.001
+0.1
µA
ILK
SHDN = GND
AC Performance
Output Delay From SHDN
T
100
2.0
µs
SHDN = GND to V
OR
IN
V
= GND to 95% V
OUT
R
Output Noise
e
—
—
—
—
µV/Hz
I
= 200 mA, f = 1 kHz, C
OUT
N
OUT
= 10 µF (X7R Ceramic), V
2.5V
=
OUT
Power Supply Ripple Rejection
Ratio
PSRR
60
dB
f = 100 Hz, C
= 10 µF,
OUT
I
= 10 mA,
OUT
V
= 30 mV pk-pk,
INAC
C
= 0 µF
IN
Note 1: The minimum V must meet two conditions: V 2.3V and VIN VOUT(MAX)V
IN
IN
DROPOUT(MAX).
2:
V
is the nominal regulator output voltage for the fixed cases. V = 1.2V, 1.8V, etc. V is the desired set point output
R
R
R
voltage for the adjustable cases. V = V
((R /R )+1). Figure 4-1.
1 2
R
ADJ *
6
3: TCV
= (V
– V
) *10 / (V * Temperature). V is the highest voltage measured over the
OUT-HIGH
OUT
OUT-HIGH
OUT-LOW
R
temperature range. V
is the lowest voltage measured over the temperature range.
OUT-LOW
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is
tested over a load range from 1 mA to the maximum specified output current.
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its
nominal value that was measured with an input voltage of V
V
+ V
.
IN = OUTMAX
DROPOUT(MAX)
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e., T , T , ). Exceeding the maximum allowable power
A
J
JA
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained
junction temperatures above 150°C can impact device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the
ambient temperature is not significant.
2006-2013 Microchip Technology Inc.
DS22001D-page 7
MCP1827/MCP1827S
AC/DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, V = V
+ V
Note 1, V =1.8V for Adjustable Output,
IN
OUT(MAX)
DROPOUT(MAX) R
I
= 1 mA, C = C
= 4.7 µF (X7R Ceramic), T = +25°C. Boldface type applies for junction temperatures, T (Note 7) of
OUT
IN
OUT
A
J
-40°C to +125°C
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
T
—
150
—
°C
I
V
= 100 µA, V
= 2.8V
= 1.8V,
SD
OUT
OUT
IN
T
—
10
—
°C
I
= 100 µA, V
= 2.8V
= 1.8V,
SD
OUT
OUT
V
IN
Note 1: The minimum V must meet two conditions: V 2.3V and VIN VOUT(MAX)V
IN
IN
DROPOUT(MAX).
2:
V
is the nominal regulator output voltage for the fixed cases. V = 1.2V, 1.8V, etc. V is the desired set point output
R
R
R
voltage for the adjustable cases. V = V
((R /R )+1). Figure 4-1.
1 2
R
ADJ *
6
3: TCV
= (V
– V
) *10 / (V * Temperature). V is the highest voltage measured over the
OUT
OUT-HIGH
OUT-LOW
R
OUT-HIGH
temperature range. V
is the lowest voltage measured over the temperature range.
OUT-LOW
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is
tested over a load range from 1 mA to the maximum specified output current.
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its
nominal value that was measured with an input voltage of V
V
+ V
.
IN = OUTMAX
DROPOUT(MAX)
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e., T , T , ). Exceeding the maximum allowable power
A
J
JA
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained
junction temperatures above 150°C can impact device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the
ambient temperature is not significant.
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, all limits apply for VIN = 2.3V to 6.0V.
Parameters
Temperature Ranges
Sym.
Min.
Typ.
Max.
Units
Conditions
Operating Junction Temperature
Range
TJ
-40
—
+125
°C
Steady State
Transient
Maximum Junction Temperature
Storage Temperature Range
TJ
TA
—
—
—
+150
+150
°C
°C
-65
Thermal Package Resistances
Thermal Resistance, 5LD DDPAK
Thermal Resistance, 3LD DDPAK
Thermal Resistance, 5LD TO-220
Thermal Resistance, 3LD TO-220
JA
JA
JA
JA
—
—
—
—
31.2
31.4
29.3
29.4
—
—
—
—
°C/W 4-Layer JC51 Standard Board
°C/W 4-Layer JC51 Standard Board
°C/W 4-Layer JC51 Standard Board
°C/W 4-Layer JC51 Standard Board
DS22001D-page 8
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VOUT = 1.8V (Adjustable), VIN = 2.8V, COUT = 4.7 µF Ceramic (X7R), CIN = 4.7 µF
Ceramic (X7R), IOUT = 1 mA, Temperature = +25°C, VIN = VOUT + 0.6V, RPWRGD = 10 k To VIN.
Note: Junction Temperature (TJ) is approximated by soaking the device under test to an ambient temperature equal to
the desired Junction temperature. The test time is small enough such that the rise in Junction temperature over the
Ambient temperature is not significant.
0.1
0.09
150
VOUT = 1.2V adj
VIN = 2.3V to 6.0V
140
130
120
110
100
90
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
IOUT = 1 mA
130°C
90°C
IOUT = 1000 mA
IOUT = 100 mA
25°C
IOUT = 500 mA
-45°C
VOUT = 1.2V Adj
OUT = 0 mA
I
-45
-20
5
30
55
80
105
130
2
3
4
5
6
Temperature (°C)
Input Voltage (V)
FIGURE 2-4:
Line Regulation vs.
FIGURE 2-1:
Quiescent Current vs. Input
Temperature (1.2V Adjustable).
Voltage (1.2V Adjustable).
0.15
200
190
180
170
160
150
IOUT = 1.0 mA to 1500 mA
VOUT = 3.3V
VIN=5.0V
0.10
0.05
0.00
VOUT = 0.8V
VOUT = 5.0V
VOUT = 1.8V
140
130
120
110
100
VIN=3.3V
-0.05
-0.10
-0.15
VOUT = 1.2V Adj
VIN=2.3V
500
-45
-20
5
30
55
80
105 130
0
250
750
1000
1250
1500
Temperature (°C)
Load Current (mA)
FIGURE 2-5:
Temperature (Adjustable Version).
Load Regulation vs.
FIGURE 2-2:
Current (1.2V Adjustable).
Ground Current vs. Load
0.411
140
135
130
125
IOUT = 0 mA
VOUT = 1.2V Adj
VIN = 6.0V
VIN = 5.0V
0.410
0.410
0.409
120
VIN = 2.3V
VIN=5.0V
VIN=2.5V
115
110
105
100
VIN=4.0V
0.409
0.408
IOUT = 1.0 mA
-45 -20
5
30
55
80
105 130
-45
-20
5
30
55
80
105
130
Temperature (°C)
Temperature (°C)
FIGURE 2-6:
Temperature.
Adjust Pin Voltage vs.
FIGURE 2-3:
Junction Temperature (1.2V Adjustable).
Quiescent Current vs.
2006-2013 Microchip Technology Inc.
DS22001D-page 9
MCP1827/MCP1827S
Note: Unless otherwise indicated, VOUT = 1.8V (Adjustable), VIN = 2.8V, COUT = 4.7 µF Ceramic (X7R), CIN = 4.7 µF
Ceramic (X7R), IOUT = 1 mA, Temperature = +25°C, VIN = VOUT + 0.6V, RPWRGD = 10 k To VIN.
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
150
140
130
120
110
100
90
VOUT = 5.0V Adj
VOUT = 0.8V
IOUT = 0 mA
+130°C
+85°C
+25°C
-45°C
VOUT = 2.5V Adj
80
2
3
4
5
6
0
250
500
750
1000 1250 1500
Input Voltage (V)
Load Current (mA)
FIGURE 2-7:
Dropout Voltage vs. Load
FIGURE 2-10:
Quiescent Current vs. Input
Current (Adjustable Version).
Voltage (0.8V Fixed).
0.42
150
IOUT = 1.5A
VOUT = 2.5V
140 IOUT = 0 mA
0.40
0.38
+130°C
+90°C
+25°C
130
120
110
100
90
VOUT = 5.0V Adj
0.36
0.34
0.32
0.30
VOUT = 3.3V Adj
-45°C
VOUT = 2.5V Adj
80
3
3.5
4
4.5
5
5.5
6
-45
-20
5
30
55
80
105 130
Input Voltage (V)
Temperature (°C)
FIGURE 2-8:
Dropout Voltage vs.
FIGURE 2-11:
Quiescent Current vs. Input
Temperature (Adjustable Version).
Voltage (2.5V Fixed).
370
250.00
200.00
150.00
100.00
50.00
VOUT = 3.3V Fixed
VIN = 3.9V
VIN = 4.5V
360
350
340
330
320
310
300
VOUT=0.8V
VOUT=2.5V
VIN = 5.0V
VIN = 2.3V for VR=0.8V
VIN = 3.1V for VR=2.5V
0.00
-45
-20
5
30
55
80
105 130
0
250
500
750
1000 1250 1500
Temperature (°C)
Load Current (mA)
FIGURE 2-9:
Power Good (PWRGD)
FIGURE 2-12:
Ground Current vs. Load
Time Delay vs. Temperature (Adjustable
Version).
Current.
DS22001D-page 10
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
Note: Unless otherwise indicated, VOUT = 1.8V (Adjustable), VIN = 2.8V, COUT = 4.7 µF Ceramic (X7R), CIN = 4.7 µF
Ceramic (X7R), IOUT = 1 mA, Temperature = +25°C, VIN = VOUT + 0.6V, RPWRGD = 10 k To VIN.
130
125
120
115
110
105
100
95
0.045
0.040
0.035
0.030
0.025
0.020
0.015
IOUT = 0 mA
VR = 2.5V
VIN = 3.1 to 6.0V
IOUT = 1 mA
IOUT = 100 mA
VOUT = 0.8V
IOUT = 1000 mA
IOUT = 500 mA
IOUT = 1500 mA
VOUT = 2.5V
-45
-20
5
30
55
80
105
130
-45
-20
5
30
55
80
105
130
Temperature (°C)
Temperature (°C)
FIGURE 2-13:
Quiescent Current vs.
FIGURE 2-16:
Line Regulation vs.
Temperature.
Temperature (2.5V Fixed).
0.30
0.30
VR = 0.8V
VIN = 2.3V
VOUT = 0.8V
0.20
0.25
0.20
0.15
0.10
0.05
0.00
0.10
0.00
VIN = 6.0V
VIN = 4.0V
VIN = 2.3V
-0.10
-0.20
-0.30
IOUT = 1 mA to 1500 mA
-45
-20
5
30
55
80
105
130
-45
-20
5
30
55
80
105 130
Temperature (°C)
Temperature (°C)
FIGURE 2-14:
ISHDN vs. Temperature.
FIGURE 2-17:
Load Regulation vs.
Temperature (VOUT < 2.5V Fixed).
0.10
0.08
0.06
0.04
0.00
IOUT = 1 mA to 1500 mA
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.45
IOUT = 1 mA
VOUT = 2.5V
VOUT = 5.0V
IOUT = 1A
IOUT = 100 mA
IOUT = 500mA
VOUT = 0.8V
VIN = 2.3V to 6.0V
0.02
0.00
-45
-20
5
30
55
80
105
130
-45
-20
5
30
55
80
105
130
Temperature (°C)
Temperature (°C)
FIGURE 2-15:
Line Regulation vs.
FIGURE 2-18:
Load Regulation vs.
Temperature (0.8V Fixed).
Temperature (VOUT 2.5V Fixed).
2006-2013 Microchip Technology Inc.
DS22001D-page 11
MCP1827/MCP1827S
Note: Unless otherwise indicated, VOUT = 1.8V (Adjustable), VIN = 2.8V, COUT = 4.7 µF Ceramic (X7R), CIN = 4.7 µF
Ceramic (X7R), IOUT = 1 mA, Temperature = +25°C, VIN = VOUT + 0.6V, RPWRGD = 10 k To VIN.
0.40
10.000
Temperature = 25°C
COUT=1 μF ceramic X7R
0.35
VR=0.8V, VIN=2.3V
VOUT = 2.5V
CIN=10 μF ceramic
0.30
0.25
0.20
0.15
0.10
0.05
0.00
1.000
0.100
0.010
IOUT=200 mA
VOUT = 5.0V
VR=3.3V, VIN=4.1V
0
250
500
750 1000 1250 1500
0.01
0.1
1
10
100
1000
Load Current (mA)
Frequency (kHz)
FIGURE 2-19:
Dropout Voltage vs. Load
FIGURE 2-22:
Output Noise Voltage
Current.
Density vs. Frequency.
0.45
0.40
0.35
0
-10
-20
-30
-40
-50
-60
-70
-80
IOUT = 1.5A
VOUT = 5.0V
VR=1.2V Adj
COUT=10 μF ceramic X7R
VIN=3.1V
CIN=0 μF
IOUT=10 mA
0.30
0.25
VOUT = 2.5V
-45
-20
5
30
55
80
105
130
0.01
0.1
1
10
100
1000
Frequency (kHz)
Temperature (°C)
FIGURE 2-20:
Dropout Voltage vs.
FIGURE 2-23:
Power Supply Ripple
Temperature.
Rejection (PSRR) vs. Frequency (VOUT = 1.2V
Adj.).
0
-10
-20
-30
3.00
2.50
2.00
1.50
1.00
0.50
0.00
-40
VR=1.2V Adj
COUT=22 μF ceramic X7R
VIN=3.1V
CIN=0 μF
IOUT=10 mA
-50
-60
-70
-80
VOUT = 2.5V
Temperature = 25°C
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0.01
0.1
1
10
100
1000
Frequency (kHz)
Input Voltage (V)
FIGURE 2-21:
Short Circuit Current vs.
FIGURE 2-24:
Power Supply Ripple
Input Voltage.
Rejection (PSRR) vs. Frequency (VOUT = 1.2V
Adj.).
DS22001D-page 12
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
Note: Unless otherwise indicated, VOUT = 1.8V (Adjustable), VIN = 2.8V, COUT = 4.7 µF Ceramic (X7R), CIN = 4.7 µF
Ceramic (X7R), IOUT = 1 mA, Temperature = +25°C, VIN = VOUT + 0.6V, RPWRGD = 10 k To VIN.
0
-10
-20
-30
-40
VR=3.3V Fixed
COUT=10 μF ceramic X7R
VIN=3.9V
CIN=0 μF
-50
-60
IOUT=10 mA
-70
-80
0.01
0.1
1
10
100
1000
Frequency (kHz)
FIGURE 2-25:
Rejection (PSRR) vs. Frequency (VOUT = 3.3V
Fixed).
Power Supply Ripple
FIGURE 2-28:
Shutdown.
2.5V (Adj.) Startup from
Power Good (PWRGD)
Dynamic Line Response
0
-10
-20
-30
-40
VR=3.3V Fixed
COUT=22 μF ceramic X7R
VIN=3.9V
CIN=0 μF
IOUT=10 mA
-50
-60
-70
-80
0.01
0.1
1
10
100
1000
Frequency (kHz)
FIGURE 2-29:
Timing.
FIGURE 2-26:
Rejection (PSRR) vs. Frequency (VOUT = 3.3V
Fixed).
Power Supply Ripple
FIGURE 2-30:
FIGURE 2-27:
2.5V (Adj.) Startup from VIN.
(3.3V Fixed).
2006-2013 Microchip Technology Inc.
DS22001D-page 13
MCP1827/MCP1827S
Note: Unless otherwise indicated, VOUT = 1.8V (Adjustable), VIN = 2.8V, COUT = 4.7 µF Ceramic (X7R), CIN = 4.7 µF
Ceramic (X7R), IOUT = 1 mA, Temperature = +25°C, VIN = VOUT + 0.6V, RPWRGD = 10 k To VIN.
FIGURE 2-31:
Dynamic Load Response
FIGURE 2-32:
Dynamic Load Response
(3.3V Fixed, 10 mA to 1500 mA).
(3.3V Fixed, 100 mA to 1500 mA).
DS22001D-page 14
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
3-Pin Fixed
Output
5-Pin Fixed
Output
Adjustable
Output
Name
Description
—
1
1
2
1
2
SHDN
VIN
Shutdown Control Input (active-low)
Input Voltage Supply
2
3
3
GND
VOUT
PWRGD
ADJ
Ground
3
4
4
Regulated Output Voltage
Power Good Output
—
—
Pad
—
5
5
—
Pad
Voltage Adjust/Sense Input
Exposed Pad of the Package (ground potential)
Pad
EP
3.1
Input Voltage Supply (V )
3.4
Power Good Output (PWRGD)
IN
Connect the unregulated or regulated input voltage
source to VIN. If the input voltage source is located
several inches away from the LDO, or the input source
is a battery, it is recommended that an input capacitor
be used. A typical input capacitance value of 1 µF to
10 µF should be sufficient for most applications.
The PWRGD output is an open-drain output used to
indicate when the LDO output voltage is within 92%
(typically) of its nominal regulation value. The PWRGD
threshold has a typical hysteresis value of 2%. The
PWRGD output is delayed by 200 µs (typical) from the
time the LDO output is within 92% + 3% (max
hysteresis) of the regulated output value on power-up.
This delay time is internally fixed.
3.2
Shutdown Control Input (SHDN)
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled. When the SHDN input is
pulled low, the PWRGD output also goes low and the
LDO enters a low quiescent current shutdown state
where the typical quiescent current is 0.1 µA.
3.5
Output Voltage Adjust Input (ADJ)
For adjustable applications, the output voltage is
connected to the ADJ input through a resistor divider
that sets the output voltage regulation value. This
provides the user the capability to set the output
voltage to any value they desire within the 0.8V to 5.0V
range of the device.
3.3
Ground (GND)
3.6
Regulated Output Voltage (V
)
OUT
Connect the GND pin of the LDO to a quiet circuit
ground. This will help the LDO power supply rejection
ratio and noise performance. The ground pin of the
LDO only conducts the quiescent current of the LDO
(typically 120 µA), so a heavy trace is not required.
For applications have switching or noisy inputs tie the
GND pin to the return of the output capacitor. Ground
planes help lower inductance and voltage spikes
caused by fast transient load currents and are
recommended for applications that are subjected to
fast load transients.
The VOUT pin is the regulated output voltage of the
LDO. A minimum output capacitance of 1.0 µF is
required for LDO stability. The MCP1827/MCP1827S is
stable with ceramic, tantalum and aluminum-electro-
lytic capacitors. See Section 4.3 “Output Capacitor”
for output capacitor selection guidance.
3.7
Exposed Pad (EP)
The DDPAK and TO-220 package have an exposed tab
on the package. A heat sink may be mount to the tab to
aid in the removal of heat from the package during
operation. The exposed tab is at the ground potential of
the LDO.
2006-2013 Microchip Technology Inc.
DS22001D-page 15
MCP1827/MCP1827S
EQUATION 4-2:
4.0
DEVICE OVERVIEW
VOUT – VADJ
The MCP1827/MCP1827S is a high output current,
Low Dropout (LDO) voltage regulator. The low dropout
voltage of 330 mV typical at 1.5A of current makes it
ideal for battery-powered applications. Unlike other
high output current LDOs, the MCP1827/MCP1827S
only draws a maximum of 220 µA of quiescent current.
The MCP1827 has a shutdown control input and a
power good output.
R1 = R --------------------------------
2
VADJ
Where:
VOUT
VADJ
=
=
LDO Output Voltage
ADJ Pin Voltage
(typically 0.41V)
4.2
Output Current and Current
Limiting
4.1
LDO Output Voltage
The 5-pin MCP1827 LDO is available with either a fixed
output voltage or an adjustable output voltage. The
output voltage range is 0.8V to 5.0V for both versions.
The 3-pin MCP1827S LDO is available as a fixed
voltage device.
The MCP1827/MCP1827S LDO is tested and ensured
to supply a minimum of 1.5A of output current. The
MCP1827/MCP1827S has no minimum output load, so
the output load current can go to 0 mA and the LDO will
continue to regulate the output voltage to within
tolerance.
4.1.1
ADJUST INPUT
The MCP1827/MCP1827S also incorporates an output
current limit. If the output voltage falls below 0.7V due
to an overload condition (usually represents a shorted
load condition), the output current is limited to 2.2A
(typical). If the overload condition is a soft overload, the
MCP1827/MCP1827S will supply higher load currents
of up to 3A. The MCP1827/MCP1827S should not be
operated in this condition continuously as it may result
in failure of the device. However, this does allow for
device usage in applications that have higher pulsed
load currents having an average output current value of
1.5A or less.
The adjustable version of the MCP1827 uses the ADJ
pin (pin 5) to get the output voltage feedback for output
voltage regulation. This allows the user to set the
output voltage of the device with two external resistors.
The nominal voltage for ADJ is 0.41V.
Figure 4-1 shows the adjustable version of the
MCP1827. Resistors R1 and R2 form the resistor
divider network necessary to set the output voltage.
With this configuration, the equation for setting VOUT is:
EQUATION 4-1:
Output overload conditions may also result in an over-
temperature shutdown of the device. If the junction
temperature rises above 150°C, the LDO will shut
down the output voltage. See Section 4.8
“Overtemperature Protection” for more information
on overtemperature shutdown.
R1 + R2
------------------
VOUT = V
ADJ
R2
Where:
VOUT
VADJ
=
=
LDO Output Voltage
ADJ Pin Voltage
(typically 0.41V)
4.3
Output Capacitor
The MCP1827/MCP1827S requires a minimum output
capacitance of 1 µF for output voltage stability. Ceramic
capacitors are recommended because of their size,
cost and environmental robustness qualities.
MCP1827-ADJ
VOUT
R1
On
C2
1 µF
1
2
3
4
5
Off
SHDN
ADJ
Aluminum-electrolytic and tantalum capacitors can be
used on the LDO output as well. The Equivalent Series
Resistance (ESR) of the electrolytic output capacitor
must be no greater than 1 ohm. The output capacitor
should be located as close to the LDO output as is
practical. Ceramic materials X7R and X5R have low
temperature coefficients and are well within the
acceptable ESR range required. A typical 1 µF X7R
0805 capacitor has an ESR of 50 milli-ohms.
VIN
C1
R2
GND
4.7 µF
FIGURE 4-1:
Typical adjustable output
voltage application circuit.
The allowable resistance value range for resistor R2 is
from 10 k to 200 k. Solving the equation for R1
yields the following equation:
DS22001D-page 16
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
Larger LDO output capacitors can be used with the
MCP1827/MCP1827S to improve dynamic
performance and power supply ripple rejection. A
maximum of 22 µF is recommended. Aluminum-
electrolytic capacitors are not recommended for low-
temperature applications of 25°C.
When the LDO is put into Shutdown mode using the
SHDN input, the power good output is pulled low
immediately, indicating that the output voltage will be
out of regulation. The timing diagram for the power
good output when using the shutdown input is shown in
Figure 4-3.
The power good output is an open-drain output that can
be pulled up to any voltage that is equal to or less than
the LDO input voltage. This output is capable of sinking
1.2 mA (VPWRGD < 0.4V maximum).
4.4
Input Capacitor
Low input source impedance is necessary for the LDO
output to operate properly. When operating from
batteries, or in applications with long lead length
(> 10 inches) between the input source and the LDO,
some input capacitance is recommended. A minimum
of 1.0 µF to 4.7 µF is recommended for most
applications.
VPWRGD_TH
VOUT
TPG
For applications that have output step load
requirements, the input capacitance of the LDO is very
important. The input capacitance provides the LDO
with a good local low-impedance source to pull the
transient currents from in order to respond quickly to
the output load step. For good step response
performance, the input capacitor should be of
equivalent (or higher) value than the output capacitor.
The capacitor should be placed as close to the input of
the LDO as is practical. Larger input capacitors will also
help reduce any high-frequency noise on the input and
output of the LDO and reduce the effects of any
inductance that exists between the input source
voltage and the input capacitance of the LDO.
VOH
TVDET_PWRGD
PWRGD
VOL
FIGURE 4-2:
Power Good Timing.
VIN
TOR
4.5
Power Good Output (PWRGD)
The PWRGD output is used to indicate when the output
voltage of the LDO is within 92% (typical value, see
Section 1.0 “Electrical Characteristics” for Minimum
and Maximum specifications) of its nominal regulation
value.
70 µs
30 µs
SHDN
TPG
As the output voltage of the LDO rises, the PWRGD
output will be held low until the output voltage has
exceeded the power good threshold plus the hysteresis
value. Once this threshold has been exceeded, the
power good time delay is started (shown as TPG in the
Electrical Characteristics table). The power good time
delay is fixed at 200 µs (typical). After the time delay
period, the PWRGD output will go high, indicating that
the output voltage is stable and within regulation limits.
VOUT
PWRGD
If the output voltage of the LDO falls below the power
good threshold, the power good output will transition
low. The power good circuitry has a 170 µs delay when
detecting a falling output voltage, which helps to
increase noise immunity of the power good output and
avoid false triggering of the power good output during
fast output transients. See Figure 4-2 for power good
timing characteristics.
FIGURE 4-3:
Shutdown.
Power Good Timing from
4.6
Shutdown Input (SHDN)
The SHDN input is an active-low input signal that turns
the LDO on and off. The SHDN threshold is a
percentage of the input voltage. The typical value of
this shutdown threshold is 30% of VIN, with minimum
and maximum limits over the entire operating
temperature range of 45% and 15%, respectively.
2006-2013 Microchip Technology Inc.
DS22001D-page 17
MCP1827/MCP1827S
The SHDN input will ignore low-going pulses (pulses
meant to shut down the LDO) that are up to 400 ns in
pulse width. If the shutdown input is pulled low for more
than 400 ns, the LDO will enter Shutdown mode. This
small bit of filtering helps to reject any system noise
spikes on the shutdown input signal.
Since the MCP1827/MCP1827S LDO undervoltage
lockout activates at 2.04V as the input voltage is falling,
the dropout voltage specification does not apply for
output voltages that are less than 1.9V.
For high-current applications, voltage drops across the
PCB traces must be taken into account. The trace
resistances can cause significant voltage drops
between the input voltage source and the LDO. For
applications with input voltages near 2.3V, these PCB
trace voltage drops can sometimes lower the input
On the rising edge of the SHDN input, the shutdown
circuitry has a 30 µs delay before allowing the LDO
output to turn on. This delay helps to reject any false
turn-on signals or noise on the SHDN input signal. After
the 30 µs delay, the LDO output enters its soft-start
period as it rises from 0V to its final regulation value. If
the SHDN input signal is pulled low during the 30 µs
delay period, the timer will be reset and the delay time
will start over again on the next rising edge of the
SHDN input. The total time from the SHDN input going
high (turn-on) to the LDO output being in regulation is
typically 100 µs. See Figure 4-4 for a timing diagram of
the SHDN input.
voltage enough to trigger
undervoltage lockout.
a shutdown due to
4.8
Overtemperature Protection
The MCP1827/MCP1827S LDO has temperature-
sensing circuitry to prevent the junction temperature
from exceeding approximately 150°C. If the LDO
junction temperature does reach 150°C, the LDO
output will be turned off until the junction temperature
cools to approximately 140°C, at which point the LDO
output will automatically resume normal operation. If
the internal power dissipation continues to be
excessive, the device will again shut off. The junction
temperature of the die is a function of power
dissipation, ambient temperature and package thermal
resistance. See Section 5.0 “Application Circuits/
Issues” for more information on LDO power
dissipation and junction temperature.
TOR
400 ns (typ)
70 µs
30 µs
SHDN
VOUT
FIGURE 4-4:
Shutdown Input Timing
Diagram.
4.7
Dropout Voltage and Undervoltage
Lockout
Dropout voltage is defined as the input-to-output
voltage differential at which the output voltage drops
2% below the nominal value that was measured with a
VR
+ 0.6V differential applied. The MCP1827/
MCP1827S LDO has a very low dropout voltage
specification of 330 mV (typical) at 1.5A of output
current. See Section 1.0 “Electrical Characteristics”
for maximum dropout voltage specifications.
The MCP1827/MCP1827S LDO operates across an
input voltage range of 2.3V to 6.0V and incorporates
input Undervoltage Lockout (UVLO) circuitry that keeps
the LDO output voltage off until the input voltage
reaches a minimum of 2.18V (typical) on the rising
edge of the input voltage. As the input voltage falls, the
LDO output will remain on until the input voltage level
reaches 2.04V (typical).
DS22001D-page 18
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
In addition to the LDO pass element power dissipation,
there is power dissipation within the MCP1827/
MCP1827S as a result of quiescent or ground current.
The power dissipation as a result of the ground current
can be calculated using the following equation:
5.0
5.1
APPLICATION CIRCUITS/
ISSUES
Typical Application
The MCP1827/MCP1827S is used for applications that
require high LDO output current and a power good
output.
EQUATION 5-2:
PIGND = VINMAX IVIN
Where:
VOUT = 2.5V @ 1.5A
PI(GND
=
Power dissipation due to the
quiescent current of the LDO
MCP1827-2.5
R1
On
C2
10 µF
1
2 3 4
5
10 k
Off
VIN(MAX)
IVIN
=
=
Maximum input voltage
SHDN
VIN
Current flowing in the VIN pin
with no LDO output current
(LDO quiescent current)
3.3V
C1
4.7 µF
PWRGD
GND
The total power dissipated within the MCP1827/
MCP1827S is the sum of the power dissipated in the
LDO pass device and the P(IGND) term. Because of the
CMOS construction, the typical IGND for the MCP1827/
MCP1827S is 120 µA. Operating at a maximum of
3.465V results in a power dissipation of 0.49 milli-
Watts. For most applications, this is small compared to
the LDO pass device power dissipation and can be
neglected.
FIGURE 5-1:
Typical Application Circuit.
5.1.1
APPLICATION CONDITIONS
Package Type = TO-220-5
Input Voltage Range = 3.3V ± 5%
VIN maximum = 3.465V
VIN minimum = 3.135V
VDROPOUT (max) = 0.600V
VOUT (typical) = 2.5V
The maximum continuous operating junction
temperature specified for the MCP1827/MCP1827S is
+125°C. To estimate the internal junction temperature
of the MCP1827/MCP1827S, the total internal power
dissipation is multiplied by the thermal resistance from
junction to ambient (RJA) of the device. The thermal
resistance from junction to ambient for the TO-220-5
package is estimated at 29.3° C/W.
IOUT = 1.5A maximum
PDISS (typical) = 1.2W
Temperature Rise = 35.2°C
5.2
5.2.1
Power Calculations
EQUATION 5-3:
TJMAX = PTOTAL RJA + TAMAX
POWER DISSIPATION
The internal power dissipation within the MCP1827/
MCP1827S is a function of input voltage, output
voltage, output current and quiescent current.
Equation 5-1 can be used to calculate the internal
power dissipation for the LDO.
TJ(MAX) = Maximum continuous junction
temperature
PTOTAL = Total device power dissipation
RJA = Thermal resistance from junction to
ambient
EQUATION 5-1:
TA(MAX) = Maximum ambient temperature
PLDO = VINMAX – VOUTMIN IOUTMAX
Where:
PLDO
=
LDO Pass device internal
power dissipation
VIN(MAX)
=
=
Maximum input voltage
VOUT(MIN)
LDO minimum output voltage
2006-2013 Microchip Technology Inc.
DS22001D-page 19
MCP1827/MCP1827S
The maximum power dissipation capability for a
package can be calculated given the junction-to-
ambient thermal resistance and the maximum ambient
temperature for the application. Equation 5-4 can be
used to determine the package maximum internal
power dissipation.
5.3
Typical Application
Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
is calculated in the following example. The power
dissipation as a result of ground current is small
enough to be neglected.
EQUATION 5-4:
5.3.1
POWER DISSIPATION EXAMPLE
TJMAX – TAMAX
PDMAX = ---------------------------------------------------
RJA
Package
Package Type = TO-220-5
Input Voltage
PD(MAX) = Maximum device power dissipation
TJ(MAX) = maximum continuous junction
temperature
VIN = 3.3V ± 5%
LDO Output Voltage and Current
VOUT = 2.5V
TA(MAX) = maximum ambient temperature
RJA = Thermal resistance from junction to
IOUT = 1.5A
ambient
Maximum Ambient Temperature
TA(MAX) = 60°C
EQUATION 5-5:
Internal Power Dissipation
PLDO(MAX) = (VIN(MAX) – VOUT(MIN)) x IOUT(MAX)
TJRISE = PDMAX RJA
PLDO = ((3.3V x 1.05) – (2.5V x 0.975))
x 1.5A
TJ(RISE) = Rise in device junction temperature
over the ambient temperature
PLDO = 1.54 Watts
PD(MAX) = Maximum device power dissipation
RJA = Thermal resistance from junction to
5.3.1.1
Device Junction Temperature Rise
ambient
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction-to-ambient for the application. The
thermal resistance from junction-to-ambient (RJA) is
derived from EIA/JEDEC standards for measuring
thermal resistance. The EIA/JEDEC specification is
JESD51. The standard describes the test method and
board specifications for measuring the thermal
resistance from junction to ambient. The actual thermal
EQUATION 5-6:
TJ = TJRISE + TA
TJ = Junction temperature
TJ(RISE) = Rise in device junction temperature
over the ambient temperature
TA = Ambient temperature
resistance for a particular application can vary
depending on many factors such as copper area and
thickness. Refer to AN792, “A Method to Determine
How Much Power a SOT23 Can Dissipate in an
Application” (DS00792), for more information regarding
this subject.
TJ(RISE) = PTOTAL x RJA
TJ(RISE) = 1.54 W x 29.3° C/W
TJ(RISE) = 45.12°C
DS22001D-page 20
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
5.3.1.2
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
TJ = TJ(RISE) + TA(MAX)
TJ = 45.12°C + 60.0°C
TJ = 105.12°C
As you can see from the result, this application will be
operating within the maximum operating junction
temperature of 125°C.
5.3.1.3
Maximum Package Power
Dissipation at 60°C Ambient
Temperature
TO-220-5 (29.3° C/W RJA):
PD(MAX) = (125°C – 60°C) / 29.3° C/W
PD(MAX) = 2.218W
DDPAK-5 (31.2°C/Watt RJA):
PD(MAX) = (125°C – 60°C)/ 31.2° C/W
PD(MAX) = 2.083W
From this table you can see the difference in maximum
allowable power dissipation between the TO-220-5
package and the DDPAK-5 package.
2006-2013 Microchip Technology Inc.
DS22001D-page 21
MCP1827/MCP1827S
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
3-Lead DDPAK (MCP1827S)
Example:
XXXXXXXXX
XXXXXXXXX
YYWWNNN
MCP1827S
0.8EEB^
0630256
e
3
1
2
3
1
2
3
3-Lead TO-220 (MCP1827S)
Example:
MCP1827S
XXXXXXXXX
XXXXXXXXX
YYWWNNN
12EAB^
e3
0630256
1
2
3
1
2
3
5-Lead DDPAK (Fixed) (MCP1827)
Example:
MCP1827
XXXXXXXXX
XXXXXXXXX
YYWWNNN
1.0EET^
e3
0630256
1 2 3 4 5
Example:
1 2 3 4 5
5-Lead TO-220 (Adj) (MCP1827)
MCP1827
e3
08EAT
0630256
XXXXXXXXX
XXXXXXXXX
YYWWNNN
1 2 3 4 5
1 2 3 4 5
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
DS22001D-page 22
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
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,ꢃ!- ,ꢉꢍꢄꢈꢂꢏꢄ#ꢌꢆꢍꢄꢐꢆꢁꢂꢗꢊꢌꢐꢋꢌ ꢄꢈꢉꢑꢑꢘꢂꢌ'ꢉꢈ ꢂ.ꢉꢑ&ꢌꢂꢍꢊꢐ/ꢆꢂ/ꢄ ꢊꢐ& ꢂ ꢐꢑꢌꢋꢉꢆꢈꢌꢍꢁ
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2006-2013 Microchip Technology Inc.
DS22001D-page 23
MCP1827/MCP1827S
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22001D-page 24
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
"ꢀGrhqꢁQyhvpꢁUꢄhvꢄꢁPyvrꢁꢂ67ꢃꢁbUPꢀ!!ꢅd
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ꢊ ꢒ-44///ꢁ#ꢄꢈꢋꢐꢈꢊꢄꢒꢁꢈꢐ#4ꢒꢉꢈ1ꢉꢅꢄꢆꢅ
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2006-2013 Microchip Technology Inc.
DS22001D-page 25
MCP1827/MCP1827S
$ꢀGrhqꢁQyhvpꢁꢂ@Uꢃꢁb99Q6Fd
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CHAMFER
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,ꢃ!- ,ꢉꢍꢄꢈꢂꢏꢄ#ꢌꢆꢍꢄꢐꢆꢁꢂꢗꢊꢌꢐꢋꢌ ꢄꢈꢉꢑꢑꢘꢂꢌ'ꢉꢈ ꢂ.ꢉꢑ&ꢌꢂꢍꢊꢐ/ꢆꢂ/ꢄ ꢊꢐ& ꢂ ꢐꢑꢌꢋꢉꢆꢈꢌꢍꢁ
ꢓꢄꢈꢋꢐꢈꢊꢄꢒ ꢗꢌꢈꢊꢆꢐꢑꢐꢅꢘ ꢏꢋꢉ/ꢄꢆꢅ !ꢔꢖꢝꢔꢀꢎ,
DS22001D-page 26
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2006-2013 Microchip Technology Inc.
DS22001D-page 27
MCP1827/MCP1827S
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DS22001D-page 28
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
APPENDIX A: REVISION HISTORY
Revision D (March 2013)
The following is the list of modifications:
• Updated the value of VDROPOUT (max) in
Section 5.1 “Typical Application”.
• Updated the 5-lead DDPAK (MCP1827) informa-
tion in the Product Identification Systemsection.
Revision C (February 2007)
•
Figure 2-22: Revised label on Y-axis.
• Section 2.0 “Typical Performance Curves”:
Added note on Junction Temperature.
• Pages 9-14: Revised notes.
Revision B (September 2006)
• Correction to maximum Dropout Voltage in
Section 1.0.
• Added additional graphs in Section 2.0.
• Added disclaimer to package outline drawings.
Revision A (July 2006)
• Original Release of this Document.
2006-2013 Microchip Technology Inc.
DS22001D-page 29
MCP1827/MCP1827S
NOTES:
DS22001D-page 30
2006-2013 Microchip Technology Inc.
MCP1827/MCP1827S
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
XX
X
X
X/
XX
a)
b)
c)
d)
e)
f)
MCP1827-0802E/AT: 0.8V LDO Regulator
Output Feature Tolerance Temp. Package
Voltage
5LD TO-220
MCP1827-1002E/ET: 1.0V LDO Regulator
5LD DDPAK
Code
MCP1827-1202E/AT: 1.2V LDO Regulator
5LD TO-220
Device:
MCP1827: 1.5A Low Dropout Regulator
MCP1827T: 1.5A Low Dropout Regulator
Tape and Reel
MCP1827S: 1.5A Low Dropout Regulator
MCP1827ST: 1.5A Low Dropout Regulator
Tape and Reel
MCP1827-1802E/AT: 1.8V LDO Regulator
5LD TO-220
MCP1827-2502E/ET: 2.5V LDO Regulator
5LD DDPAK
MCP1827-3002E/ET: 3.0V LDO Regulator
5LD DDPAK
Output Voltage *:
08
12
18
25
30
33
50
=
=
=
=
=
=
=
0.8V “Standard”
1.2V “Standard”
1.8V “Standard”
2.5V “Standard”
3.0V “Standard”
3.3V “Standard”
5.0V “Standard”
g)
h)
i)
MCP1827-3302E/AT 3.3V LDO Regulator
5LD TO-220
MCP1827-5002E/ET: 5.0V LDO Regulator
5LD DDPAK
MCP1827-ADJE/AT: ADJ LDO Regulator
5LD TO-220
*Contact factory for other output voltage options
j)
MCP1827-ADJE/ET ADJ LDO Regulator
5LD DDPAK
Extra Feature Code:
Tolerance:
0
2
E
=
=
=
Fixed
2.0% (Standard)
-40C to +125C
a)
b)
c)
d)
e)
f)
MCP1827S-0802E/EB:0.8V LDO Regulator
3LD DDPAK
Temperature:
Package Type:
MCP1827S-0802E/AB:0.8V LDO Regulator
3LD TO-220
MCP1827S-1002E/EB:1.0V LDO Regulator
3LD DDPAK
AB
AT
EB
ET
=
=
=
=
Plastic Transistor Outline, TO-220, 3-lead
Plastic Transistor Outline, TO-220, 5-lead
Plastic, DDPAK, 3-lead
MCP1827S-1202E/AB 1.2V LDO Regulator
3LD TO-220
Plastic, DDPAK, 5-lead
MCP1827S-1802E/EB 1.8V LDO Regulator
3LD DDPAK
MCP1827S-2502E/EB 2.5V LDO Regulator
3LD DDPAK
g)
h)
i)
MCP1827S-2502E/EB 3.0V LDO Regulator
3LD DDPAK
MCP1827S-3302E/AB 3.3V LDO Regulator
3LD TO-220
MCP1827S-5002E/EB 5.0V LDO Regulator
3LD DDPAK
2006-2013 Microchip Technology Inc.
DS22001D-page 31
MCP1827/MCP1827S
NOTES:
DS22001D-page 32
2006-2013 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
32
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2006-2013, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620770412
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
== ISO/TS 16949 ==
2006-2013 Microchip Technology Inc.
DS22001D-page 33
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Asia Pacific Office
Suites 3707-14, 37th Floor
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Tel: 852-2401-1200
Fax: 852-2401-3431
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Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
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Tel: 91-20-2566-1512
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Tel: 49-89-627-144-0
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Tel: 81-3-6880- 3770
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Chicago
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Tel: 630-285-0071
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Spain - Madrid
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Tel: 86-571-2819-3187
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Fax: 82-2-558-5932 or
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Fax: 60-4-227-4068
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Santa Clara, CA
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China - Xian
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Fax: 66-2-694-1350
Toronto
Mississauga, Ontario,
Canada
China - Xiamen
Tel: 905-673-0699
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Tel: 86-592-2388138
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Tel: 86-756-3210040
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11/29/12
DS22001D-page 34
2006-2013 Microchip Technology Inc.
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