MCP6032E/MS [MICROCHIP]
0.9 uA, High Precision Op Amps; 0.9微安，高精密运算放大器
| 型号： | MCP6032E/MS |
| 厂家： | 
MICROCHIP |
| 描述： | 0.9 uA, High Precision Op Amps |
| 文件： | 总30页 (文件大小：967K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCP6031/2/3/4
0.9 µA, High Precision Op Amps
Features
Description
• Rail-to-Rail Input and Output
The Microchip Technology Inc. MCP6031/2/3/4 family
of operational amplifiers (op amps) operate with a
single supply voltage as low as 1.8V, while drawing
ultra low quiescent current per amplifier (0.9 µA,
typical). This family also has low input offset voltage
(±150 µV, maximum) and rail-to-rail input and output
operation. This combination of features supports
battery-powered and portable applications.
• Low Offset Voltage: ±150 µV (maximum)
• Ultra Low Quiescent Current: 0.9 µA (typical)
• Wide Power Supply Voltage: 1.8V to 5.5V
• Gain Bandwidth Product: 10 kHz (typical)
• Unity Gain Stable
• Chip Select (CS) capability: MCP6033
• Extended Temperature Range:
- -40°C to +125°C
The MCP6031/2/3/4 family is unity gain stable and has
a gain bandwidth product of 10 kHz (typical). These
specs make these op amps appropriate for low fre-
quency applications, such as battery current
monitoring and sensor conditioning.
• No Phase Reversal
Applications
The MCP6031/2/3/4 family is offered in single
(MCP6031), single with power saving Chip Select (CS)
input (MCP6033), dual (MCP6032), and quad
(MCP6034) configurations.
• Toll Booth Tags
• Wearable Products
• Battery Current Monitoring
• Sensor Conditioning
• Battery Powered
The MCP6031/2/3/4 family is designed with Micro-
chip’s advanced CMOS process. All devices are
available in the extended temperature range, with a
power supply range of 1.8V to 5.5V.
Design Aids
• SPICE Macro Models
• FilterLab® Software
• MindiTM Simulation Tool
Package Types
MCP6031
SOIC, MSOP
MCP6032
SOIC, MSOP
• MAPS (Microchip Advanced Part Selector)
• Analog Demonstration and Evaluation Boards
• Application Notes
VDD
1
2
3
4
8
7
6
5
VOUTA
NC
NC
1
2
8
7
VOUTB
VINA
–
+
VIN
–
+
VDD
VINB
VINB
–
+
VINA
VIN
VOUT
NC
3
4
6
5
VSS
VSS
Typical Application
VDD
VDD
MCP6034
SOIC, TSSOP
MCP6033
SOIC, MSOP
VOUTD
VOUT
1
2
3
4
5
6
7
14
13
12
11
10
9
VOUTA
NC
CS
1
2
8
7
MCP6031
VIND
VIND
VSS
–
+
IDD
100 kΩ
10Ω
VINA
–
+
VIN
–
+
VDD
VINA
VIN
VOUT
NC
3
4
6
5
VSS
VDD
VINB
VINB
VSS
1.8V to
5.5V
VINC
+
–
+
VSS
–
VINC
1 MΩ
VOUTC
8
VOUTB
VDD – VOUT
IDD = -------------------------------------------
(10 V ⁄ V) • (10Ω)
High Side Battery Current Sensor
© 2007 Microchip Technology Inc.
DS22041A-page 1
MCP6031/2/3/4
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other conditions
above those indicated in the operational listings of this
specification is not implied. Exposure to maximum rat-
ing conditions for extended periods may affect device
reliability.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD – VSS ........................................................................7.0V
Current at Analog Input Pins (VIN+, VIN-). .....................±2 mA
Analog Inputs (VIN+, VIN-)††........... VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V
†† See Section 4.1.2 “Input Voltage and Current
Limits”
Difference Input Voltage ...................................... |VDD – VSS
|
Output Short-Circuit Current .................................continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±30 mA
Storage Temperature.....................................-65°C to +150°C
Maximum Junction Temperature (TJ)..........................+150°C
ESD protection on all pins (HBM; MM) ................ ≥ 4 kV; 400V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND,
VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2 and RL = 1 MΩ to VL (Refer to Figure 1-2 and Figure 1-3).
Parameters
Input Offset
Input Offset Voltage
Sym
Min
Typ
Max
Units
Conditions
VOS
-150
—
—
+150
—
µV
VDD = 3.0V, VCM = VDD/3
Input Offset Drift with Temperature ΔVOS/ΔTA
±3.0
µV/°C TA= -40°C to +125°C,
VDD = 3.0V, VCM = VDD/3
Power Supply Rejection Ratio
Input Bias Current and Impedance
Input Bias Current
PSRR
70
88
—
dB
VCM = VSS
IB
IB
—
—
—
—
—
—
±1.0
60
100
—
pA
pA
TA = +85°C
IB
2000
5000
—
pA
TA = +125°C
Input Offset Current
IOS
ZCM
ZDIFF
±1.0
pA
Common Mode Input Impedance
Differential Input Impedance
Common Mode
1013||6
1013||6
—
Ω||pF
Ω||pF
—
Common Mode Input Voltage
Range
VCMR
VSS − 0.3
—
95
93
89
93
VDD
0.3
+
V
Common Mode Rejection Ratio
CMRR
70
72
70
72
—
—
—
—
dB
dB
dB
dB
V
CM = -0.3V to 2.1V,
VDD = 1.8V
CM = -0.3V to 5.8V,
V
VDD = 5.5V
VCM = 2.75V to 5.8V,
VDD = 5.5V
V
CM = -0.3V to 2.75V,
VDD = 5.5V
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
AOL
95
115
—
dB
0.2V < VOUT < (VDD – 0.2V)
RL = 50 kΩ to VL
DS22041A-page 2
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND,
VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2 and RL = 1 MΩ to VL (Refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Output
Maximum Output Voltage Swing
VOL, VOH VSS + 10
—
VDD – 10
mV RL = 50 kΩ to VL,
0.5V output overdrive
Output Short-Circuit Current
ISC
—
—
±5
—
—
mA VDD = 1.8V
±23
mA
VDD = 5.5V
Power Supply
Supply Voltage
VDD
IQ
1.8
0.4
—
5.5
V
Quiescent Current per Amplifier
0.9
1.35
µA
IO = 0, VCM = VDD,
VDD = 5.5V
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +5.5V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, CL = 60 pF and RL = 1 MΩ to VL (Refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
10
65
—
—
—
kHz
°
G = +1
Slew Rate
SR
4.0
V/ms
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni
eni
ini
—
—
—
3.9
165
0.6
—
—
—
µVp-p f = 0.1 Hz to 10 Hz
nV/√Hz f = 1 kHz
fA/√Hz f = 1 kHz
© 2007 Microchip Technology Inc.
DS22041A-page 3
MCP6031/2/3/4
MCP6033 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VCM = VDD
/
2, VOUT = VDD/2, VL = VDD/2, CL = 60 pF and RL = 1 MΩ to VL (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
CS Low Specifications
CS Logic Threshold, Low
CS Input Current, Low
CS High Specifications
CS Logic Threshold, High
CS Input Current, High
GND Current
VIL
VSS
—
—
0.2VDD
—
V
ICSL
-10
pA
CS = VSS
VIH
ICSH
0.8VDD
—
VDD
—
V
10
-400
10
pA
pA
pA
CS = VDD
CS = VDD
CS = VDD
ISS
—
—
Amplifier Output Leakage
CS Dynamic Specifications
IO(LEAK)
—
—
CS Low to Amplifier Output
Turn-on Time
tON
—
—
—
4
10
100
—
ms
µs
V
CS ≤ 0.2VDD to VOUT = 0.9VDD/2,
G = +1 V/V, VIN = VDD/2,
RL = 50 kΩ to VL = VSS.
CS High to Amplifier Output
High-Z
tOFF
CS ≥ 0.8VDD to VOUT = 0.1VDD/2,
G = +1 V/V, VIN = VDD/2,
RL = 50 kΩ to VL = VSS.
CS Hysteresis
VHYST
0.3VDD
—
CS
VIL
VIH
tON
tOFF
VOUT
High-Z
High-Z
-0.9 µA (typ.)
-400 pA (typ.)
10 pA (typ.)
-400 pA (typ.)
ISS
ICS
FIGURE 1-1:
Timing Diagram for the CS
Pin on the MCP6033.
DS22041A-page 4
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +5.5V and VSS = GND.
Parameters
Temperature Ranges
Sym
Min
Typ
Max
Units
Conditions
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-MSOP
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
TA
TA
-40
-65
—
—
+125
+150
°C
°C
Note
θJA
θJA
θJA
θJA
—
—
—
—
163
206
120
100
—
—
—
—
°C/W
°C/W
°C/W
°C/W
Note:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
1.1
Test Circuits
The test circuits used for the DC and AC tests are
shown in Figure 1-2 and Figure 1-3. The bypass
capacitors are laid out according to the rules discussed
in Section 4.6 “Supply Bypass”.
VDD
2.2 µF
0.1 µF
RN
VIN
VOUT
MCP603X
CL
RL
VDD
2
VL
RG
RF
FIGURE 1-2:
AC and DC Test Circuit for Most Non-Inverting Gain Conditions.
VDD
2.2 µF
0.1 µF
RN
VDD
2
VOUT
MCP603X
CL
RL
VIN
VL
RG
RF
FIGURE 1-3:
AC and DC Test Circuit for Most Inverting Gain Conditions.
© 2007 Microchip Technology Inc.
DS22041A-page 5
MCP6031/2/3/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
400
14%
TA = -40°C
1424 Samples
DD = 3.0V
VCM = VDD/3
300
12%
10%
8%
TA = +25°C
V
TA = +85°C
TA = +125°C
200
100
0
6%
-100
-200
-300
-400
4%
2%
VDD = 3.0V
0%
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
Common Mode Input Voltage (V)
Input Offset Voltage (μV)
FIGURE 2-1:
Input Offset Voltage with
FIGURE 2-4:
Input Offset Voltage vs.
V
= 3.0V, V
= V /3.
Common Mode Input Voltage with V = 3.0V.
DD
CM
DD
DD
400
30%
TA = -40°C
1080 Samples
VDD = 3.0V
VCM = VDD/3
300
200
100
0
TA = +25°C
TA = +85°C
TA = +125°C
25%
20%
15%
10%
5%
TA = -40°C to +125°C
-100
-200
-300
-400
VDD = 1.8V
0%
-12 -10 -8 -6 -4 -2
0
2
4
6
8 10 12
Input Offset Drift with Temperature (μV/°C)
Common Mode Input Voltage (V)
FIGURE 2-2:
Input Offset Voltage Drift
= V /3.
FIGURE 2-5:
Common Mode Input Voltage with V = 1.8V.
Input Offset Voltage vs.
with V = 3.0V, V
DD
CM
DD
DD
400
300
200
100
0
250
200
150
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
100
50
VDD = 3.0V
VDD = 5.5V
0
-50
-100
-200
VDD = 1.8V
-100
-150
-200
-250
-300
VDD = 5.5V
-400
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Output Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage with V = 5.5V.
Output Voltage.
DD
DS22041A-page 6
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
1,000
110
CMRR (VDD = 1.8V,
VCM = -0.3V to 2.1V)
105
100
95
90
85
80
75
70
65
60
CMRR (VDD = 5.5V,
VCM = -0.3V to 5.8V)
PSRR (VDD = 1.8V to 5.5V, VCM = VSS
)
100
0.1
1
10
100
1k
10k
100k
1E-1 1E+0 1E+1 1E+2 1E+3 1E+4 1E+5
-50
-25
0
25
50
75
100
125
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-7:
Input Noise Voltage Density
FIGURE 2-10:
Common Mode Rejection
vs. Frequency.
Ratio, Power Supply Rejection Ratio vs. Ambient
Temperature.
200
175
150
125
100
75
10000
VDD = 5.5V
VCM = VDD
1000
Input Bias Current
100
50
10
f = 1 kHz
DD = 5.5V
25
0
V
Input Offset Current
1
25
45
65
85
105
125
Common Mode Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-8:
Input Noise Voltage Density
FIGURE 2-11:
Input Bias, Offset Currents
vs. Common Mode Input Voltage.
vs. Ambient Temperature.
100
10000
PSRR-
90
VDD = 5.5V
80
70
PSRR+
TA = +125°C
1000
100
10
60
CMRR
50
40
30
20
TA = +85°C
10
0
VDD = 5.5V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
0.1
1
10
100
1000
Frequency (Hz)
FIGURE 2-9:
Common Mode Rejection
FIGURE 2-12:
Input Bias Current vs.
Ratio, Power Supply Rejection Ratio vs.
Frequency.
Common Mode Input Voltage.
© 2007 Microchip Technology Inc.
DS22041A-page 7
MCP6031/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
120
100
80
0
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Open-Loop Gain
VDD = 5.5V @ VCM = VDD
VDD = 5.5V @ VCM = VSS
-30
-60
Open-Loop Phase
60
-90
40
-120
-150
-180
-210
VDD = 1.8V @ VCM = VDD
VDD = 1.8V @ VCM = VSS
20
0
VDD = 5.5V
-20
0.001 0.01
0
1k 10k 100k
10 100
1
-50
-25
0
25
50
75
100 125
Ambient Temperature (°C)
Frequency (Hz)
FIGURE 2-13:
Quiescent Current vs
FIGURE 2-16:
Open-Loop Gain, Phase vs.
Ambient Temperature.
Frequency.
1.2
130
125
120
115
110
105
100
95
VCM = VDD
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
RL = 50 kΩ
VSS + 0.2V < VOUT < VDD - 0.2V
90
85
80
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Power Supply Voltage VDD (V)
Power Supply Voltage (V)
FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
DC Open-Loop Gain vs.
Power Supply Voltage with V
= V
.
Power Supply Voltage.
CM
DD
1.2
1.1
130
VCM = VSS
125
120
115
110
105
100
95
90
85
80
VDD = 5.5V
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VDD = 1.8V
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
RL = 50 kΩ
Large Signal AOL
0.00
0.05
0.10
0.15
0.20
0.25
Output Voltage Headroom
VDD - VOUT or VOUT - VSS (V)
Power Supply Voltage (V)
FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs.
Power Supply Voltage with V
= V
.
Output Voltage Headroom.
CM
SS
DS22041A-page 8
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
130
20
18
16
14
12
10
8
6
4
2
0
90
80
70
60
50
40
30
20
10
0
120
110
100
90
Phase Margin
Gain Bandwidth Product
80
VDD = 1.8V
G = +1 V/V
70
Input Referred
60
100
1,000
10,000
-50 -25
0
25
50
75 100 125
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-19:
Channel-to-Channel
FIGURE 2-22:
Gain Bandwidth Product,
Separation vs. Frequency ( MCP6032/4 only).
Phase Margin vs. Ambient Temperature.
20
18
16
14
12
10
8
6
4
2
180
160
140
120
100
80
35
30
Gain Bandwidth Product
TA = -40°C
TA = +25°C
25
TA = +85°C
20
TA = +125°C
Phase Margin
15
10
5
60
40
VDD = 5.5V
G = +1 V/V
20
0
0
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-20:
Gain Bandwidth Product,
FIGURE 2-23:
Ouput Short Circuit Current
Phase Margin vs. Common Mode Input Voltage.
vs. Power Supply Voltage.
10
20
18
16
14
12
10
8
6
4
2
0
90
80
70
60
50
40
30
20
10
0
VDD = 5.5V
VDD = 3.0V
VDD = 1.8V
Phase Margin
1
Gain Bandwidth Product
VDD = 5.5V
G = +1 V/V
0.1
1K
10K
10
100
-50 -25
0
25
50
75 100 125
Ambient Temperature (°C)
Frequency (Hz)
FIGURE 2-21:
Gain Bandwidth Product,
FIGURE 2-24:
Output Voltage Swing vs.
Phase Margin vs. Ambient Temperature.
Frequency.
© 2007 Microchip Technology Inc.
DS22041A-page 9
MCP6031/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
1000
VDD - VOH @ VDD = 1.8V
VOL - VSS @ VDD = 1.8V
100
10
VDD = 5.5V
G = +1 V/V
VDD - VOH @ VDD = 5.5V
VOL - VSS @ VDD = 5.5V
1
10μ
100µ
1m
10m
Time (100 μs/Div)
Output Current (A)
FIGURE 2-25:
Output Voltage Headroom
FIGURE 2-28:
Small Signal Non-Inverting
vs. Output Current.
Pulse Response.
5.0
4.5
4.0
VDD = 5.5V
RL = 50 kΩ
VDD = 5.5V
G = -1 V/V
3.5
3.0
2.5
2.0
VDD - VOH
1.5
VSS - VOL
1.0
0.5
0.0
-50
-25
0
25
50
75
100 125
Time (100 μs/Div)
Ambient Temperature (°C)
FIGURE 2-26:
Output Voltage Headroom
FIGURE 2-29:
Small Signal Inverting Pulse
vs. Ambient Temperature.
Response.
7.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Falling Edge, VDD = 5.5V
Falling Edge, VDD = 1.8V
6.0
5.0
4.0
3.0
2.0
1.0
Rising Edge, VDD = 5.5V
Rising Edge, VDD = 1.8V
VDD = 5.5V
G = +1 V/V
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
Time (0.5 ms/div)
FIGURE 2-27:
Slew Rate vs. Ambient
FIGURE 2-30:
Large Signal Non-Inverting
Temperature.
Pulse Response.
DS22041A-page 10
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VDD = 5.5V
VDD = 5.5V
G = -1 V/V
Output On
Hysteresis
CS Input
High to Low
CS Input
Low to High
Output High-Z
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Chip Select Voltage (V)
Time (0.5 ms/div)
FIGURE 2-31:
Large Signal Inverting Pulse
FIGURE 2-34:
Chip Select (CS) Hysteresis
Response.
(MCP6033 only) with V = 5.5V.
DD
2.1
6.0
5.0
4.0
3.0
2.0
1.0
VIN
VDD = 3.0V
VOUT
1.8
Output On
1.5
Hysteresis
1.2
0.9
0.6
0.3
0.0
CS Input
High to Low
CS Input
Low to High
VDD = 5.0V
G = +2 V/V
Output High-Z
0.0
-1.0
0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0
Chip Select Voltage (V)
Time (2 ms/div)
FIGURE 2-32:
The MCP6031/2/3/4 family
FIGURE 2-35:
Chip Select (CS) Hysteresis
shows no phase reversal .
(MCP6033 only) with V = 3.0V.
DD
1.5
1.2
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-10
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
VDD = 1.8V
Output On
0.9
Chip Select
Hysteresis
0.6
0.3
0.0
CS Input
High to Low
CS Input
Low to High
Output On
VDD = 5.5V
G = +1 V/V
R
L = 50 kΩ to VSS
Output High-Z
Output
High-Z
Output
High-Z
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
Chip Select Voltage (V)
Time (1 ms/div)
FIGURE 2-33:
Chip Select (CS) to
FIGURE 2-36:
Chip Select (CS) Hysteresis
Amplifier Output Response Time (MCP6033
only).
(MCP6033 only) with V = 1.8V.
DD
© 2007 Microchip Technology Inc.
DS22041A-page 11
MCP6031/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
10
100k
10m
1.00
1m
1.00E
10k
10
100µ
1.0
10µ
1.00
1k
10
1µ
1.00E
100n
1.00
GN:
101 V/V
11 V/V
1 V/V
100
10n
1.00
+125°C
+85°C
+25°C
-40°C
1n
1.00E
10
100p
1.00
10p
1.00
1
1p
1.00E
1
10
100
1k
10k
100k
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
VIN (V)
Frequency (Hz)
FIGURE 2-37:
Closed Loop Output
FIGURE 2-38:
Measured Input Current vs.
Impedance vs. Frequency.
Input Voltage (below V ).
SS
DS22041A-page 12
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP6031
MCP6032
MCP6033
MCP6034
Symbol
Description
Analog Output (op amp A)
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
6
2
1
2
3
8
5
6
6
2
1
2
3
4
5
6
V
OUT, VOUTA
VIN–, VINA
–
+
3
3
VIN+, VINA
VDD
7
7
—
—
—
—
VINB
+
–
Non-inverting Input (op amp B)
Inverting Input (op amp B)
VINB
—
—
7
—
—
—
—
4
7
VOUTB
VOUTC
Analog Output (op amp B)
Analog Output (op amp C)
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Analog Output (op amp D)
Chip Select
—
—
—
4
8
—
9
VINC
VINC
–
—
10
11
12
13
14
—
—
+
4
VSS
—
—
—
—
—
—
—
—
—
8
VIND
VIND
+
—
–
—
VOUTD
CS
—
1, 5, 8
1, 5
NC
No Internal Connection
3.1
Analog Outputs
3.4
Power Supply (VSS and VDD)
The output pins are low-impedance voltage sources.
The positive power supply (VDD) is 1.8V to 5.5V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
3.2
Analog Inputs
and VDD
.
The non-inverting and inverting inputs are high-
impedance CMOS inputs with low bias currents.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need a local bypass capacitor (typically 0.01 µF to
0.1 µF) within 2 mm of the VDD pin. These parts can
share a bulk capacitor with analog parts (typically
2.2 µF to 10 µF) within 100 mm of the VDD pin, but it is
not required.
3.3
Chip Select Input (CS)
This is a CMOS, Schmitt-trigerred input that places the
MCP6033 op amp into a low-power mode of operation.
© 2007 Microchip Technology Inc.
DS22041A-page 13
MCP6031/2/3/4
4.0
APPLICATION INFORMATION
VDD
The MCP6031/2/3/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low-power, high precision
applications.
D1 D2
R1
V1
V2
4.1
Rail-to-Rail Input
MCP603X
4.1.1
PHASE REVERASAL
R2
The MCP6031/2/3/4 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 2-32 shows the input voltage exceed-
ing the supply voltage without any phase reversal.
R3
VSS – (minimum expected V1)
R1 >
R2 >
2 mA
VSS – (minimum expected V2)
2 mA
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltage that go too far above
VDD; their breakdown voltage is high enough to allow
normal operation and low enough to bypass ESD
events within the specified limits.
FIGURE 4-2:
Inputs.
Protecting the Analog
It is also possible to connect the diodes to the left of the
resistors R1 and R2. In this case, the currents through
the diodes D1 and D2 need to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC currents into the input pins (VIN+ and
VIN-) should be very small. A significant amount of
current can flow out of the inputs when the common
mode voltage (VCM) is below ground (VSS).
Bond
VDD
Pad
4.1.3
NORMAL OPERATION
The input stage of the MCP6031/2/3/4 op amps uses
two differential input stages in parallel. One operates at
a low common mode input voltage (VCM), while the
other operates at a high VCM. With this topology, the
device operates with a VCM up to 300 mV above VDD
and 300 mV below VSS. The input offset voltage is
measured at VCM = VSS – 0.3V and VDD + 0.3V to
ensure proper operation.
Bond
Pad
Bond
Pad
Input
Stage
VIN+
VIN–
Bond
Pad
VSS
FIGURE 4-1:
Simplified Analog Input ESD
Structures.
In order to prevent damage and/or improper operation
of these op amps, the circuit they are in must limit the
voltages and currents at the VIN+ and VIN- pins (see
Absolute Maximum Ratings at the beginning of
Section 1.0 “Electrical Characteristics”). Figure 4-2
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN-) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pins. Diodes D1 and D2 prevent the
input pins (VIN+ and VIN-) from going too far above VDD
.
When implemented as shown, resistors R1 and R2 also
limit the current through D1 and D2.
DS22041A-page 14
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
4.2
Rail-to-Rail Output
The output voltage range of the MCP6031/2/3/4 op
amps is VSS + 10 mV (minimum) and VDD – 10 mV
(maximum) when RL = 50 kΩ is connected to VDD/2
and VDD = 5.5V. Refer to Figures 2-25 and 2-26 for
more information.
–
RISO
VOUT
MCP603X
+
VIN
CL
4.3
Output Loads and Battery Life
FIGURE 4-3:
stabilizes large capacitive loads.
Output resistor, R
ISO
The MCP6031/2/3/4 op amp family has outstanding
quiescent current, which supports battery-powered
applications. There is minimal quiescent current glitch-
ing when Chip Select (CS) is raised or lowered. This
prevents excessive current draw, and reduced battery
life, when the part is turned off or on.
Figure 4-4 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
Heavy resistive loads at the output can cause exces-
sive battery drain. Driving a DC voltage of 2.5V across
a 100 kΩ load resistor will cause the supply current to
increase by 25 µA, depleting the battery 28 times as
fast as IQ (0.9 µA, typical) alone.
10001M
High frequency signals (fast edge rate) across capaci-
tive loads will also significantly increase supply current.
For instance, a 0.1 µF capacitor at the output presents
an AC impedance of 15.9 kΩ (1/2πfC) to a 100 Hz
sinewave. It can be shown that the average power
drawn from the battery by a 5.0 Vp-p sinewave
(1.77 Vrms), under these conditions, is
100k
10
GN:
1 V/V
2 V/V
≥ 5 V/V
10k
10
1k
10
10p
100p
1n
10n
100n
1µ
Normalized Load Capacitance; CL/GN (F)
EQUATION 4-1:
PSupply = (VDD - VSS) (IQ + VL(p-p) f CL )
= (5V)(0.9 µA + 5.0Vp-p · 100Hz · 0.1µF)
= 4.5 µW + 50 µW
FIGURE 4-4:
for Capacitive Loads.
Recommended R
values
ISO
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and simula-
tions with the MCP6031/2/3/4 SPICE macro model are
very helpful.
This will drain the battery about 12 times as fast as IQ
alone.
4.4
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, all gains show the same
general behavior.
4.5
MCP6033 CHIP SELECT (CS)
The MCP6033 is a single op amp with Chip Select
(CS). When CS is pulled high, the supply current drops
to 0.4 nA (typical) and flows through the CS pin to VSS
.
When this happens, the amplifier output is put into a
high impedance state. By pulling CS low, the amplifier
is enabled. If the CS pin is left floating, the amplifier will
not operate properly. Figure 1-1 shows the output
voltage and supply current response to a CS pulse.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (RISO in Figure 4-3) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
© 2007 Microchip Technology Inc.
DS22041A-page 15
MCP6031/2/3/4
4.6
Supply Bypass
Guard Ring
VIN– VIN+
VSS
With this family of operational amplifiers, the power
supply pin (VDD for single-supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other analog parts.
4.7
Unused Op Amps
FIGURE 4-6:
for Inverting Gain.
Example Guard Ring Layout
An unused op amp in a quad package (MCP6034)
should be configured as shown in Figure 4-5. These
circuits prevent the output from toggling and causing
crosstalk. Circuit A can use any reference voltage
1. Non-inverting Gain and Unity-Gain Buffer:
a. Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
between the supplies, provides
a buffered DC
voltage,and minimizes the supply current draw of the
unused op amp. Circuit B uses fewer components and
operates as a comparator; it may draw more current.
b. Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
2. Inverting Gain and Transimpedance Gain Ampli-
fiers (convert current to voltage, such as photo
detectors):
¼ MCP6034 (A)
¼ MCP6034 (B)
V
DD
V
DD
a. Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
V
DD
R
R
b. Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
FIGURE 4-5:
Unused Op Amps.
4.8
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; which is greater than the
MCP6031/2/3/4 family’s bias current at +25°C
(±1.0 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-6.
DS22041A-page 16
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
4.9.2
PRECISION COMPARATOR
4.9
Application Circuits
Use high gain before a comparator to improve the lat-
ter’s input offset performance. Figure 4-8 shows a gain
of 11 V/V placed before a comparator. The reference
voltage VREF can be any value between the supply
rails.
4.9.1
BATTERY CURRENT SENSING
The MCP6031/2/3/4 op amps’ Common Mode Input
Range, which goes 0.3V beyond both supply rails,
supports their use in high side and low side battery
current sensing applications. The ultra low quiescent
current (0.9 µA, typical) helps prolong battery life, and
the rail-to-rail output supports detection of low currents.
VIN
MCP6031
Figure 4-7 shows a high side battery current sensor
circuit. The 10Ω resistor is sized to minimize power
losses. The battery current (IDD) through the 10Ω
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the common
mode input voltage of the op amp below VDD, which is
within its allowed range. The output of the op amp will
also be below VDD, which is within its Maximum Output
Voltage Swing specification.
1 MΩ
VOUT
MCP6541
100 kΩ
VREF
FIGURE 4-8:
Comparator.
Precision, Non-inverting
VDD
VDD
VOUT
MCP6031
IDD
100 kΩ
10Ω
VSS
1.8V to
5.5V
VSS
1 MΩ
VDD – VOUT
IDD = -------------------------------------------
(10 V ⁄ V) • (10Ω)
FIGURE 4-7:
High Side Battery Current
Sensor.
© 2007 Microchip Technology Inc.
DS22041A-page 17
MCP6031/2/3/4
5.5
Analog Demonstration and
Evaluation Boards
5.0
DESIGN AIDS
Microchip provides the basic design aids needed for
the MCP6031/2/3/4 family of op amps.
Microchip offers a broad spectrum of Analog Demon-
stration and Evaluation Boards that are designed to
help you achieve faster time to market. For a complete
listing of these boards and their corresponding user’s
guides and technical information, visit the Microchip
web site at www.microchip.com/analogtools.
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6031/2/3/4
op amps is available on the Microchip web site at
www.microchip.com. This model is intended to be an
initial design tool that works well in the op amp’s linear
region of operation over the temperature range. See
the model file for information on its capabilities.
Two of our boards that are especially useful are:
• P/N SOIC8EV: 8-Pin SOIC/MSOP/TSSOP/DIP
Evaluation Board
• P/N SOIC14EV: 14-Pin SOIC/TSSOP/DIP Evalu-
ation Board
Bench testing is a very important part of any design and
cannot be replaced with simulations. Also, simulation
results using this macro model need to be validated by
comparing them to the data sheet specifications and
characteristic curves.
5.6
Application Notes
The following Microchip Application Notes are
available on the Microchip web site at www.micro-
chip.com/appnotes and are recommended as
supplemental reference resources.
5.2
FilterLab® Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the Micro-
chip web site at www.microchip.com/filterlab, the Filter-
Lab design tool provides full schematic diagrams of the
filter circuit with component values. It also outputs the
filter circuit in SPICE format, which can be used with
the macro model to simulate actual filter performance.
AN003: “Select the Right Operational Amplifier for your
Filtering Circuits”, DS00003
AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
AN723: “Operational Amplifier AC Specifications and
Applications”, DS00723
AN884: “Driving Capacitive Loads With Op Amps”,
DS00884
5.3
MindiTM Simulation Tool
Microchip’s MindiTM simulation tool aids in the design
of various circuits useful for active filter, amplifier and
power-management applications. It is a free online
simulation tool available from the Microchip web site at
www.microchip.com/mindi. This interactive simulator
enables designers to quickly generate circuit diagrams,
simulate circuits. Circuits developed using the Mindi
simulation tool can be downloaded to a personal com-
puter or workstation.
AN990: “Analog Sensor Conditioning Circuits - An
Overview”, DS00990
These application notes and others are listed in the
design guide:
“Signal Chain Design Guide”, DS21825
5.4
MAPS (Microchip Advanced Part
Selector)
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for Micro-
chip’s product portfolio that includes Analog, Memory,
MCUs and DSCs. Using this tool you can define a filter
to sort features for a parametric search of devices and
export side-by-side technical comparasion reports.
Helpful links are also provided for Datasheets, Pur-
chase, and Sampling of Microchip parts.
DS22041A-page 18
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
Example:
8-Lead MSOP
XXXXXX
YWWNNN
6031E
711256
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
MCP6033E
XXXXYYWW
SN^
e
3
0711
NNN
256
Legend: XX...X Customer-specific information
Y
YY
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
WW
NNN
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2007 Microchip Technology Inc.
DS22041A-page 19
MCP6031/2/3/4
Package Marking Information (Continued)
14-Lead SOIC (150 mil) (MCP6034)
Example:
XXXXXXXXXX
XXXXXXXXXX
MCP6034
E/SL^
0711256
e
3
YYWWNNN
Example:
14-Lead TSSOP (MCP6034)
XXXXXX
YYWW
6034EST
0711
256
NNN
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
DS22041A-page 20
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
8-Lead Plastic Micro Small Outline Package (MS) [MSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
2
b
1
e
c
φ
A2
A
L
L1
A1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
0.65 BSC
Overall Height
A
–
–
1.10
0.95
0.15
Molded Package Thickness
Standoff
A2
A1
E
0.75
0.00
0.85
–
4.90 BSC
3.00 BSC
3.00 BSC
0.60
Overall Width
Molded Package Width
Overall Length
Foot Length
E1
D
L
0.40
0.80
Footprint
L1
φ
0.95 REF
–
Foot Angle
0°
8°
Lead Thickness
Lead Width
c
0.08
0.22
–
0.23
0.40
b
–
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-111B
© 2007 Microchip Technology Inc.
DS22041A-page 21
MCP6031/2/3/4
8-Lead Plastic Small Outline (SN) – Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
e
N
E
E1
NOTE 1
1
2
3
α
h
b
h
c
φ
A2
A
L
A1
L1
β
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
Overall Height
A
–
–
1.75
–
Molded Package Thickness
Standoff
A2
A1
E
1.25
0.10
–
§
–
0.25
Overall Width
6.00 BSC
Molded Package Width
Overall Length
Chamfer (optional)
Foot Length
E1
D
h
3.90 BSC
4.90 BSC
0.25
0.40
–
0.50
1.27
L
–
Footprint
L1
φ
1.04 REF
Foot Angle
0°
0.17
0.31
5°
–
–
–
–
–
8°
Lead Thickness
Lead Width
c
0.25
0.51
15°
b
Mold Draft Angle Top
Mold Draft Angle Bottom
α
β
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-057B
DS22041A-page 22
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
14-Lead Plastic Small Outline (SL) – Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
1
2
3
e
h
b
α
h
c
φ
A2
A
L
A1
β
L1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
14
1.27 BSC
Overall Height
A
–
–
1.75
–
Molded Package Thickness
Standoff §
A2
A1
E
1.25
0.10
–
–
0.25
Overall Width
6.00 BSC
Molded Package Width
Overall Length
E1
D
h
3.90 BSC
8.65 BSC
Chamfer (optional)
Foot Length
0.25
0.40
–
0.50
1.27
L
–
Footprint
L1
φ
1.04 REF
Foot Angle
0°
0.17
0.31
5°
–
–
–
–
–
8°
Lead Thickness
Lead Width
c
0.25
0.51
15°
b
Mold Draft Angle Top
Mold Draft Angle Bottom
α
β
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-065B
© 2007 Microchip Technology Inc.
DS22041A-page 23
MCP6031/2/3/4
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
1
2
e
b
c
φ
A2
A
A1
L
L1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
14
0.65 BSC
Overall Height
Molded Package Thickness
Standoff
A
–
–
1.20
1.05
0.15
A2
A1
E
0.80
0.05
1.00
–
Overall Width
Molded Package Width
Molded Package Length
Foot Length
6.40 BSC
E1
D
4.30
4.90
0.45
4.40
4.50
5.10
0.75
5.00
L
0.60
Footprint
L1
φ
1.00 REF
Foot Angle
0°
–
–
–
8°
Lead Thickness
Lead Width
c
0.09
0.19
0.20
0.30
b
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-087B
DS22041A-page 24
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
APPENDIX A: REVISION HISTORY
Revision A (March 2007)
• Original Release of this Document.
© 2007 Microchip Technology Inc.
DS22041A-page 25
MCP6031/2/3/4
NOTES:
DS22041A-page 26
© 2007 Microchip Technology Inc.
MCP6031/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
X
/XX
a)
MCP6031-E/SN: Extended Temperature,
Temperature
Range
Package
8LD SOIC package.
MCP6031T-E/SN: Tape and Reel,
Extended Temperature,
b)
8LD SOIC package.
Device:
MCP6031:
Single Op Amp
Single Op Amp (Tape and Reel)
Dual Op Amp
Dual Op Amp (Tape and Reel)
Single Op Amp with Chip Select
Single Op Amp with Chip Select
(Tape and Reel)
c)
d)
MCP6031-E/MS: Extended Temperature,
8LD MSOP package.
MCP6031T:
MCP6032:
MCP6032T:
MCP6033:
MCP6033T:
MCP6031T-E/MS: Tape and Reel,
Extended Temperature,
8LD MSOP package.
MCP6034:
Quad Op Amp
MCP6034T:
Quad Op Amp (Tape and Reel)
a)
b)
MCP6032-E/SN: Extended Temperature,
8LD SOIC package.
MCP6032T-E/SN: Tape and Reel,
Extended Temperature,
Temperature Range:
Package:
E
=
-40°C to +125°C
8LD SOIC package.
MS
SL
SN
ST
=
=
=
=
Plastic MSOP, 8-lead
c)
d)
MCP6032-E/MS: Extended Temperature,
8LD MSOP package
Plastic SOIC (150 mil Body), 14-lead
Plastic SOIC, (150 mil Body), 8-lead
Plastic TSSOP (4.4mm Body), 14-lead
MCP6032T-E/MS: Tape and Reel
Extended Temperature,
8LD MSOP package.
a)
b)
MCP6033-E/SN: Extended Temperature,
8LD SOIC package.
MCP6033T-E/SN: Tape and Reel,
Extended Temperature,
8LD SOIC package.
c)
d)
MCP6033-E/MS: Extended Temperature,
8LD MSOP package.
MCP6033T-E/MS: Tape and Reel,
Extended Temperature,
8LD MSOP package.
a)
b)
MCP6034-E/SL: Extended Temperature,
14LD SOIC package.
MCP6034T-E/SL: Tape and Reel,
Extended Temperature,
14LD SOIC package.
c)
d)
MCP6034-E/ST: Extended Temperature,
14LD TSSOP package.
MCP6034T-E/ST: Tape and Reel,
Extended Temperature,
14LD TSSOP package.
© 2007 Microchip Technology Inc.
DS22041A-page 27
MCP6031/2/3/4
NOTES:
DS22041A-page 28
© 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC,
PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and
SmartShunt are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Linear Active Thermistor, Migratable
Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor
and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi,
MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit,
PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel, Total
Endurance, UNI/O, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2007, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona, Gresham, Oregon and Mountain View, California. The
Company’s quality system processes and procedures are for its PIC®
MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial
EEPROMs, microperipherals, nonvolatile memory and analog
products. In addition, Microchip’s quality system for the design and
manufacture of development systems is ISO 9001:2000 certified.
© 2007 Microchip Technology Inc.
DS22041A-page 29
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Habour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-4182-8400
Fax: 91-80-4182-8422
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Gumi
Tel: 82-54-473-4301
Fax: 82-54-473-4302
Boston
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Fuzhou
Tel: 86-591-8750-3506
Fax: 86-591-8750-3521
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Penang
Tel: 60-4-646-8870
Fax: 60-4-646-5086
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Shunde
Tel: 86-757-2839-5507
Fax: 86-757-2839-5571
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
China - Xian
Tel: 86-29-8833-7250
Fax: 86-29-8833-7256
12/08/06
DS22041A-page 30
© 2007 Microchip Technology Inc.
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