MCP6072T-E [MICROCHIP]
110 uA, High Precision Op Amps; 110微安，高精密运算放大器
| 型号： | MCP6072T-E |
| 厂家： | 
MICROCHIP |
| 描述： | 110 uA, High Precision Op Amps |
| 文件： | 总40页 (文件大小：1242K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCP6071/2/4
110 µA, High Precision Op Amps
Features
Description
• Low Offset Voltage: ±150 µV (maximum)
• Low Quiescent Current: 110 µA (typical)
• Rail-to-Rail Input and Output
The Microchip Technology Inc. MCP6071/2/4 family of
operational amplifiers (op amps) has low input offset
voltage (±150 µV, maximum) and rail-to-rail input and
output operation. This family is unity gain stable and
has a gain bandwidth product of 1.2 MHz (typical).
These devices operate with a single supply voltage as
low as 1.8V, while drawing low quiescent current per
amplifier (110 µA, typical). These features make the
family of op amps well suited for single-supply, high
precision, battery-powered applications.
• Wide Supply Voltage Range: 1.8V to 6.0V
• Gain Bandwidth Product: 1.2 MHz (typical)
• Unity Gain Stable
• Extended Temperature Range: -40°C to +125°C
• No Phase Reversal
The MCP6071/2/4 family is offered in single
(MCP6071), dual (MCP6072), and quad (MCP6074)
configurations.
Applications
• Automotive
• Portable Instrumentation
• Sensor Conditioning
• Battery Powered Systems
• Medical Instrumentation
• Test Equipment
The MCP6071/2/4 is designed with Microchip’s
advanced CMOS process. All devices are available in
the extended temperature range, with a power supply
range of 1.8V to 6.0V.
Package Types
• Analog Filters
MCP6071
SOIC
MCP6072
SOIC
Design Aids
NC
V
V
1
8
7
6
5
1
2
3
4
8
NC
V
OUTA
DD
• SPICE Macro Models
V
V
V
• FilterLab® Software
2
3
4
7
6
5
V
–
+
V
–
INA
DD
OUTB
IN
V
–
V
V
+
INA
OUT
INB
IN
• MAPS (Microchip Advanced Part Selector)
• Analog Demonstration and Evaluation Boards
• Application Notes
NC
+
V
V
INB
SS
SS
MCP6072
2x3 TDFN
MCP6071
2x3 TDFN
Typical Application
NC
V
OUTA
1
8
7
1
2
8
NC
V
V
V
DD
V
–
+
V
–
INA
V
2
7
IN
DD
OUTB
EP
9
EP
9
RL
V
V
+
INA
V
–
IN
3
4
6
5
3
4
6
5
OUT
INB
V
V
NC
V
+
VOUT
SS
SS
INB
ZIN
MCP6071
MCP6074
SOIC, TSSOP
MCP6071
SOT-23-5
C
V
1
2
3
4
5
6
7
14
13
12
11
10
9
V
OUTD
OUTA
V
1
2
3
5
V
OUT
DD
V
V
V
–
ZIN = RL + jωL
L = RLRC
R
V
–
IND
V
INA
SS
+
V
+
Gyrator
IND
INA
V
–
V
+
4
IN
IN
V
SS
DD
V
V
V
+
V
V
+
INC
INB
–
–
INB
INC
8
V
OUTC
OUTB
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2010 Microchip Technology Inc.
DS22142B-page 1
MCP6071/2/4
NOTES:
DS22142B-page 2
© 2010 Microchip Technology Inc.
MCP6071/2/4
1.0
1.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
V
– V ........................................................................7.0V
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other conditions
above those indicated in the operational listings of this
specification is not implied. Exposure to maximum
rating conditions for extended periods may affect
device reliability.
DD
SS
Current at Input Pins.....................................................±2 mA
Analog Inputs (V +, V -)†† .......... V – 1.0V to V + 1.0V
IN
IN
SS
DD
All Other Inputs and Outputs ......... V – 0.3V to V + 0.3V
SS
DD
Difference Input Voltage ...................................... |V – V
|
SS
DD
Output Short-Circuit Current .................................continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
†† See 4.1.2 “Input Voltage Limits”
Maximum Junction Temperature (T )..........................+150°C
J
ESD protection on all pins (HBM; MM) ................ ≥ 4 kV; 400V
1.2
Specifications
DC ELECTRICAL SPECIFICATIONS
TABLE 1-1:
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters
Input Offset
Sym
Min
Typ
Max
Units
Conditions
Input Offset Voltage
VOS
-150
—
—
±1.5
±4.0
87
+150
—
µV VDD = 3.0V,
CM = VDD/3
V
Input Offset Drift with Temperature
ΔVOS/ΔTA
ΔVOS/ΔTA
PSRR
µV/°C TA= -40°C to +85°C,
VDD = 3.0V, VCM = VDD/3
—
—
µV/°C TA= +85°C to +125°C,
VDD = 3.0V, VCM = VDD/3
Power Supply Rejection Ratio
Input Bias Current and Impedance
Input Bias Current
70
—
dB VCM = VSS
IB
IB
—
—
—
—
—
—
±1.0
60
100
—
pA
pA TA = +85°C
IB
1100
5000
—
pA TA = +125°C
Input Offset Current
IOS
ZCM
ZDIFF
±1.0
pA
Common Mode Input Impedance
Differential Input Impedance
Common Mode
1013||6
1013||6
—
Ω||pF
Ω||pF
—
Common Mode Input Voltage Range
VCMR
VCMR
VSS−0.15
VSS−0.3
72
—
—
89
VDD+0.15
VDD+0.3
—
V
V
VDD = 1.8V (Note 1)
VDD = 6.0V (Note 1)
Common Mode Rejection Ratio
CMRR
dB VCM = -0.15V to 1.95V,
VDD = 1.8V
74
72
74
91
87
89
—
—
—
dB VCM = -0.3V to 6.3V,
VDD = 6.0V
dB
V
V
CM = 3.0V to 6.3V,
DD = 6.0V
dB VCM = -0.3V to 3.0V,
VDD = 6.0V
Note 1: Figure 2-13 shows how VCMR changed across temperature.
© 2010 Microchip Technology Inc.
DS22142B-page 3
MCP6071/2/4
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters
Open-Loop Gain
Sym
Min
Typ
Max
Units
Conditions
DC Open-Loop Gain
(Large Signal)
AOL
95
115
—
dB 0.2V < VOUT <(VDD-0.2V)
CM = VSS
V
Output
Maximum Output Voltage Swing
Output Short-Circuit Current
V
OL, VOH
ISC
VSS+15
—
—
±7
VDD–15
—
mV 0.5V input overdrive
mA VDD = 1.8V
—
±28
—
mA VDD = 6.0V
Power Supply
Supply Voltage
VDD
IQ
1.8
50
—
6.0
V
Quiescent Current per Amplifier
110
170
µA IO = 0, VDD = 6.0V
VCM = 0.9VDD
Note 1: Figure 2-13 shows how VCMR changed across temperature.
TABLE 1-2: AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
1.2
57
—
—
—
MHz
°
G = +1 V/V
Slew Rate
SR
0.5
V/µs
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni
eni
ini
—
—
—
4.3
19
—
—
—
µVp-p f = 0.1 Hz to 10 Hz
nV/√Hz f = 10 kHz
0.6
fA/√Hz f = 1 kHz
TABLE 1-3:
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.
Parameters
Temperature Ranges
Sym
Min
Typ
Max
Units
Conditions
Operating Temperature Range
Storage Temperature Range
TA
TA
-40
-65
—
—
+125
+150
°C
°C
Note 1
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23
Thermal Resistance, 8L-2x3 TDFN
Thermal Resistance, 8L-SOIC
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
220.7
52.5
149.5
95.3
100
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
DS22142B-page 4
© 2010 Microchip Technology Inc.
MCP6071/2/4
1.3
Test Circuits
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT; see Equation 1-1. Note that VCM is not the
circuit’s common mode voltage ((VP + VM)/2), and that
VOST includes VOS plus the effects (on the input offset
CF
6.8 pF
RG
100 kΩ
RF
100 kΩ
error, VOST) of temperature, CMRR, PSRR and AOL
.
VDD/2
VP
EQUATION 1-1:
VDD
VIN+
GDM = RF ⁄ RG
CB1
100 nF
CB2
1 µF
VCM = (VP + VDD ⁄ 2) ⁄ 2
VOST = VIN– – VIN+
MCP607X
VOUT = (VDD ⁄ 2) + (VP – VM) + VOST(1 + GDM
)
VIN–
Where:
VOUT
VM
GDM = Differential Mode Gain
(V/V)
(V)
RL
10 kΩ
CL
RG
100 kΩ
RF
100 kΩ
60 pF
VCM = Op Amp’s Common Mode
Input Voltage
VOST = Op Amp’s Total Input Offset (mV)
CF
6.8 pF
VL
Voltage
FIGURE 1-1:
AC and DC Test Circuit for
Most Specifications.
© 2010 Microchip Technology Inc.
DS22142B-page 5
MCP6071/2/4
NOTES:
DS22142B-page 6
© 2010 Microchip Technology Inc.
MCP6071/2/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
14%
1000
1244 Samples
VDD = 6.0V
Representative Part
800
600
VDD = 3.0V
VCM = VDD/3
12%
10%
8%
400
200
0
6%
-200
-400
-600
-800
-1000
TA = -40°C
A = +25°C
TA = +85°C
A = +125°C
4%
T
2%
T
0%
Input Offset Voltage (µV)
Common Mode Input Voltage (V)
FIGURE 2-1:
Input Offset Voltage with
FIGURE 2-4:
Input Offset Voltage vs.
VDD = 3.0V.
Common Mode Input Voltage with VDD = 6.0V.
27%
1000
1244 Samples
VDD = 3.0V
CM = VDD/3
VDD = 3.0V
Representative Part
800
600
24%
21%
18%
15%
12%
9%
V
400
200
0
TA = -40°C to +85°C
-200
-400
-600
-800
-1000
TA = -40°C
A = +25°C
TA = +85°C
A = +125°C
T
6%
T
3%
0%
Input Offset Drift with Temperature (µV/°C)
Common Mode Input Voltage (V)
FIGURE 2-2:
Input Offset Voltage Drift
FIGURE 2-5:
Input Offset Voltage vs.
with VDD = 3.0V and TA ≤ +85°C.
Common Mode Input Voltage with VDD = 3.0V.
27%
24%
21%
1000
1244 Samples
VDD = 3.0V
VCM = VDD/3
VDD = 1.8V
Representative Part
800
600
TA = +85°C to +125°C
400
200
18%
15%
12%
9%
0
-200
-400
-600
-800
-1000
TA = -40°C
A = +25°C
TA = +85°C
A = +125°C
T
6%
3%
T
0%
Input Offset Drift with Temperature (µV/°C)
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage Drift
FIGURE 2-6:
Input Offset Voltage vs.
with VDD = 3.0V and TA ≥ +85°C.
Common Mode Input Voltage with VDD = 1.8V.
© 2010 Microchip Technology Inc.
DS22142B-page 7
MCP6071/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
350
250
150
50
40
35
30
25
20
15
10
5
f = 10 kHz
VDD = 6.0V
Representative Part
VDD = 6.0V
-50
VDD = 3.0V
-150
-250
-350
VDD = 1.8V
0
Output Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-10:
vs. Common Mode Input Voltage.
Input Noise Voltage Density
FIGURE 2-7:
Output Voltage.
Input Offset Voltage vs.
110
1000
800
600
400
200
PSRR-
Representative Part
CMRR
TA = -40°C
TA = +25°C
100
90
80
70
60
50
40
30
20
Representative Part
TA = +85°C
TA = +125°C
PSRR+
0
-200
-400
-600
-800
-1000
10
100
1k
10k
100k
1M
Frequency (Hz)
Power Supply Voltage (V)
FIGURE 2-11:
Frequency.
CMRR, PSRR vs.
FIGURE 2-8:
Power Supply Voltage.
Input Offset Voltage vs.
110
1,000
105
100
95
CMRR (VDD = 6.0V, VCM = -0.3V to 6.3V)
90
85
PSRR (VDD = 1.8V to 6.0V, VCM = VSS
)
100
80
75
70
65
60
10
-50
-25
0
25
50
75
100
125
0.1
1
10
100
1k
10k 100k
Ambient Temperature (°C)
Frequency (Hz)
FIGURE 2-12:
Temperature.
CMRR, PSRR vs. Ambient
FIGURE 2-9:
vs. Frequency.
Input Noise Voltage Density
DS22142B-page 8
© 2010 Microchip Technology Inc.
MCP6071/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
0.35
0.30
0.25
150
140
VDD = 6.0V
VCM = 0.9VDD
0.20
0.15
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
130
120
110
100
90
VCMR_H - VDD @ VDD = 6.0V
@ VDD = 3.0V
@ VDD = 1.8V
VCMR_L - VSS @ VDD = 1.8V
VOL - VSS @ VDD = 3.0V
VOL - VSS @ VDD = 6.0V
80
VDD = 1.8V
CM = 0.9VDD
V
70
60
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-13:
Common Mode Input
FIGURE 2-16:
Quiescent Current vs
Voltage Range Limit vs. Ambient Temperature.
Ambient Temperature with VCM = 0.9VDD
.
10000
180
VDD = 6.0V
VDD = 6.0V
160
VCM = 0.9VDD
V
CM = VDD
140
120
100
80
1000
100
10
Input Bias Current
TA = +125°C
TA = +85°C
60
40
TA = +25°C
TA = -40°C
20
Input Offset Current
0
1
25
45
65
85
105
125
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-14:
Input Bias, Offset Currents
FIGURE 2-17:
Quiescent Current vs.
vs. Ambient Temperature.
Power Supply Voltage with VCM = 0.9VDD
.
10000
120
100
80
60
40
20
0
0
VDD = 6.0V
Open-Loop Gain
-30
1000
100
10
-60
TA = +125°C
TA = +85°C
Open-Loop Phase
-90
-120
-150
-180
-210
VDD = 6.0V
1
-20
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Common Mode Input Votlage (V)
0.11001k10k100k1M10M
1 10
Frequency (Hz)
FIGURE 2-15:
Input Bias Current vs.
FIGURE 2-18:
Open-Loop Gain, Phase vs.
Common Mode Input Voltage.
Frequency.
© 2010 Microchip Technology Inc.
DS22142B-page 9
MCP6071/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
180
160
140
120
100
80
150
145
140
135
130
125
120
115
110
105
100
Gain Bandwidth Product
60
40
VDD = 6.0V
Phase Margin
RL = 10 kΩ
SS + 0.2V < VOUT < VDD - 0.2V
20
V
0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Power Supply Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-19:
DC Open-Loop Gain vs.
FIGURE 2-22:
Gain Bandwidth Product,
Power Supply Voltage.
Phase Margin vs. Common Mode Input Voltage.
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
180
160
140
120
100
80
150
145
140
135
130
125
120
115
110
105
100
VDD = 6.0V
Gain Bandwidth Product
VDD = 1.8V
60
Large Signal AOL
40
VDD = 6.0V
Phase Margin
20
0.00
0.05
0.10
0.15
0.20
0.25
0
Output Voltage Headroom
VDD - VOH or VOL - VSS (V)
-50 -25
0
25
50
75 100 125
Ambient Temperature (°C)
FIGURE 2-20:
DC Open-Loop Gain vs.
FIGURE 2-23:
Gain Bandwidth Product,
Output Voltage Headroom.
Phase Margin vs. Ambient Temperature.
1.8
1.6
180
160
140
120
100
80
150
140
130
120
110
100
Gain Bandwidth Product
1.4
1.2
1.0
0.8
0.6
60
0.4
40
Input Referred
90
VDD = 1.8V
Phase Margin
0.2
0.0
20
80
0
100
1k
10k
100k
1M
Frequency (Hz)
-50 -25
0
25
50
75 100 125
Ambient Temperature (°C)
FIGURE 2-21:
Channel-to-Channel
FIGURE 2-24:
Gain Bandwidth Product,
Separation vs. Frequency ( MCP6072/4 only).
Phase Margin vs. Ambient Temperature.
DS22142B-page 10
© 2010 Microchip Technology Inc.
MCP6071/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
40
35
30
25
20
15
10
5
16.0
14.0
12.0
10.0
8.0
TA = -40°C
TA = +25°C
VDD - VOH
TA = +85°C
TA = +125°C
6.0
VOL - VSS
4.0
2.0
0
0.0
-50
-25
0
25
50
75
100 125
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-25:
Ouput Short Circuit Current
FIGURE 2-28:
Output Voltage Headroom
vs. Power Supply Voltage.
vs. Ambient Temperature.
1.0
10
VDD = 6.0V
Falling Edge, VDD = 6.0V
0.9
Falling Edge, VDD = 1.8V
0.8
VDD = 1.8V
0.7
0.6
0.5
0.4
0.3
1
Rising Edge, VDD = 6.0V
Rising Edge, VDD = 1.8V
0.1
0.2
0.1
0.0
1k
10k
100k
1M
-50
-25
0
25
50
75
100
125
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-26:
Output Voltage Swing vs.
FIGURE 2-29:
Slew Rate vs. Ambient
Frequency.
Temperature.
60
(VDD - VOH)/IOUT
55
50
45
40
35
30
25
20
15
10
5
VDD = 1.8V
(VOL - VSS)/(-IOUT
)
)
(VDD - VOH)/IOUT
(VOL - VSS)/(-IOUT
VDD = 6.0V
VDD = 6.0V
G = +1 V/V
0
0.1
1
10
Time (2 µs/div)
Output Current (mA)
FIGURE 2-27:
Ratio of Output Voltage
FIGURE 2-30:
Small Signal Non-Inverting
Headroom to Output Current vs. Output Current.
Pulse Response.
© 2010 Microchip Technology Inc.
DS22142B-page 11
MCP6071/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
7.0
6.0
VDD = 6.0V
VOUT
G = -1 V/V
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
VIN
VDD = 6.0V
G = +2 V/V
Time (2 µs/div)
Time (0.1 ms/div)
FIGURE 2-31:
Small Signal Inverting Pulse
FIGURE 2-34:
The MCP6071/2/4 Shows
Response.
No Phase Reversal.
1000
100
10
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
GN:
101 V/V
11 V/V
1 V/V
VDD = 6.0V
G = +1 V/V
1
10
100
1k
Frequency (Hz)
10k
100k1M
Time (0.02 ms/div)
FIGURE 2-32:
Large Signal Non-Inverting
FIGURE 2-35:
Closed Loop Output
Pulse Response.
Impedance vs. Frequency.
1
1m
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100µ
VDD = 6.0V
G = -1 V/V
10µ
1µ
100n
TA = -40°C
10n
T
A = +25°C
TA = +85°C
A = +125°C
1n
T
100p
10p
1p
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
IN (V)
Time (0.02 ms/div)
V
FIGURE 2-33:
Large Signal Inverting Pulse
FIGURE 2-36:
Measured Input Current vs.
Response.
Input Voltage (below VSS).
DS22142B-page 12
© 2010 Microchip Technology Inc.
MCP6071/2/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP6072
MCP6071
MCP6074
Symbol
Description
SOIC,
TSSOP
SOIC SOT-23-5 2x3 TDFN SOIC 2x3 TDFN
6
2
1
4
6
2
1
2
3
8
5
6
1
2
3
8
5
6
1
2
3
4
5
6
VOUT, VOUTA Analog Output (op amp A)
VIN–, VINA
VIN+, VINA
VDD
–
+
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
3
3
3
7
5
7
—
—
—
—
—
—
VINB
+
–
Non-inverting Input (op amp B)
Inverting Input (op amp B)
VINB
—
—
—
—
—
—
2
—
—
7
7
7
VOUTB
VOUTC
Analog Output (op amp B)
Analog Output (op amp C)
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
—
—
—
4
—
—
—
4
8
—
—
9
VINC
–
+
—
—
10
11
12
13
14
—
—
VINC
4
4
VSS
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
9
VIND+
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Analog Output (op amp D)
No Internal Connection
—
—
VIND–
—
—
VOUTD
NC
1, 5, 8
—
1, 5, 8
9
EP
Exposed Thermal Pad (EP); must
be connected to VSS
.
3.1
Analog Outputs
3.3
Power Supply Pins
The output pins are low-impedance voltage sources.
The positive power supply (VDD) is 1.8V to 6.0V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
3.2
Analog Inputs
and VDD
.
The non-inverting and inverting inputs are high-
impedance CMOS inputs with low bias currents.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
3.4
Exposed Thermal Pad (EP)
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the VSS pin; they must
be connected to the same potential on the Printed
Circuit Board (PCB).
© 2010 Microchip Technology Inc.
DS22142B-page 13
MCP6071/2/4
NOTES:
DS22142B-page 14
© 2010 Microchip Technology Inc.
MCP6071/2/4
4.0
APPLICATION INFORMATION
VDD
The MCP6071/2/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low-power, high precision
applications.
U1
D1 D2
V1
V2
MCP607X
4.1
Rail-to-Rail Input
VOUT
4.1.1
PHASE REVERSAL
FIGURE 4-2:
Inputs.
Protecting the Analog
The MCP6071/2/4 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 2-34 shows the input voltage
exceeding the supply voltage without any phase
reversal.
A significant amount of current can flow out of the
inputs when the Common Mode voltage (VCM) is below
ground (VSS). See Figure 2-36.
4.1.2
INPUT VOLTAGE LIMITS
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see Section 1.1, Absolute Maximum
Ratings †).
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see Section 1.1, Absolute Maximum
Ratings †).
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors and to minimize input bias
current (IB).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible cur-
rents in or out of the input pins (and the ESD diodes, D1
and D2). The diode currents will go through either VDD
or VSS
.
Bond
VDD
VDD
Pad
D1 D2
R1
U1
Bond
Pad
Bond
Pad
Input
Stage
VIN+
VIN–
V1
V2
VOUT
MCP607X
Bond
Pad
R2
VSS
VSS – min (V1,V2)
2 mA
min(R1,R2) >
max(V1,V2) – VDD
2 mA
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
min(R1,R2) >
FIGURE 4-3:
Inputs.
Protecting the Analog
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their break-
down voltage is high enough to allow normal operation,
but not low enough to protect against slow over-voltage
(beyond VDD) events. Very fast ESD events (that meet
the spec) are limited so that damage does not occur.
4.1.4
NORMAL OPERATION
The input stage of the MCP6071/2/4 op amps use two
differential input stages in parallel. One operates at a
low common mode input voltage (VCM), while the other
operates at a high VCM. With this topology, the device
operates with a VCM up to 300 mV above VDD and
300 mV below VSS. (See Figure 2-13). The input offset
voltage is measured at VCM = VSS – 0.3V and
VDD + 0.3V to ensure proper operation.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs.
Figure 4-2 shows one approach to protecting these
inputs.
The transition between the input stages occurs when
VCM is near VDD – 1.1V (See Figures 2-4, 2-5 and
Figure 2-6). For the best distortion performance and
gain linearity, with non-inverting gains, avoid this region
of operation.
© 2010 Microchip Technology Inc.
DS22142B-page 15
MCP6071/2/4
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6071/2/4 SPICE macro
model are very helpful.
4.2
Rail-to-Rail Output
The output voltage range of the MCP6071/2/4 op amps
is VSS + 15 mV (minimum) and VDD 15 mV
(maximum) when RL = 10 kΩ is connected to VDD/2
and VDD = 6.0V. Refer to Figures 2-27 and 2-28 for
more information.
–
4.4
Supply Bypass
4.3
Capacitive Loads
With this family of operational amplifiers, the power
supply pin (VDD for single-supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor can be shared
with other analog parts.
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, all gains show the same
general behavior.
4.5
Unused Op Amps
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (RISO in Figure 4-4) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
An unused op amp in a quad package (MCP6074)
should be configured as shown in Figure 4-6. These
circuits prevent the output from toggling and causing
crosstalk. Circuit A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
–
RISO
VOUT
MCP607X
+
¼ MCP6074 (A)
VDD
¼ MCP6074 (B)
VIN
CL
VDD
VDD
R1
R2
FIGURE 4-4:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
VREF
Figure 4-5 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
R
2
V
= V
× --------------------
REF
DD
R
+ R
1
2
FIGURE 4-6:
Unused Op Amps.
1000
VDD = 6.0 V
RL = 10 kΩ
100
10
1
GN:
1 V/V
2 V/V
≥
5 V/V
10p
100p
1n
10n
0.1µ
1µ
1
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-5:
Recommended RISO Values
for Capacitive Loads.
DS22142B-page 16
© 2010 Microchip Technology Inc.
MCP6071/2/4
4.6
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; which is greater than the
MCP6071/2/4 family’s bias current at +25°C (±1.0 pA,
typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-7.
Guard Ring
VIN– VIN+
VSS
FIGURE 4-7:
for Inverting Gain.
Example Guard Ring Layout
1. Non-inverting Gain and Unity-Gain Buffer:
a.Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b.Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
2. Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
a.Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b.Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
© 2010 Microchip Technology Inc.
DS22142B-page 17
MCP6071/2/4
4.7.2
INSTRUMENTATION AMPLIFIER
4.7
Application Circuits
The MCP6071/2/4 op amps are well suited for
conditioning sensor signals in battery-powered
4.7.1
GYRATOR
applications. Figure 4-9 shows
a two op amp
The MCP6071/2/4 op amps can be used in gyrator
applications. The gyrator is an electric circuit which can
make a capacitive circuit behave inductively.
instrumentation amplifier, using the MCP6072, that
works well for applications requiring rejection of
common mode noise at higher gains. The reference
voltage (VREF) is supplied by a low impedance source.
In single supply applications, VREF is typically VDD/2.
Figure 4-8 shows an example of a gyrator simulating
inductance, with an approximately equivalent circuit
below. The two ZIN have similar values in typical
applications. The primary application for a gyrator is to
reduce the size and cost of a system by removing the
need for bulky, heavy and expensive inductors. For
example, RLC bandpass filter characteristics can be
realized with capacitors, resistors and operational
amplifiers without using inductors. Moreover, gyrators
will typically have higher accuracy than real inductors,
due to the lower cost of precision capacitors than
inductors.
RG
R1
R2
R2
R1
VREF
VOUT
V2
V1
½
½
MCP6072
MCP6072
.
RL
R1 2R1
⎛
⎞
VOUT = (V1 – V2) 1 + ----- + --------- + VREF
⎝
⎠
R2 RG
VOUT
ZIN
MCP6071
FIGURE 4-9:
Two Op Amp
Instrumentation Amplifier.
C
Gyrator
To obtain the best CMRR possible, and not limit the
performance by the resistor tolerances, set a high gain
with the RG resistor.
R
ZIN = RL + jωL
L = RLRC
4.7.3
PRECISION COMPARATOR
RL
ZIN
Use high gain before a comparator to improve the
latter’s input offset performance. Figure 4-10 shows a
gain of 11 V/V placed before a comparator. The
reference voltage VREF can be any value between the
supply rails.
Equivalent Circuit
L
FIGURE 4-8:
Gyrator.
VIN
MCP6071
1 MΩ
VOUT
MCP6541
100 kΩ
VREF
FIGURE 4-10:
Precision, Non-inverting
Comparator.
DS22142B-page 18
© 2010 Microchip Technology Inc.
MCP6071/2/4
5.4
Analog Demonstration and
Evaluation Boards
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6071/2/4 family of op amps.
Microchip offers
a
broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
5.1
SPICE Macro Model
a
complete listing of these boards and their
The latest SPICE macro model for the MCP6071/2/4
op amps is available on the Microchip web site at
www.microchip.com. The model was written and tested
in official Orcad (Cadence) owned PSPICE. For the
other simulators, it may require translation.
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Some boards that are especially useful are:
• MCP6XXX Amplifier Evaluation Board 1
• MCP6XXX Amplifier Evaluation Board 2
• MCP6XXX Amplifier Evaluation Board 3
• MCP6XXX Amplifier Evaluation Board 4
• Active Filter Demo Board Kit
The model covers a wide aspect of the op amp's
electrical specifications. Not only does the model cover
voltage, current, and resistance of the op amp, but it
also covers the temperature and noise effects on the
behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions can not be guaranteed that it will match the
actual op amp performance.
• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N
SOIC14EV
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
5.5
Application Notes
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip. com/appnotes and are
recommended as supplemental reference resources.
®
5.2
FilterLab Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams
of the filter circuit with component values. It also
outputs the filter circuit in SPICE format, which can be
used with the macro model to simulate actual filter
performance.
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
5.3
MAPS (Microchip Advanced Part
Selector)
• AN1177: “Op Amp Precision Design: DC Errors”,
DS01177
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparison
reports. Helpful links are also provided for Data Sheets,
purchase, and sampling of Microchip parts.
• AN1228: “Op Amp Precision Design: Random
Noise”, DS01228
• AN1332: “Current Sensing Circuit Concepts and
Fundamentals”, DS01332
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
© 2010 Microchip Technology Inc.
DS22142B-page 19
MCP6071/2/4
NOTES:
DS22142B-page 20
© 2010 Microchip Technology Inc.
MCP6071/2/4
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
Example:
5-Lead SOT-23 (MCP6071)
YH25
XXNN
8-Lead SOIC (150 mil) (MCP6071, MCP6072)
Example:
XXXXXXXX
MCP6071E
e
3
XXXXYYWW
SN^1044
NNN
256
8-Lead 2x3 TDFN (MCP6071, MCP6072)
Example:
XXX
YWW
NN
AHE
044
25
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2010 Microchip Technology Inc.
DS22142B-page 21
MCP6071/2/4
Package Marking Information (Continuation)
14-Lead SOIC (150 mil) (MCP6074)
Example:
XXXXXXXXXXX
XXXXXXXXXXX
MCP6074
e
3
E/SL
1044256
YYWWNNN
Example:
14-Lead TSSOP (MCP6074)
XXXXXXXX
YYWW
MCP6074E
1044
256
NNN
DS22142B-page 22
© 2010 Microchip Technology Inc.
MCP6071/2/4
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ꢛꢘ
ꢛꢀ
ꢌ
ꢌꢀ
ꢂ
ꢮ
ꢀꢁꢴꢗꢉꢠꢜꢡ
ꢗꢁꢴꢗ
ꢗꢁꢷꢴ
ꢗꢁꢗꢗ
ꢘꢁꢘꢗ
ꢀꢁꢸꢗ
ꢘꢁꢙꢗ
ꢗꢁꢀꢗ
ꢗꢁꢸꢟ
ꢗꢻ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢀꢁꢞꢟ
ꢀꢁꢸꢗ
ꢗꢁꢀꢟ
ꢸꢁꢘꢗ
ꢀꢁꢷꢗ
ꢸꢁꢀꢗ
ꢗꢁꢺꢗ
ꢗꢁꢷꢗ
ꢸꢗꢻ
ꢮꢀ
ꢀ
ꢎ
ꢳ
ꢗꢁꢗꢷ
ꢗꢁꢘꢗ
ꢗꢁꢘꢺ
ꢗꢁꢟꢀ
ꢛꢔꢊꢃꢉꢜ
ꢀꢁ ꢂꢃꢄꢅꢆꢇꢃꢈꢆꢇꢉꢂꢉꢊꢆꢋꢉꢌꢀꢉꢋꢈꢉꢆꢈꢍꢉꢃꢆꢎꢏꢐꢋꢅꢉꢄꢈꢏꢋꢉꢑꢏꢊꢇꢒꢉꢈꢓꢉꢔꢓꢈꢍꢓꢐꢇꢃꢈꢆꢇꢁꢉꢕꢈꢏꢋꢉꢑꢏꢊꢇꢒꢉꢈꢓꢉꢔꢓꢈꢍꢓꢐꢇꢃꢈꢆꢇꢉꢇꢒꢊꢏꢏꢉꢆꢈꢍꢉꢅꢖꢎꢅꢅꢋꢉꢗꢁꢀꢘꢙꢉꢄꢄꢉꢔꢅꢓꢉꢇꢃꢋꢅꢁ
ꢘꢁ ꢂꢃꢄꢅꢆꢇꢃꢈꢆꢃꢆꢚꢉꢊꢆꢋꢉꢍꢈꢏꢅꢓꢊꢆꢎꢃꢆꢚꢉꢔꢅꢓꢉꢛꢜꢕꢌꢉꢝꢀꢞꢁꢟꢕꢁ
ꢠꢜꢡꢢ ꢠꢊꢇꢃꢎꢉꢂꢃꢄꢅꢆꢇꢃꢈꢆꢁꢉꢣꢒꢅꢈꢓꢅꢍꢃꢎꢊꢏꢏꢤꢉꢅꢖꢊꢎꢍꢉꢥꢊꢏꢐꢅꢉꢇꢒꢈꢦꢆꢉꢦꢃꢍꢒꢈꢐꢍꢉꢍꢈꢏꢅꢓꢊꢆꢎꢅꢇꢁ
ꢕꢃꢎꢓꢈꢎꢒꢃꢔ ꢣꢅꢎꢒꢆꢈꢏꢈꢚꢤ ꢂꢓꢊꢦꢃꢆꢚ ꢡꢗꢞꢼꢗꢴꢀꢠ
© 2010 Microchip Technology Inc.
DS22142B-page 23
MCP6071/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22142B-page 24
© 2010 Microchip Technology Inc.
MCP6071/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010 Microchip Technology Inc.
DS22142B-page 25
MCP6071/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22142B-page 26
© 2010 Microchip Technology Inc.
MCP6071/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010 Microchip Technology Inc.
DS22142B-page 27
MCP6071/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22142B-page 28
© 2010 Microchip Technology Inc.
MCP6071/2/4
ꢝꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢞꢐꢄꢈꢆꢟꢈꢄꢊꢠꢆꢛꢔꢆꢂꢃꢄꢅꢆꢇꢄꢌꢡꢄꢢꢃꢆꢕꢣꢛꢖꢆꢤꢆꢘꢥꢙꢥꢦꢧꢨꢀꢆꢎꢎꢆꢩꢔꢅꢪꢆꢗꢒꢞꢟꢛꢚ
ꢛꢔꢊꢃꢜ ꢧꢈꢓꢉꢍꢒꢅꢉꢄꢈꢇꢍꢉꢎꢐꢓꢓꢅꢆꢍꢉꢔꢊꢎꢨꢊꢚꢅꢉꢋꢓꢊꢦꢃꢆꢚꢇꢩꢉꢔꢏꢅꢊꢇꢅꢉꢇꢅꢅꢉꢍꢒꢅꢉꢕꢃꢎꢓꢈꢎꢒꢃꢔꢉꢪꢊꢎꢨꢊꢚꢃꢆꢚꢉꢜꢔꢅꢎꢃꢑꢃꢎꢊꢍꢃꢈꢆꢉꢏꢈꢎꢊꢍꢅꢋꢉꢊꢍꢉ
ꢒꢍꢍꢔꢢꢫꢫꢦꢦꢦꢁꢄꢃꢎꢓꢈꢎꢒꢃꢔꢁꢎꢈꢄꢫꢔꢊꢎꢨꢊꢚꢃꢆꢚ
© 2010 Microchip Technology Inc.
DS22142B-page 29
MCP6071/2/4
ꢫꢬꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢂꢖꢆꢤꢆꢛꢄꢓꢓꢔꢭꢠꢆꢙꢧꢮꢦꢆꢎꢎꢆꢩꢔꢅꢪꢆꢗꢍꢏꢯꢰꢚ
ꢛꢔꢊꢃꢜ ꢧꢈꢓꢉꢍꢒꢅꢉꢄꢈꢇꢍꢉꢎꢐꢓꢓꢅꢆꢍꢉꢔꢊꢎꢨꢊꢚꢅꢉꢋꢓꢊꢦꢃꢆꢚꢇꢩꢉꢔꢏꢅꢊꢇꢅꢉꢇꢅꢅꢉꢍꢒꢅꢉꢕꢃꢎꢓꢈꢎꢒꢃꢔꢉꢪꢊꢎꢨꢊꢚꢃꢆꢚꢉꢜꢔꢅꢎꢃꢑꢃꢎꢊꢍꢃꢈꢆꢉꢏꢈꢎꢊꢍꢅꢋꢉꢊꢍꢉ
ꢒꢍꢍꢔꢢꢫꢫꢦꢦꢦꢁꢄꢃꢎꢓꢈꢎꢒꢃꢔꢁꢎꢈꢄꢫꢔꢊꢎꢨꢊꢚꢃꢆꢚ
D
N
E
E1
NOTE 1
1
2
3
e
h
b
α
h
c
φ
A2
A
L
A1
β
L1
ꢬꢆꢃꢍꢇꢕꢭꢮꢮꢭꢕꢌꢣꢌꢯꢜ
ꢂꢃꢄꢅꢆꢇꢃꢈꢆꢉꢮꢃꢄꢃꢍꢇ
ꢕꢭꢰ
ꢰꢱꢕ
ꢕꢛꢲ
ꢰꢐꢄꢳꢅꢓꢉꢈꢑꢉꢪꢃꢆꢇꢰ
ꢪꢃꢍꢎꢒ
ꢀꢞ
ꢅ
ꢀꢁꢘꢙꢉꢠꢜꢡ
ꢱꢥꢅꢓꢊꢏꢏꢉꢵꢅꢃꢚꢒꢍ
ꢕꢈꢏꢋꢅꢋꢉꢪꢊꢎꢨꢊꢚꢅꢉꢣꢒꢃꢎꢨꢆꢅꢇꢇ
ꢜꢍꢊꢆꢋꢈꢑꢑꢉꢉ"
ꢛ
ꢶ
ꢀꢁꢘꢟ
ꢗꢁꢀꢗ
ꢶ
ꢶ
ꢶ
ꢀꢁꢙꢟ
ꢶ
ꢗꢁꢘꢟ
ꢛꢘ
ꢛꢀ
ꢌ
ꢱꢥꢅꢓꢊꢏꢏꢉꢹꢃꢋꢍꢒ
ꢺꢁꢗꢗꢉꢠꢜꢡ
ꢕꢈꢏꢋꢅꢋꢉꢪꢊꢎꢨꢊꢚꢅꢉꢹꢃꢋꢍꢒ
ꢱꢥꢅꢓꢊꢏꢏꢉꢮꢅꢆꢚꢍꢒ
ꢡꢒꢊꢄꢑꢅꢓꢉUꢈꢔꢍꢃꢈꢆꢊꢏV
ꢧꢈꢈꢍꢉꢮꢅꢆꢚꢍꢒ
ꢌꢀ
ꢂ
ꢒ
ꢸꢁꢴꢗꢉꢠꢜꢡ
ꢷꢁꢺꢟꢉꢠꢜꢡ
ꢗꢁꢘꢟ
ꢗꢁꢞꢗ
ꢶ
ꢶ
ꢗꢁꢟꢗ
ꢀꢁꢘꢙ
ꢮ
ꢧꢈꢈꢍꢔꢓꢃꢆꢍ
ꢧꢈꢈꢍꢉꢛꢆꢚꢏꢅ
ꢮꢅꢊꢋꢉꢣꢒꢃꢎꢨꢆꢅꢇꢇ
ꢮꢅꢊꢋꢉꢹꢃꢋꢍꢒ
ꢕꢈꢏꢋꢉꢂꢓꢊꢑꢍꢉꢛꢆꢚꢏꢅꢉꢣꢈꢔ
ꢕꢈꢏꢋꢉꢂꢓꢊꢑꢍꢉꢛꢆꢚꢏꢅꢉꢠꢈꢍꢍꢈꢄ
ꢮꢀ
ꢀ
ꢀꢁꢗꢞꢉꢯꢌꢧ
ꢗꢻ
ꢗꢁꢀꢙ
ꢗꢁꢸꢀ
ꢟꢻ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢷꢻ
ꢎ
ꢳ
ꢁ
ꢗꢁꢘꢟ
ꢗꢁꢟꢀ
ꢀꢟꢻ
ꢂ
ꢟꢻ
ꢀꢟꢻ
ꢛꢔꢊꢃꢉꢜ
ꢀꢁ ꢪꢃꢆꢉꢀꢉꢥꢃꢇꢐꢊꢏꢉꢃꢆꢋꢅꢖꢉꢑꢅꢊꢍꢐꢓꢅꢉꢄꢊꢤꢉꢥꢊꢓꢤꢩꢉꢳꢐꢍꢉꢄꢐꢇꢍꢉꢳꢅꢉꢏꢈꢎꢊꢍꢅꢋꢉꢦꢃꢍꢒꢃꢆꢉꢍꢒꢅꢉꢒꢊꢍꢎꢒꢅꢋꢉꢊꢓꢅꢊꢁ
ꢘꢁ "ꢉꢜꢃꢚꢆꢃꢑꢃꢎꢊꢆꢍꢉꢡꢒꢊꢓꢊꢎꢍꢅꢓꢃꢇꢍꢃꢎꢁ
ꢸꢁ ꢂꢃꢄꢅꢆꢇꢃꢈꢆꢇꢉꢂꢉꢊꢆꢋꢉꢌꢀꢉꢋꢈꢉꢆꢈꢍꢉꢃꢆꢎꢏꢐꢋꢅꢉꢄꢈꢏꢋꢉꢑꢏꢊꢇꢒꢉꢈꢓꢉꢔꢓꢈꢍꢓꢐꢇꢃꢈꢆꢇꢁꢉꢕꢈꢏꢋꢉꢑꢏꢊꢇꢒꢉꢈꢓꢉꢔꢓꢈꢍꢓꢐꢇꢃꢈꢆꢇꢉꢇꢒꢊꢏꢏꢉꢆꢈꢍꢉꢅꢖꢎꢅꢅꢋꢉꢗꢁꢀꢟꢉꢄꢄꢉꢔꢅꢓꢉꢇꢃꢋꢅꢁ
ꢞꢁ ꢂꢃꢄꢅꢆꢇꢃꢈꢆꢃꢆꢚꢉꢊꢆꢋꢉꢍꢈꢏꢅꢓꢊꢆꢎꢃꢆꢚꢉꢔꢅꢓꢉꢛꢜꢕꢌꢉꢝꢀꢞꢁꢟꢕꢁ
ꢠꢜꢡꢢ ꢠꢊꢇꢃꢎꢉꢂꢃꢄꢅꢆꢇꢃꢈꢆꢁꢉꢣꢒꢅꢈꢓꢅꢍꢃꢎꢊꢏꢏꢤꢉꢅꢖꢊꢎꢍꢉꢥꢊꢏꢐꢅꢉꢇꢒꢈꢦꢆꢉꢦꢃꢍꢒꢈꢐꢍꢉꢍꢈꢏꢅꢓꢊꢆꢎꢅꢇꢁ
ꢯꢌꢧꢢ ꢯꢅꢑꢅꢓꢅꢆꢎꢅꢉꢂꢃꢄꢅꢆꢇꢃꢈꢆꢩꢉꢐꢇꢐꢊꢏꢏꢤꢉꢦꢃꢍꢒꢈꢐꢍꢉꢍꢈꢏꢅꢓꢊꢆꢎꢅꢩꢉꢑꢈꢓꢉꢃꢆꢑꢈꢓꢄꢊꢍꢃꢈꢆꢉꢔꢐꢓꢔꢈꢇꢅꢇꢉꢈꢆꢏꢤꢁ
ꢕꢃꢎꢓꢈꢎꢒꢃꢔ ꢣꢅꢎꢒꢆꢈꢏꢈꢚꢤ ꢂꢓꢊꢦꢃꢆꢚ ꢡꢗꢞꢼꢗꢺꢟꢠ
DS22142B-page 30
© 2010 Microchip Technology Inc.
MCP6071/2/4
ꢛꢔꢊꢃꢜ ꢧꢈꢓꢉꢍꢒꢅꢉꢄꢈꢇꢍꢉꢎꢐꢓꢓꢅꢆꢍꢉꢔꢊꢎꢨꢊꢚꢅꢉꢋꢓꢊꢦꢃꢆꢚꢇꢩꢉꢔꢏꢅꢊꢇꢅꢉꢇꢅꢅꢉꢍꢒꢅꢉꢕꢃꢎꢓꢈꢎꢒꢃꢔꢉꢪꢊꢎꢨꢊꢚꢃꢆꢚꢉꢜꢔꢅꢎꢃꢑꢃꢎꢊꢍꢃꢈꢆꢉꢏꢈꢎꢊꢍꢅꢋꢉꢊꢍꢉ
ꢒꢍꢍꢔꢢꢫꢫꢦꢦꢦꢁꢄꢃꢎꢓꢈꢎꢒꢃꢔꢁꢎꢈꢄꢫꢔꢊꢎꢨꢊꢚꢃꢆꢚ
© 2010 Microchip Technology Inc.
DS22142B-page 31
MCP6071/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22142B-page 32
© 2010 Microchip Technology Inc.
MCP6071/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010 Microchip Technology Inc.
DS22142B-page 33
MCP6071/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22142B-page 34
© 2010 Microchip Technology Inc.
MCP6071/2/4
APPENDIX A: REVISION HISTORY
Revision B (December 2010)
The following is the list of modifications:
1. Added new SOT-23-5 package type for
MCP6071 device.
2. Corrected Figures 2-13, 2-22, 2-23, 2-24, 2-28,
2-29 and 2-34 in Section 2.0 “Typical
Performance Curves”.
3. Modified Table 3-1 to show the pin column for
MCP6071, SOT-23-5 package.
4. Updated Section 4.1.2 “Input Voltage Limits”.
5. Added Section 4.1.3 “Input Current Limits”.
6. Added new document item in Section 5.5
“Application Notes”.
7. Updated the Product Identification System
page.
Revision A (March 2009)
• Original Release of this Document.
© 2010 Microchip Technology Inc.
DS22142B-page 35
MCP6071/2/4
NOTES:
DS22142B-page 36
© 2010 Microchip Technology Inc.
MCP6071/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
-X
/XX
a) MCP6071T-E/OT: Tape and Reel,
5LD SOT-23 pkg
Temperature
Range
Package
b) MCP6071-E/SN:
8LD SOIC pkg
c) MCP6071T-E/SN: Tape and Reel,
8LD SOIC pkg
Device:
MCP6071:
MCP6071T:
Single Op Amp
Single Op Amp (Tape and Reel)
(SOIC, SOT-23 and 2x3 TDFN)
Dual Op Amp
d) MCP6071T-E/MNY: Tape and Reel,
8LD 2x3 TDFN pkg
MCP6072:
MCP6072T:
Dual Op Amp (Tape and Reel)
(SOIC and 2x3 TDFN)
Quad Op Amp
MCP6074:
a) MCP6072-E/SN:
8LD SOIC pkg
MCP6074T:
Quad Op Amp (Tape and Reel)
(SOIC and TSSOP)
b) MCP6072T-E/SN: Tape and Reel,
8LD SOIC pkg
c) MCP6072T-E/MNY: Tape and Reel
8LD 2x3 TDFN pkg
Temperature Range:
Package:
E
= -40°C to +125°C
MNY *
= Plastic Dual Flat, No Lead, (2x3 TDFN ) 8-leadd
a) MCP6074-E/SL:
14LD SOIC pkg
OT
SL
SN
ST
=
=
=
=
Plastic Small Outline Transistor (SOT-23), 5-lead
Plastic SOIC (150 mil Body), 14-lead
Plastic SOIC, (150 mil Body), 8-lead
b) MCP6074T-E/SL: Tape and Reel,
14LD SOIC pkg
Plastic TSSOP (4.4mm Body), 14-lead
c) MCP6074-E/ST:
d) MCP6074T-E/ST:
14LD TSSOP pkg
Tape and Reel,
* Y = Nickel palladium gold manufacturing designator. Only
available on the TDFN package.
14LD TSSOP pkg
© 2010 Microchip Technology Inc.
DS22142B-page 37
MCP6071/2/4
NOTES:
DS22142B-page 38
© 2010 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
32
PIC logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-60932-732-3
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2010 Microchip Technology Inc.
DS22142B-page 39
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Boston
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Cleveland
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-6578-300
Fax: 886-3-6578-370
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Fax: 886-7-330-9305
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Santa Clara
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
08/04/10
DS22142B-page 40
© 2010 Microchip Technology Inc.
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