MCP617-I/SN [MICROCHIP]
2.3V to 5.5V Micropower Bi-CMOS Op Amps; 2.3V至5.5V微功耗双CMOS运算放大器
| 型号： | MCP617-I/SN |
| 厂家： | 
MICROCHIP |
| 描述： | 2.3V to 5.5V Micropower Bi-CMOS Op Amps |
| 文件： | 总38页 (文件大小：637K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCP616/7/8/9
2.3V to 5.5V Micropower Bi-CMOS Op Amps
Description
Features
• Low Input Offset Voltage: ±150 µV (maximum)
• Low Noise: 2.2 µVP-P (typical, 0.1 Hz to 10 Hz)
• Rail-to-Rail Output
The MCP616/7/8/9 family of operational amplifiers (op
amps) from Microchip Technology Inc. are capable of
precision, low-power, single-supply operation. These
op amps are unity-gain stable, have low input offset
voltage (±150 µV, maximum), rail-to-rail output swing
and low input offset current (0.3 nA, typical). These
features make this family of op amps well suited for
battery-powered applications.
• Low Input Offset Current: 0.3 nA (typical)
• Low Quiescent Current: 25 µA (maximum)
• Power Supply Voltage: 2.3V to 5.5V
• Unity Gain Stable
• Chip Select (CS) Capability: MCP618
• Industrial Temperature Range: -40°C to +85°C
• No Phase Reversal
The single MCP616, the single MCP618 with Chip
Select (CS) and the dual MCP617 are all available in
standard 8-lead PDIP, SOIC and MSOP packages. The
quad MCP619 is offered in standard 14-lead PDIP,
SOIC and TSSOP packages. All devices are fully
specified from -40°C to +85°C, with power supplies
from 2.3V to 5.5V.
• Available in Single, Dual and Quad Packages
Typical Applications
• Battery Power Instruments
• Weight Scales
Package Types
• Strain Gauges
MCP617
MCP616
• Medical Instruments
• Test Equipment
PDIP, SOIC, MSOP
PDIP, SOIC, MSOP
NC 1
8
7
6
VOUTA
1
2
3
4
8
7
6
5
NC
VDD
2
3
4
VIN–
VIN+
VSS
VDD
VINA
–
VOUTB
Design Aids
VOUT VINA
VINB
VINB
–
+
+
5 NC
VSS
• SPICE Macro Models
• Microchip Advanced Part Selector (MAPS)
• Mindi™ Circuit Designer & Simulator
• Analog Demonstration and Evaluation Boards
• Application Notes
MCP618
PDIP, SOIC, MSOP
MCP619
PDIP, SOIC, TSSOP
VOUTA
1
2
3
4
5
6
7
14
13
12
VOUTD
NC 1
2
8
7
6
CS
VINA
VINA
–
+
VIND
VIND
–
+
VIN–
VDD
VOUT
3
4
VIN+
VSS
Input Offset Voltage
11 VSS
VDD
VINB
VINB
5 NC
14%
10
9
+
–
VINC
VINC
+
–
598 Samples
12%
VDD = 5.5V
8 VOUTC
10%
8%
6%
4%
2%
0%
VOUTB
Input Offset Voltage (µV)
© 2008 Microchip Technology Inc.
DS21613C-page 1
MCP616/7/8/9
NOTES:
DS21613C-page 2
© 2008 Microchip Technology Inc.
MCP616/7/8/9
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD – VSS ........................................................................7.0V
Current at Analog Input Pins (VIN+ and VIN–)................±2 mA
Analog Inputs (VIN+ and VIN–) ††.. VSS – 0.3V to VDD + 0.3V
All other Inputs and Outputs .......... VSS – 0.3V to VDD + 0.3V
†† See Section 4.1.2 “Input Voltage and Current Limits”.
Difference Input Voltage ...................................... |VDD – VSS
|
Output Short Circuit Current ................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ...................................–65°C to +150°C
Maximum Junction Temperature (TJ)..........................+150°C
ESD Protection On All Pins (HBM; MM) .............. ≥ 4 kV; 400V
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = +25°C, VCM = VDD/2,
VOUT ≈ VDD/2 and RL = 100 kΩ to VDD/2.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input Offset
Input Offset Voltage
VOS
–150
—
—
+150
—
µV
Input Offset Drift with Temperature
Power Supply Rejection
Input Bias Current and Impedance
Input Bias Current
ΔVOS/ΔTA
PSRR
±2.5
105
µV/°C TA = -40°C to +85°C
dB
86
—
IB
IB
-35
-70
—
-15
-21
-5
—
—
—
—
—
nA
At Temperature
nA
nA
TA = -40°C
TA = +85°C
At Temperature
IB
-12
Input Offset Current
IOS
ZCM
ZDIFF
—
±0.15
600||4
3||2
nA
Common Mode Input Impedance
Differential Input Impedance
Common Mode
—
MΩ||pF
MΩ||pF
—
Common Mode Input Voltage Range
Common Mode Rejection Ratio
VCMR
VSS
80
VDD – 0.9
—
V
CMRR
100
dB
V
V
DD = 5.0V,
CM = 0.0V to 4.1V
Open-Loop Gain
DC Open-Loop Gain (large signal)
AOL
AOL
100
95
120
115
—
—
dB
dB
RL = 25 kΩ to VDD/2,
OUT = 0.05V to VDD – 0.05V
RL = 5 kΩ to VDD/2,
OUT = 0.1V to VDD – 0.1V
V
DC Open-Loop Gain (large signal)
V
Output
Maximum Output Voltage Swing
V
V
OL, VOH
OL, VOH
VOUT
VSS + 15
VSS + 45
VSS + 50
VSS + 100
—
—
—
—
VDD – 20
VDD – 60
VDD – 50
VDD – 100
mV
mV
mV
mV
RL = 25 kΩ to VDD/2,
0.5V input overdrive
RL = 5 kΩ to VDD/2,
0.5V input overdrive
Linear Output Voltage Range
Output Short Circuit Current
RL = 25 kΩ to VDD/2,
AOL ≥ 100 dB
RL = 5 kΩ to VDD/2,
AOL ≥ 95 dB
VDD = 2.3V
VDD = 5.5V
VOUT
ISC
ISC
—
—
±7
—
—
mA
mA
±17
Power Supply
Supply Voltage
VDD
IQ
2.3
12
—
5.5
25
V
Quiescent Current per Amplifier
19
µA
IO = 0
© 2008 Microchip Technology Inc.
DS21613C-page 3
MCP616/7/8/9
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 100 kΩ to VDD/2 and CL = 60 pF.
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
190
57
—
—
—
kHz
°
G = +1V/V
Slew Rate
SR
0.08
V/µs
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni
eni
ini
—
—
—
2.2
32
70
—
—
—
µVP-P
nV/√Hz
fA/√Hz
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
MCP618 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 100 kΩ to VDD/2 and CL = 60 pF.
Parameters
Sym
Min
Typ
Max Units
Conditions
CS Low Specifications
CS Logic Threshold, Low
CS Input Current, Low
VIL
VSS
—
0.2 VDD
—
V
ICSL
–1.0
0.01
µA
CS = VSS
CS High Specifications
CS Logic Threshold, High
CS Input Current, High
VIH
ICSH
0.8 VDD
—
0.01
-0.05
10
VDD
2
V
—
-2
—
µA
µA
nA
CS = VDD
CS = VDD
CS = VDD
GND Current
ISS
—
—
Amplifier Output Leakage
CS Dynamic Specifications
CS Low to Amplifier Output Turn-on Time
IO(LEAK)
tON
tOFF
—
—
—
9
100
—
µs
µs
V
CS = 0.2VDD to VOUT = 0.9VDD/2,
G = +1 V/V, RL = 1 kΩ to VSS
CS High to Amplifier Output High-Z
CS Hysteresis
0.1
0.6
CS = 0.8VDD to VOUT = 0.1VDD/2,
G = +1 V/V, RL = 1 kΩ to VSS
VHYST
—
VDD = 5.0V
VIH
VIL
CS
VOUT
ISS
tOFF
tON
High-Z
High-Z
-19 µA
(typical)
-50 nA
(typical)
-50 nA
(typical)
ICS
10 nA
10 nA
(typical)
(typical)
FIGURE 1-1:
Timing Diagram for the CS
Pin on the MCP618.
DS21613C-page 4
© 2008 Microchip Technology Inc.
MCP616/7/8/9
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +2.3V to +5.5V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 8L-MSOP
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 14L-PDIP
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
TA
TA
TA
-40
-40
-65
—
—
—
+85
+125
+150
°C
°C
°C
Note 1
θJA
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
—
211
89.3
149.5
70
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
95.3
100
Note 1: The MCP616/7/8/9 operate over this extended temperature range, but with reduced performance. In any case, the
Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C.
1.1
Test Circuits
The test circuits used for the DC and AC tests are
shown in Figure 1-2 and Figure 1-3. The bypass
capacitors are laid out according to the rules discussed
in Section 4.6 “Supply Bypass”.
VDD
1 µF
0.1 µF
VIN
VOUT
RL
RN
RG
MCP61X
CL
RF
VDD/2
VL
FIGURE 1-2:
AC and DC Test Circuit for
Most Non-Inverting Gain Conditions.
VDD
1 µF
0.1 µF
VDD/2
VOUT
RL
RN
RG
MCP61X
CL
RF
VIN
VL
FIGURE 1-3:
AC and DC Test Circuit for
Most Inverting Gain Conditions.
© 2008 Microchip Technology Inc.
DS21613C-page 5
MCP616/7/8/9
NOTES:
DS21613C-page 6
© 2008 Microchip Technology Inc.
MCP616/7/8/9
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = +25°C, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 100 kΩ to VDD/2 and CL = 60 pF.
20%
14%
598 Samples
VDD = 5.5V
598 Samples
VDD = 5.5V
18%
16%
14%
12%
10%
8%
12%
10%
8%
TA = -40°C to +85°C
6%
4%
6%
4%
2%
2%
0%
0%
Input Offset Voltage (µV)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-1:
Input Offset Voltage at
FIGURE 2-4:
Input Offset Voltage Drift at
V
= 5.5V.
V
= 5.5V.
DD
DD
18%
16%
598 Samples
VDD = 2.3V
A = -40°C to +85°C
598 Samples
DD = 2.3V
16%
14%
12%
10%
8%
14%
12%
10%
8%
V
T
6%
6%
4%
4%
2%
2%
0%
0%
Offset Voltage (µV)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-2:
Input Offset Voltage at
FIGURE 2-5:
Input Offset Voltage Drift at
V
= 2.3V.
V
= 2.3V.
DD
DD
16%
20%
600 Samples
DD = 5.5V
600 Samples
VDD = 5.5V
18%
16%
14%
12%
10%
8%
6%
4%
2%
14%
12%
10%
8%
V
6%
4%
2%
0%
0%
Input Bias Current (nA)
Input Offset Current (nA)
FIGURE 2-3:
= 5.5V.
Input Bias Current at
FIGURE 2-6:
V = 5.5V.
DD
Input Offset Current at
V
DD
© 2008 Microchip Technology Inc.
DS21613C-page 7
MCP616/7/8/9
Note: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 100 kΩ to VDD/2 and CL = 60 pF.
0
-5
1.0
150
100
50
VDD = 5.5V
Representative Part
0.8
0.6
0.4
0.2
0.0
VDD = 5.5V
IOS
-10
-15
-20
-25
0
VDD = 2.3V
-50
-100
-150
IB
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-7:
Input Offset Voltage vs.
FIGURE 2-10:
Input Bias, Offset Currents
Ambient Temperature.
vs. Ambient Temperature.
24
22
120
115
110
20
18
16
14
12
10
8
VDD = 5.5V
PSRR
105
100
95
VDD = 2.3V
CMRR
90
6
4
2
85
80
0
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-8:
Quiescent Current vs.
FIGURE 2-11:
CMRR, PSRR vs. Ambient
Ambient Temperature.
Temperature.
40
9
RL = 5 kꢀ
35
VDD – VOH
RL = 25 kꢀ
8
7
6
5
4
3
2
1
0
VDD – VOH
30
VDD = 5.5V
VDD = 5.5V
25
20
15
10
VOL – VSS
VOL – VSS
5
0
VDD = 2.3V
-25
VDD = 2.3V
-25
-50
0
25
50
75
100
-50
0
25
50
75
100
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-9:
Maximum Output Voltage
FIGURE 2-12:
Maximum Output Voltage
Swing vs. Ambient Temperature at R = 5 kΩ.
Swing vs. Ambient Temperature at R = 25 kΩ.
L
L
DS21613C-page 8
© 2008 Microchip Technology Inc.
MCP616/7/8/9
Note: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 100 kΩ to VDD/2 and CL = 60 pF.
200
180
160
140
120
100
80
100
90
80
70
60
50
40
30
20
10
0
25
20
15
10
5
GBWP
ISC+
VDD = 5.5V
PM
60
| ISC–
|
40
VDD = 2.3V
75 100
20
0
0
-50
-25
0
25
50
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-13:
Output Short Circuit Current
FIGURE 2-16:
Gain Bandwidth Product,
vs. Ambient Temperature.
Phase Margin vs. Ambient Temperature.
0.10
100
VDD = 5.5V
0.09
80
Low-to-High Transition
0.08
0.07
0.06
60
40
20
High-to-Low Transition
0
0.05
TA = +85°C
-20
0.04
T
A = +25°C
-40
-60
0.03
T
A = -40°C
0.02
-80
0.01 VDD = 5.0V
0.00
-100
-50
-25
0
25
50
75
100
Common Mode Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-14:
Slew Rate vs. Ambient
FIGURE 2-17:
Input Offset Voltage vs.
Temperature.
Common Mode Input Voltage.
50
40
30
20
10
30
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
0.30
0.25
0.20
0.15
0.10
RL = 25 kꢀ
VDD = 5.5V
TA = +85°C
A = +25°C
A = -40°C
IOS
IB
0.05
0.00
T
T
0
VDD = 2.3V
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-10
-20
-30
-40
-50
VDD = 5.5V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-15:
vs. Common Mode Input Voltage.
Input Bias, Offset Currents
FIGURE 2-18:
Output Voltage.
Input Offset Voltage vs.
© 2008 Microchip Technology Inc.
DS21613C-page 9
MCP616/7/8/9
Note: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 100 kΩ to VDD/2 and CL = 60 pF.
1,000
100
10
25
20
15
10
5
VDD = 2.3V
VDD – VOH
VDD = 5.5V
TA = +85°C
A = +25°C
A = -40°C
T
T
VOL – VSS
0
1
10µ
100µ
0.1
1m
1
10m
10
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
0.01
Output Current Magnitude (A)
FIGURE 2-19:
Quiescent Current vs.
FIGURE 2-22:
Output Voltage Headroom
Power Supply Voltage.
vs. Output Current Magnitude.
125
130
125
120
115
110
105
100
95
RL = 25 kꢀ
120
115
110
105
VDD = 5.5V
VDD = 2.3V
90
100
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
1k
10k
10
100k
100
0.1
1
Power Supply Voltage (V)
Load Resistance (Ω)
FIGURE 2-20:
DC Open-Loop Gain vs.
FIGURE 2-23:
DC Open-Loop Gain vs.
Load Resistance.
Power Supply Voltage.
200
180
160
140
120
100
80
100
140
130
120
110
100
90
Referred to Input
90
GBWP
80
70
60
PM
50
40
30
20
10
0
60
40
80
20
70
0
100
1k
1.E+03
10k
1.E+04
100k
1.E+05
1k
1
10k
10
100k
100
1M
1.E+02
1,000
Load Resistance (Ω)
Frequency (Hz)
FIGURE 2-21:
Gain-Bandwidth Product,
FIGURE 2-24:
Channel-to-Channel
Phase Margin vs. Load Resistance.
Separation vs. Frequency (MCP617 and
MCP619 only).
DS21613C-page 10
© 2008 Microchip Technology Inc.
MCP616/7/8/9
Note: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 100 kΩ to VDD/2 and CL = 60 pF.
140
120
100
80
0
120
110
100
90
PSRR+
-30
CMRR
-60
Phase
PSRR-
-90
80
60
-120
-150
-180
-210
-240
70
60
40
Gain
50
20
40
0
30
-20
20
0.01 0.1
1
10 100 1k 10k 100k 1M
0.1
1
10
100
1k
10k
1.E- 1.E- 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 1.E+
02 01 00 F0r1eque02ncy0(H3z) 04 05 06
1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04
Frequency (Hz)
FIGURE 2-25:
Open-Loop Gain, Phase vs.
FIGURE 2-28:
CMRR, PSRR vs.
Frequency.
Frequency.
10
10,000
10,000
VDD = 5.5V
VDD = 2.3V
1,000
100
10
1,000
ini
1
100
eni
10
0.1
1
10
100 1k
10k
0.1
1.E- 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0
100
1k
1.E+03
10k
1.E+04
100k
1.E+05
1.E+02
01
0
1
2
3
4
Frequency (Hz)
Frequency (Hz)
FIGURE 2-26:
Input Noise Voltage, Current
FIGURE 2-29:
Maximum Output Voltage
Densities vs. Frequency.
Swing vs. Frequency.
Gain = -1
Gain = +1
Time (50 µs/div)
Time (50 µs/div)
FIGURE 2-27:
Small-Signal, Non-Inverting
FIGURE 2-30:
Small-Signal, Inverting
Pulse Response.
Pulse Response.
© 2008 Microchip Technology Inc.
DS21613C-page 11
MCP616/7/8/9
Note: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 100 kΩ to VDD/2 and CL = 60 pF.
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
5
4
3
2
1
0
Gain = -1
Gain = +1
DD = 5.0V
VDD = 5.0V
V
Time (50 µs/div)
Time (50 µs/div)
FIGURE 2-31:
Large-Signal, Non-Inverting
FIGURE 2-34:
Large-Signal, Inverting
Pulse Response.
Pulse Response.
5.0
4.5
4.0
5
0
5.0
4.5
4.0
VDD = 5.0V
CS
Hysteresis
VDD = 5.0V
Gain = +1 V/V
RL = 1 kꢀ to VSS
3.5
3.5
Output
On
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VOUT
CS swept
High-to-Low
CS swept
Low-to-High
Output
High-Z
Output
On
Output
High-Z
Output
High-Z
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Chip Select Voltage (V)
Time (5 μs/div)
FIGURE 2-32:
Chip Select (CS) to
FIGURE 2-35:
Chip Select (CS) Internal
Amplifier Output Response Time (MCP618 only).
Hysteresis (MCP618 only).
6
1.E-02
10m
1.E-03
1m
1.E- 4
100µ
1.E1-05µ
Gain = +2 V/V
VDD = 5.0V
5
4
1.E-06
1µ
100n
1.E- 7
3
10n
1.E- 8
1n
1.E-09
100p
1.E-10
10p
1.E-11
2
+125°C
+85°C
+25°C
-40°C
VIN
1
VOUT
0
1p
1.E-12
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Voltage (V)
-1
Time (100 µs/div)
FIGURE 2-33:
The MCP616/7/8/9 Show
FIGURE 2-36:
Measured Input Current vs.
No Phase Reversal.
Input Voltage (below V ).
SS
DS21613C-page 12
© 2008 Microchip Technology Inc.
MCP616/7/8/9
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
MCP616
PIN FUNCTION TABLE
MCP617
MCP618
MCP619
PDIP,
SOIC,
TSSOP
Symbol
Description
MSOP,
MSOP,
MSOP,
PDIP, SOIC PDIP, SOIC PDIP, SOIC
6
2
1
2
6
2
1
2
VOUT, VOUTA
Output (op amp A)
VIN–, VINA
VIN+, VINA
VDD
–
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
Non-inverting Input (op amp B)
Inverting Input (op amp B)
Output (op amp B)
3
3
3
3
+
7
8
7
4
—
—
—
—
—
—
4
5
—
—
—
—
—
—
4
5
VINB
VINB
+
6
6
–
7
7
VOUTB
VOUTC
—
—
—
4
8
Output (op amp B)
9
VINC
VINC
–
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Output (op amp D)
10
11
12
13
14
—
—
+
VSS
—
—
—
—
1, 5, 8
—
—
—
—
—
—
—
—
8
VIND+
VIND–
VOUTD
CS
Chip Select
1, 5
NC
No Internal Connection
3.1
Analog Outputs
3.4
Power Supply Pins (VDD, VSS)
The output pins are low-impedance voltage sources.
The positive power supply (VDD) is 2.3V to 5.5V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
3.2
Analog Inputs
and VDD
.
The non-inverting and inverting inputs are high-
impedance PNP inputs with low bias currents.
Typically, these parts are used in a single-supply
(positive) supply configuration. In this case, VSS is
connected to ground and VDD is connected to the
supply. VDD will need bypass capacitors.
3.3
Chip Select Digital Input (CS)
This is a CMOS, Schmitt-triggered input that places the
MCP618 op amp into a low-power mode of operation.
© 2008 Microchip Technology Inc.
DS21613C-page 13
MCP616/7/8/9
NOTES:
DS21613C-page 14
© 2008 Microchip Technology Inc.
MCP616/7/8/9
4.0
APPLICATIONS INFORMATION
VDD
The MCP616/7/8/9 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process,
which includes PNP transistors. These op amps are
unity-gain stable and suitable for a wide range of
general purpose applications.
D1 D2
V1
V2
R1
R2
MCP61X
4.1
Rail-to-Rail Inputs
4.1.1
PHASE REVERSAL
The MCP616/7/8/9 op amp is designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 2-36 shows the input voltage exceed-
ing the supply voltage without any phase reversal.
R3
VSS – (minimum expected V1)
R1 >
R2 >
2 mA
VSS – (minimum expected V2)
2 mA
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
FIGURE 4-2:
Protecting the Analog
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltages that go too far
above VDD; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass
quick ESD events within the specified limits.
Inputs.
It is also possible to connect the diodes to the left of
resistors R1 and R2. In this case, current through the
diodes D1 and D2 needs to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC current into the input pins (VIN+ and
VIN–) should be very small.
A significant amount of current can flow out of the
inputs when the common mode voltage (VCM) is below
ground (VSS). (See Figure 2-36.) Applications that are
high impedance may need to limit the usable voltage
range.
Bond
VDD
Pad
4.1.3
NORMAL OPERATION
Bond
Pad
Bond
Pad
Input
Stage
The inputs of the MCP616/7/8/9 op amps connect to a
differential PNP input stage. The common mode input
voltage range (VCMR) includes ground in single-supply
systems (VSS), but does not include VDD. This means
that the amplifier input behaves linearly as long as the
common mode input voltage (VCM) is kept within the
specified VCMR limits (VSS to VDD–0.9V at +25°C).
VIN+
VIN–
Bond
Pad
VSS
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
4.2
DC Offsets
In order to prevent damage and/or improper operation
of these op amps, the circuit they are in must limit the
currents and voltages at the VIN+ and VIN– pins (see
“Absolute Maximum Ratings †” at the beginning of
Section 1.0 “Electrical Characteristics”). Figure 4-2
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN–) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pins. Diodes D1 and D2 prevent the
input pins (VIN+ and VIN–) from going too far above
VDD, and dump any currents onto VDD. When
implemented as shown, resistors R1 and R2 also limit
the current through D1 and D2.
The MCP616/7/8/9 family of op amps have a PNP input
differential pair that gives good DC performance. They
have very low input offset voltage (±150 µV, maximum)
at TA = +25°C, with a typical bias current of -15 nA
(sourced out of the inputs).
There must be a DC path to ground (or power supply)
from both inputs, or the op amp will not bias properly.
The DC resistances seen by the op amp inputs (R1||R2
and R4||R5 in Figure 4-3) need to be equal and less
than 100 kΩ, to minimize the total DC offset.
© 2008 Microchip Technology Inc.
DS21613C-page 15
MCP616/7/8/9
EQUATION 4-1:
GN = 1 + R2 ⁄ R1
VOOS = GN [VOS + IB ((R1 ||R2) – REQ
– IOS ((R1 ||R2 ) + REQ ) / 2]
VCM = VEQ – (IB + IOS /2) REQ
VOUT = VEQ (GN ) – V1 (GN – 1) + VOOS
R1
R2
V1
)
C3
R3
VOUT
MCP61X
V2
Where:
GN
R4
R5
=
op amp’s noise gain (from the
non-inverting input to the
output)
FIGURE 4-3:
Example Circuit for
Calculating DC Offset.
VOOS
VOS
IB
=
=
=
=
=
circuit’s output offset voltage
op amp’s input offset voltage
op amp’s input bias current
op amp’s input offset current
To calculate the DC bias point and DC offset, convert
the circuit to its DC equivalent:
• Replace capacitors with open circuits
IOS
• Replace inductors with short circuits
VCM
op amp’s coommon mode
input voltage
• Replace AC voltage sources with short circuits
• Replace AC current sources with open circuits
• Convert DC sources and resistances into their
Thevenin equivalent form
Use the worst-case specs and source values to
determine the worst-case output voltage range and
offset for your design. Make sure the common mode
input voltage range and output voltage range are not
exceeded.
The DC equivalent circuit for Figure 4-3 is shown in
Figure 4-4.
R1
R2
4.3
Rail-to-Rail Output
V1
There are two specifications that describe the output
swing capability of the MCP616/7/8/9 family of op
amps. The first specification (Maximum Output Voltage
Swing) defines the absolute maximum swing that can
be achieved under the specified load conditions. For
instance, the output voltage swings to within 15 mV of
the negative rail with a 25 kΩ load tied to VDD/2.
Figure 2-33 shows how the output voltage is limited
when the input goes beyond the linear region of
operation.
VOUT
MCP61X
REQ
VEQ
R5
------------------
R4 + R5
VEQ = V2 ⋅
REQ = R4 || R5
FIGURE 4-4:
Equivalent DC Circuit.
The second specification that describes the output
swing capability of these amplifiers is the Linear Output
Voltage Range. This specification defines the
maximum output swing that can be achieved while the
amplifier still operates in its linear region. To verify
linear operation in this range, the large-signal DC
Open-Loop Gain (AOL) is measured at points inside the
supply rails. The measurement must meet the specified
Now calculate the nominal DC bias point with offset:
AOL conditions in the specification table.
DS21613C-page 16
© 2008 Microchip Technology Inc.
MCP616/7/8/9
4.4
Capacitive Loads
4.5
MCP618 Chip Select (CS)
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, though all gains show the
same general behavior.
The MCP618 is a single op amp with Chip Select (CS).
When CS is pulled high, the supply current drops to
50 nA (typical) and flows through the CS pin to VSS
.
When this happens, the amplifier output is put into a
high-impedance state. By pulling CS low, the amplifier
is enabled. The CS pin has an internal 5 MΩ (typical)
pull-down resistor connected to VSS, so it will go low if
the CS pins is left floating. Figure 1-1 shows the output
voltage and supply current response to a CS pulse.
When driving large capacitive loads with these op
amps (e.g., > 60 pF when G = +1), a small series
resistor at the output (RISO in Figure 4-5) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
4.6
Supply Bypass
With this family of operational amplifiers, the power
supply pin (VDD for single supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high-frequency performance. It may use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor is not required
and can be shared with other analog parts.
RISO
VOUT
4.7
Unused Op Amps
MCP61X
VIN
CL
An unused op amp in a quad package (MCP619)
should be configured as shown in Figure 4-7. These
circuits prevent the output from toggling and causing
crosstalk. Circuits A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
FIGURE 4-5:
Output Resistor, R
ISO
stabilizes large capacitive loads.
Figure 4-6 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit’s noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
¼ MCP619 (A)
VDD
¼ MCP619 (B)
10,0 0
10k
VDD
VDD
R1
R2
1k
1,000
VREF
GN = +1
N ꢀ +2
G
R2
------------------
⋅
100
100
1.E-11
VREF = VDD
R1 + R2
10p
100p
1.E-10
1n
1.E-09
10n
1.E-08
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-7:
Unused Op Amps.
FIGURE 4-6:
Recommended R
Values
ISO
for Capacitive Loads.
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP616/7/8/9 SPICE macro
model are helpful.
© 2008 Microchip Technology Inc.
DS21613C-page 17
MCP616/7/8/9
4.8
PCB Surface Leakage
4.9
Application Circuits
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP616/7/8/9 family’s bias current at 25°C
(1 pA, typical).
4.9.1
HIGH GAIN PRE-AMPLIFIER
The MCP616/7/8/9 op amps are well suited to
amplifying small signals produced by low-impedance
sources/sensors. The low offset voltage, low offset
current and low noise fit well in this role. Figure 4-9
shows a typical pre-amplifier connected to a low-
impedance source (VS and RS).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example is shown below in Figure 4-8.
RS
VS
10 kΩ
VOUT
MCP616
RG
RF
VDD/2
Guard Ring
VIN– VIN+ VSS
11.0 kΩ
100 kΩ
FIGURE 4-9:
High Gain Pre-amplifier.
For the best noise and offset performance, the source
resistance RS needs to be less than 15 kΩ. The DC
resistances at the inputs are equal to minimize the
offset voltage caused by the input bias currents
(Section 4.2 “DC Offsets”). In this circuit, the DC gain
is 10 V/V, which will give a typical bandwidth of 19 kHz.
FIGURE 4-8:
for Inverting Gain.
Example Guard Ring Layout
1. Non-inverting Gain and Unity Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
4.9.2
TWO OP AMP INSTRUMENTATION
AMPLIFIER
The two-op amp instrumentation amplifier shown in
Figure 4-10 serves the function of taking the difference
of two input voltages, level-shifting it and gaining it to
the output. This configuration is best suited for higher
gains (i.e., gain > 3 V/V). The reference voltage (VREF
is typically at mid-supply (VDD/2) in a single-supply
environment.
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
2. Inverting Gain and Transimpedance gain (con-
vert current to voltage, such as photo detectors)
amplifiers:
)
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
R
2R
⎛
⎞
1
1
V
= (V – V ) 1 + ------ + --------- + V
⎜
⎟
OUT
1
2
REF
R
R
⎝
⎠
2
G
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
RG
R1
R2
R2
R1
VREF
VOUT
V2
V1
½
MCP617
½
MCP617
FIGURE 4-10:
Two-Op Amp
Instrumentation Amplifier.
The key specifications that make the MCP616/7/8/9
family appropriate for this application circuit are low
input bias current, low offset voltage and high common-
mode rejection.
DS21613C-page 18
© 2008 Microchip Technology Inc.
MCP616/7/8/9
4.9.3
THREE OP AMP
INSTRUMENTATION AMPLIFIER
4.9.4
PRECISION GAIN WITH GOOD
LOAD ISOLATION
A classic, three-op amp instrumentation amplifier is
illustrated in Figure 4-11. The two-input op amps
provide differential signal gain and a common mode
gain of +1. The output op amp is a difference amplifier,
which converts its input signal from differential to a
single-ended output; it rejects common mode signals at
its input. The gain of this circuit is simply adjusted with
one resistor (RG). The reference voltage (VREF) is
typically referenced to mid-supply (VDD/2) in single-
supply applications.
In Figure 4-12, the MCP616 op amp, R1 and R2 provide
a high gain to the input signal (VIN). The MCP616’s low
offset voltage makes this an accurate circuit.
The MCP606 is configured as a unity-gain buffer. It
isolates the MCP616’s output from the load, increasing
the high gain stage’s precision. Since the MCP606 has
a higher output current, and the two amplifiers are
housed in separate packages, there is minimal change
in the MCP616’s offset voltage due to loading effect.
V
= V (1 + R ⁄ R )
IN 2 1
OUT
R
2R
⎛
⎞ ⎛
⎟ ⎜
⎠ ⎝
⎞
⎟
⎠
4
2
-----
V
= (V – V ) 1 + ---------
+ V
⎜
OUT
1
2
REF
R
3
R
⎝
MCP616
G
VIN
MCP606
½
VOUT
MCP617
V2
R1
R2
R3
R4
VOUT
FIGURE 4-12:
Precision Gain with Good
R2
RG
R2
Load Isolation.
MCP616
VREF
R3
R4
V1
FIGURE 4-11:
½
MCP617
Three-Op Amp
Instrumentation Amplifier.
© 2008 Microchip Technology Inc.
DS21613C-page 19
MCP616/7/8/9
NOTES:
DS21613C-page 20
© 2008 Microchip Technology Inc.
MCP616/7/8/9
5.4
Analog Demonstration and
Evaluation Boards
5.0 DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP616/7/8/9 family of op amps.
Microchip offers
a
broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
5.1
SPICE Macro Model
a
complete listing of these boards and their
The latest SPICE macro model for the MCP616/7/8/9
op amps is available on the Microchip web site at
www.microchip.com. This model is intended to be an
initial design tool that works well in the op amp’s linear
region of operation over the temperature range. See
the model file for information on its capabilities.
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Two of our boards that are especially useful are:
• P/N SOIC8EV: 8-Pin SOIC/MSOP/TSSOP/DIP
Evaluation Board
Bench testing is a very important part of any design and
cannot be replaced with simulations. Also, simulation
results using this macro model need to be validated by
comparing them to the data sheet specifications and
characteristic curves.
• P/N SOIC14EV: 14-Pin SOIC/TSSOP/DIP
Evaluation Board
5.5
Application Notes
The following Microchip Application Notes are avail-
able on the Microchip web site at www.microchip. com/
appnotes and are recommended as supplemental
reference resources.
5.2
Mindi™ Circuit Designer &
Simulator
Microchip’s Mindi™ Circuit Designer & Simulator aids
in the design of various circuits useful for active filter,
amplifier and power-management applications. It is a
free online circuit designer & simulator available from
the Microchip web site at www.microchip.com/mindi.
This interactive circuit designer & simulator enables
designers to quickly generate circuit diagrams,
simulate circuits. Circuits developed using the Mindi
Circuit Designer & Simulator can be downloaded to a
personal computer or workstation.
ADN003: “Select the Right Operational Amplifier for
your Filtering Circuits”, DS21821
AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
AN723: “Operational Amplifier AC Specifications and
Applications”, DS00723
AN884: “Driving Capacitive Loads With Op Amps”,
DS00884
AN990: “Analog Sensor Conditioning Circuits – An
Overview”, DS00990
5.3
Microchip Advanced Part Selector
(MAPS)
These application notes and others are listed in the
design guide:
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparasion
reports. Helpful links are also provided for Datasheets,
Purchase, and Sampling of Microchip parts.
“Signal Chain Design Guide”, DS21825
© 2008 Microchip Technology Inc.
DS21613C-page 21
MCP616/7/8/9
NOTES:
DS21613C-page 22
© 2008 Microchip Technology Inc.
MCP616/7/8/9
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
Example:
8-Lead MSOP
XXXXXX
616I
812256
YWWNNN
8-Lead PDIP (300 mil)
Examples:
XXXXXXXX
XXXXXNNN
MCP616
I/P 256
0812
MCP616
e
3
I/P256
OR
OR
YYWW
0812
8-Lead SOIC (150 mil)
Examples:
XXXXXXXX
XXXXYYWW
MCP616I
MCP616
I/SN0812
e
3
SN^0812
NNN
256
256
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2008 Microchip Technology Inc.
DS21613C-page 23
MCP616/7/8/9
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP619)
Examples:
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
MCP619-I/P
XXXXXXXXXXXXXX
MCP619
I/P
0812256
e
3
OR
YYWWNNN
0812256
14-Lead SOIC (150 mil) (MCP619)
Examples:
XXXXXXXXXX
XXXXXXXXXX
MCP619
MCP619ISL
XXXXXXXXXX
e
3
I/SL
OR
YYWWNNN
0812256
0812256
Example:
14-Lead TSSOP (MCP619)
XXXXXXXX
YYWW
619IST
0812
256
NNN
DS21613C-page 24
© 2008 Microchip Technology Inc.
MCP616/7/8/9
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢋꢌꢎꢏꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢇꢄꢌꢕꢄꢖꢃꢆꢗꢍꢐꢘꢆꢙꢍꢐꢒꢇꢚ
ꢛꢏꢊꢃꢜ 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ
ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ
D
N
E
E1
NOTE 1
2
b
1
e
c
φ
A2
A
L
L1
A1
4ꢄꢃ%
ꢒꢚ55ꢚꢒ*ꢘ*ꢙꢖ
ꢐꢃ&ꢉꢄ ꢃꢌꢄꢅ5ꢃ&ꢃ%
ꢒꢚ6
67ꢒ
ꢒꢕ8
6!&(ꢉꢊꢅꢌ$ꢅꢂꢃꢄ
ꢂꢃ%ꢍꢎ
6
ꢉ
9
ꢓꢁ:+ꢅ.ꢖ/
7ꢆꢉꢊꢇꢈꢈꢅ;ꢉꢃꢔꢎ%
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅꢘꢎꢃꢍ2ꢄꢉ
ꢖ%ꢇꢄ"ꢌ$$ꢅ
7ꢆꢉꢊꢇꢈꢈꢅ=ꢃ"%ꢎ
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅ=ꢃ"%ꢎ
7ꢆꢉꢊꢇꢈꢈꢅ5ꢉꢄꢔ%ꢎ
1ꢌꢌ%ꢅ5ꢉꢄꢔ%ꢎ
ꢕ
M
ꢓꢁꢛ+
ꢓꢁꢓꢓ
M
ꢓꢁ9+
ꢀꢁꢀꢓ
ꢓꢁꢜ+
ꢓꢁꢀ+
ꢕꢏ
ꢕꢀ
*
*ꢀ
ꢐ
M
ꢗꢁꢜꢓꢅ.ꢖ/
,ꢁꢓꢓꢅ.ꢖ/
,ꢁꢓꢓꢅ.ꢖ/
ꢓꢁ:ꢓ
5
ꢓꢁꢗꢓ
ꢓꢁ9ꢓ
1ꢌꢌ%ꢑꢊꢃꢄ%
1ꢌꢌ%ꢅꢕꢄꢔꢈꢉ
5ꢀ
ꢀ
ꢓꢁꢜ+ꢅꢙ*1
M
ꢓꢝ
9ꢝ
5ꢉꢇ"ꢅꢘꢎꢃꢍ2ꢄꢉ
5ꢉꢇ"ꢅ=ꢃ"%ꢎ
ꢍ
(
ꢓꢁꢓ9
ꢓꢁꢏꢏ
M
M
ꢓꢁꢏ,
ꢓꢁꢗꢓ
ꢛꢏꢊꢃꢉꢜ
ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃ !ꢇꢈꢅꢃꢄ"ꢉ#ꢅ$ꢉꢇ%!ꢊꢉꢅ&ꢇꢋꢅꢆꢇꢊꢋ'ꢅ(!%ꢅ&! %ꢅ(ꢉꢅꢈꢌꢍꢇ%ꢉ"ꢅ)ꢃ%ꢎꢃꢄꢅ%ꢎꢉꢅꢎꢇ%ꢍꢎꢉ"ꢅꢇꢊꢉꢇꢁ
ꢏꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄ ꢅꢐꢅꢇꢄ"ꢅ*ꢀꢅ"ꢌꢅꢄꢌ%ꢅꢃꢄꢍꢈ!"ꢉꢅ&ꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢁꢅꢒꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢅ ꢎꢇꢈꢈꢅꢄꢌ%ꢅꢉ#ꢍꢉꢉ"ꢅꢓꢁꢀ+ꢅ&&ꢅꢑꢉꢊꢅ ꢃ"ꢉꢁ
,ꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢔꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢔꢅꢑꢉꢊꢅꢕꢖꢒ*ꢅ-ꢀꢗꢁ+ꢒꢁ
.ꢖ/0 .ꢇ ꢃꢍꢅꢐꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢘꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ
ꢙ*10 ꢙꢉ$ꢉꢊꢉꢄꢍꢉꢅꢐꢃ&ꢉꢄ ꢃꢌꢄ'ꢅ! !ꢇꢈꢈꢋꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ'ꢅ$ꢌꢊꢅꢃꢄ$ꢌꢊ&ꢇ%ꢃꢌꢄꢅꢑ!ꢊꢑꢌ ꢉ ꢅꢌꢄꢈꢋꢁ
ꢒꢃꢍꢊꢌꢍꢎꢃꢑ ꢘꢉꢍꢎꢄꢌꢈꢌꢔꢋ ꢐꢊꢇ)ꢃꢄꢔ /ꢓꢗꢞꢀꢀꢀ.
© 2008 Microchip Technology Inc.
DS21613C-page 25
MCP616/7/8/9
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢝꢓꢄꢈꢆ ꢔꢁꢂꢋꢔꢃꢆꢗꢇꢘꢆMꢆ"##ꢆꢑꢋꢈꢆ$ꢏꢅ%ꢆꢙꢇꢝ ꢇꢚ
ꢛꢏꢊꢃꢜ 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ
ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ
N
NOTE 1
E1
3
1
2
D
E
A2
A
L
A1
c
e
eB
b1
b
4ꢄꢃ%
ꢚ6/;*ꢖ
ꢐꢃ&ꢉꢄ ꢃꢌꢄꢅ5ꢃ&ꢃ%
ꢒꢚ6
67ꢒ
9
ꢁꢀꢓꢓꢅ.ꢖ/
M
ꢁꢀ,ꢓ
M
ꢁ,ꢀꢓ
ꢁꢏ+ꢓ
ꢁ,:+
ꢁꢀ,ꢓ
ꢁꢓꢀꢓ
ꢁꢓ:ꢓ
ꢁꢓꢀ9
M
ꢒꢕ8
6!&(ꢉꢊꢅꢌ$ꢅꢂꢃꢄ
ꢂꢃ%ꢍꢎ
ꢘꢌꢑꢅ%ꢌꢅꢖꢉꢇ%ꢃꢄꢔꢅꢂꢈꢇꢄꢉ
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅꢘꢎꢃꢍ2ꢄꢉ
.ꢇ ꢉꢅ%ꢌꢅꢖꢉꢇ%ꢃꢄꢔꢅꢂꢈꢇꢄꢉ
ꢖꢎꢌ!ꢈ"ꢉꢊꢅ%ꢌꢅꢖꢎꢌ!ꢈ"ꢉꢊꢅ=ꢃ"%ꢎ
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅ=ꢃ"%ꢎ
7ꢆꢉꢊꢇꢈꢈꢅ5ꢉꢄꢔ%ꢎ
6
ꢉ
ꢕ
ꢕꢏ
ꢕꢀ
*
*ꢀ
ꢐ
5
ꢍ
(ꢀ
(
ꢉ.
M
ꢁꢏꢀꢓ
ꢁꢀꢜ+
M
ꢁꢀꢀ+
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ꢁꢏꢜꢓ
ꢁꢏꢗꢓ
ꢁ,ꢗ9
ꢁꢀꢀ+
ꢁꢓꢓ9
ꢁꢓꢗꢓ
ꢁꢓꢀꢗ
M
ꢁ,ꢏ+
ꢁꢏ9ꢓ
ꢁꢗꢓꢓ
ꢁꢀ+ꢓ
ꢁꢓꢀ+
ꢁꢓꢛꢓ
ꢁꢓꢏꢏ
ꢁꢗ,ꢓ
ꢘꢃꢑꢅ%ꢌꢅꢖꢉꢇ%ꢃꢄꢔꢅꢂꢈꢇꢄꢉ
5ꢉꢇ"ꢅꢘꢎꢃꢍ2ꢄꢉ
4ꢑꢑꢉꢊꢅ5ꢉꢇ"ꢅ=ꢃ"%ꢎ
5ꢌ)ꢉꢊꢅ5ꢉꢇ"ꢅ=ꢃ"%ꢎ
7ꢆꢉꢊꢇꢈꢈꢅꢙꢌ)ꢅꢖꢑꢇꢍꢃꢄꢔꢅꢅꢟ
ꢛꢏꢊꢃꢉꢜ
ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃ !ꢇꢈꢅꢃꢄ"ꢉ#ꢅ$ꢉꢇ%!ꢊꢉꢅ&ꢇꢋꢅꢆꢇꢊꢋ'ꢅ(!%ꢅ&! %ꢅ(ꢉꢅꢈꢌꢍꢇ%ꢉ"ꢅ)ꢃ%ꢎꢅ%ꢎꢉꢅꢎꢇ%ꢍꢎꢉ"ꢅꢇꢊꢉꢇꢁ
ꢏꢁ ꢟꢅꢖꢃꢔꢄꢃ$ꢃꢍꢇꢄ%ꢅ/ꢎꢇꢊꢇꢍ%ꢉꢊꢃ %ꢃꢍꢁ
,ꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄ ꢅꢐꢅꢇꢄ"ꢅ*ꢀꢅ"ꢌꢅꢄꢌ%ꢅꢃꢄꢍꢈ!"ꢉꢅ&ꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢁꢅꢒꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢅ ꢎꢇꢈꢈꢅꢄꢌ%ꢅꢉ#ꢍꢉꢉ"ꢅꢁꢓꢀꢓ@ꢅꢑꢉꢊꢅ ꢃ"ꢉꢁ
ꢗꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢔꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢔꢅꢑꢉꢊꢅꢕꢖꢒ*ꢅ-ꢀꢗꢁ+ꢒꢁ
.ꢖ/0ꢅ.ꢇ ꢃꢍꢅꢐꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢘꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ
ꢒꢃꢍꢊꢌꢍꢎꢃꢑ ꢘꢉꢍꢎꢄꢌꢈꢌꢔꢋ ꢐꢊꢇ)ꢃꢄꢔ /ꢓꢗꢞꢓꢀ9.
DS21613C-page 26
© 2008 Microchip Technology Inc.
MCP616/7/8/9
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢗꢐꢛꢘꢆMꢆꢛꢄꢎꢎꢏ&'ꢆ"()#ꢆꢑꢑꢆ$ꢏꢅ%ꢆꢙꢐꢒ *ꢚ
ꢛꢏꢊꢃꢜ 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ
ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ
D
e
N
E
E1
NOTE 1
1
2
3
α
h
b
h
c
φ
A2
A
L
A1
L1
β
4ꢄꢃ%
ꢒꢚ55ꢚꢒ*ꢘ*ꢙꢖ
ꢐꢃ&ꢉꢄ ꢃꢌꢄꢅ5ꢃ&ꢃ%
ꢒꢚ6
67ꢒ
ꢒꢕ8
6!&(ꢉꢊꢅꢌ$ꢅꢂꢃꢄ
ꢂꢃ%ꢍꢎ
6
ꢉ
9
ꢀꢁꢏꢛꢅ.ꢖ/
7ꢆꢉꢊꢇꢈꢈꢅ;ꢉꢃꢔꢎ%
ꢕ
M
ꢀꢁꢏ+
ꢓꢁꢀꢓ
M
M
M
ꢀꢁꢛ+
M
ꢓꢁꢏ+
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅꢘꢎꢃꢍ2ꢄꢉ
ꢖ%ꢇꢄ"ꢌ$$ꢅꢅ
ꢕꢏ
ꢕꢀ
*
ꢟ
7ꢆꢉꢊꢇꢈꢈꢅ=ꢃ"%ꢎ
:ꢁꢓꢓꢅ.ꢖ/
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅ=ꢃ"%ꢎ
7ꢆꢉꢊꢇꢈꢈꢅ5ꢉꢄꢔ%ꢎ
/ꢎꢇ&$ꢉꢊꢅAꢌꢑ%ꢃꢌꢄꢇꢈB
1ꢌꢌ%ꢅ5ꢉꢄꢔ%ꢎ
*ꢀ
ꢐ
ꢎ
,ꢁꢜꢓꢅ.ꢖ/
ꢗꢁꢜꢓꢅ.ꢖ/
ꢓꢁꢏ+
ꢓꢁꢗꢓ
M
M
ꢓꢁ+ꢓ
ꢀꢁꢏꢛ
5
1ꢌꢌ%ꢑꢊꢃꢄ%
1ꢌꢌ%ꢅꢕꢄꢔꢈꢉ
5ꢉꢇ"ꢅꢘꢎꢃꢍ2ꢄꢉ
5ꢉꢇ"ꢅ=ꢃ"%ꢎ
ꢒꢌꢈ"ꢅꢐꢊꢇ$%ꢅꢕꢄꢔꢈꢉꢅꢘꢌꢑ
ꢒꢌꢈ"ꢅꢐꢊꢇ$%ꢅꢕꢄꢔꢈꢉꢅ.ꢌ%%ꢌ&
5ꢀ
ꢀ
ꢀꢁꢓꢗꢅꢙ*1
ꢓꢝ
ꢓꢁꢀꢛ
ꢓꢁ,ꢀ
+ꢝ
M
M
M
M
M
9ꢝ
ꢍ
(
ꢁ
ꢓꢁꢏ+
ꢓꢁ+ꢀ
ꢀ+ꢝ
ꢂ
+ꢝ
ꢀ+ꢝ
ꢛꢏꢊꢃꢉꢜ
ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃ !ꢇꢈꢅꢃꢄ"ꢉ#ꢅ$ꢉꢇ%!ꢊꢉꢅ&ꢇꢋꢅꢆꢇꢊꢋ'ꢅ(!%ꢅ&! %ꢅ(ꢉꢅꢈꢌꢍꢇ%ꢉ"ꢅ)ꢃ%ꢎꢃꢄꢅ%ꢎꢉꢅꢎꢇ%ꢍꢎꢉ"ꢅꢇꢊꢉꢇꢁ
ꢏꢁ ꢟꢅꢖꢃꢔꢄꢃ$ꢃꢍꢇꢄ%ꢅ/ꢎꢇꢊꢇꢍ%ꢉꢊꢃ %ꢃꢍꢁ
,ꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄ ꢅꢐꢅꢇꢄ"ꢅ*ꢀꢅ"ꢌꢅꢄꢌ%ꢅꢃꢄꢍꢈ!"ꢉꢅ&ꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢁꢅꢒꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢅ ꢎꢇꢈꢈꢅꢄꢌ%ꢅꢉ#ꢍꢉꢉ"ꢅꢓꢁꢀ+ꢅ&&ꢅꢑꢉꢊꢅ ꢃ"ꢉꢁ
ꢗꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢔꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢔꢅꢑꢉꢊꢅꢕꢖꢒ*ꢅ-ꢀꢗꢁ+ꢒꢁ
.ꢖ/0 .ꢇ ꢃꢍꢅꢐꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢘꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ
ꢙ*10 ꢙꢉ$ꢉꢊꢉꢄꢍꢉꢅꢐꢃ&ꢉꢄ ꢃꢌꢄ'ꢅ! !ꢇꢈꢈꢋꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ'ꢅ$ꢌꢊꢅꢃꢄ$ꢌꢊ&ꢇ%ꢃꢌꢄꢅꢑ!ꢊꢑꢌ ꢉ ꢅꢌꢄꢈꢋꢁ
ꢒꢃꢍꢊꢌꢍꢎꢃꢑ ꢘꢉꢍꢎꢄꢌꢈꢌꢔꢋ ꢐꢊꢇ)ꢃꢄꢔ /ꢓꢗꢞꢓ+ꢛ.
© 2008 Microchip Technology Inc.
DS21613C-page 27
MCP616/7/8/9
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢗꢐꢛꢘꢆMꢆꢛꢄꢎꢎꢏ&'ꢆ"()#ꢆꢑꢑꢆ$ꢏꢅ%ꢆꢙꢐꢒ *ꢚ
ꢛꢏꢊꢃꢜ 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ
ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ
DS21613C-page 28
© 2008 Microchip Technology Inc.
MCP616/7/8/9
+,ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢝꢓꢄꢈꢆ ꢔꢁꢂꢋꢔꢃꢆꢗꢇꢘꢆMꢆ"##ꢆꢑꢋꢈꢆ$ꢏꢅ%ꢆꢙꢇꢝ ꢇꢚ
ꢛꢏꢊꢃꢜ 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ
ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ
N
NOTE 1
E1
3
1
2
D
E
A2
A
L
c
A1
b1
b
e
eB
4ꢄꢃ%
ꢐꢃ&ꢉꢄ ꢃꢌꢄꢅ5ꢃ&ꢃ%
ꢚ6/;*ꢖ
67ꢒ
ꢀꢗ
ꢁꢀꢓꢓꢅ.ꢖ/
M
ꢒꢚ6
ꢒꢕ8
6!&(ꢉꢊꢅꢌ$ꢅꢂꢃꢄ
ꢂꢃ%ꢍꢎ
6
ꢉ
ꢕ
ꢘꢌꢑꢅ%ꢌꢅꢖꢉꢇ%ꢃꢄꢔꢅꢂꢈꢇꢄꢉ
M
ꢁꢏꢀꢓ
ꢁꢀꢜ+
M
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅꢘꢎꢃꢍ2ꢄꢉ
.ꢇ ꢉꢅ%ꢌꢅꢖꢉꢇ%ꢃꢄꢔꢅꢂꢈꢇꢄꢉ
ꢖꢎꢌ!ꢈ"ꢉꢊꢅ%ꢌꢅꢖꢎꢌ!ꢈ"ꢉꢊꢅ=ꢃ"%ꢎ
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅ=ꢃ"%ꢎ
7ꢆꢉꢊꢇꢈꢈꢅ5ꢉꢄꢔ%ꢎ
ꢘꢃꢑꢅ%ꢌꢅꢖꢉꢇ%ꢃꢄꢔꢅꢂꢈꢇꢄꢉ
5ꢉꢇ"ꢅꢘꢎꢃꢍ2ꢄꢉ
4ꢑꢑꢉꢊꢅ5ꢉꢇ"ꢅ=ꢃ"%ꢎ
ꢕꢏ
ꢕꢀ
*
*ꢀ
ꢐ
5
ꢍ
(ꢀ
(
ꢉ.
ꢁꢀꢀ+
ꢁꢓꢀ+
ꢁꢏꢜꢓ
ꢁꢏꢗꢓ
ꢁꢛ,+
ꢁꢀꢀ+
ꢁꢓꢓ9
ꢁꢓꢗ+
ꢁꢓꢀꢗ
M
ꢁꢀ,ꢓ
M
ꢁ,ꢀꢓ
ꢁꢏ+ꢓ
ꢁꢛ+ꢓ
ꢁꢀ,ꢓ
ꢁꢓꢀꢓ
ꢁꢓ:ꢓ
ꢁꢓꢀ9
M
ꢁ,ꢏ+
ꢁꢏ9ꢓ
ꢁꢛꢛ+
ꢁꢀ+ꢓ
ꢁꢓꢀ+
ꢁꢓꢛꢓ
ꢁꢓꢏꢏ
ꢁꢗ,ꢓ
5ꢌ)ꢉꢊꢅ5ꢉꢇ"ꢅ=ꢃ"%ꢎ
7ꢆꢉꢊꢇꢈꢈꢅꢙꢌ)ꢅꢖꢑꢇꢍꢃꢄꢔꢅꢅꢟ
ꢛꢏꢊꢃꢉꢜ
ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃ !ꢇꢈꢅꢃꢄ"ꢉ#ꢅ$ꢉꢇ%!ꢊꢉꢅ&ꢇꢋꢅꢆꢇꢊꢋ'ꢅ(!%ꢅ&! %ꢅ(ꢉꢅꢈꢌꢍꢇ%ꢉ"ꢅ)ꢃ%ꢎꢅ%ꢎꢉꢅꢎꢇ%ꢍꢎꢉ"ꢅꢇꢊꢉꢇꢁ
ꢏꢁ ꢟꢅꢖꢃꢔꢄꢃ$ꢃꢍꢇꢄ%ꢅ/ꢎꢇꢊꢇꢍ%ꢉꢊꢃ %ꢃꢍꢁ
,ꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄ ꢅꢐꢅꢇꢄ"ꢅ*ꢀꢅ"ꢌꢅꢄꢌ%ꢅꢃꢄꢍꢈ!"ꢉꢅ&ꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢁꢅꢒꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢅ ꢎꢇꢈꢈꢅꢄꢌ%ꢅꢉ#ꢍꢉꢉ"ꢅꢁꢓꢀꢓ@ꢅꢑꢉꢊꢅ ꢃ"ꢉꢁ
ꢗꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢔꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢔꢅꢑꢉꢊꢅꢕꢖꢒ*ꢅ-ꢀꢗꢁ+ꢒꢁ
.ꢖ/0ꢅ.ꢇ ꢃꢍꢅꢐꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢘꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ
ꢒꢃꢍꢊꢌꢍꢎꢃꢑ ꢘꢉꢍꢎꢄꢌꢈꢌꢔꢋ ꢐꢊꢇ)ꢃꢄꢔ /ꢓꢗꢞꢓꢓ+.
© 2008 Microchip Technology Inc.
DS21613C-page 29
MCP616/7/8/9
+,ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢗꢐꢂꢘꢆMꢆꢛꢄꢎꢎꢏ&'ꢆ"()#ꢆꢑꢑꢆ$ꢏꢅ%ꢆꢙꢐꢒ *ꢚ
ꢛꢏꢊꢃꢜ 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ
ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ
D
N
E
E1
NOTE 1
1
2
3
e
h
b
α
h
c
φ
A2
A
L
A1
β
L1
4ꢄꢃ%
ꢒꢚ55ꢚꢒ*ꢘ*ꢙꢖ
ꢐꢃ&ꢉꢄ ꢃꢌꢄꢅ5ꢃ&ꢃ%
ꢒꢚ6
67ꢒ
ꢒꢕ8
6!&(ꢉꢊꢅꢌ$ꢅꢂꢃꢄ
ꢂꢃ%ꢍꢎ
6
ꢉ
ꢀꢗ
ꢀꢁꢏꢛꢅ.ꢖ/
7ꢆꢉꢊꢇꢈꢈꢅ;ꢉꢃꢔꢎ%
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅꢘꢎꢃꢍ2ꢄꢉ
ꢖ%ꢇꢄ"ꢌ$$ꢅꢅꢟ
ꢕ
M
ꢀꢁꢏ+
ꢓꢁꢀꢓ
M
M
M
ꢀꢁꢛ+
M
ꢓꢁꢏ+
ꢕꢏ
ꢕꢀ
*
7ꢆꢉꢊꢇꢈꢈꢅ=ꢃ"%ꢎ
:ꢁꢓꢓꢅ.ꢖ/
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅ=ꢃ"%ꢎ
7ꢆꢉꢊꢇꢈꢈꢅ5ꢉꢄꢔ%ꢎ
/ꢎꢇ&$ꢉꢊꢅAꢌꢑ%ꢃꢌꢄꢇꢈB
1ꢌꢌ%ꢅ5ꢉꢄꢔ%ꢎ
*ꢀ
ꢐ
ꢎ
,ꢁꢜꢓꢅ.ꢖ/
9ꢁ:+ꢅ.ꢖ/
ꢓꢁꢏ+
ꢓꢁꢗꢓ
M
M
ꢓꢁ+ꢓ
ꢀꢁꢏꢛ
5
1ꢌꢌ%ꢑꢊꢃꢄ%
1ꢌꢌ%ꢅꢕꢄꢔꢈꢉ
5ꢉꢇ"ꢅꢘꢎꢃꢍ2ꢄꢉ
5ꢉꢇ"ꢅ=ꢃ"%ꢎ
ꢒꢌꢈ"ꢅꢐꢊꢇ$%ꢅꢕꢄꢔꢈꢉꢅꢘꢌꢑ
ꢒꢌꢈ"ꢅꢐꢊꢇ$%ꢅꢕꢄꢔꢈꢉꢅ.ꢌ%%ꢌ&
5ꢀ
ꢀ
ꢀꢁꢓꢗꢅꢙ*1
ꢓꢝ
ꢓꢁꢀꢛ
ꢓꢁ,ꢀ
+ꢝ
M
M
M
M
M
9ꢝ
ꢍ
(
ꢁ
ꢓꢁꢏ+
ꢓꢁ+ꢀ
ꢀ+ꢝ
ꢂ
+ꢝ
ꢀ+ꢝ
ꢛꢏꢊꢃꢉꢜ
ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃ !ꢇꢈꢅꢃꢄ"ꢉ#ꢅ$ꢉꢇ%!ꢊꢉꢅ&ꢇꢋꢅꢆꢇꢊꢋ'ꢅ(!%ꢅ&! %ꢅ(ꢉꢅꢈꢌꢍꢇ%ꢉ"ꢅ)ꢃ%ꢎꢃꢄꢅ%ꢎꢉꢅꢎꢇ%ꢍꢎꢉ"ꢅꢇꢊꢉꢇꢁ
ꢏꢁ ꢟꢅꢖꢃꢔꢄꢃ$ꢃꢍꢇꢄ%ꢅ/ꢎꢇꢊꢇꢍ%ꢉꢊꢃ %ꢃꢍꢁ
,ꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄ ꢅꢐꢅꢇꢄ"ꢅ*ꢀꢅ"ꢌꢅꢄꢌ%ꢅꢃꢄꢍꢈ!"ꢉꢅ&ꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢁꢅꢒꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢑꢊꢌ%ꢊ! ꢃꢌꢄ ꢅ ꢎꢇꢈꢈꢅꢄꢌ%ꢅꢉ#ꢍꢉꢉ"ꢅꢓꢁꢀ+ꢅ&&ꢅꢑꢉꢊꢅ ꢃ"ꢉꢁ
ꢗꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢔꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢔꢅꢑꢉꢊꢅꢕꢖꢒ*ꢅ-ꢀꢗꢁ+ꢒꢁ
.ꢖ/0 .ꢇ ꢃꢍꢅꢐꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢘꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ
ꢙ*10 ꢙꢉ$ꢉꢊꢉꢄꢍꢉꢅꢐꢃ&ꢉꢄ ꢃꢌꢄ'ꢅ! !ꢇꢈꢈꢋꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ'ꢅ$ꢌꢊꢅꢃꢄ$ꢌꢊ&ꢇ%ꢃꢌꢄꢅꢑ!ꢊꢑꢌ ꢉ ꢅꢌꢄꢈꢋꢁ
ꢒꢃꢍꢊꢌꢍꢎꢃꢑ ꢘꢉꢍꢎꢄꢌꢈꢌꢔꢋ ꢐꢊꢇ)ꢃꢄꢔ /ꢓꢗꢞꢓ:+.
DS21613C-page 30
© 2008 Microchip Technology Inc.
MCP616/7/8/9
ꢛꢏꢊꢃꢜ 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ
ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ
© 2008 Microchip Technology Inc.
DS21613C-page 31
MCP616/7/8/9
+,ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ-.ꢋꢔꢆꢐ.ꢎꢋꢔꢕꢆꢐꢑꢄꢈꢈꢆꢒꢓꢊꢈꢋꢔꢃꢆꢗꢐ-ꢘꢆMꢆ,(,ꢆꢑꢑꢆ$ꢏꢅ%ꢆꢙ-ꢐꢐꢒꢇꢚ
ꢛꢏꢊꢃꢜ 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ
ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ
D
N
E
E1
NOTE 1
1
2
e
b
c
φ
A2
A
A1
L
L1
4ꢄꢃ%
ꢒꢚ55ꢚꢒ*ꢘ*ꢙꢖ
ꢐꢃ&ꢉꢄ ꢃꢌꢄꢅ5ꢃ&ꢃ%
ꢒꢚ6
67ꢒ
ꢒꢕ8
6!&(ꢉꢊꢅꢌ$ꢅꢂꢃꢄ
ꢂꢃ%ꢍꢎ
6
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7ꢆꢉꢊꢇꢈꢈꢅ;ꢉꢃꢔꢎ%
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅꢘꢎꢃꢍ2ꢄꢉ
ꢖ%ꢇꢄ"ꢌ$$ꢅ
7ꢆꢉꢊꢇꢈꢈꢅ=ꢃ"%ꢎ
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅ=ꢃ"%ꢎ
ꢒꢌꢈ"ꢉ"ꢅꢂꢇꢍ2ꢇꢔꢉꢅ5ꢉꢄꢔ%ꢎ
1ꢌꢌ%ꢅ5ꢉꢄꢔ%ꢎ
ꢕ
M
ꢓꢁ9ꢓ
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M
:ꢁꢗꢓꢅ.ꢖ/
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+ꢁꢓꢓ
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+ꢁꢀꢓ
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5
1ꢌꢌ%ꢑꢊꢃꢄ%
1ꢌꢌ%ꢅꢕꢄꢔꢈꢉ
5ꢉꢇ"ꢅꢘꢎꢃꢍ2ꢄꢉ
5ꢉꢇ"ꢅ=ꢃ"%ꢎ
5ꢀ
ꢀ
ꢀꢁꢓꢓꢅꢙ*1
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ꢓꢁꢓꢜ
ꢓꢁꢀꢜ
M
M
M
9ꢝ
ꢍ
(
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DS21613C-page 32
© 2008 Microchip Technology Inc.
MCP616/7/8/9
APPENDIX A: REVISION HISTORY
Revision C (October 2008)
The following is the list of modifications:
1. Added Section 1.1 “Test Circuits”.
2. Added Figure 2-36.
3. Added Section 4.1.1 “Phase Reversal”,
Section 4.1.2 “Input Voltage and Current
Limits”, and Section 4.1.3 “Normal Opera-
tion”.
4. Updated Figure 4-7.
5. Updated Section 5.0 “Design Aids”.
6. Updated Section 6.0 “Packaging Informa-
tion”
Revision B (April 2005)
The following is the list of modifications:
1. Clarified specifications found in Section 1.0
“Electrical Characteristics”.
2. Updated Section 2.0 “Typical Performance
Curves” and added input noise current density
plot.
3. Added Section 3.0 “Pin Descriptions”.
4. Updated Section 4.0 “Applications Informa-
tion”.
5. Updated the SPICE macro model and added
information on the FilterLab software, in
Section 5.0 “Design Aids”.
6. Corrected package marking information
(Section 6.0 “Packaging Information”).
7. Added Appendix A: “Revision History”.
Revision A (April 2001)
• Original Release of this Document.
© 2008 Microchip Technology Inc.
DS21613C-page 29
MCP616/7/8/9
NOTES:
DS21613C-page 30
© 2008 Microchip Technology Inc.
MCP616/7/8/9
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Examples:
Temperature
Range
Package
a)
b)
c)
MCP616-I/P:
Industrial Temperature,
8 lead PDIP.
MCP616-I/SN:
Industrial Temperature,
8 lead SOIC.
Device:
MCP616:
Single Operational Amplifier
MCP616T-I/MS: Tape and Reel,
Industrial Temperature,
MCP616T: Single Operational Amplifier
(Tape and Reel for SOIC, MSOP)
8 lead MSOP.
MCP617:
MCP617T: Dual Operational Amplifier
(Tape and Reel for SOIC and MSOP)
Single Operational Amplifier w/Chip Select (CS)
Dual Operational Amplifier
a)
b)
MCP617-I/MS:
Industrial Temperature,
8 lead MSOP.
MCP618:
MCP618T: Single Operational Amplifier w/Chip Select (CS)
(Tape and Reel for SOIC and MSOP)
MCP619:
MCP619T: Quad Operational Amplifier
(Tape and Reel for SOIC and TSSOP)
MCP617T-I/MS: Tape and Reel,
Industrial Temperature,
Quad Operational Amplifier
8 lead MSOP.
c)
MCP617-I/P:
Industrial Temperature,
8 lead PDIP.
Temperature Range:
Package:
I
=
-40°C to +85°C
a)
b)
MCP618-I/SN:
Industrial Temperature,
8 lead SOIC.
MS
P
SN
SL
ST
=
=
=
=
=
Plastic MSOP, 8-lead
MCP618T-I/SN: Tape and Reel,
Industrial Temperature,
Plastic DIP (300 mil Body), 8-lead, 14-lead
Plastic SOIC (3.90 mm body), 8-lead
Plastic SOIC (3.90 mm Body), 14-lead (MCP619)
Plastic TSSOP (4.4mm Body), 14-lead (MCP619)
8 lead SOIC.
c)
a)
b)
c)
MCP618-I/P:
MCP619T-I/SL:
MCP619T-I/ST:
MCP619-I/P:
Industrial Temperature,
8 lead PDIP.
Tape and Reel,
Industrial Temperature,
14 lead SOIC.
Tape and Reel,
Industrial Temperature,
14 lead TSSOP.
Industrial Temperature,
14 lead PDIP.
© 2008 Microchip Technology Inc.
DS21613C-page 31
MCP616/7/8/9
NOTES:
DS21613C-page 32
© 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2008 Microchip Technology Inc.
DS21613C-page 33
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-4182-8400
Fax: 91-80-4182-8422
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Boston
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
01/02/08
DS21613C-page 34
© 2008 Microchip Technology Inc.
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