MCP6561RT-E/MS_技术文档

MCP6561/1R/1U/2/4

1.8V Low Power Push-Pull Output Comparator

Description

Features

• Propagation Delay at 1.8V_DD

- 56 ns (typical) High to Low

- 49 ns (typical) Low to High

:

The Microchip Technology, Inc. MCP6561/1R/1U/2/4

families of CMOS/TTL compatible comparators are

offered in single, dual, and quad configurations.

These comparators are optimized for low power 1.8V,

single-supply applications with greater than rail-to-rail

input operation. The internal input hysteresis eliminates

output switching due to internal input noise voltage,

reducing current draw. The push-pull output of the

MCP6561/1R/1U/2/4 family supports rail-to-rail output

swing, and interfaces with CMOS/TTL logic. The output

toggle frequency can reach a typical of 4 MHz (typical)

while limiting supply current surges and dynamic power

consumption during switching.

• Low Quiescent Current: 100 µA (typical)

• Input Offset Voltage: ±3 mV (typical)

• Rail-to-Rail Input: V_SS- 0.3V to V_DD+ 0.3V

• CMOS/TTL Compatible Output

• Wide Supply Voltage Range: 1.8V to 5.5V

• Available in Single, Dual, and Quad

• Packages: SC70-5, SOT-23-5, SOIC, MSOP,

TSSOP

This family operates with single supply voltage of 1.8V

to 5.5V while drawing less than 100 µA/comparator of

quiescent current (typical).

Typical Applications

• Laptop computers

• Mobile Phones

• Hand-held Electronics

• RC Timers

Package Types

MCP6561

MCP6562

• Alarm and Monitoring Circuits

• Window Comparators

• Multi-vibrators

SOT-23-5, SC70-5

SOIC, MSOP

V_DD

OUT

V_SS

V_DD

1

2

3

4

1

2

3

5

8

7

6

5

OUTA

+

-

OUTB

-INB

-INA

+INA

V_SS

+IN

4

-IN

+

-

Design Aids

+INB

• Microchip Advanced Part Selector (MAPS)

• Analog Demonstration and Evaluation Boards

• Application Notes

MCP6561R

MCP6564

SOT-23-5

SOIC, TSSOP

OUT

V_DD

V_SS

-IN

1

2

3

5

4

14

OUTD

OUTA

Related Devices

+

2

3

4

-

+

-

-IND

13

12

11

10

9

-INA

+INA

V_DD

• Open-Drain Output: MCP6566/6R/6U/7/9

+IN

+IND

V

SS

Typical Application

+INC

-INC

+INB

-INB

5

6

7

-

+

MCP6561U

V_DD

V_IN

SOT-23-5

OUTB

8

OUTC

V_OUT

V_DD

5

V_IN+

V_SS

1

+

V_DD

MCP656X

2

3

-

V_IN–

OUT

4

R₂

R_F

R₃

DS22139B-page 1

MCP6561/1R/1U/2/4

NOTES:

DS22139B-page 2

MCP6561/1R/1U/2/4

*Notice: Stresses above those listed under “Maximum Rat-

ings” may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied. Expo-

sure to maximum rating conditions for extended periods may

affect device reliability.

1.0

1.1

ELECTRICAL

CHARACTERISTICS

Maximum Ratings*

V_DD- V_SS....................................................................... 6.5V

All other inputs and outputs............V_SS- 0.3V to V_DD+ 0.3V

Difference Input voltage ......................................|V_DD- V_SS

|

Output Short Circuit Current .................................... ±25 mA

Current at Input Pins .................................................. ±2 mA

Current at Output and Supply Pins .......................... ±50 mA

Storage temperature ................................... -65°C to +150°C

Ambient temp. with power applied.............. -40°C to +125°C

Junction temp............................................................ +150°C

ESD protection on all pins (HBM/MM)..................≥ 4 kV/300V

DC CHARACTERISTICS

Electrical Characteristics: Unless otherwise indicated: V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN- = V_SS

,

R_L= 10 kΩ to V_DD/2 (see Figure 1-1).

Parameters

Symbol

Min

Typ

Max

Units

Conditions

Power Supply

Supply Voltage

V_DD

I_Q

1.8

60

63

—

100

70

5.5

130

—

V

Quiescent Current per comparator

Power Supply Rejection Ratio

Input

µA

dB

I_OUT= 0

PSRR

V_CM= V_SS

Input Offset Voltage

Input Offset Drift

V_OS

ΔV_OS/ΔT

I_OS

-10

—

1.0

—

±3

±2

±1

1

+10

—

mV

V_CM= V_SS(Note 1)

µV/°C V_CM= V_SS

Input Offset Current

Input Bias Current

—

pA

V_CM= V_SS

I_B

—

T_A= +25°C, V_IN- = V_DD/2

T_A= +85°C, V_IN- = V_DD/2

T_A= +125°C, V_IN- = V_DD/2

V_CM= V_SS(Notes 1, 2)

60

—

pA

1500

—

5000

5.0

—

pA

Input Hysteresis Voltage

V_HYST

TC₁

mV

Input Hysteresis Linear Temp. Co.

10

µV/°C

µV/°C²

Input Hysteresis Quadratic Temp.

Co.

TC₂

0.3

—

Common-Mode Input Voltage

Range

V_CMR

V_SS−0.2

—

V_DD+0.2

V

V_DD= 1.8V

V_SS−0.3

54

V_DD+0.3

V_DD= 5.5V

Common-Mode Rejection Ratio

CMRR

66

—

dB

V_CM= -0.3V to V_DD+0.3V, V_DD= 5.5V

V_CM= V_DD/2 to V_DD+0.3V, V_DD= 5.5V

V_CM= -0.3V to V_DD/2, V_DD= 5.5V

50

63

dB

54

65

dB

Common Mode Input Impedance

Differential Input Impedance

Push-Pull Output

Z_CM

—

10¹³||4

10¹³||2

Ω||pF

Z_DIFF

—

High Level Output Voltage

V_OH

V_OL

V_DD−0.7

—

V

I_OUT= -3 mA/-8 mA with V_DD= 1.8V/5.5V

(Note 3)

Low Level Output Voltage

—

0.6

I_OUT= 3 mA/8 mA with V_DD= 1.8V/5.5V

(Note 3)

Short Circuit Current

I_SC

—

±30

8

—

mA

pF

Note 3

Output Pin Capacitance

C_OUT

Note 1: The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the

input-referred trip points.

2:

V

_HYSTat different temperatures is estimated using V_HYST(T_A) = V_{HYST @ +25°C}+ (T_A- 25°C) TC₁+ (T_A- 25°C)²TC₂.

3: Limit the output current to Absolute Maximum Rating of 50 mA.

DS22139B-page 3

MCP6561/1R/1U/2/4

AC CHARACTERISTICS

Electrical Characteristics: Unless otherwise indicated: V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN- = V_SS

,

R_L= 10 kΩ to V_DD/2, and C_L= 25 pF. (see Figure 1-1).

Parameters

Propagation Delay

Symbol

t_PHL

Min

Typ

Max

Units

Conditions

High-to-Low,100 mV Overdrive

—

56

34

80

—

ns

V_CM= V_DD/2, V_DD= 1.8V

V_CM= V_DD/2, V_DD= 5.5V

V_CM= V_DD/2, V_DD= 1.8V

V_CM= V_DD/2, V_DD= 5.5V

Low-to-High, 100 mV Overdrive

t_PLH

49

47

Skew ¹

t_PDS

±10

Output

Rise Time

t_R

t_F

—

20

4

—

ns

Fall Time

Maximum Toggle Frequency

f_TG

MHz

V_DD= 5.5V

V_DD= 1.8V

2

Input Voltage Noise ²

E_NI

350

µV_P-P10 Hz to 10 MHz

Note 1: Propagation Delay Skew is defined as: t_PDS= t_PLH- t_PHL

2: ENI is based on SPICE simulation.

.

TEMPERATURE SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated: V_DD= +1.8V to +5.5V and V_SS= GND.

Parameters

Temperature Ranges

Symbol

Min

Typ

Max

Units

Conditions

Specified Temperature Range

Operating Temperature Range

Storage Temperature Range

Thermal Package Resistances

Thermal Resistance, SC70-5

Thermal Resistance, SOT-23-5

Thermal Resistance, 8L-SOIC

Thermal Resistance, 8L-MSOP

Thermal Resistance, 14L-SOIC

Thermal Resistance, 14L-TSSOP

T_A

-40

-65

—

+125

+150

°C

θ_JA

—

331

220.7

149.5

211

—

°C/W

95.3

100

1.2

Test Circuit Configuration

This test circuit configuration is used to determine the

AC and DC specifications.

V_DD

MCP656X

200 kΩ

I_OUT

V_OUT

25 pF

200 kΩ

V_SS= 0V

V_IN= V_SS

FIGURE 1-1:

AC and DC Test Circuit for

the Push-Pull Output Comparators.

DS22139B-page 4

MCP6561/1R/1U/2/4

2.0

TYPICAL PERFORMANCE CURVES

Note:

The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 10 kΩ to V_DD/2, and C_L= 25 pF.

30%

50%

V_DD= 1.8V

V_DD= 5.5V

_CM= V_SS

Avg. = -0.9 mV

StDev = 2.1 mV

3588 units

V_DD= 1.8V

_CM= V_SS

Avg. = -0.1 mV

StDev = 2.1 mV

3588 units

Avg. = 3.4 mV

StDev = 0.2 mV

3588 units

Avg. = 3.6 mV

StDev = 0.1 mV

3588 units

25%

20%

15%

10%

5%

V

40%

30%

20%

10%

0%

-10 -8 -6 -4 -2

0

2

4

6

8

10

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

_HYST(mV)

V

_OS(mV)

V

FIGURE 2-1:

Input Offset Voltage.

FIGURE 2-4:

Input Hysteresis Voltage.

60%

V_CM= V_SS

Avg. = 0.9 µV/°C

StDev = 6.6 µV/°C

1380 Units

V_DD= 1.8V

V_DD= 5.5V

50%

40%

30%

20%

10%

0%

50%

40%

30%

20%

10%

0%

Avg. = 12 µV/°C

StDev = 0.6 µV/°C

Avg. = 10.4 µV/°C

StDev = 0.6 µV/°C

T_A= -40°C to +125°C

1380 Units

T

_A= -40°C to 125°C

V

_CM= V_SS

-60 -48 -36 -24 -12

0

12 24 36 48 60

0

2

4

6

8

10 12 14 16 18 20

V

_OSDrift (µV/°C)

V_HYSTDrift, TC1 (µV/°C)

FIGURE 2-2:

Input Offset Voltage Drift.

FIGURE 2-5:

Input Hysteresis Voltage

Drift - Linear Temp. Co. (TC1).

7.0

30%

V_DD= 5.5V

V_IN+ = V_DD/2

6.0

5.0

4.0

3.0

2.0

1.0

0.0

-1.0

V_DD= 5.5V

V_DD= 1.8V

Avg. = 0.25 µV/°C²

Avg. = 0.3 µV/°C²

V_OUT

StDev = 0.1 µV/°C²

StDev = 0.2 µV/°C²

V_IN

-

20%

10%

0%

1380 Units

T_A= -40°C to +125°C

V_CM= V_SS

-0.50 -0.25 0.00

0.25

0.50

0.75

1.00

Time (3 µs/div)

V

_HYSTDrift, TC2 (µV/°C²)

FIGURE 2-3:

Input vs. Output Signal, No

FIGURE 2-6:

Input Hysteresis Voltage

Phase Reversal.

Drift - Quadratic Temp. Co. (TC2).

DS22139B-page 5

MCP6561/1R/1U/2/4

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 10 kΩ to V_DD/2, and C_L= 25 pF.

3.0

2.0

5.0

4.0

3.0

2.0

1.0

V_CM= V_SS

V_DD= 5.0V

V_DD= 1.8V

1.0

0.0

-1.0

-2.0

-3.0

V_DD= 1.8V

V_DD= 5.5V

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (°C)

FIGURE 2-7:

Input Offset Voltage vs.

FIGURE 2-10:

Input Hysteresis Voltage vs.

Temperature.

4.0

5.0

4.0

3.0

2.0

V_DD= 1.8V

T_A= +125°C

T_A= +85°C

2.0

0.0

T_A= +25°C

T_A= -40°C

T_A= +25°C

T_A= +85°C

T_A= -40°C

-2.0

-4.0

V_DD= 1.8V

1.0

-0.3 0.0

-0.3 0.0 0.3 0.6

0.9 1.2 1.5 1.8 2.1

V_CM(V)

0.3

0.6

0.9

1.2

1.5

1.8

2.1

V_CM(V)

FIGURE 2-8:

Input Offset Voltage vs.

FIGURE 2-11:

Input Hysteresis Voltage vs.

Common-mode Input Voltage.

3.0

5.0

4.0

V_DD= 5.5V

2.0

1.0

T_A= -40°C

T_A= +25°C

0.0

3.0

T_A= -40°C

-1.0

-2.0

-3.0

T_A= +25°C

2.0

T_A= +85°C

T_A= +125°C

V_DD= 5.5V

T_A= +125°C

1.0

-1.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

-0.5

0.5

1.5

2.5

_CM(V)

3.5

4.5

5.5

V_CM(V)

V

FIGURE 2-9:

Input Offset Voltage vs.

FIGURE 2-12:

Input Hysteresis Voltage vs.

Common-mode Input Voltage.

DS22139B-page 6

MCP6561/1R/1U/2/4

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 10 kΩ to V_DD/2, and C_L= 25 pF.

3.0

2.0

5.0

4.0

3.0

2.0

1.0

T_A= +125°C

T_A= +85°C

T_A= -40°C

T_A= +25°C

T_A= +85°C

T_A= +125°C

1.0

T_A= +25°C

T_A= -40°C

0.0

-1.0

-2.0

-3.0

1.5

2.5

3.5

4.5

5.5

1.5

2.5

3.5

4.5

5.5

V_DD(V)

FIGURE 2-13:

Input Offset Voltage vs.

FIGURE 2-16:

Input Hysteresis Voltage vs.

Supply Voltage vs. Temperature.

50%

140.0

120.0

100.0

80.0

V_DD= 5.5V

V_DD= 1.8V

40%

Avg. = 97 µA

StDev= 4 µA

1794 units

Avg. = 88 µA

StDev= 4 µA

1794 units

30%

60.0

20%

10%

0%

T_A= -40°C

T_A= +25°C

40.0

T_A= +85°C

T_A= +125°C

20.0

0.0

60

70

80

90

100 110 120 130

0.0

1.0

2.0

3.0

4.0

5.0

6.0

I_Q(µA)

V_DD(V)

FIGURE 2-14:

Quiescent Current.

FIGURE 2-17:

Quiescent Current vs.

Supply Voltage vs Temperature.

130

V_DD= 1.8V

V_DD= 5.5V

120

110

100

90

Sweep V_IN+,V_IN- = V_DD/2

110

100

90

Sweep V_IN+,V_IN- = V_DD/2

Sweep V_IN- ,V_IN+= V_DD/2

80

70

60

-0.5

0.0

0.5

1.0

1.5

2.0

2.5

-1.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V_CM(V)

FIGURE 2-15:

Quiescent Current vs.

FIGURE 2-18:

Quiescent Current vs.

Common-mode Input Voltage.

DS22139B-page 7

MCP6561/1R/1U/2/4

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 10 kΩ to V_DD/2, and C_L= 25 pF.

400

350

300

250

200

150

100

50

120

80

0dB Output Attenuation

V_DD= 5.5V

T_A= -40°C

T_A= +25°C

T_A= +85°C

T_A= +125°C

100 mV Over-Drive

_CM= V_DD/2

_L= Open

V

R

40

0

-40

-80

-120

T_A= -40°C

V_DD= 1.8V

T_A= +25°C

T_A= +85°C

T_A= +125°C

0.0

1.0

2.0

3.0

4.0

5.0

6.0

10

100

1k

10k

100k

1M

0

10M

1000 10000 100000 100000 1E+07

V

_DD(V)

Toggle Frequency (Hz)

FIGURE 2-19:

Quiescent Current vs.

FIGURE 2-22:

Short Circuit Current vs.

Toggle Frequency.

Supply Voltage vs. Temperature.

1000

1400

V_DD= 1.8V

V_DD= 5.5V

V_DD- V_OH

1200

1000

800

600

400

200

0

V_DD- V_OH

800

V_OL

T_A= 125°C

T_A= 85°C

T_A= 25°C

T_A= -40°C

600

400

200

0

T_A= +125°C

T_A= +85°C

T_A= +25°C

T_A= -40°C

V_OL

0.0

3.0

6.0

9.0

12.0

15.0

0

5

10

15

20

25

I_OUT(mA)

I

_OUT(mA)

FIGURE 2-20:

Output Headroom Vs Output

FIGURE 2-23:

Output Headroom Vs Output

Current.

50%

40%

30%

20%

10%

0%

V_DD= 1.8V

100 mV Over-Drive

t_PHL

V_DD= 5.5V

Avg. = 33 ns

StDev= 1 ns

198 units

100mV Over-Drive

_CM= V_DD/2

40%

t_PLH

V

_CM= V_DD/2

V

t_PHL

Avg. = 47 ns

StDev= 2 ns

198 units

Avg. = 54.4 ns

StDev= 2 ns

198 units

30%

20%

10%

0%

t_PLH

Avg. = 44.6 ns

StDev= 2.7 ns

198 units

30 35 40 45 50 55 60 65 70 75 80

Prop. Delay (ns)

30 35 40 45 50 55 60 65 70 75 80

Prop. Delay (ns)

FIGURE 2-21:

Low-to-High and High-to-

FIGURE 2-24:

Low-to-High and High-to-

Low Propagation Delays.

Low Propagation Delays .

DS22139B-page 8

MCP6561/1R/1U/2/4

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 10 kΩ to V_DD/2, and C_L= 25 pF.

80

70

60

50

40

30

20

50%

40%

30%

20%

10%

0%

100 mV Over-Drive

_CM= V_DD/2

100 mV Over-Drive

V_CM= V_DD/2

V

t_PLH, V_DD= 1.8V

t_PHL

V_DD= 1.8V

t

_PHL, V_DD= 1.8V

Avg. = -7.3 ns

StDev= 0.8 ns

198 units

V_DD= 5.5V

Avg. = 11.6 ns

StDev= 2 ns

198 units

t_PLH, V_DD= 5.5V

_PHL, V_DD= 5.5V

t

-20 -15 -10

-5

0

5

10

15

20

-50

-25

0

25

50

75

100

125

Temperature (°C)

Prop. Delay Skew (ns)

FIGURE 2-25:

Propagation Delay Skew.

FIGURE 2-28:

Propagation Delay vs.

Temperature.

260

210

160

110

60

140

120

100

80

V_CM= V_DD/2

t_PHL, 10 mV Over-Drive

t

_PLH, 10 mV Over-Drive

t_PLH, V_DD= 1.8V

t

_PHL, V_DD= 1.8V

t_PLH, V_DD= 5.5V

_PHL, V_DD= 5.5V

t_PHL, 100 mV Over-Drive

_PLH, 100 mV Over-Drive

t

60

t

40

20

10

1

1.5

2.5

3.5

4.5

5.5

10

100

1000

V_DD(V)

Over-Drive (mV)

FIGURE 2-26:

Propagation Delay vs.

FIGURE 2-29:

Propagation Delay vs. Input

Supply Voltage.

Over-Drive.

80

V_DD= 1.8V

V_DD= 5.5V

100 mV Over-Drive

70

60

50

40

30

20

70

60

50

40

30

20

t_PHL

t_PLH

t_PHLt_PLH

0.00

0.50

1.00

1.50

2.00

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V_CM(V)

FIGURE 2-27:

Propagation Delay vs.

FIGURE 2-30:

Propagation Delay vs.

Common-mode Input Voltage.

DS22139B-page 9

MCP6561/1R/1U/2/4

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 10 kΩ to V_DD/2, and C_L= 25 pF.

1000

100

10

30%

25%

20%

15%

10%

5%

V_CM= V_SS

100mV Over-Drive

V_CM= V_DD/2

Avg. = 200 µV/V

StDev= 94 µV/V

3588 units

V_DD= 1.8V, t_PLH

V_DD= 1.8V, t_PHL

V_DD= 5.5V, t_PLH

V_DD= 5.5V, t_PHL

1

0.1

0.01

0%

0.001 0.01

0.1

100

1

10

1000

1

10

1000 10000 100000 1E+06

-600

-400

-200

0

200

400

600

Capacitive Load (nf)

PSRR (µV/V)

FIGURE 2-31:

Propagation Delay vs.

FIGURE 2-34:

Power Supply Rejection

Capacitive Load.

Ratio (PSRR).

10m

1E+11

30%

V_CM= -0.2V to V_DD+ 0.2V

V_CM= V_DD/2 to V_DD+ 0.2V

Avg. = 0.6 mV

StDev= 0.1 mV

Avg. = 0.7 mV

StDev= 1 mV

1E+10m9

10µ

1E+07

20%

10%

0%

100n

T_A= -40°C

T_A= +25°C

T_A= +85°C

V_CM= -0.2V to V_DD/2

Avg. = 0.5 mV

1E+05

1n

StDev= 0.1 mV

1E+03

V_DD= 1.8V

3588 units

T_A= +125°C

10p

1E+01

0.1p

1E-01

-0.8

-0.6

-0.4

-0.2

0

-5 -4 -3 -2 -1

0

1

2

3

4

5

Input Voltage (V)

CMRR (mV/V)

FIGURE 2-32:

Input Bias Current vs. Input

FIGURE 2-35:

Common-mode Rejection

Voltage vs Temperature.

Ratio (CMRR).

80

30%

V_CM= -0.3V to V_DD+ 0.3V

Avg. = 0.1 mV

StDev= 0.4 mV

V_CM= V_DD/2 to V_DD+ 0.3V

Input Referred

Avg. = 0.03 mV

StDev= 0.7 mV

78

V_CM= V_SS

V_DD= 1.8V to 5.5V

20%

10%

0%

PSRR

CMRR

76

74

72

70

V_CM= -0.3V to V_DD/2

Avg. = 0.2 mV

StDev= 0.4 mV

V_DD= 5.5V

3588 units

V_CM= -0.3V to V_DD+ 0.3V

V_DD= 5.5V

-50

-25

0

25

50

75

100

125

-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5

CMRR (mV/V)

Temperature (°C)

FIGURE 2-33:

Common-mode Rejection

FIGURE 2-36:

Common-mode Rejection

Ratio and Power Supply Rejection Ratio vs.

Temperature.

Ratio (CMRR).

DS22139B-page 10

MCP6561/1R/1U/2/4

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 10 kΩ to V_DD/2, and C_L= 25 pF.

10000

1000

100

10

V_DD= 5.5V

I_B@ T_A=

V_DD= 5.5V

1000

100

10

V_IN+= 2Vpp (sine)

1

|I_OS|@ T_A= 125°C

|I_OS|@ T_A= 85°C

0.1

1

0.01

0.001

0.1

1k

10M

100

10k

100k

1M

0

1

2

3

4

5

6

100

1000

10000 100000 1000000 1E+07

Input Frequency (Hz)

V

_CM(V)

FIGURE 2-37:

Output Jitter vs. Input

FIGURE 2-39:

Input Offset Current and

Frequency.

Input Bias Current vs. Common-mode Input

Voltage Vs Temperature.

1000

100

I_B

10

1

|I_OS|

0.1

25

50

75

100

125

Temperature (°C)

FIGURE 2-38:

Input Offset Current and

Input Bias Current vs. Temperature.

DS22139B-page 11

MCP6561/1R/1U/2/4

NOTES:

DS22139B-page 12

MCP6561/1R/1U/2/4

3.0

PIN DESCRIPTIONS

Descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

MCP6561 MCP6561R MCP6561U

SC70-5,

MCP6562

MCP6564

Symbol

Description

MSOP,

SOIC

SOIC,

TSSOP

SOT-23-5

1

4

1

2

1

2

OUT, OUTA Digital Output (comparator A)

4

3

V_IN–, V_INA

V_IN+, V_INA

V_DD

–

+

Inverting Input (comparator A)

Non-inverting Input (comparator A)

Positive Power Supply

3

1

3

5

2

5

8

4

—

2

—

5

—

2

5

V_INB

+

–

Non-inverting Input (comparator B)

Inverting Input (comparator B)

Digital Output (comparator B)

Digital Output (comparator C)

Inverting Input (comparator C)

Non-inverting Input (comparator C)

Negative Power Supply

6

V_INB

7

OUTB

OUTC

—

4

8

9

V_INC

–

+

10

11

12

13

14

V_INC

V_SS

—

V_IND

+

Non-inverting Input (comparator D)

Inverting Input (comparator D)

Digital Output (comparator D)

V_IND

–

OUTD

3.1

Analog Inputs

3.3

Power Supply (V_SSand V_DD)

The comparator non-inverting and inverting inputs are

high-impedance CMOS inputs with low bias currents.

The positive power supply pin (V_DD) is 1.8V to 5.5V

higher than the negative power supply pin (V_SS). For

normal operation, the other pins are at voltages

between V_SSand V_DD

.

3.2

Digital Outputs

Typically, these parts are used in a single (positive)

supply configuration. In this case, V_SSis connected to

ground and V_DDis connected to the supply. V_DDwill

need a local bypass capacitor (typically 0.01 µF to

0.1 µF) within 2 mm of the V_DDpin. These can share a

bulk capacitor with nearby analog parts (within

100 mm), but it is not required.

The comparator outputs are CMOS, push-pull digital

outputs. They are designed to be compatible with

CMOS and TTL logic and are capable of driving heavy

DC or capacitive loads.

DS22139B-page 13

MCP6561/1R/1U/2/4

NOTES:

DS22139B-page 14

MCP6561/1R/1U/2/4

4.1.2

INPUT VOLTAGE AND CURRENT

LIMITS

4.0

APPLICATIONS INFORMATION

The MCP6561/1R/1U/2/4 family of push-pull output

comparators are fabricated on Microchip’s state-of-the-

art CMOS process. They are suitable for a wide range

of high speed applications requiring low power

consumption.

The ESD protection on the inputs can be depicted as

shown in Figure 4-2. This structure was chosen to

protect the input transistors, and to minimize input bias

current (I_B). The input ESD diodes clamp the inputs

when they try to go more than one diode drop below

V_SS. They also clamp any voltages that go too far

above V_DD; their breakdown voltage is high enough to

allow normal operation, and low enough to bypass ESD

events within the specified limits.

4.1

Comparator Inputs

4.1.1

NORMAL OPERATION

The input stage of this family of devices uses three

differential input stages in parallel: one operates at low

input voltages, one at high input voltages, and one at

mid input voltage. With this topology, the input voltage

range is 0.3V above V_DDand 0.3V below V_SS, while

providing low offset voltage through out the common

mode range. The input offset voltage is measured at

both V_SS- 0.3V and V_DD+ 0.3V to ensure proper

operation.

Bond

V_DD

Pad

Bond

Pad

Bond

Pad

Input

Stage

V_IN+

V_IN–

The MCP6561/1R/1U/2/4 family has internally-set

hysteresis V_HYSTthat is small enough to maintain input

offset accuracy and large enough to eliminate output

chattering caused by the comparator’s own input noise

voltage E_NI. Figure 4-1 depicts this behavior. Input

offset voltage (V_OS) is the center (average) of the

(input-referred) low-high and high-low trip points. Input

hysteresis voltage (V_HYST) is the difference between

the same trip points.

Bond

Pad

V_SS

FIGURE 4-2:

Structures.

Simplified Analog Input ESD

In order to prevent damage and/or improper operation

of these amplifiers, the circuits they are in must limit the

currents (and voltages) at the V_IN+ and V_IN– pins (see

Maximum Ratings* at the beginning of Section 1.0

“Electrical Characteristics”). Figure 4-3 shows the

recommended approach to protecting these inputs.

The internal ESD diodes prevent the input pins (V_IN+

and V_IN–) from going too far below ground, and the

resistors R₁and R₂limit the possible current drawn out

of the input pin. Diodes D₁and D₂prevent the input pin

(V_IN+ and V_IN–) from going too far above V_DD. When

implemented as shown, resistors R₁and R₂also limit

the current through D₁and D₂.

8

7

25

20

15

10

5

V_DD= 5.0V

6

V_IN

–

5

V_OUT

4

3

0

2

-5

Hysteresis

1

-10

-15

-20

-25

-30

0

-1

-2

-3

V_DD

Time (100 ms/div)

FIGURE 4-1:

The MCP6561/1R/1U/2/4

D₁

comparators’ internal hysteresis eliminates

output chatter caused by input noise voltage.

+

V₁

R₁

V_OUT

MCP656X

–

D₂

V₂

R₂

R₃

V_SS– (minimum expected V₁)

2 mA

R₁≥

R₂≥

V_SS– (minimum expected V₂)

2 mA

FIGURE 4-3:

Protecting the Analog

Inputs.

DS22139B-page 15

MCP6561/1R/1U/2/4

It is also possible to connect the diodes to the left of the

resistors R₁and R₂. In this case, the currents through

the diodes D₁and D₂need to be limited by some other

mechanism. The resistor then serves as in-rush current

limiter; the DC current into the input pins (V_IN+ and

V_IN–) should be very small.

4.3.1

NON-INVERTING CIRCUIT

Figure 4-4 shows a non-inverting circuit for single-

supply applications using just two resistors. The

resulting hysteresis diagram is shown in Figure 4-5.

V_DD

A significant amount of current can flow out of the

inputs when the common mode voltage (V_CM) is below

ground (V_SS); see Figure 2-32. Applications that are

high impedance may need to limit the usable voltage

range.

V_REF

-

V_OUT

MCP656X

+

4.1.3

PHASE REVERSAL

The MCP6561/1R/1U/2/4 comparator family uses

CMOS transistors at the input. They are designed to

prevent phase inversion when the input pins exceed

the supply voltages. Figure 2-3 shows an input voltage

exceeding both supplies with no resulting phase

inversion.

V_IN

R₁

R_F

Non-Inverting Circuit with

FIGURE 4-4:

Hysteresis for Single-Supply.

V_OUT

4.2

Push-Pull Output

V_DD

V_OH

The push-pull output is designed to be compatible with

CMOS and TTL logic, while the output transistors are

configured to give rail-to-rail output performance. They

are driven with circuitry that minimizes any switching

current (shoot-through current from supply-to-supply)

when the output is transitioned from high-to-low, or

from low-to-high (see Figure 2-15 and Figure 2-18 for

more information).

High-to-Low

Low-to-High

V_IN

V_OL

V_SS

V_THLV_TLH

V_DD

FIGURE 4-5:

Non-Inverting Circuit.

Hysteresis Diagram for the

4.3

Externally Set Hysteresis

Greater flexibility in selecting hysteresis (or input trip

points) is achieved by using external resistors.

Hysteresis reduces output chattering when one input is

slowly moving past the other. It also helps in systems

where it is best not to cycle between high and low

states too frequently (e.g., air conditioner thermostatic

control). Output chatter also increases the dynamic

supply current.

The trip points for Figure 4-4 and Figure 4-5 are:

EQUATION 4-1:

R

⎛

⎜

⎝

⎞

⎛

⎞

⎟

⎠

1

------

⎜

V

= V

1 +------ – V

⎟

TLH

REF

OL

R

⎠

⎝

F

R

⎞

⎛

⎜

⎝

⎛

⎜

⎝

⎞

⎟

⎠

1

------

V

= V

1 +------ – V

⎟

THL

REF

OH

R

F

R

⎠

F

Where:

V_TLH

V_THL

=

trip voltage from low to high

trip voltage from high to low

=

DS22139B-page 16

MCP6561/1R/1U/2/4

Where:

4.3.2

INVERTING CIRCUIT

Figure 4-6 shows an inverting circuit for single-supply

using three resistors. The resulting hysteresis diagram

is shown in Figure 4-7.

R₂R₃

R₂₃= ------------------

R₂+ R₃

R₃

V_DD

------------------

V₂₃

=

× V_DD

R₂+ R₃

V_IN

Using this simplified circuit, the trip voltage can be

calculated using the following equation:

V_DD

MCP656X

V_OUT

R₂

R₃

EQUATION 4-2:

R₂₃

R_F

⎛

⎜

⎝

⎞

⎛

⎝

⎞

⎠

----------------------

---------------------

R₂₃+ R_F

V_THL= V_OH

+ V

⎟

⎠

23

R_F

R

₂₃+ R

F

R₂₃

R_F

⎛

⎜

⎝

⎞

⎟

⎠

⎛

⎝

⎞

⎠

----------------------

---------------------

V_TLH= V_OL

23

R

₂₃+ R

R₂₃+ R_F

F

FIGURE 4-6:

Inverting Circuit With

Where:

Hysteresis.

V_TLH

V_THL

=

trip voltage from low to high

trip voltage from high to low

V_OUT

Figure 2-20, and Figure 2-23 can be used to determine

typical values for V_OHand V_OL

V_DD

V_OH

.

Low-to-High

High-to-Low

4.4

Bypass Capacitors

With this family of comparators, the power supply pin

(V_DDfor single supply) should have a local bypass

capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good

edge rate performance.

V_IN

V_OL

V_SS

V_TLHV_THL

V_DD

FIGURE 4-7:

Inverting Circuit.

Hysteresis Diagram for the

4.5

Capacitive Loads

Reasonable capacitive loads (e.g., logic gates) have

little impact on propagation delay (see Figure 2-31).

The supply current increases with increasing toggle

frequency (Figure 2-19), especially with higher

capacitive loads. The output slew rate and propagation

delay performance will be reduced with higher

capacitive loads.

In order to determine the trip voltages (V_THLand V_TLH

)

for the circuit shown in Figure 4-6, R₂and R₃can be

simplified to the Thevenin equivalent circuit with

respect to V_DD, as shown in Figure 4-8.

V_DD

-

MCP656X

V_OUT

+

V_SS

V₂₃

R₂₃

R_F

Thevenin Equivalent Circuit.

FIGURE 4-8:

DS22139B-page 17

MCP6561/1R/1U/2/4

4.6

PCB Surface Leakage

4.7

PCB Layout Technique

In applications where low input bias current is critical,

PCB (Printed Circuit Board) surface leakage effects

need to be considered. Surface leakage is caused by

humidity, dust or other contamination on the board.

Under low humidity conditions, a typical resistance

between nearby traces is 10¹²Ω. A 5V difference would

cause 5 pA of current to flow. This is greater than the

MCP6561/1R/1U/2/4 family’s bias current at +25°C

(1 pA, typical).

When designing the PCB layout it is critical to note that

analog and digital signal traces are adequately

separated to prevent signal coupling. If the comparator

output trace is at close proximity to the input traces

then large output voltage changes from, V_SSto V_DDor

visa versa, may couple to the inputs and cause the

device output to oscillate. To prevent such oscillation,

the output traces must be routed away from the input

pins. The SC70-5 and SOT-23-5 are relatively immune

because the output pin OUT (pin 1) is separated by the

power pin V_DD/V_SS(pin 2) from the input pin +IN (as

long as the analog and digital traces remain separated

through out the PCB). However, the pinouts for the dual

and quad packages (SOIC, MSOP, TSSOP) have OUT

and -IN pins (pin 1 and 2) close to each other. The

recommended layout for these packages is shown in

Figure 4-10.

The easiest way to reduce surface leakage is to use a

guard ring around sensitive pins (or traces). The guard

ring is biased at the same voltage as the sensitive pin.

An example of this type of layout is shown in

Figure 4-9.

IN-

IN+

V_SS

OUTA

-INA

V_DD

OUTB

-INB

+INA

Guard Ring

Example Guard Ring Layout

V_SS

+INB

FIGURE 4-9:

for Inverting Circuit.

FIGURE 4-10:

Recommended Layout.

1. Inverting Configuration (Figures 4-6 and 4-9):

4.8

Unused Comparators

a) Connect the guard ring to the non-inverting

input pin (V_IN+). This biases the guard ring

to the same reference voltage as the

comparator (e.g., V_DD/2 or ground).

An unused amplifier in a quad package (MCP6564)

should be configured as shown in Figure 4-11. This

circuit prevents the output from toggling and causing

crosstalk. It uses the minimum number of components

and draws minimal current (see Figure 2-15 and

Figure 2-18).

b) Connect the inverting pin (V_IN-) to the input

pad without touching the guard ring.

2. Non-inverting Configuration (Figure 4-4):

a) Connect the non-inverting pin (V_IN+) to the

input pad without touching the guard ring.

¼ MCP6564

b) Connect the guard ring to the inverting input

pin (V_IN-).

V_DD

–

+

FIGURE 4-11:

Unused Comparators.

DS22139B-page 18

MCP6561/1R/1U/2/4

4.9.3

BISTABLE MULTI-VIBRATOR

4.9

Typical Applications

A simple bistable multi-vibrator design is shown in

Figure 4-14. V_REFneeds to be between the power

supplies (V_SS= GND and V_DD) to achieve oscillation.

4.9.1

PRECISE COMPARATOR

Some applications require higher DC precision. An

easy way to solve this problem is to use an amplifier

(such as the MCP6291) to gain-up the input signal

before it reaches the comparator. Figure 4-12 shows

an example of this approach.

The output duty cycle changes with V_REF

.

R₁

R₂

V_REF

V_DD

V_REF

MCP6561

V_OUT

MCP6291

V_DD

MCP656X

V_IN

C₁

R₃

R₁

R₂

V_REF

V_OUT

FIGURE 4-14:

Bistable Multi-vibrator.

FIGURE 4-12:

Precise Inverting

Comparator.

4.9.2

WINDOWED COMPARATOR

Figure 4-13 shows one approach to designing a

windowed comparator. The AND gate produces a logic

‘1’ when the input voltage is between V_RBand V_RT

(where V_RT> V_RB).

V_DD

V_RT

1/2

MCP6562

V_IN

1/2

MCP6562

V_RB

FIGURE 4-13:

Windowed Comparator.

DS22139B-page 19

MCP6561/1R/1U/2/4

NOTES:

DS22139B-page 20

MCP6561/1R/1U/2/4

5.3

Application Notes

5.0

5.1

DESIGN AIDS

The following Microchip Application Notes are

available

www.microchip.com and are recommended as

supplemental reference resources:

Microchip Advanced Part Selector

(MAPS)

on

the

Microchip

web

site

at

MAPS is a software tool that helps semiconductor

professionals efficiently identify Microchip devices that

fit a particular design requirement. Available at no cost

from the Microchip web site at www.microchip.com/

maps, the MAPS is an overall selection tool for

Microchip’s product portfolio that includes Analog,

Memory, MCUs and DSCs. Using this tool you can

define a filter to sort features for a parametric search of

devices and export side-by-side technical comparison

reports. Helpful links are also provided for Data sheets,

Purchase, and Sampling of Microchip parts.

• AN895, “Oscillator Circuit For RTD Temperature

Sensors”, DS00895

5.2

Analog Demonstration and

Evaluation Boards

Microchip offers

a

broad spectrum of Analog

Demonstration and Evaluation Boards that are

designed to help you achieve faster time to market. For

a

complete listing of these boards and their

corresponding user’s guides and technical information,

visit the Microchip web site at www.microchip.com/

analogtools. Three of our boards that are especially

useful are:

• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,

P/N SOIC8EV

• 14-Pin SOIC/TSSOP/DIP Evaluation Board,

P/N SOIC14EV

• 5/6-Pin SOT23 Evaluation Board, P/N VSUPEV2

DS22139B-page 21

MCP6561/1R/1U/2/4

NOTES:

DS22139B-page 22

MCP6561/1R/1U/2/4

6.0

6.1

PACKAGING INFORMATION

Package Marking Information

5-Lead SC-70 (MCP6561)

Example:

BC25

XXNN

5-Lead SOT-23 (MCP6561, MCP6561R, MCP6561U)

Example:

Device

MCP6561T

Code

WBNN

WANN

WKNN

XXNN

WA25

MCP6561RT

MCP6561UT

Note: Applies to 5-Lead SOT-23.

Example:

8-Lead MSOP (MCP6562)

XXXXXX

YWWNNN

6562E

933256

8-Lead SOIC (150 mil) (MCP6562)

Example:

XXXXXXXX

XXXXYYWW

MCP6562E

SN^^0933

e3

NNN

256

Legend: XX...X Customer-specific information

Y

YY

WW

NNN

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

e

3

Pb-free JEDEC designator for Matte Tin (Sn)

*

This package is Pb-free. The Pb-free JEDEC designator (

can be found on the outer packaging for this package.

)

e3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS22139B-page 23

MCP6561/1R/1U/2/4

Package Marking Information (Continued)

14-Lead SOIC (150 mil) (MCP6564)

Example:

XXXXXXXXXX

MCP6564

E/SL^

0933256

e3

^

YYWWNNN

14-Lead TSSOP (MCP6564)

Example:

MCP6564E

XXXXXXXX

YYWW

0933

256

NNN

DS22139B-page 24

MCP6561/1R/1U/2/4

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢓꢄꢑꢉꢋꢉꢊꢔꢓꢆꢕꢂꢒꢖꢆꢗꢍꢘꢙꢚꢛ

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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

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A1

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3ꢆꢃ#

ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ

ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#

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5

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ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ9ꢀ)

DS22139B-page 25

MCP6561/1R/1U/2/4

ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ

ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

DS22139B-page 26

MCP6561/1R/1U/2/4

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢓꢄꢑꢉꢋꢉꢊꢔꢓꢆꢕꢏꢒꢖꢆꢗꢍꢏꢒꢁ !ꢛ

ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ

ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

b

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A2

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L1

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ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#

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ꢏꢔ7

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6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ

ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ

6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ

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ꢜꢔꢊꢃꢉꢝ

ꢀꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀꢑꢒꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ

ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ

)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ

ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐꢝꢀ)

DS22139B-page 27

MCP6561/1R/1U/2/4

"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ#ꢋꢌꢓꢔꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢇꢄꢌ$ꢄ%ꢃꢆꢕ#ꢍꢖꢆꢗ#ꢍꢏꢇꢛ

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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

D

N

E

E1

NOTE 1

2

b

1

e

c

φ

A2

A

L

L1

A1

3ꢆꢃ#

ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ

ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#

ꢏꢙ5

56ꢏ

ꢏꢔ7

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1ꢃ#ꢊꢌ

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6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ

ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ

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ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ

ꢛꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ

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ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢀꢀꢀ)

DS22139B-page 28

MCP6561/1R/1U/2/4

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS22139B-page 29

MCP6561/1R/1U/2/4

"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢜꢖꢆMꢆꢜꢄꢓꢓꢔ'(ꢆ!)*ꢚꢆꢎꢎꢆ+ꢔꢅ,ꢆꢗꢍꢏ-ꢘꢛ

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D

e

N

E

E1

NOTE 1

1

2

3

α

h

b

h

c

φ

A2

A

L

A1

L1

β

3ꢆꢃ#

ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ

ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#

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1ꢃ#ꢊꢌ

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DS22139B-page 30

MCP6561/1R/1U/2/4

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DS22139B-page 31

MCP6561/1R/1U/2/4

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DS22139B-page 32

MCP6561/1R/1U/2/4

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DS22139B-page 33

MCP6561/1R/1U/2/4

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DS22139B-page 34

MCP6561/1R/1U/2/4

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS22139B-page 35

MCP6561/1R/1U/2/4

NOTES:

DS22139B-page 36

MCP6561/1R/1U/2/4

APPENDIX A: REVISION HISTORY

Revision B (August 2009)

The following is the list of modifications:

1. Added MCP6561U throughout the document.

2. Updated package drawing section.

Revision A (March 2009)

• Original Release of this Document.

DS22139B-page 37

MCP6561/1R/1U/2/4

NOTES:

DS22139B-page 38

MCP6561/1R/1U/2/4

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

–

PART NO.

Device

X

/XX

Examples:

a)

MCP6561T-E/LT: Tape and Reel,

Temperature

Range

Package

Extended Temperature,

5LD SC70 package.

b)

MCP6561T-E/OT: Tape and Reel

Extended Temperature,

5LD SOT-23 package.

Device

MCP6561T:

Single Comparator (Tape and Reel)

(SC70, SOT-23)

MCP6561RT: Single Comparator (Tape and Reel)

(SOT-23 only)

MCP6561UT: Single Comparator (Tape and Reel)

(SOT-23 only)

a)

MCP6561RT-E/OT: Tape and Reel

Extended Temperature,

5LD SOT-23 package.

MCP6562:

MCP6562T:

MCP6564:

MCP6564T:

Dual Comparator

Dual Comparator(Tape and Reel)

Quad Comparator

MCP6561UT-E/OT: Tape and Reel

Extended Temperature,

5LD SOT-23 package.

Quad Comparator(Tape and Reel)

a)

b)

MCP6562-E/MS:

MCP6562-E/SN:

Extended Temperature

8LD MSOP package.

Extended Temperature

8LD SOIC package.

°

Temperature Range

Package

E

=

-40 C to +125 C

LT

=

Plastic Small Outline Transistor (SC70), 5-lead

OT = Plastic Small Outline Transistor, 5-lead

MS = Plastic Micro Small Outline Transistor, 8-lead

SN = Plastic Small Outline Transistor, 8-lead

ST = Plastic Thin Shrink Small Outline Transistor, 14-lead

a)

b)

MCP6564T-E/SL: Tape and Reel

Extended Temperature

14LD SOIC package.

SL

=

Plastic Small Outline Transistor, 14-lead

MCP6564T-E/ST:

Tape and Reel

Extended Temperature

14LD TSSOP package.

DS22139B-page 39

MCP6561/1R/1U/2/4

NOTES:

DS22139B-page 40

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,

rfPIC and UNI/O are registered trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard,

dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,

ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial

Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified

logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code

Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,

PICtail, PIC³²logo, REAL ICE, rfLAB, Select Mode, Total

Endurance, TSHARC, UniWinDriver, WiperLock and ZENA

are trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC^®MCUs and dsPIC^®DSCs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS22139B-page 41

WORLDWIDE SALES AND SERVICE

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4080

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://support.microchip.com

Web Address:

www.microchip.com

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

China - Beijing

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

Boston

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Korea - Seoul

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

Cleveland

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Independence, OH

Tel: 216-447-0464

Fax: 216-447-0643

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

Detroit

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Taiwan - Hsin Chu

Tel: 886-3-6578-300

Fax: 886-3-6578-370

Kokomo

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

China - Xiamen

Tel: 86-592-2388138

Fax: 86-592-2388130

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Santa Clara

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

03/26/09

DS22139B-page 42


型号：	MCP6561RT-E/MS
厂家：	MICROCHIP
描述：	1.8V Low Power Push-Pull Output Comparator 1.8V低功率推挽输出比较器比较器
文件：	总42页 (文件大小：698K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MCP6561RT-E/MS [MICROCHIP]

相关型号：

MCP6561RT-E/OT

MCP6561RT-E/SL

MCP6561RT-E/SN

MCP6561RT-E/ST

MCP6561T-E/LT

MCP6561T-E/LTVAO

MCP6561T-E/MS

MCP6561T-E/OT

MCP6561T-E/OTVAO

MCP6561T-E/SL

MCP6561T-E/SN

MCP6561T-E/ST