MCP6566UT-E/OT [MICROCHIP]
1.8V Low Power Open-Drain Output Comparator; 1.8V低功耗漏极开路输出比较器型号: | MCP6566UT-E/OT |
厂家: | MICROCHIP |
描述: | 1.8V Low Power Open-Drain Output Comparator |
文件: | 总44页 (文件大小:778K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MCP6566/6R/6U/7/9
1.8V Low Power Open-Drain Output Comparator
Features
Description
• Propagation Delay at 1.8VDD
:
The Microchip Technology, Inc. MCP6566/6R/6U/7/9
families of Open-Drain output comparators are offered
in single, dual and quad configurations.
- 56 ns (typical) High to Low
• Low Quiescent Current: 100 µA (typical)
• Input Offset Voltage: ±3 mV (typical)
• Rail-to-Rail Input: VSS - 0.3V to VDD + 0.3V
• Open-Drain Output
These comparators are optimized for low power 1.8V,
single-supply applications with greater than rail-to-rail
input operation. The internal input hysteresis eliminates
output switching due to internal input noise voltage,
reducing current draw. The open-drain output of the
MCP6566/6R/6U/7/9 family requires a pull up resistor
and it supports pull-up voltages above and below VDD
which can be used to level shift. The output toggle
frequency can reach a typical of 4 MHz (typical) while
limiting supply current surges and dynamic power
consumption during switching.
• Wide Supply Voltage Range: 1.8V to 5.5V
• Available in Single, Dual, and Quad
• Packages: SC70, SOT-23-5, SOIC, MSOP,
TSSOP
Typical Applications
• Laptop computers
• Mobile Phones
This family operates with single supply voltage of 1.8V
to 5.5V while drawing less than 100 µA/comparator of
quiescent current (typical).
• Hand-held Electronics
• RC Timers
Package Types
• Alarm and Monitoring Circuits
• Window Comparators
• Multi-vibrators
MCP6566
MCP6568
SOT-23-5, SC70-5
SOIC, MSOP
VDD
OUT
VSS
VDD
1
2
3
4
1
2
3
5
8
7
6
5
OUTA
Design Aids
+
-
OUTB
-INB
-INA
+INA
VSS
• Microchip Advanced Part Selector (MAPS)
• Analog Demostration and Evaluation Boards
• Application Notes
4
+IN
-IN
+
-
+INB
MCP6566R
MCP6569
SOT-23-5
SOIC, TSSOP
Related Device
OUT
VDD
VSS
-IN
1
1
2
3
5
4
OUTD
OUTA
14
• Push-Pull Output: MCP6561/1R/1U/2/4
+
-
2
3
4
+
-
-IND
13
12
11
10
9
-INA
+INA
VDD
+IN
+IND
Typical Application
V
SS
+3VPU
+INC
-INC
MCP6566U
+INB
-INB
5
6
7
-
-
+
+
SOT-23-5
+5VDD
VIN
OUTB
8
VDD
5
OUTC
VIN+
VSS
1
+
VOUT
2
3
-
VDD
VIN–
OUT
MCP656X
4
R2
RF
R3
© 2009 Microchip Technology Inc.
DS22143B-page 1
MCP6566/6R/6U/7/9
NOTES:
DS22143B-page 2
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
ESD protection on all pins (HBM/MM) .................≥ 4 kV/300V
*Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
1.0
1.1
ELECTRICAL
CHARACTERISTICS
Maximum Ratings*
VDD - VSS ....................................................................... 6.5V
Open-Drain Output.............................................VSS + 10.5V
All other inputs and outputs...........VSS – 0.3V to VDD + 0.3V
Difference Input voltage ......................................|VDD - VSS
|
Output Short Circuit Current .................................... ±25 mA
Current at Input Pins .................................................. ±2 mA
Current at Output and Supply Pins .......................... ±50 mA
Storage temperature ................................... -65°C to +150°C
Ambient temp. with power applied.............. -40°C to +125°C
Junction temp............................................................ +150°C
DC CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated: VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN- = VSS
and RPull-Up = 20 kΩ to VPU = VDD (see Figure 1-1).
,
Parameters
Power Supply
Symbol
Min
Typ
Max
Units
Conditions
Supply Voltage
VDD
IQ
1.8
60
63
—
100
70
5.5
130
—
V
Quiescent Current per comparator
Power Supply Rejection Ratio
Input
µA
dB
IOUT = 0
PSRR
VCM = VSS
Input Offset Voltage
Input Offset Drift
VOS
ΔVOS/ΔT
IOS
-10
—
±3
±2
±1
+10
—
mV
VCM = VSS (Note 1)
µV/°C VCM = VSS
Input Offset Current
Input Bias Current
—
—
pA
pA
VCM = VSS
IB
—
1
—
TA = +25°C, VIN- = VDD/2
TA = +85°C, VIN- = VDD/2
TA = +125°C, VIN- = VDD/2
VCM = VSS (Notes 1, 2)
—
60
—
pA
—
1500
—
5000
5.0
pA
Input Hysteresis Voltage
VHYST
TC1
1.0
—
mV
µV/°C
µV/°C2
V
Input Hysteresis Linear Temp. Co.
Input Hysteresis Quadratic Temp. Co.
Common-Mode Input Voltage Range
10
—
TC2
—
0.3
—
—
VCMR
VSS−0.2
VSS−0.3
54
VDD+0.2
VDD+0.3
—
VDD = 1.8V
—
V
VDD = 5.5V
Common-Mode Rejection Ratio
CMRR
66
dB
VCM= -0.3V to VDD+0.3V, VDD = 5.5V
50
63
—
dB
VCM= VDD/2 to VDD+0.3V, VDD = 5.5V
VCM= -0.3V to VDD/2, VDD = 5.5V
54
65
—
dB
Common Mode Input Impedance
Differential Input Impedance
ZCM
—
1013||4
1013||2
—
Ω||pF
Ω||pF
ZDIFF
—
—
Note 1: The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the
input-referred trip points.
2:
V
HYST at different temperatures is estimated using VHYST (TA) = VHYST @ +25°C + (TA - 25°C) TC1 + (TA - 25°C)2 TC2.
3: Limit the output current to Absolute Maximum Rating of 50 mA.
4: The pull up voltage for the open drain output VPULL_UP can be as high as the absolute maximum rating of 10.5V. In this
case, IOH_leak can be higher than 1 µA (see Figure 2-30).
© 2009 Microchip Technology Inc.
DS22143B-page 3
MCP6566/6R/6U/7/9
DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated: VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN- = VSS
and RPull-Up = 20 kΩ to VPU = VDD (see Figure 1-1).
,
Parameters
Push-Pull Output
Symbol
Min
Typ
Max
Units
Conditions
Pull-up Voltage
VPULL_UP
VOH
IOH_leak
VOL
1.6
—
—
—
—
—
—
—
—
—
±30
8
5.5
V
V
High Level Output Voltage
High Level Output Current leakage
Low Level Output Voltage
Short Circuit Current (Notes 3)
Output Pin Capacitance
VPULL_UP
(see Figure 1-1) (Notes 3, 4)
1
µA
V
Note 4
0.6
—
—
IOUT = 3 mA/8 mA @ VDD = 1.8V/5.5V
Not to exceed Absolute Max. Rating
ISC
mA
pF
COUT
Note 1: The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the
input-referred trip points.
2:
V
HYST at different temperatures is estimated using VHYST (TA) = VHYST @ +25°C + (TA - 25°C) TC1 + (TA - 25°C)2 TC2.
3: Limit the output current to Absolute Maximum Rating of 50 mA.
4: The pull up voltage for the open drain output VPULL_UP can be as high as the absolute maximum rating of 10.5V. In this
case, IOH_leak can be higher than 1 µA (see Figure 2-30).
AC CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated,: Unless otherwise indicated,: VDD = +1.8V to +5.5V, VSS = GND,
TA = +25°C, VIN+ = VDD/2, VIN- = VSS, RPull-Up = 20 kΩ to VPU = VDD, and CL = 25 pf (see Figure 1-1).
Symbo
Parameters
Min
Typ
Max
Units
Conditions
l
Propagation Delay
High-to-Low,100 mV Overdrive
tPHL
—
—
56
34
80
80
ns
ns
VCM= VDD/2, VDD = 1.8V
VCM= VDD/2, VDD = 5.5V
Output
Fall Time
tF
—
—
—
—
20
4
—
—
—
—
ns
Maximum Toggle Frequency
fTG
MHz
MHz
VDD = 5.5V
VDD = 1.8V
2
Input Voltage Noise
ENI
350
µVP-P 10 Hz to 10 MHz (Note 1)
Note 1: ENI is based on SPICE simulation.
2: Rise time tR and tPLH depend on the load (RL and CL). These specification are valid for the specified load only.
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated: VDD = +1.8V to +5.5V and VSS = GND.
Symbo
Parameters
Min
Typ
Max
Units
Conditions
l
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, SC70-5
Thermal Resistance, SOT-23-5
Thermal Resistance, 8L-MSOP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
TA
TA
TA
-40
-40
-65
—
—
—
+125
+125
+150
°C
°C
°C
θJA
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
—
331
220.7
211
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
149.5
95.3
100
DS22143B-page 4
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
1.2
Test Circuit Configuration
This test circuit configuration is used to determine the
AC and DC specifications.
VDD
MCP656X
VPU = VDD
200 kΩ
200 kΩ
RPU
20 kΩ
IOUT
VOUT
25 pF
VIN = VSS
VSS = 0V
FIGURE 1-1:
AC and DC Test Circuit for
the Open-Drain Output Comparators.
© 2009 Microchip Technology Inc.
DS22143B-page 5
MCP6566/6R/6U/7/9
NOTES:
DS22143B-page 6
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 20 kΩ to VPU = VDD, and CL = 25 pF.
30%
50%
VDD = 1.8V
VDD = 5.5V
VDD = 5.5V
CM = VSS
Avg. = -0.9 mV
StDev = 2.1 mV
3588 units
VDD = 1.8V
CM = VSS
Avg. = -0.1 mV
StDev = 2.1 mV
3588 units
Avg. = 3.4 mV
StDev = 0.2 mV
3588 units
Avg. = 3.6 mV
StDev = 0.1 mV
3588 units
25%
20%
15%
10%
5%
V
V
40%
30%
20%
10%
0%
0%
-10 -8 -6 -4 -2
0
2
4
6
8
10
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
HYST (mV)
V
OS (mV)
V
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Hysteresis Voltage.
60%
60%
VCM = VSS
Avg. = 0.9 µV/°C
StDev = 6.6 µV/°C
1380 Units
VDD = 1.8V
VDD = 5.5V
50%
40%
30%
20%
10%
0%
50%
40%
30%
20%
10%
0%
Avg. = 12 µV/°C
StDev = 0.6 µV/°C
Avg. = 10.4 µV/°C
StDev = 0.6 µV/°C
TA = -40°C to +125°C
1380 Units
T
A = -40°C to 125°C
V
CM = VSS
-60 -48 -36 -24 -12
0
12 24 36 48 60
0
2
4
6
8
10 12 14 16 18 20
V
OS Drift (µV/°C)
VHYST Drift, TC1 (µV/°C)
FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5:
Input Hysteresis Voltage
Drift - Linear Temp. Co. (TC1).
7.0
30%
VDD = 5.5V
VIN+ = VDD/2
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
VDD = 1.8V
VDD = 5.5V
Avg. = 0.3 µV/°C2
Avg. = 0.25 µV/°C2
StDev = 0.2 µV/°C2
StDev = 0.1 µV/°C2
20%
VOUT
VIN
-
1380 Units
10%
T
V
A = -40°C to +125°C
CM = VSS
0%
-0.50 -0.25 0.00
HYST Drift, TC2 (µV/°C2)
0.25
0.50
0.75
1.00
Time (3 µs/div)
V
FIGURE 2-3:
Input vs. Output Signal, No
FIGURE 2-6:
Input Hysteresis Voltage
Phase Reversal.
Drift - Quadratic Temp. Co. (TC2).
© 2009 Microchip Technology Inc.
DS22143B-page 7
MCP6566/6R/6U/7/9
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 20 kΩ to VPU = VDD, and CL = 25 pF.
3.0
2.0
5.0
4.0
3.0
2.0
1.0
VCM = VSS
VCM = VSS
VDD= 5.0V
VDD= 1.8V
1.0
0.0
-1.0
-2.0
-3.0
VDD= 1.8V
VDD= 5.5V
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
FIGURE 2-7:
Input Offset Voltage vs.
FIGURE 2-10:
Input Hysteresis Voltage vs.
Temperature.
Temperature.
4.0
5.0
4.0
3.0
2.0
VDD = 1.8V
TA= +125°C
TA= +125°C
TA= +85°C
2.0
0.0
TA= +25°C
TA= -40°C
TA= +25°C
TA= +85°C
TA= -40°C
-2.0
VDD = 1.8V
-4.0
1.0
-0.3 0.0
-0.3 0.0 0.3 0.6
0.9 1.2 1.5 1.8 2.1
VCM (V)
0.3
0.6
0.9
1.2
1.5
1.8
2.1
VCM (V)
FIGURE 2-8:
Input Offset Voltage vs.
FIGURE 2-11:
Input Hysteresis Voltage vs.
Common-mode Input Voltage.
Common-mode Input Voltage.
3.0
5.0
4.0
VDD = 5.5V
2.0
1.0
TA= -40°C
TA= +25°C
0.0
3.0
TA= -40°C
-1.0
-2.0
-3.0
TA= +25°C
TA= +85°C
TA= +125°C
2.0
TA= +85°C
TA= +125°C
VDD = 5.5V
1.0
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
-0.5
0.5
1.5
2.5
CM (V)
3.5
4.5
5.5
VCM (V)
V
FIGURE 2-9:
Input Offset Voltage vs.
FIGURE 2-12:
Input Hysteresis Voltage vs.
Common-mode Input Voltage.
Common-mode Input Voltage.
DS22143B-page 8
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 20 kΩ to VPU = VDD, and CL = 25 pF.
3.0
2.0
5.0
4.0
3.0
2.0
1.0
TA= +125°C
TA= +85°C
TA= -40°C
TA= +25°C
TA= +85°C
TA= +125°C
1.0
TA= +25°C
TA= -40°C
0.0
-1.0
-2.0
-3.0
1.5
2.5
3.5
4.5
5.5
1.5
2.5
3.5
4.5
5.5
VDD (V)
VDD (V)
FIGURE 2-13:
Input Offset Voltage vs.
FIGURE 2-16:
Input Hysteresis Voltage vs.
Supply Voltage vs. Temperature.
Supply Voltage vs. Temperature.
50%
140.0
120.0
100.0
80.0
VDD = 5.5V
VDD = 1.8V
40%
Avg. = 97 µA
StDev= 4 µA
1794 units
Avg. = 88 µA
StDev= 4 µA
1794 units
30%
60.0
20%
10%
0%
TA= -40°C
TA= +25°C
40.0
TA= +85°C
TA= +125°C
20.0
0.0
60
70
80
90
100 110 120 130
0.0
1.0
2.0
3.0
VDD (V)
4.0
5.0
6.0
IQ (µA)
FIGURE 2-14:
Quiescent Current.
FIGURE 2-17:
Quiescent Current vs.
Supply Voltage vs Temperature.
130
130
VDD = 1.8V
VDD = 5.5V
120
120
110
100
90
Sweep VIN+ ,VIN- = VDD/2
110
100
90
Sweep VIN+ ,VIN- = VDD/2
Sweep VIN- ,VIN+ = VDD/2
Sweep VIN- ,VIN+ = VDD/2
80
80
70
70
60
60
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
VCM (V)
VCM (V)
FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
Quiescent Current vs.
Common-mode Input Voltage.
Common-mode Input Voltage.
© 2009 Microchip Technology Inc.
DS22143B-page 9
MCP6566/6R/6U/7/9
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 20 kΩ to VPU = VDD, and CL = 25 pF.
150
125
100
75
150
125
100
75
IDD Spike near VPU = 0.9V
VDD = 5.5 V
VDD = 4.5 V
VDD = 3.5 V
VDD = 5.5V
VDD = 4.5V
DD = 3.5V
V
VDD = 2.5 V
VDD = 2.0 V
VDD = 1.8 V
VDD = 2.5V
V
V
DD = 2.0V
DD = 1.8V
50
50
-4.5
-2.5
-0.5
1.5
3.5
5.5
7.5
9.5
0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5
VPU (V)
VPU - VDD (V)
FIGURE 2-19:
Quiescent Current vs.
FIGURE 2-22:
Quiescent Current vs.
Pull-up Voltage.
Pull-up to Supply Voltage Difference.
400
100,000
0dB Output Attenuation
VDD = 5.5V
100 mV Over-Drive
CM = VDD/2
L = Open
TA
=
V
R
350
300
250
200
150
100
50
10,000
1,000
100
10
TA = +85°C
TA = +25°C
VDD = 1.8V
1
1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5
PU (V)
10
10
100
100
1k
10k
100k
1M
10M
1000 10000 100000 100000 1E+07
V
Toggle Frequency (Hz)
0
FIGURE 2-20:
Quiescent Current vs.
FIGURE 2-23:
Output Leakage Current vs.
Toggle Frequency.
Pull-up Voltage.
1000
1000
VDD= 1.8V
VDD= 5.5V
800
600
400
200
0
800
600
400
200
0
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0.0
3.0
6.0
9.0
12.0
15.0
0
5
10
15
20
25
IOUT (mA)
IOUT (mA)
FIGURE 2-21:
Output Headroom vs Output
FIGURE 2-24:
Output Headroom Vs Output
Current.
Current.
DS22143B-page 10
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 20 kΩ to VPU = VDD, and CL = 25 pF.
50%
40%
30%
20%
10%
0%
50%
40%
30%
20%
10%
0%
VDD= 5.5V
100mV Over-Drive
VCM = VDD/2
VDD= 1.8V
100 mV Over-Drive
tPHL
Avg. = 33 ns
StDev= 1 ns
198 units
V
CM = VDD/2
tPHL
Avg. = 54.4 ns
StDev= 2 ns
198 units
30 35 40 45 50 55 60 65 70 75 80
Prop. Delay (ns)
30 35 40 45 50 55 60 65 70 75 80
Prop. Delay (ns)
FIGURE 2-25:
High-to-Low Propagation
FIGURE 2-28:
High-to-Low Propagation
Delays.
Delays.
260
210
160
110
60
80
100 mV Over-Drive
CM = VDD/2
VCM = VDD/2
V
70
60
50
40
30
20
tPHL , VDD = 1.8V
tPHL , VDD = 1.8V
tPHL , VDD = 5.5V
tPHL , VDD = 5.5V
10
1
10
100
1000
-50
-25
0
25
50
75
100
125
Temperature (°C)
Over-Drive (mV)
FIGURE 2-26:
Propagation Delay vs. Input
FIGURE 2-29:
Propagation Delay vs.
Over-Drive.
Temperature.
120
80
140
120
100
80
TA= -40°C
TA= +25°C
TA= +85°C
TA= +125°C
VCM = VDD/2
40
tPHL , 10 mV Over-Drive
0
-40
-80
-120
TA= -40°C
TA= +25°C
TA= +85°C
TA= +125°C
60
tPHL , 100 mV Over-Drive
40
20
1.5
2.5
3.5
4.5
5.5
0.0
1.0
2.0
3.0
4.0
5.0
6.0
VDD (V)
VDD (V)
FIGURE 2-27:
Propagation Delay vs.
FIGURE 2-30:
Short Circuit Current vs.
Supply Voltage.
Supply Voltage vs. Temperature.
© 2009 Microchip Technology Inc.
DS22143B-page 11
MCP6566/6R/6U/7/9
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 20 kΩ to VPU = VDD, and CL = 25 pF.
80
70
60
50
40
30
20
80
70
60
50
40
30
20
VDD= 1.8V
100 mV Over-Drive
VDD= 5.5V
100 mV Over-Drive
tPHL
tPHL
0.00
0.50
1.00
1.50
2.00
0.0
1.0
2.0
3.0
4.0
5.0
6.0
VCM (V)
V
CM (V)
FIGURE 2-31:
Propagation Delay vs.
FIGURE 2-34:
Propagation Delay vs.
Common-mode Input Voltage.
Common-mode Input Voltage.
1000
10000
100 mV Over-Drive
100mV Over-Drive
VCM = VDD/2
V
CM = VDD/2
100
10
VDD = 1.8V, tPHL
1000
100
10
tPLH
VDD = 5.5V, tPHL
tPHL
1
0.1
0.01
0.001 0.01
0.1
100
1
10
100
1000
1
10
1000 10000 100000 1E+06
0.1
1.0
10.0
100.0
Capacitive Load (nf)
R
PU (kΩ)
FIGURE 2-32:
Propagation Delay vs.
FIGURE 2-35:
Propagation Delay vs.
Capacitive Load.
Pull-up Resistor.
10m
1E+11
10000
100 mV Over-Drive
VCM = VDD/2
1E+10m9
tPLH, VDD = 5.5V
10µ
1E+07
1000
100
10
100n
TA= -40°C
TA= +25°C
TA= +85°C
1E+05
tPLH, VDD = 1.8V
tPHL, VDD = 1.8V
1n
1E+03
TA= +125°C
10p
1E+01
tPLH, VDD = 5.5V
0.1p
1E-01
-0.8
-0.6
-0.4
-0.2
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
PU (V)
Input Voltage (V)
V
FIGURE 2-33:
Input Bias Current vs. Input
FIGURE 2-36:
Propagation Delay vs.
Voltage vs Temperature.
Pull-up Voltage.
DS22143B-page 12
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 20 kΩ to VPU = VDD, and CL = 25 pF.
80
78
76
74
72
70
30%
20%
10%
0%
VCM = -0.2V to VDD + 0.2V
VCM = VDD/2 to VDD+ 0.2V
Avg. = 0.7 mV
StDev= 1 mV
Input Referred
Avg. = 0.6 mV
StDev= 0.1 mV
VCM = VSS
VDD = 1.8V to 5.5V
PSRR
CMRR
VCM = -0.2V to VDD/2
Avg. = 0.5 mV
StDev= 0.1 mV
VDD= 1.8V
3588 units
VCM = -0.3V to VDD + 0.3V
VDD = 5.5V
-50
-25
0
25
50
75
100
125
-5 -4 -3 -2 -1
0
1
2
3
4
5
Temperature (°C)
CMRR (mV/V)
FIGURE 2-37:
Common-mode Rejection
FIGURE 2-40:
Common-mode Rejection
Ratio and Power Supply Rejection Ratio vs.
Temperature.
Ratio (CMRR).
30%
30%
VCM = -0.3V to VDD + 0.3V
Avg. = 0.1 mV
StDev= 0.4 mV
VCM = VDD/2 to VDD+ 0.3V
VCM = VSS
Avg. = 0.03 mV
StDev= 0.7 mV
Avg. = 200 µV/V
StDev= 94 µV/V
3588 units
25%
20%
15%
10%
5%
20%
10%
0%
VCM = -0.3V to VDD/2
Avg. = 0.2 mV
StDev= 0.4 mV
VDD= 5.5V
3588 units
0%
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5
CMRR (mV/V)
-600
-400
-200
0
200
400
600
PSRR (µV/V)
FIGURE 2-41:
Common-mode Rejection
FIGURE 2-38:
Power Supply Rejection
Ratio (CMRR).
Ratio (PSRR).
10000
1000
VDD = 5.5V
IB @ TA= +125°C
1000
100
10
IB @ TA= +85°C
100
IB
10
1
1
|IOS| @ TA= +125°C
|IOS|@ TA= +85°C
0.1
|IOS|
0.01
0.001
0.1
25
50
75
100
125
0
1
2
3
4
5
6
V
CM (V)
Temperature (°C)
FIGURE 2-42:
Input Offset Current and
FIGURE 2-39:
Input Offset Current and
Input Bias Current vs. Common-mode Input
Voltage vs. Temperature.
Input Bias Current vs. Temperature.
© 2009 Microchip Technology Inc.
DS22143B-page 13
MCP6566/6R/6U/7/9
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 20 kΩ to VPU = VDD, and CL = 25 pF.
10000
VDD = 5.5V
VIN+ = 2Vpp (sine)
1000
100
10
1
0.1
1k
1000
10M
10000 100000 100000 1E+07
100
10k
100k
1M
100
Input Frequency (Hz)
0
FIGURE 2-43:
Output Jitter vs. Input
Frequency.
DS22143B-page 14
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
MCP6566 MCP6566R MCP6566U MCP6568 MCP6569
Symbol
Description
SC70-5,
SOT-23-5
MSOP,
SOIC
SOIC,
TSSOP
SOT-23-5
SOT-23-5
1
1
4
5
1
2
1
2
OUT, OUTA Digital Output (comparator A)
4
3
VIN–, VINA
VIN+, VINA
VDD
–
+
Inverting Input (comparator A)
Non-inverting Input (comparator A)
Positive Power Supply
3
3
1
3
3
5
2
4
8
4
—
—
—
—
—
—
2
—
—
—
—
—
—
5
—
—
—
—
—
—
2
5
5
VINB
VINB
+
Non-inverting Input (comparator B)
Inverting Input (comparator B)
Digital Output (comparator B)
Digital Output (comparator C)
Inverting Input (comparator C)
Non-inverting Input (comparator C)
Negative Power Supply
6
6
–
7
7
OUTB
OUTC
—
—
—
4
8
9
VINC
–
+
10
11
12
13
14
VINC
VSS
—
—
—
—
—
—
—
—
—
—
—
—
VIND
+
Non-inverting Input (comparator D)
Inverting Input (comparator D)
Digital Output (comparator D)
VIND
–
OUTD
3.1
Analog Inputs
3.3
Power Supply (VSS and VDD)
The comparator non-inverting and inverting inputs are
high-impedance CMOS inputs with low bias currents.
The positive power supply pin (VDD) is 1.8V to 5.5V
higher than the negative power supply pin (VSS). For
normal operation, the other pins are at voltages
between VSS and VDD
.
3.2
Digital Outputs
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need a local bypass capacitor (typically 0.01 µF to
0.1 µF) within 2 mm of the VDD pin. These can share a
bulk capacitor with nearby analog parts (within
100 mm), but it is not required.
The comparator outputs are CMOS, open-drain digital
outputs. They are designed to make level shifting and
wired-OR easy to implement.
© 2009 Microchip Technology Inc.
DS22143B-page 15
MCP6566/6R/6U/7/9
NOTES:
DS22143B-page 16
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
4.0
APPLICATIONS INFORMATION
The MCP6566/6R/6U/7/9 family of open-drain output
comparators are fabricated on Microchip’s state-of-
the-art CMOS process. They are suitable for a wide
range of high speed applications requiring low power
consumption.
The ESD protection on the inputs can be depicted as
shown in Figure 4-2. This structure was chosen to
protect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltages that go too far
above VDD; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass ESD
events within the specified limits.
4.1
Comparator Inputs
4.1.1
NORMAL OPERATION
The input stage of this family of devices uses two
differential input stages in parallel. This configuration
provides three regions of operation, one operates at
low input voltages, one at high input voltages, and one
at mid input voltage. With this topology, the input
Bond
VDD
Pad
voltage range is 0.3V above VDD and 0.3V below VSS
,
while providing low offset voltage through out the
common mode range. The input offset voltage is
measured at both VSS - 0.3V and VDD + 0.3V to ensure
proper operation.
Bond
Pad
Bond
Pad
Input
Stage
VIN+
VIN–
The MCP6566/6R/6U/7/9 family has internally-set
hysteresis VHYST that is small enough to maintain input
offset accuracy and large enough to eliminate output
chattering caused by the comparator’s own input noise
voltage ENI. Figure 4-1 depicts this behavior. Input
offset voltage (VOS) is the center (average) of the
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (VHYST) is the difference between
the same trip points.
Bond
Pad
VSS
FIGURE 4-2:
Structures.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these amplifiers, the circuits they are in must limit the
currents (and voltages) at the VIN+ and VIN– pins (see
Section 1.1 “Maximum Ratings*” at the beginning of
Section 1.0 “Electrical Characteristics”). Figure 4-3
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN–) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pin. Diodes D1 and D2 prevent the input
25
20
15
10
5
VDD = 5.0V
VIN
–
5
VOUT
4
3
0
pin (VIN+ and VIN–) from going too far above VDD
When implemented as shown, resistors R1 and R2 also
limit the current through D1 and D2.
.
2
-5
Hysteresis
1
-10
-15
-20
-25
-30
0
VDD
VPU
R4
Time (100 ms/div)
D1
FIGURE 4-1:
comparators’ internal hysteresis eliminates
output chatter caused by input noise voltage.
The MCP6566/6R/6U/7/9
+
V1
VOUT
R1
MCP656X
–
D2
V2
R2
R3
VSS – (minimum expected V1)
2 mA
R1 ≥
R2 ≥
VSS – (minimum expected V2)
2 mA
FIGURE 4-3:
Protecting the Analog
Inputs.
© 2009 Microchip Technology Inc.
DS22143B-page 17
MCP6566/6R/6U/7/9
It is also possible to connect the diodes to the left of the
resistors R1 and R2. In this case, the currents through
the diodes D1 and D2 need to be limited by some other
mechanism. The resistor then serves as in-rush current
limiter; the DC current into the input pins (VIN+ and
VIN–) should be very small.
4.3.1
NON-INVERTING CIRCUIT
Figure 4-4 shows a non-inverting circuit for single-
supply applications using just two resistors. The
resulting hysteresis diagram is shown in Figure 4-5.
VPU
A significant amount of current can flow out of the
inputs when the common mode voltage (VCM) is below
ground (VSS); see Figure 4-3. Applications that are
high impedance may need to limit the useable voltage
range.
VDD
RPU
VREF
-
VOUT
MCP656X
+
4.1.3
PHASE REVERSAL
The MCP6566/6R/6U/7/9 comparator family uses
CMOS transistors at the input. They are designed to
prevent phase inversion when the input pins exceed
the supply voltages. Figure 2-3 shows an input voltage
exceeding both supplies with no resulting phase
inversion.
VIN
R1
RF
Non-Inverting Circuit with
FIGURE 4-4:
Hysteresis for Single-Supply.
VOUT
4.2
Open-Drain Output
VDD
VOH
The open-drain output is designed to make level-shift-
ing and wired-OR logic easy to implement. The output
stage minimizes switching current (shoot-through
current from supply-to-supply) when the output
changes state. See Figures 2-15, 2-18, 2-35 and 2-36,
for more information.
High-to-Low
Low-to-High
VIN
VOL
VSS
VSS
VTHL VTLH
VDD
4.3
Externally Set Hysteresis
FIGURE 4-5:
Non-Inverting Circuit.
Hysteresis Diagram for the
Greater flexibility in selecting hysteresis (or input trip
points) is achieved by using external resistors.
Hysteresis reduces output chattering when one input is
slowly moving past the other. It also helps in systems
where it is best not to cycle between high and low
states too frequently (e.g., air conditioner thermostatic
control). Output chatter also increases the dynamic
supply current.
The trip points for Figures 4-4 and 4-5 are:
EQUATION 4-1:
R
R
⎛
⎜
⎝
⎞
⎛
⎞
⎟
⎠
1
1
------
⎜
V
= V
1 +------ – V
⎟
TLH
REF
OL
R
R
⎠
⎝
F
F
R
R
⎞
⎛
⎜
⎝
⎛
⎜
⎝
⎞
⎟
⎠
1
1
------
V
= V
1 +------ – V
⎟
THL
REF
OH
R
F
R
⎠
F
Where:
VTLH
VTHL
=
trip voltage from low-to-high
trip voltage from high-to-low
=
DS22143B-page 18
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
Where:
4.3.2
INVERTING CIRCUIT
Figure 4-6 shows an inverting circuit for single-supply
using three resistors. The resulting hysteresis diagram
is shown in Figure 4-7.
R2R3
R23 = ------------------
R2 + R3
R3
------------------
V23
=
× VDD
VPU
R2 + R3
VDD
Using this simplified circuit, the trip voltage can be
calculated using the following equation:
VIN
RPU
VOUT
VDD
MCP656X
EQUATION 4-2:
R2
R23
RF
⎛
⎜
⎝
⎞
⎛
⎝
⎞
⎠
----------------------
---------------------
R23 + RF
VTHL = VOH
+ V
+ V
⎟
23
R
23 + R
⎠
F
RF
R3
R23
RF
⎛
⎜
⎝
⎞
⎟
⎠
⎛
⎝
⎞
⎠
----------------------
---------------------
VTLH = VOL
23
R
23 + R
R23 + RF
F
Where:
FIGURE 4-6:
Inverting Circuit with
Hysteresis.
VTLH
VTHL
=
=
trip voltage from low-to-high
trip voltage from high-to-low
VOUT
VDD
VOH
Figure 2-21 and Figure 2-24 can be used to determine
typical values for VOH and VOL
.
Low-to-High
High-to-Low
4.4
Bypass Capacitors
VIN
VOL
VSS
With this family of comparators, the power supply pin
(VDD for single supply) should have a local bypass
capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good
edge rate performance.
VSS
VTLH VTHL
VDD
FIGURE 4-7:
Hysteresis Diagram for the
Inverting Circuit.
4.5
Capacitive Loads
In order to determine the trip voltages (VTHL and VTLH
)
Reasonable capacitive loads (e.g., logic gates) have
little impact on propagation delay (see Figure 2-32).
The supply current increases with increasing toggle
frequency (Figure 2-20), especially with higher
capacitive loads. The output slew rate and propogation
delay performance will be reduced with higher
capacitive loads.
for the circuit shown in Figure 4-6, R2 and R3 can be
simplified to the Thevenin equivalent circuit with
respect to VDD, as shown in Figure 4-8.
VPU
RPU
VDD
-
VOUT
MCP656X
+
VSS
V23
R23
RF
Thevenin Equivalent Circuit.
FIGURE 4-8:
© 2009 Microchip Technology Inc.
DS22143B-page 19
MCP6566/6R/6U/7/9
4.6
PCB Surface Leakage
4.7
PCB Layout Technique
In applications where low input bias current is critical,
PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow. This is greater than the
MCP6566/6R/6U/7/9 family’s bias current at +25°C
(1 pA, typical).
When designing the PCB layout it is critical to note that
analog and digital signal traces are adequately
separated to prevent signal coupling. If the comparator
output trace is at close proximity to the input traces
then large output voltage changes from, VSS to VDD or
visa versa, may couple to the inputs and cause the
device output to oscillate. To prevent such oscillation,
the output traces must be routed away from the input
pins. The SC70-5 and SOT-23-5 are relatively immune
because the output pin OUT (pin 1) is separated by the
power pin VDD/VSS (pin 2) from the input pin +IN (as
long as the analog and digital traces remain separated
through out the PCB). However, the pinouts for the dual
and quad packages (SOIC, MSOP, TSSOP) have OUT
and -IN pins (pin 1 and 2) close to each other. The
recommended layout for these packages is shown in
Figure 4-10.
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-9.
IN-
IN+
VSS
OUTA
-INA
VDD
OUTB
-INB
+INA
Guard Ring
Example Guard Ring Layout
VSS
+INB
FIGURE 4-9:
for Inverting Circuit.
FIGURE 4-10:
Recommended Layout.
1. Inverting Configuration (Figures 4-6 and 4-9):
4.8
Unused Comparators
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the
comparator (e.g., VDD/2 or ground).
An unused amplifier in a quad package (MCP6569)
should be configured as shown in Figure 4-11. This
circuit prevents the output from toggling and causing
crosstalk. It uses the minimum number of components
and draws minimal current (see Figure 2-15 and
Figure 2-15).
b) Connect the inverting pin (VIN–) to the input
pad without touching the guard ring.
2. Non-inverting Configuration (Figure 4-4):
a) Connect the non-inverting pin (VIN+) to the
input pad without touching the guard ring.
¼ MCP6569
b) Connect the guard ring to the inverting input
pin (VIN–).
VDD
–
+
FIGURE 4-11:
Unused Comparators.
DS22143B-page 20
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
4.9.3
BISTABLE MULTI-VIBRATOR
4.9
Typical Applications
A simple bistable multi-vibrator design is shown in
Figure 4-14. VREF needs to be between the power
supplies (VSS = GND and VDD) to achieve oscillation.
4.9.1
PRECISE COMPARATOR
Some applications require higher DC precision. An
easy way to solve this problem is to use an amplifier
(such as the MCP6291) to gain-up the input signal
before it reaches the comparator. Figure 4-12 shows
an example of this approach.
The output duty cycle changes with VREF
.
VPU
R1
R2
VDD
VREF
RPU
VREF
VDD
MCP6291
VPU
RPU
VOUT
MCP656X
VDD
VOUT
VIN
R1
R2
MCP656X
VREF
C1
R3
FIGURE 4-12:
Comparator.
Precise Inverting
FIGURE 4-14:
Bistable Multi-vibrator.
4.9.2
WINDOWED COMPARATOR
Figure 4-13 shows one approach to designing a
windowed comparator. The AND gate produces a logic
‘1’ when the input voltage is between VRB and VRT
(where VRT > VRB).
VPU
1/2
MCP6567
RPU
VRT
VOUT
VIN
VRB
1/2
MCP6567
FIGURE 4-13:
Windowed Comparator.
© 2009 Microchip Technology Inc.
DS22143B-page 21
MCP6566/6R/6U/7/9
NOTES:
DS22143B-page 22
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
5.3
Application Notes
5.0
5.1
DESIGN AIDS
The following Microchip Application Notes are
available
www.microchip.com and are recommended as
supplemental reference resources:
Microchip Advanced Part Selector
(MAPS)
on
the
Microchip
web
site
at
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip web site at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparison
reports. Helpful links are also provided for Data sheets,
Purchase, and Sampling of Microchip parts.
• AN895, “Oscillator Circuit For RTD Temperature
Sensors”, DS00895.
5.2
Analog Demonstration and
Evaluation Boards
Microchip offers
a
broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a
complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools. Three of our boards that are especially
useful are:
• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N
SOIC14EV
• 5/6-Pin SOT23 Evaluation Board, P/N VSUPEV2
© 2009 Microchip Technology Inc.
DS22143B-page 23
MCP6566/6R/6U/7/9
NOTES:
DS22143B-page 24
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
5-Lead SC70 (MCP6566)
Example:
BJ25
XXNN
5-Lead SOT-23 (MCP6566, MCP6566R)
Example:
Device
Code
MCP6566T
JYNN
JZNN
WLNN
XXNN
JY25
MCP6566RT
MCP6566UT
Note: Applies to 5-Lead SOT-23.
Example:
8-Lead MSOP (MCP6567)
XXXXXX
YWWNNN
6567E
934256
8-Lead SOIC (150 mil) (MCP6567)
Example:
XXXXXXXX
XXXXYYWW
MCP6567E
SN^0934
e
3
NNN
256
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2009 Microchip Technology Inc.
DS22143B-page 25
MCP6566/6R/6U/7/9
Package Marking Information (Continued)
14-Lead SOIC (150 mil) (MCP6569)
Example:
XXXXXXXXXX
XXXXXXXXXX
MCP6569
E/SL^
0934256
e3
YYWWNNN
14-Lead TSSOP (MCP6569)
Example:
MCP6569E
XXXXXXXX
YYWW
0934
256
NNN
DS22143B-page 26
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢓꢄꢑꢉꢋꢉꢊꢔꢓꢆꢕꢂꢒꢖꢆꢗꢍꢘꢙꢚꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
D
b
1
3
2
E1
E
4
5
e
e
A
A2
c
A1
L
3ꢆꢃ#
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#
ꢏꢙ5
56ꢏ
ꢏꢔ7
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ
1ꢃ#ꢊꢌ
5
ꢅ
(
ꢐꢁ9(ꢈ)ꢕ*
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ
ꢕ#ꢉꢆ!ꢇ%%
ꢔ
ꢐꢁ;ꢐ
ꢐꢁ;ꢐ
ꢐꢁꢐꢐ
ꢀꢁ;ꢐ
ꢀꢁꢀ(
ꢀꢁ;ꢐ
ꢐꢁꢀꢐ
ꢐꢁꢐ;
ꢐꢁꢀ(
M
M
M
ꢑꢁꢀꢐ
ꢀꢁꢑ(
ꢑꢁꢐꢐ
ꢐꢁꢑꢐ
M
ꢀꢁꢀꢐ
ꢀꢁꢐꢐ
ꢐꢁꢀꢐ
ꢑꢁꢖꢐ
ꢀꢁꢛ(
ꢑꢁꢑ(
ꢐꢁꢖ9
ꢐꢁꢑ9
ꢐꢁꢖꢐ
ꢔꢑ
ꢔꢀ
"
"ꢀ
ꢂ
4
ꢊ
8
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ
4ꢅꢉ!ꢈ=ꢃ!#ꢌ
M
ꢜꢔꢊꢃꢉꢝ
ꢀꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀꢑꢒꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ9ꢀ)
© 2009 Microchip Technology Inc.
DS22143B-page 27
MCP6566/6R/6U/7/9
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
DS22143B-page 28
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢓꢄꢑꢉꢋꢉꢊꢔꢓꢆꢕꢏꢒꢖꢆꢗꢍꢏꢒꢁ !ꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
b
N
E
E1
3
2
1
e
e1
D
A2
c
A
φ
A1
L
L1
3ꢆꢃ#
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#
ꢏꢙ5
56ꢏ
ꢏꢔ7
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ
4ꢅꢉ!ꢈ1ꢃ#ꢊꢌ
5
ꢅ
(
ꢐꢁꢝ(ꢈ)ꢕ*
6$# ꢃ!ꢅꢈ4ꢅꢉ!ꢈ1ꢃ#ꢊꢌ
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ
ꢕ#ꢉꢆ!ꢇ%%
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ
.ꢇꢇ#ꢎꢍꢃꢆ#
.ꢇꢇ#ꢈꢔꢆꢓꢋꢅ
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ
4ꢅꢉ!ꢈ=ꢃ!#ꢌ
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ꢔ
ꢔꢑ
ꢔꢀ
"
"ꢀ
ꢂ
4
ꢀꢁꢝꢐꢈ)ꢕ*
ꢐꢁꢝꢐ
ꢐꢁ;ꢝ
ꢐꢁꢐꢐ
ꢑꢁꢑꢐ
ꢀꢁꢛꢐ
ꢑꢁꢒꢐ
ꢐꢁꢀꢐ
ꢐꢁꢛ(
ꢐꢞ
M
M
M
M
M
M
M
M
M
M
M
ꢀꢁꢖ(
ꢀꢁꢛꢐ
ꢐꢁꢀ(
ꢛꢁꢑꢐ
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4ꢀ
ꢀ
ꢊ
8
ꢐꢁꢐ;
ꢐꢁꢑꢐ
ꢐꢁꢑ9
ꢐꢁ(ꢀ
ꢜꢔꢊꢃꢉꢝ
ꢀꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀꢑꢒꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐꢝꢀ)
© 2009 Microchip Technology Inc.
DS22143B-page 29
MCP6566/6R/6U/7/9
"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ#ꢋꢌꢓꢔꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢇꢄꢌ$ꢄ%ꢃꢆꢕ#ꢍꢖꢆꢗ#ꢍꢏꢇꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
D
N
E
E1
NOTE 1
2
b
1
e
c
φ
A2
A
L
L1
A1
3ꢆꢃ#
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#
ꢏꢙ5
56ꢏ
ꢏꢔ7
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ
1ꢃ#ꢊꢌ
5
ꢅ
;
ꢐꢁ9(ꢈ)ꢕ*
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ
ꢕ#ꢉꢆ!ꢇ%%ꢈ
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ
ꢔ
M
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ꢐꢁꢐꢐ
M
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ꢀꢁꢀꢐ
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ꢔꢑ
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"
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ꢂ
M
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ꢛꢁꢐꢐꢈ)ꢕ*
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4
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.ꢇꢇ#ꢎꢍꢃꢆ#
.ꢇꢇ#ꢈꢔꢆꢓꢋꢅ
4ꢀ
ꢀ
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M
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;ꢞ
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4ꢅꢉ!ꢈ=ꢃ!#ꢌ
ꢊ
8
ꢐꢁꢐ;
ꢐꢁꢑꢑ
M
M
ꢐꢁꢑꢛ
ꢐꢁꢖꢐ
ꢜꢔꢊꢃꢉꢝ
ꢀꢁ 1ꢃꢆꢈꢀꢈ,ꢃ $ꢉꢋꢈꢃꢆ!ꢅ&ꢈ%ꢅꢉ#$ꢍꢅꢈꢄꢉꢘꢈ,ꢉꢍꢘ0ꢈ8$#ꢈꢄ$ #ꢈ8ꢅꢈꢋꢇꢊꢉ#ꢅ!ꢈ-ꢃ#ꢌꢃꢆꢈ#ꢌꢅꢈꢌꢉ#ꢊꢌꢅ!ꢈꢉꢍꢅꢉꢁ
ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢛꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢀꢀꢀ)
DS22143B-page 30
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2009 Microchip Technology Inc.
DS22143B-page 31
MCP6566/6R/6U/7/9
"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢜꢖꢆMꢆꢜꢄꢓꢓꢔ'(ꢆ!)*ꢚꢆꢎꢎꢆ+ꢔꢅ,ꢆꢗꢍꢏ-ꢘꢛ
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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
D
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N
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E1
NOTE 1
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2
3
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L1
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ꢛꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢖꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ(ꢒ)
DS22143B-page 32
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢜꢖꢆMꢆꢜꢄꢓꢓꢔ'(ꢆ!)*ꢚꢆꢎꢎꢆ+ꢔꢅ,ꢆꢗꢍꢏ-ꢘꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
© 2009 Microchip Technology Inc.
DS22143B-page 33
MCP6566/6R/6U/7/9
./ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢂꢖꢆMꢆꢜꢄꢓꢓꢔ'(ꢆ!)*ꢚꢆꢎꢎꢆ+ꢔꢅ,ꢆꢗꢍꢏ-ꢘꢛ
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D
N
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NOTE 1
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3
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β
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ꢛꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢖꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
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ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ9()
DS22143B-page 34
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
© 2009 Microchip Technology Inc.
DS22143B-page 35
MCP6566/6R/6U/7/9
./ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢒ0ꢋꢑꢆꢍ0ꢓꢋꢑ$ꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢒꢖꢆMꢆ/)/ꢆꢎꢎꢆ+ꢔꢅ,ꢆꢗꢒꢍꢍꢏꢇꢛ
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DS22143B-page 36
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2009 Microchip Technology Inc.
DS22143B-page 37
MCP6566/6R/6U/7/9
NOTES:
DS22143B-page 38
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
APPENDIX A: REVISION HISTORY
Revision B (August 2009)
The following is the list of modifications:
1. Added MCP6566U throughout the document.
2. Updated package outline drawings.
Revision A (March 2009)
• Original Release of this Document.
© 2009 Microchip Technology Inc.
DS22143B-page 39
MCP6566/6R/6U/7/9
NOTES:
DS22143B-page 40
© 2009 Microchip Technology Inc.
MCP6566/6R/6U/7/9
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
–
PART NO.
Device
X
/XX
Examples:
a)
MCP6566T-E/LT: Tape and Reel,
Temperature
Range
Package
Extended Temperature,
5LD SC70 package.
b)
MCP6566T-E/OT: Tape and Reel
Extended Temperature,
5LD SOT-23 package.
Device
MCP6566T:
Single Comparator (Tape and Reel)
(SC70, SOT-23)
MCP6566RT: Single Comparator (Tape and Reel)
(SOT-23 only)
MCP6566UT: Single Comparator (Tape and Reel)
(SOT-23 only)
a)
a)
MCP6566RT-E/OT: Tape and Reel
Extended Temperature,
5LD SOT-23 package.
MCP6567:
MCP6567T:
MCP6569:
MCP6569T:
Dual Comparator
Dual Comparator(Tape and Reel)
Quad Comparator
MCP6566UT-E/OT: Tape and Reel
Extended Temperature,
5LD SOT-23 package.
Quad Comparator(Tape and Reel)
°
°
a)
b)
MCP6567-E/MS:
MCP6567-E/SN:
Extended Temperature
8LD MSOP package.
Extended Temperature
8LD SOIC package.
Temperature Range
Package
E
=
-40 C to +125 C
LT
=
Plastic Small Outline Transistor (SC70), 5-lead
OT = Plastic Small Outline Transistor (SOT-23), 5-lead
MS = Plastic Micro Small Outline Transistor, 8-lead
SN = Plastic Small Outline Transistor, 8-lead
a)
b)
MCP6569T-E/SL: Tape and Reel
Extended Temperature
ST
SL
=
=
Plastic Thin Shrink Small Outline Transistor, 14-lead
Plastic Small Outline Transistor, 14-lead
14LD SOIC package.
MCP6569T-E/ST:
Tape and Reel
Extended Temperature
14LD TSSOP package.
© 2009 Microchip Technology Inc.
DS22143B-page 41
MCP6566/6R/6U/7/9
NOTES:
DS22143B-page 42
© 2009 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
rfPIC and UNI/O are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total
Endurance, TSHARC, UniWinDriver, WiperLock and ZENA
are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2009 Microchip Technology Inc.
DS22143B-page 43
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4080
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Boston
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Cleveland
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Hsin Chu
Tel: 886-3-6578-300
Fax: 886-3-6578-370
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Santa Clara
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
03/26/09
DS22143B-page 44
© 2009 Microchip Technology Inc.
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