MCP6L72 [MICROCHIP]
The MCP6L72 operational amplifier has 2MHz Gain Bandwidth Product and a low 150uA per amplifier qu;型号: | MCP6L72 |
厂家: | MICROCHIP |
描述: | The MCP6L72 operational amplifier has 2MHz Gain Bandwidth Product and a low 150uA per amplifier qu 放大器 运算放大器 放大器电路 |
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MCP6L71/1R/2/4
2 MHz, 150 µA Op Amps
Features
Description
• Gain Bandwidth Product: 2 MHz (typical)
• Supply Current: IQ = 150 µA (typical)
• Supply Voltage: 2.0V to 6.0V
The Microchip Technology Inc. MCP6L71/1R/2/4 family
of operational amplifiers (op amps) supports general
purpose applications. The combination of rail-to-rail
input and output, low quiescent current and bandwidth
fit into many applicaitons.
• Rail-to-Rail Input/Output
• Extended Temperature Range: –40°C to +125°C
• Available in Single, Dual and Quad Packages
This family has a 2 MHz Gain Bandwidth Product
(GBWP) and a low 150 µA per amplifier quiescent cur-
rent. These op amps operate on supply voltages
between 2.0V and 6.0V, with rail-to-rail input and output
swing. They are available in the extended temperature
range.
Typical Applications
• Portable Equipment
• Photodiode Amplifier
• Analog Filters
• Notebooks and PDAs
• Battery Powered Systems
Package Types
MCP6L71
SOT-23-5
MCP6L71R
SOT-23-5
Design Aids
• FilterLab® Software
VOUT
VSS
1
2
5 VDD
VOUT
VDD
1
5 VSS
• MAPS (Microchip Advanced Part Selector)
• Analog Demonstration and Evaluation Boards
• Application Notes
2
VIN+ 3
4 VIN
–
VIN+ 3
4 VIN
–
MCP6L71
SOIC, MSOP
MCP6L72
SOIC, MSOP
Typical Application
R1
R2
NC 1
8 NC
VOUTA
1
2
8 VDD
VIN
VOUT
2
7
VIN
IN+ 3
VSS
–
VDD
6 VOUT
5 NC
7
VINA
–
VOUTB
R3
V
VINA+ 3
VSS
6 VINB
–
+
VREF
MCP6L71
4
4
5 VINB
Inverting Amplifier
MCP6L74
SOIC, TSSOP
VOUTA
VINA
1
2
14 VOUTD
13
–
VIND–
VINA+ 3
VDD
VINB+ 5
12 VIND
11 VSS
10 VINC
+
4
+
–
VINB
–
VINC
6
7
9
8
VOUTB
VOUTC
© 2009 Microchip Technology Inc.
DS22145A-page 1
MCP6L71/1R/2/4
NOTES:
DS22145A-page 2
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
1.0
1.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
VDD – VSS ........................................................................7.0V
Current at Input Pins ....................................................±2 mA
Analog Inputs (VIN+ and VIN–) ††.. VSS – 1.0V to VDD + 1.0V
All other Inputs and Outputs .......... VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ...................................... |VDD – VSS
|
†† See Section 4.1.2 “Input Voltage and Current Limits”.
Output Short Circuit Current ................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ...................................–65°C to +150°C
Junction Temperature (TJ) .........................................+150°C
ESD Protection On All Pins (HBM/MM) ................ ≥ 4 kV/400V
1.2
Specifications
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Min
(Note 1)
Max
(Note 1)
Parameters
Sym
Typ
Units
Conditions
Input Offset
Input Offset Voltage
VOS
–4
—
—
±1
±1.3
89
+4
—
—
mV
Input Offset Temperature Drift
Power Supply Rejection Ratio
Input Bias Current and Impedance
Input Bias Current
ΔVOS/ΔTA
µV/°C TA = –40°C to +125°C,
dB
PSRR
IB
IB
—
—
—
—
—
—
1
—
—
—
—
—
—
pA
50
pA TA= +85°C
IB
2000
pA TA= +125°C
Input Offset Current
IOS
ZCM
ZDIFF
±1
pA
Common Mode Input Impedance
Differential Input Impedance
Common Mode
1013||6
1013||3
Ω||pF
Ω||pF
Common Mode Input Voltage
Range
VCMR
-0.3
—
—
+5.3
—
V
Common Mode Rejection Ratio
CMRR
91
dB
VCM = –0.3V to 5.3V
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
AOL
—
105
—
dB VOUT = 0.2V to 4.8V,
VCM = VSS
Output
Maximum Output Voltage Swing
VOL
VOH
ISC
—
4.980
—
—
—
0.020
—
V
V
G = +2 V/V,
0.5V input overdrive
G = +2 V/V,
0.5V input overdrive
Output Short Circuit Current
±25
—
mA
Note 1: For design guidance only; not tested.
© 2009 Microchip Technology Inc.
DS22145A-page 3
MCP6L71/1R/2/4
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Min
(Note 1)
Max
(Note 1)
Parameters
Sym
Typ
Units
Conditions
Power Supply
Supply Voltage
VDD
IQ
2.0
50
—
6.0
V
Quiescent Current per Amplifier
150
240
µA IO = 0
Note 1: For design guidance only; not tested.
TABLE 1-2: AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.0V to +5.5V, VSS = GND,
VCM = VDD2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters
AC Response
Sym
Min
Typ
Max
Units
Conditions
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
2.0
65
—
—
—
MHz
°
G = +1 V/V
Slew Rate
SR
0.9
V/µs
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni
eni
ini
—
—
—
4.6
19
3
—
—
—
µVP-P f = 0.1 Hz to 10 Hz
nV/√Hz f = 10 kHz
fA/√Hz f = 1 kHz
TABLE 1-3:
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +2.0V to +5.5V and VSS = GND.
Parameters
Temperature Ranges
Sym
Min
Typ
Max
Units
Conditions
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-MSOP
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
TA
TA
TA
–40
–40
–65
—
—
—
+125
+125
+150
°C
°C
°C
Note 1
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
256
163
206
120
100
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
Note 1: The Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C.
DS22145A-page 4
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
1.3
Test Circuits
CF
6.8 pF
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT; see Equation 1-1. Note that VCM is not the
circuit’s common mode voltage ((VP + VM)/2), and that
VOST includes VOS plus the effects (on the input offset
RG
100 kΩ
RF
100 kΩ
VDD/2
VP
error, VOST) of temperature, CMRR, PSRR and AOL
.
VDD
VIN+
EQUATION 1-1:
CB1
100 nF
CB2
1 µF
GDM = RF ⁄ RG
MCP6L7X
VCM = (VP + VDD ⁄ 2) ⁄ 2
VOST = VIN– – VIN+
VIN–
VOUT = (VDD ⁄ 2) + (VP – VM) + VOST(1 + GDM
)
VOUT
VM
RL
CL
Where:
RG
RF
10 kΩ
60 pF
100 kΩ
100 kΩ
GDM = Differential Mode Gain
(V/V)
(V)
VCM = Op Amp’s Common Mode
CF
6.8 pF
Input Voltage
VL
VOST = Op Amp’s Total Input Offset (mV)
Voltage
FIGURE 1-1:
AC and DC Test Circuit for
Most Specifications.
© 2009 Microchip Technology Inc.
DS22145A-page 5
MCP6L71/1R/2/4
NOTES:
DS22145A-page 6
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2,
RL = 10 kΩ to VL and CL = 60 pF.
300
250
200
150
100
50
0.5
0.4
VDD = 2.0V
Representitive Part
0.3
VCMRH – VDD
0.2
0.1
One Wafer Lot
0.0
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-0.1
-0.2
-0.3
-0.4
-0.5
0
-50
-100
VCMRL – VSS
-50
-25
0
25
50
75
100
125
Common Mode Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-1:
Input Offset Voltage vs.
FIGURE 2-4:
Input Common Mode Range
Common Mode Input Voltage at V = 2.0V.
Voltage vs. Ambient Temperature.
DD
120
110
300
VDD = 5.5V
Representitive Part
250
200
100
90
CMRR (VCM = -0.3V to +5.3V)
PSRR
150
100
50
TA = +125°C
80
TA = +85°C
(VCM = VSS
)
0
T
T
A = +25°C
A = -40°C
70
-50
-100
60
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
Common Mode Input Voltage (V)
FIGURE 2-5:
Temperature.
CMRR, PSRR vs.
FIGURE 2-2:
Common Mode Input Voltage at V = 5.5V.
Input Offset Voltage vs.
DD
300
110
100
90
VCM = VSS
Representative Part
CMRR
250
200
150
100
50
80
70
PSRR–
PSRR+
60
50
0
40
VDD = 2.0V
VDD = 5.5V
-50
30
20
-100
1
10
100
1k
10k
100k
1M
1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06
Frequency (Hz)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage (V)
FIGURE 2-6:
Frequency.
CMRR, PSRR vs.
FIGURE 2-3:
Output Voltage.
Input Offset Voltage vs.
© 2009 Microchip Technology Inc.
DS22145A-page 7
MCP6L71/1R/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2,
RL = 10 kΩ to VL and CL = 60 pF.
1.E-02
10m
1.E-03
1m
1.E- 4
100µ
6
5
VDD = 5.0V
G = +2 V/V
1.E1-05µ
1.E-016µ
4
3
100n
1.E- 7
10n
1.E- 8
2
+125°C
+85°C
+25°C
-40°C
1n
1.E-09
VIN
100p
1.E-10
10p
1.E-11
1p
1.E-12
1
VOUT
0
-1
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Voltage (V)
Time (1 ms/div)
FIGURE 2-7:
Input Current vs. Input
FIGURE 2-10:
The MCP6L71/1R/2/4 Show
Voltage.
No Phase Reversal.
120
100
80
0
250
200
150
100
50
-30
-60
Phase
-90
60
40
-120
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
Gain
20
-150
-180
0
-20
-210
10 100 1k 10k 100k 1M 10M
Frequency (Hz)
0
0.1
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
FIGURE 2-8:
Open-Loop Gain, Phase vs.
FIGURE 2-11:
Quiescent Current vs.
Frequency.
Supply Voltage.
1,000
35
30
25
20
15
10
5
100
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0
10
0.1
1
10
100
1k
10k 100k 1M
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
1.E- 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0
01
0
1
Freq2uency3(Hz) 4
5
6
FIGURE 2-12:
vs. Supply Voltage.
Output Short Circuit Current
FIGURE 2-9:
vs. Frequency.
Input Noise Voltage Density
DS22145A-page 8
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2,
RL = 10 kΩ to VL and CL = 60 pF.
50
45
40
35
30
25
20
15
10
5
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VDD = 5.5V
VOL – VSS
-IOUT
Falling Edge
VDD = 2.0V
VDD – VOH
IOUT
Rising Edge
0
0.1
1
10
-50
-25
0
25
50
75
100
125
Output Current Magnitude (mA)
Ambient Temperature (°C)
FIGURE 2-13:
Ratio of Output Voltage
FIGURE 2-16:
Slew Rate vs. Ambient
Headroom vs. Output Current Magnitude.
Temperature.
5.0
10
G = +1 V/V
DD = 5.0V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
VDD = 5.5V
VDD = 2.0V
1
0.1
1k
10k
100k
1M
10M
Time (5 µs/div)
Frequency (Hz)
FIGURE 2-14:
Large Signal Non-inverting
FIGURE 2-17:
Maximum Output Voltage
Pulse Response.
Swing vs. Frequency.
G = +1 V/V
Time (2 µs/div)
FIGURE 2-15:
Small Signal Non-inverting
Pulse Response.
© 2009 Microchip Technology Inc.
DS22145A-page 9
MCP6L71/1R/2/4
NOTES:
DS22145A-page 10
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1 (single op amps) and Table 3-2 (dual and quad op amps).
TABLE 3-1:
PIN FUNCTION TABLE FOR SINGLE OP AMPS
MCP6L71
MCP6L71R
Symbol
Description
MSOP, SOIC
SOT-23-5
SOT-23-5
2
4
3
4
3
VIN
–
+
Inverting Input
3
4
VIN
Non-inverting Input
Negative Power Supply
Analog Output
2
5
VSS
VOUT
VDD
NC
6
1
1
7
5
2
Positive Power Supply
No Internal Connection
1,5,8
—
—
TABLE 3-2:
MCP6L72
PIN FUNCTION TABLE FOR DUAL AND QUAD OP AMPS
MCP6L74
Symbol
Description
MSOP, SOIC
SOIC, TSSOP
1
2
1
2
VOUTA
Analog Output (op amp A)
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
VINA
–
+
3
3
VINA
8
4
VDD
5
5
VINB
+
Non-inverting Input (op amp B)
Inverting Input (op amp B)
Analog Output (op amp B)
Analog Output (op amp C)
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
6
6
VINB
–
7
7
VOUTB
VOUTC
—
—
—
4
8
9
VINC
–
+
10
11
12
13
14
VINC
VSS
—
—
—
VIND
+
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Analog Output (op amp D)
VIND
–
VOUTD
3.1
Analog Outputs
3.3
Power Supply Pins
The output pins are low impedance voltage sources.
The positive power supply (VDD) is 2.0V to 6.0V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
3.2
Analog Inputs
and VDD
.
The non-inverting and inverting inputs are high
impedance CMOS inputs with low bias currents.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
© 2009 Microchip Technology Inc.
DS22145A-page 11
MCP6L71/1R/2/4
NOTES:
DS22145A-page 12
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
4.1.3
NORMAL OPERATIONS
4.0
APPLICATION INFORMATION
The input stage of the MCP6L71/1R/2/4 op amps uses
two differential CMOS input stages in parallel. One
operates at low common mode input voltage (VCM),
while the other at high VCM. With this topology, and at
room temperature, the device operates with VCM up to
0.3V above VDD and 0.3V below VSS (typically at
+25°C).
The MCP6L71/1R/2/4 family of op amps is
manufactured using Microchip’s state of the art CMOS
process, specifically designed for low cost, low power
and general purpose applications. The low supply
voltage, low quiescent current and wide bandwidth
make the MCP6L71/1R/2/4 ideal for battery powered
applications.
The transition between the two input stage occurs
when VCM = VDD – 1.1V. For the best distortion and
gain linearity, with non-inverting gains, avoid this region
of operation.
4.1
Rail-to-Rail Inputs
4.1.1
PHASE REVERSAL
The MCP6L71/1R/2/4 op amps are designed to pre-
vent phase inversion when the input pins exceed the
supply voltages. Figure 2-10 shows an input voltage
exceeding both supplies without any phase reversal.
4.2
Rail-to-Rail Output
The output voltage range of the MCP6L71/1R/2/4 op
amps is VDD – 20 mV (minimum) and VSS + 20 mV
(maximum) when RL = 10 kΩ is connected to VDD/2
and VDD = 5.0V. Refer to Figure 2-13 for more informa-
tion.
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit they are in must limit the
currents (and voltages) at the input pins (see
Section 1.1 “Absolute Maximum Ratings †”).
Figure 4-1 shows the recommended approach to pro-
tecting these inputs. The internal ESD diodes prevent
the input pins (VIN+ and VIN–) from going too far below
ground, and the resistors R1 and R2 limit the possible
current drawn out of the input pins. Diodes D1 and D2
prevent the input pins (VIN+ and VIN–) from going too
4.3
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response.
far above VDD, and dump any currents onto VDD
.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (RISO in Figure 4-2) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
VDD
D1
V1
R1
VOUT
D2
MCP6L7X
RG
RF
RISO
CL
V2
VOUT
R2
MCP6L7X
RN
R3
VSS – (minimum expected V1)
R1 >
R2 >
FIGURE 4-2:
Stabilizes Large Capacitive Loads.
Output Resistor, R
ISO
2 mA
VSS – (minimum expected V2)
2 mA
Bench measurements are helpful in choosing RISO.
Adjust RISO so that a small signal step response (see
Figure 2-15) has reasonable overshoot (e.g., 4%).
FIGURE 4-1:
Protecting the Analog
Inputs.
A significant amount of current can flow out of the
inputs (through the ESD diodes) when the common
mode voltage (VCM) is below ground (VSS); see
Figure 2-7. Applications that are high impedance may
need to limit the usable voltage range.
© 2009 Microchip Technology Inc.
DS22145A-page 13
MCP6L71/1R/2/4
4.4
Supply Bypass
VIN–
VIN+
Guard Ring
With this family of operational amplifiers, the power
supply pin (VDD for single supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good, high frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with nearby analog parts.
FIGURE 4-4:
Layout.
Example Guard Ring
4.5
Unused Amplifiers
An unused op amp in a quad package (MCP6L74)
should be configured as shown in Figure 4-3. These
circuits prevent the output from toggling and causing
crosstalk. In Circuit A, R1 and R2 produce a voltage
within its output voltage range (VOH, VOL). The op amp
buffers this voltage, which can be used elsewhere in
the circuit. Circuit B uses the minimum number of
components and operates as a comparator.
1. For Inverting Gain and Transimpedance
Amplifiers (convert current to voltage, such as
photo detectors):
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
¼ MCP6L74 (A)
¼ MCP6L74 (B)
VDD
VDD
2. Non-inverting Gain and Unity Gain Buffer:
a) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
VDD
R1
b) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
VREF
R2
4.7
Application Circuits
R2
------------------
⋅
VREF = VDD
4.7.1
INVERTING INTEGRATOR
R1 + R2
An inverting integrator is shown in Figure 4-5. The
circuit provides an output voltage that is proportional to
the negative time-integral of the input. The additional
resistor R2 limits DC gain and controls output clipping.
To minimize the integrator’s error for slow signals, the
value of R2 should be much larger than the value of R1.
FIGURE 4-3:
Unused Op Amps.
4.6
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow. This is greater than the
MCP6L71/1R/2/4 family’s bias current at +25°C (1 pA,
typical).
+
VOUT
MCP6L71
_
C1
VIN
R1
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
Figure 4-4 shows an example of this type of layout.
R2
VOUT = –
0t VINdt
1
------------
∫
R1C1
R2 » R1
FIGURE 4-5:
Inverting Integrator.
DS22145A-page 14
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
5.4
Application Notes
5.0
DESIGN TOOLS
The following Microchip Application Notes are avail-
able on the Microchip web site at www.microchip. com/
appnotes and are recommended as supplemental ref-
erence resources.
Microchip provides the basic design tools needed for
the MCP6L71/1R/2/4 family of op amps.
5.1
FilterLab® Software
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the Micro-
chip web site at www.microchip.com/filterlab, the Filter-
Lab design tool provides full schematic diagrams of the
filter circuit with component values. It also outputs the
filter circuit in SPICE format, which can be used with
the macro model to simulate actual filter performance.
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
5.2
MAPS (Microchip Advanced Part
Selector)
MAPS is a software tool that helps efficiently identify
Microchip devices that fit a particular design require-
ment. Available at no cost from the Microchip web site
at www.microchip.com/ maps, the MAPS is an overall
selection tool for Microchip’s product portfolio that
includes Analog, Memory, MCUs and DSCs. Using this
tool you can define a filter to sort features for a para-
metric search of devices and export side-by-side tech-
nical comparison reports. Helpful links are also
provided for Data sheets, Purchase, and Sampling of
Microchip parts.
5.3
Analog Demonstration and
Evaluation Boards
Microchip offers
a
broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a
complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Some boards that are especially useful are:
• MCP6XXX Amplifier Evaluation Board 1
• MCP6XXX Amplifier Evaluation Board 2
• MCP6XXX Amplifier Evaluation Board 3
• MCP6XXX Amplifier Evaluation Board 4
• Active Filter Demo Board Kit
• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N
SOIC14EV
© 2009 Microchip Technology Inc.
DS22145A-page 15
MCP6L71/1R/2/4
NOTES:
DS22145A-page 16
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
5-Lead SOT-23 (MCP6L71, MCP6L71R)
Example:
WG25
Example:
Device
Code
MCP6L71
WGNN
WFNN
XXNN
MCP6L71R
Note: Applies to 5-Lead SOT-23
8-Lead MSOP (MCP6L71, MCP6L72)
XXXXXX
YWWNNN
6L72E
911256
8-Lead SOIC (150 mil) (MCP6L71, MCP6L72)
Example:
XXXXXXXX
XXXXYYWW
MCP6L72E
e
3
SN^0911
NNN
256
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
e
3
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2009 Microchip Technology Inc.
DS22145A-page 17
MCP6L71/1R/2/4
Package Marking Information (Continued)
14-Lead SOIC (150 mil) (MCP6L74)
Example:
XXXXXXXXXX
XXXXXXXXXX
MCP6L74
E/SL^
0911256
e
3
YYWWNNN
Example:
14-Lead TSSOP (MCP6L74)
XXXXXXXX
YYWW
6L74EST
0911
NNN
256
DS22145A-page 18
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
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© 2009 Microchip Technology Inc.
DS22145A-page 19
MCP6L71/1R/2/4
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DS22145A-page 20
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
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ꢜꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢖꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢞꢐ(ꢒ)
© 2009 Microchip Technology Inc.
DS22145A-page 21
MCP6L71/1R/2/4
ꢝꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢛꢖꢆMꢆꢛꢄꢓꢓꢔ$%ꢆꢙ&'(ꢆꢎꢎꢆ)ꢔꢅ*ꢆꢗꢍꢏ+,ꢚ
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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
DS22145A-page 22
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
-.ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢂꢖꢆMꢆꢛꢄꢓꢓꢔ$%ꢆꢙ&'(ꢆꢎꢎꢆ)ꢔꢅ*ꢆꢗꢍꢏ+,ꢚ
ꢛꢔꢊꢃꢜ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
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ꢑꢁ ꢟꢈꢕꢃꢓꢆꢃ%ꢃꢊꢉꢆ#ꢈ*ꢌꢉꢍꢉꢊ#ꢅꢍꢃ #ꢃꢊꢁ
ꢜꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢖꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢞꢐ=()
© 2009 Microchip Technology Inc.
DS22145A-page 23
MCP6L71/1R/2/4
ꢛꢔꢊꢃꢜ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
DS22145A-page 24
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
-.ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢒ/ꢋꢑꢆꢍ/ꢓꢋꢑ!ꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢒꢖꢆMꢆ.&.ꢆꢎꢎꢆ)ꢔꢅ*ꢆꢗꢒꢍꢍꢏꢇꢚ
ꢛꢔꢊꢃꢜ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
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ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢜꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢞꢐ;ꢒ)
© 2009 Microchip Technology Inc.
DS22145A-page 25
MCP6L71/1R/2/4
NOTES:
DS22145A-page 26
© 2009 Microchip Technology Inc.
MCP6L71/1R/2/4
APPENDIX A: REVISION HISTORY
Revision A (March 2009)
• Original data sheet release.
© 2008 Microchip Technology Inc.
DS22145A-page 27
MCP6L71/1R/2/4
NOTES:
DS22145A-page 28
© 2008 Microchip Technology Inc.
MCP6L71/1R/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
X
/XX
–
a)
b)
c)
MCP6L71T-E/OT: Tape and Reel,
5LD SOT-23 package.
MCP6L71T-E/MS: Tape and Reel,
8LD MSOP package.
MCP6L71T-E/SN: Tape and Reel,
8LD SOIC package.
Temperature
Range
Package
Device:
MCP6L71T:
Single Op Amp (Tape and Reel)
(MSOP, SOIC, SOT-23-5)
Single Op Amp (Tape and Reel)
(SOT-23-5)
Dual Op Amp (Tape and Reel)
(MSOP, SOIC)
a)
MCP6L71RT-E/OT: Tape and Reel,
5LD SOT-23 package.
MCP6L71RT:
MCP6L72T:
MCP6L74T:
a)
b)
MCP6L72T-E/MS: Tape and Reel,
8LD MSOP package.
MCP6L72T-E/SN: Tape and Reel,
8LD SOIC package.
Quad Op Amp (Tape and Reel)
(SOIC, TSSOP)
a)
b)
MCP6L74T-E/SL: Tape and Reel,
14LD SOIC package.
Temperature Range:
Package:
E
=
=
-40°C to +125°C
MCP6L74-E/ST:
Tape and Reel,
14LD TSSOP package.
OT
Plastic Small Outline Transistor (SOT-23), 5-lead
(MCP6L71, MCP6L71R)
MS
SN
SL
=
=
=
=
Plastic MSOP, 8-lead
Plastic SOIC, (150 mil Body), 8-lead
Plastic SOIC (150 mil Body), 14-lead
Plastic TSSOP (4.4 mm Body), 14-lead
ST
© 2009 Microchip Technology Inc.
DS22145A-page 29
MCP6L71/1R/2/4
NOTES:
DS22145A-page 30
© 2009 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, nanoWatt XLP,
PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select
Mode, Total Endurance, TSHARC, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2009 Microchip Technology Inc.
DS22145A-page 31
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4080
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Boston
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Cleveland
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Santa Clara
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
02/04/09
DS22145A-page 32
© 2009 Microchip Technology Inc.
相关型号:
MCP6L74
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