MCP79400_技术文档

MCP79400/MCP79401/MCP79402

I²C™ Real-Time Clock/Calendar with SRAM, Unique ID

and Battery Switchover

Device Selection Table

Description:

SRAM

(Bytes)

The MCP7940X series of low-power Real-Time Clocks

(RTC) uses digital timing compensation for an accurate

clock/calendar, a programmable output control for

versatility, a power sense circuit that automatically

switches to the backup supply, and nonvolatile memory

for data storage. Using a low-cost 32.768 kHz crystal,

it tracks time using several internal registers. For

communication, the MCP7940X uses the I²C™ bus.

Part Number

Unique ID

MCP79400

MCP79401

MCP79402

64

Blank

EUI-48^™

EUI-64^™

Features:

• Real-Time Clock/Calendar (RTCC), Battery

Backed:

The clock/calendar automatically adjusts for months

with fewer than 31 days, including corrections for

leap years. The clock operates in either the 24-hour

or 12-hour format with an AM/PM indicator and

settable alarm(s) to the second, minute, hour, day of

the week, date or month. Using the programmable

CLKOUT, frequencies of 32.768, 8.192 and 4.096

kHz and 1 Hz can be generated from the external

crystal.

- Hours, Minutes, Seconds, Day of Week, Day,

Month and Year

- Dual alarm with single output

• On-Chip Digital Trimming/Calibration:

- Range -127 to +127 ppm

- Resolution 1 ppm

• Programmable Open-Drain Output Control:

- CLKOUT with 4 selectable frequencies

- Alarm output

Along with the battery-backed SRAM memory, a 64-bit

protected EEPROM space is available for a unique ID

or MAC address to be programmed at the factory or by

the end user.

• 64 Bytes SRAM, Battery Backed

• 64-Bit Unique ID:

The device is fully accessible through the serial

interface while VCC is between 1.8V and 5.5V, but can

operate down to 1.3V for timekeeping and SRAM

retention only.

- User or factory programmable

- Protected EEPROM

- EUI-48^™or EUI-64^™MAC address

The RTC series of devices are available in the standard

8-lead SOIC, TSSOP, MSOP and 2x3 TDFN packages.

- Custom ID programming

• Automatic VCC Switchover to VBAT Backup

Supply

Package Types

• Power-Fail Time-Stamp for Battery Switchover

• Low-Power CMOS Technology:

MSOP

X1

1

8

VCC

- Dynamic Current: 400 A max read

- Dynamic Current: 400 A max SRAM

X2

V_BAT

VSS

2

3

4

7

6

5

MFP

SCL

SDA

TDFN

- Battery Backup Current: <700nA @ 1.8V

• 100 kHz and 400 kHz Compatibility

• ESD Protection >4,000V

X1

1

VCC

MFP

SCL

SDA

8

7

6

5

2

3

4

X2

VBAT

SOIC, TSSOP

• 1 Million Erase/Write Cycles for Unique ID

VSS

• Packages include 8-Lead SOIC, TSSOP, 2x3

TDFN, MSOP

1

2

3

4

8

7

6

5

X1

VCC

X2

V_BAT

VSS

MFP

SCL

SDA

• Pb-Free and RoHS Compliant

• Temperature Ranges:

- Industrial (I): -40°C to +85°C

 2011 Microchip Technology Inc.

DS25009A-page 1

MCP7940X

FIGURE 1-1:

TYPICAL OPERATING

CIRCUIT

X1

X2

RTCC

VCC

MFP

SCL

SDA

Time-Stamp/

Alarms

SRAM

VBAT

VSS

VBAT Switch

I²C™

ID

DS25009A-page 2

 2011 Microchip Technology Inc.

MCP7940X

1.0

ELECTRICAL CHARACTERISTICS

(†)

Absolute Maximum Ratings

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. VSS ..........................................................................................................-0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins  4 kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

Electrical Characteristics:

Industrial (I): VCC = +1.8V to 5.5V

DC CHARACTERISTICS

TA = -40°C to +85°C

Param.

Sym.

No.

Characteristic

Min.

Typ.

Max.

Units

Conditions

—

SCL, SDA pins

—

0.7 VCC

—

V

—

D1

D2

VIH

VIL

High-level input voltage

Low-level input voltage

0.3 VCC

0.2 VCC

V

VCC = 2.5V to 5.5V

D3

D4

VHYS

VOL

Hysteresis of Schmitt

Trigger inputs

(SDA, SCL pins)

0.05

VCC

—

V

(Note 1)

Low-level output voltage

(MFP, SDA)

—

0.40

IOL = 3.0 ma @ VCC = 4.5V

IOL = 2.1 ma @ VCC = 2.5V

D5

D6

D7

ILI

Input leakage current

Output leakage current

—

±1

10

A

pF

VIN = VSS or VCC

ILO

VOUT = VSS or VCC

CIN,

Pin capacitance

VCC = 5.0V (Note 1)

COUT

(SDA, SCL and MFP)

TA = 25°C, f = 400 kHz

D8

D9

ICC Read Operating current

—

400

3

A

mA

A

nA

VCC = 5.5V, SCL = 400 kHz

VCC = 5.5V

ID

ICC Write

ICC Read Operating current

300

400

5

VCC = 5.5V, SCL = 400 kHz

VCC = 5.5V, SCL = SDA = VCC

VBAT = 1.8V @ 25°C

SRAM

ICC Write

D10

D11

ICCS

IBAT

Standby current (Note 2)

VBAT Standby Current

700

—

(Note 2)

D12

D13

D14

D15

VTRIP

VBAT Change Over

1.3

300

0

1.7

—

V

s

V

1.5V typical at TAMB = 25°C

From VTRIP (max) to VTRIP (min)

From VTRIP (min) to VTRIP (max)

—

VCCFT VCC Fall Time (Note 1)

VCCRT VCC Rise Time (Note 1)

—

VBAT

VBAT Voltage Range

1.3

5.5

(Note 1)

Note 1: This parameter is periodically sampled and not 100% tested.

2: Standby with oscillator running

 2011 Microchip Technology Inc.

DS25009A-page 3

MCP7940X

TABLE 1-2:

AC CHARACTERISTICS

Electrical Characteristics:

AC CHARACTERISTICS

Industrial (I):

VCC = +1.8V to 5.5V

TA = -40°C to +85°C

Param.

Symbol

No.

Characteristic

Clock frequency

Min.

Max.

Units

Conditions

1

2

3

4

5

6

7

FCLK

THIGH

TLOW

TR

—

100

400

kHz

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

Clock high time

Clock low time

4000

600

—

ns

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

4700

1300

—

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

SDA and SCL rise time

(Note 1)

—

1000

300

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

TF

SDA and SCL fall time

(Note 1)

—

1000

300

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

THD:STA Start condition hold time

TSU:STA Start condition setup time

4000

600

—

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

4700

600

—

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

8

9

THD:DAT Data input hold time

TSU:DAT Data input setup time

0

—

ns

250

100

—

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

10

11

12

TSU:STO Stop condition setup time

4000

600

—

ns

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

TAA

Output valid from clock

—

3500

900

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

TBUF

Bus free time: Time the bus

must be free before a new

transmission can start

4700

1300

—

1.8V  VCC < 2.5V

2.5V  VCC  5.5V

13

14

15

TSP

TWC

—

Input filter spike suppression

(SDA and SCL pins)

—

50

5

ns

(Note 1 and Note 2)

Write cycle time (byte or

page)

ms

—

Endurance

1M

—

cycles 25°C, VCC = 5.5V Page mode

(Note 3)

Note 1: Not 100% tested.

2: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site

at www.microchip.com.

DS25009A-page 4

 2011 Microchip Technology Inc.

MCP7940X

FIGURE 1-2:

BUS TIMING DATA

5

4

D4

2

SCL

7

3

10

8

9

SDA

In

6

13

12

11

SDA

Out

 2011 Microchip Technology Inc.

DS25009A-page 5

MCP7940X

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

FIGURE 2-1:

DEVICE PINOUTS

SOIC/DFN/MSOP/TSSOP

X1

1

8

Vcc

X2

2

3

4

7

6

5

MFP

SCL

SDA

V

BAT

Vss

2.1

Serial Data (SDA)

This is a bidirectional pin used to transfer addresses

and data into and out of the device. It is an open-drain

terminal, therefore, the SDA bus requires a pull-up

resistor to VCC (typically 10 k for 100 kHz, 2 kfor

400 kHz). For normal data transfer SDA is allowed to

change only during SCL low. Changes during SCL high

are reserved for indicating the Start and Stop

conditions.

2.2

Serial Clock (SCL)

This input is used to synchronize the data transfer from

and to the device.

TABLE 2-1:

Pin Name

PIN DESCRIPTIONS

Pin Function

Vss

SDA

SCL

X1

Ground

Bidirectional Serial Data

Serial Clock

Xtal Input, External Oscillator Input

Xtal Output

X2

VBAT

MFP

Vcc

Battery Backup Input (3V Typ)

Multi Function Pin

+1.8V to +5.5V Power Supply

DS25009A-page 6

 2011 Microchip Technology Inc.

MCP7940X

2

3.1.1.4

Data Valid (D)

3.0

3.1

I C BUS CHARACTERISTICS

The state of the data line represents valid data when,

after a Start condition, the data line is stable for the

duration of the high period of the clock signal.

2

I C Interface

The MCP7940X supports a bidirectional 2-wire bus and

data transmission protocol. A device that sends data

onto the bus is defined as transmitter, and a device

receiving data as receiver. The bus has to be controlled

by a master device which generates the Start and Stop

conditions, while the MCP7940X works as slave. Both

master and slave can operate as transmitter or receiver

but the master device determines which mode is

activated.

The data on the line must be changed during the low

period of the clock signal. There is one bit of data per

clock pulse.

Each data transfer is initiated with a Start condition and

terminated with a Stop condition. The number of the

data bytes transferred between the Start and Stop

conditions is determined by the master device.

3.1.1.5

Acknowledge

3.1.1

BUS CHARACTERISTICS

Each receiving device, when addressed, is obliged to

generate an Acknowledge signal after the reception of

each byte. The master device must generate an extra

clock pulse which is associated with this Acknowledge

bit.

The following bus protocol has been defined:

• Data transfer may be initiated only when the bus

is not busy.

• During data transfer, the data line must remain

stable whenever the clock line is high. Changes in

the data line while the clock line is high will be

interpreted as a Start or Stop condition.

Note: The MCP7940X does not generate any

Acknowledge bits while an internal Unique

ID programming cycle is in progress, but

the user may still access the SRAM and

RTCC registers.

Accordingly, the following bus conditions have been

defined (Figure 3-1).

A device that acknowledges must pull down the SDA

line during the Acknowledge clock pulse in such a way

that the SDA line is stable-low during the high period of

the Acknowledge-related clock pulse. Of course, setup

and hold times must be taken into account. During

reads, a master must signal an end of data to the slave

by NOT generating an Acknowledge bit on the last byte

that has been clocked out of the slave. In this case, the

slave (MCP7940X) will leave the data line high to

enable the master to generate the Stop condition.

3.1.1.1

Both data and clock lines remain high.

3.1.1.2 Start Data Transfer (B)

Bus not Busy (A)

A high-to-low transition of the SDA line while the clock

(SCL) is high determines a Start condition. All

commands must be preceded by a Start condition.

3.1.1.3

Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock

(SCL) is high determines a Stop condition. All

operations must end with a Stop condition.

FIGURE 3-1:

DATA TRANSFER SEQUENCE ON THE SERIAL BUS

(A)

(B)

(D)

(C) (A)

SCL

SDA

Start

Condition

Address or

Acknowledge

Valid

Data

Allowed

to Change

Stop

Condition

 2011 Microchip Technology Inc.

DS25009A-page 7

MCP7940X

FIGURE 3-2:

ACKNOWLEDGE TIMING

Acknowledge

Bit

1

2

3

4

5

6

7

8

9

1

2

3

SCL

SDA

Data from transmitter

Receiver must release the SDA line at this point

so the Transmitter can continue sending data.

Transmitter must release the SDA line at this point

allowing the Receiver to pull the SDA line low to

acknowledge the previous eight bits of data.

3.1.2

DEVICE ADDRESSING AND OPERATION

selected. The next byte received defines the address of

the data byte (Figure 3-3). The upper address bits are

transferred first, followed by the Least Significant bits

(LSb).

A control byte is the first byte received following the

Start condition from the master device (Figure 3-2).

The control byte consists of a control code; for the

MCP7940X this is set as ‘1010111’ for read and write

operations for the Unique ID after the correct unlock

sequence.

Following the Start condition, the MCP7940X monitors

the SDA bus, checking the device type identifier being

transmitted. Upon receiving an ‘1010111’ or

‘1101111’ code, the slave device outputs an

Acknowledge signal on the SDA line. Depending on the

state of the R/W bit, the MCP7940X will select a read

or write operation.

The control byte for accessing the SRAM and RTCC

registers are set to ‘1101111’. The RTCC registers and

the SRAM share the same address space.

The last bit of the control byte defines the operation to

be performed. When set to a ‘1’ a read operation is

selected, and when set to a ‘0’ a write operation is

FIGURE 3-3:

ADDRESS SEQUENCE BIT ASSIGNMENTS

Unique ID CONTROL BYTE

ADDRESS BYTE

A

0

A

2

A

1

0

1

0

1

1 R/W

1

0

1

CONTROL

CODE

X = Don’t Care

SRAM RTCC CONTROL BYTE

ADDRESS BYTE

A

0

1

0

1

R/W

•

X

CONTROL

CODE

X = Don’t Care

DS25009A-page 8

 2011 Microchip Technology Inc.

MCP7940X

3.1.3

ACKNOWLEDGE POLLING

Since the device will not acknowledge a Unique ID

command during an ID write cycle, this can be used to

determine when the cycle is complete. This feature can

be used to maximize bus throughput. Once the Stop

condition for a Write command has been issued from

the master, the device initiates the internally timed write

cycle. ACK polling can be initiated immediately. This

involves the master sending a Start condition, followed

by the control byte for a Write command (R/W = 0). If

the device is still busy with the write cycle, then no ACK

will be returned. If no ACK is returned, then the Start bit

and control byte must be resent. If the cycle is

complete, then the device will return the ACK, and the

master can then proceed with the next Read or Write

command. See Figure 3-4 for the flow diagram.

FIGURE 3-4:

ACKNOWLEDGE

POLLING FLOW

Send

ID Write Command

Send Stop

Condition to

Initiate ID Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

NO

YES

 2011 Microchip Technology Inc.

DS25009A-page 9

MCP7940X

• Addresses 0x00h-0x06h are the RTCC Time and

Date registers. These are read/write registers.

Care must be taken when writing to these regis-

ters while the oscillator is running.

4.0

RTCC FUNCTIONALITY

The MCP7940X family is a highly integrated RTCC.

On-board time and date counters are driven from a low-

power oscillator to maintain the time and date. An

integrated VCC switch enables the device to maintain

the time and date and also the contents of the SRAM

during a VCC power failure.

• Incorrect data can appear in the Time and Date

registers if a write is attempted during the time-

frame where these internal registers are being

incremented. The user can minimize the likeli-

hood of data corruption by insuring that any writes

to the Time and Date registers occur before the

contents of the second register reach a value of

0x59H.

4.1

RTCC MEMORY MAP

The RTCC registers are contained in addresses

0x00h-0x1fh. 64 bytes of user-accessable SRAM are

located in the address range 0x20-0x5f. The SRAM

memory is a separate block from the RTCC control

and Configuration registers. All SRAM locations are

battery-backed-up during a VCC power fail. Unused

locations are not accessible, MCP7940X will noACK

after the address byte if the address is out of range.

The shaded areas are not implemented and read as

‘0’. No error checking is provided when loading time

and date registers.

• Addresses 0x07h-0x09h are the device Configu-

ration, Calibration and ID Unlock registers.

• Addresses 0x0Ah-0x10h are the Alarm 0 regis-

ters. These are used to set up the Alarm 0, the

Interrupt polarity and the Alarm 0 compare.

• Addresses 0x11h-0x17h are the same as 0x0Bh-

0x11h but are used for Alarm 1.

• Addresses 0x18h-0x1Fh are used for the time-

stamp feature.

The Memory Map is shown in Table 4-1.

TABLE 4-1:

RTCC MEMORY MAP

Reset

State

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Function

Seconds

Range

00-59

00h

01h

02h

ST

10 Seconds

10 Minutes

Seconds

00h

Minutes

Hour

Minutes

Hours

00-59

10 Hour

AM/PM

10 Hour

VBAT

1-12 + AM/PM

00 - 23

12/24

03h

OSCON

VBATEN

Day

1-7

01h

04h

05h

06h

07h

08h

09h

10 Date

Date

Month

Year

Date

01-31

01-12

00-99

01h

80h

00h

LP

10 Month

Month

10 Year

Year

OUT

SQWE

ALM1

ALM0

EXTOSC RS2

RS1

RS0

Control Reg.

Calibration

Unlock ID

CALIBRATION

UNIQUE UNLOCK ID SEQUENCE

0Ah

0Bh

0Ch

10 Seconds

10 Minutes

Seconds

Minutes

Hours

00-59

00h

Minutes

Hour

00 - 59

10 Hour

AM/PM

10 Hours

ALM0C0

1-12 + AM/PM

00-23

12/24

0Dh

0Eh

0Fh

10h

ALM0POL

ALM0C2

ALM0C1

ALM0IF

Day

1-7

01h

10 Date

10 Month

Reserved – Do not use

Date

01-31

01-12

Month

Reserved

11h

12h

13h

10 Seconds

Seconds

Minutes

Hour

Seconds

Minutes

Hours

00-59

00h

10 Minutes

10 Hour

AM/PM

10 Hours

ALM1C0

1-12 + AM/PM

00-23

12/24

14h

15h

16h

17h

18h

19h

ALM1POL

ALM1C2

ALM1C1

ALM1IF

Day

1-7

01h

00h

10 Date

10 Month

Reserved – Do not use

10 Minutes

Date

01-31

01-12

Month

Reserved

Minutes

Hour

10 Hour

AM/PM

10 Hours

12/24

Day

1Ah

1Bh

10 Date

10 Month

Date

00h

Month

DS25009A-page 10

 2011 Microchip Technology Inc.

MCP7940X

TABLE 4-1:

RTCC MEMORY MAP (CONTINUED)

Reset

State

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Function

Range

1Ch

1Dh

10 Minutes

Minutes

00h

10 Hour

AM/PM

10 Hours

Hour

12/24

Day

1Eh

1Fh

10 Date

10 Month

Date

00h

Month

4.1.1

RTCC REGISTER ADDRESSES

• Bit 7 is the OUT bit. This sets the logic level on the

MFP when not using this as a square wave out-

put.

0x00h – Contains the BCD seconds and 10 seconds.

The range is 00 to 59. Bit 7 in this register is used to

start or stop the on-board crystal oscillator. Setting this

bit to a ‘1’ starts the oscillator and clearing this bit to a

‘0’ stops the on-board oscillator.

• Bit 6 is the SQWE bit. Setting this bit enables the

divided output from the crystal oscillator.

• Bits 5:4 determine which alarms are active.

- 00 – No Alarms are active

- 01 – Alarm 0 is active

0x01h – Contains the BCD minutes and 10 minutes.

The range is 00 to 59.

- 10 – Alarm 1 is active

0x02h – Contains the BCD hour in bits 3:0. Bits 5:4

contain either the 10 hour in BCD for 24-hour format or

the AM/PM indicator and the 10-hour bit for 12-hour

format. Bit 6 determines the hour format. Setting this

bit to ‘0’ enables 24-hour format, setting this bit to ‘1’

enables 12-hour format.

- 11 – Both Alarms are active

• Bit 3 is the EXTOSC enable bit. Setting this bit will

allow an external 32.768 kHz signal to drive the

RTCC registers eliminating the need for an

external crystal.

0x03h – Contains the BCD day. The range is 1-7.

Additional bits are also used for configuration and

status.

• Bit 2:0 sets the internal divider for the 32.768 kHz

oscillator to be driven to the MFP. The duty cycle is

50%. The output is responsive to the Calibration

register. The following frequencies are available:

• Bit 3 is the VBATEN bit. If this bit is set, the

internal circuitry is connected to the VBAT pin

when VCC fails. If this bit is ‘0’ then the VBAT pin is

disconnected and the only current drain on the

external battery is the VBAT pin leakage.

- 000 – 1 Hz

- 001 – 4.096 kHz

- 010 – 8.192 kHz

- 011 – 32.768 kHz

• Bit 4 is the VBAT bit. This bit is set by hardware

when the VCC fails and the VBAT is used to power

the Oscillator and the RTCC registers. This bit is

cleared by software. Clearing this bit will also

clear all the time-stamp registers.

- 1xx enables the Cal output function. Cal

output appears on MFP if SQWE is set (64

Hz Nominal).

Note:

The RTCC counters will continue to

increment during the calibration.

• Bit 5 is the OSCON bit. This is set and cleared by

hardware. If this bit is set, the oscillator is running,

if cleared, the oscillator is not running. This bit

does not indicate that the oscillator is running at

the correct frequency. The RTCC will wait 32

oscillator cycles before the bit is set. The RTCC

will wait roughly 32 clock cycles to clear this bit.

0x08h is the Calibration register. This is an 8-bit

register that is used to add or subtract clocks from the

RTCC counter every minute. The MSB is the sign bit

and indicates if the count should be added or

subtracted. The remaining 7 bits, with each bit adding

or subtracting 2 clocks, give the user the ability to add

or subtract up to 254 clocks per minute.

0x04h – Contains the BCD date and 10 date. The

range is 01-31.

0x09h is the unlock sequence address. To unlock write

access to the unique ID area in the EEPROM, a

sequence must be written to this address in separate

commands. The process is fully detailed in

Section 4.2.1 “Unlock Sequence”.

0x05h – Contains the BCD month. Bit 4 contains the

10 month. Bit 5 is the Leap Year bit, which is set during

a leap year and is read-only.

0x06h – Contains the BCD year and 10 year. The

Range is 00-99.

0x0Ah-0x0fh and 0x11-0x16h are the Alarm 0 and

Alarm 1 registers. The bits are the same as the RTCC

bits with the following differences:

0x07h – Is the Control register.

Locations 0x10h and 0x17h are reserved and should

not be used to allow for future device compatibility.

0x0Dh/0x14h has additional bits for alarm configu-

ration.

 2011 Microchip Technology Inc.

DS25009A-page 11

MCP7940X

• ALMxPOL: This bit specifies the level that the

MFP will drive when the alarm is triggered.

ALM2POL is a copy of ALM1POL. The default

state of the MFP when used for alarms is the

inverse of ALM1POL.

4.2

FEATURES

4.2.1

UNLOCK SEQUENCE

The unique ID location is user accessible by using the

unlock ID sequence.

• ALMxIF: This is the Alarm Interrupt Fag. This bit is

set in hardware if the alarm was triggered. The bit

is cleared in software.

The unique ID location is 64-bits (8 bytes) and is

stored in EEPROM locations 0xF0 to 0xF7. This

location can be read at any time, however, a write is

inhibited until unlocked.

• ALMxC2:0: These Configuration bits determine

the alarm match. The logic will trigger the alarm

based on one of the following match conditions:

To unlock the write access to this location the following

sequence must be completed:

000

001

010

–

Seconds match

Minutes match

• A single write of 0x55h to address 0x09. Stop

• A single write of 0xAAh to address 0x09. Stop

Hours match (takes into account 12/24

hour)

This will allow the unique EEPROM locations to be

written.

011

–

Matches the current day, interrupt at

12.00.00 a.m. Example: 12 midnight on

After the byte or page write to these locations, the

write sequence is initiated by the Stop condition. At

this time, the ID locations are locked and no further

writes are possible to this location unless a complete

unlock sequence is repeated.

100 – Date

101 – RESERVED

110 – RESERVED

111 – Seconds, Minutes, Hour, Day, Date,

Month

• The 12/24-hour bits 0xCh.6 and 0x13h.6 are cop-

ies of the bit in 0x02h.6. The bits are read-only.

0x18h-0x1Bh are used for the timesaver function.

These registers are loaded at the time when VCC fails

and the RTCC operates on the VBAT. The VBAT bit is

also set at this time. These registers are cleared when

the VBAT bit is cleared in software.

0x1Ch-0x1Fh are used for the timesaver function.

These registers are loaded at the time when VCC is

restored and the RTCC switches to VDD. These

registers are cleared when the VBAT bit is cleared in

software.

Note: It is strongly recommended that the

timesaver function only be used when the

oscillator is running. This will ensure

accurate functionality.

DS25009A-page 12

 2011 Microchip Technology Inc.

MCP7940X

4.2.2

CALIBRATION

RS2

RS1

RS0

Output Signal

The MCP7940X utilizes digital calibration to correct for

inaccuracies of the input clock source (either external

or crystal). Calibration is enabled by setting the value

of the Calibration register at address 08H. Calibration

is achieved by adding or subtracting a number of input

clock cycles per minute in order to achieve ppm level

adjustments in the internal timing function of the

MCP7940X.

0

1

0

1

0

1

32768

8

4

1

With regards to the calibration function, the Calibration

register setting has no impact upon the MFP output

clock signal when bits RS1 and RS0 are set to ‘11’.

The setting of the Calibration register to a non-zero

value (i.e., values other than 00H or 80H) enables the

calibration function which can be observed on the

MFP output pin. The calibration function can be

expressed in terms of the number of input clock cycles

added/subtracted from the internal timing function.

The MSB of the Calibration register is the sign bit, with

a ‘1’ indicating subtraction and a ‘0’ indicating addition.

The remaining seven bits in the register indicate the

number of input clock cycles (multiplied by two) that

are subtracted or added per minute to the internal

timing function.

The internal timing function can be monitored using

the MFP open-drain output pin by setting bit [6]

(SQWE) and bits [2:0] (RS2, RS1, RS0) of the control

register at address 07H. Note that the MFP output

waveform is disabled when the MCP7940X is running

in VBAT mode. With the SQWE bit set to ‘1’, there are

two methods that can be used to observe the internal

timing function of the MCP7940X:

With bits RS1 and RS0 set to ‘00’, the calibration

function can be expressed as:

T_output

where:

T_output

T_input

=

(32768 +/- (2 * CALREG)) T_input

=

clock period of MFP output signal

clock period of input signal

CALREG

decimal value of Calibration

register setting and the sign is

determined by the MSB of

Calibration register.

A. RS2 BIT SET TO ‘0’

With the RS2 bit set to ‘0’, the RS1 and RS0 bits

enable the following internal timing signals to be

output on the MFP pin:

Since the calibration is done once per minute (i.e.,

when the internal minute counter is incremented), only

one cycle in sixty of the MFP output waveform is

affected by the calibration setting. Also note that the

duty cycle of the MFP output waveform will not

necessarily be at 50% when the calibration setting is

applied.

RS2

RS1

RS0

Output Signal

0

1

0

1

0

1

1 Hz

4.096 kHz

8.192 kHz

32.768 kHz

With bits RS1 and RS0 set to ‘01’ or ‘10’, the

calibration function can not be expressed in terms of

the input clock period. In the case where the MSB of

the Calibration register is set to ‘0’, the waveform

appearing at the MFP output pin will be “delayed”,

once per minute, by twice the number of input clock

cycles defined in the Calibration register. The MFP

waveform will appear as:

The frequencies listed in the table presume an input

clock source of exactly 32.768 kHz. In terms of the

equivalent number of input clock cycles, the table

becomes:

FIGURE 4-1:

RS1 AND RS0 WITH AND WITHOUT CALIBRATION

Delay

 2011 Microchip Technology Inc.

DS25009A-page 13

MCP7940X

In the case where the MSB of the Calibration register

is set to ‘1’, the MFP output waveforms that appear

when bits RS1 and RS0 are set to ‘01’ or ‘10’ are not

as responsive to the setting of the Calibration register.

For example, when outputting the 4.096 kHz

waveform (RS1, RS0 set to ‘01’), the output waveform

is generated using only eight input clock cycles.

Consequently, attempting to subtract more than eight

input clock cycles from this output does not have a

meaningful effect on the resulting waveform. Any

effect on the output will appear as a modification in

both the frequency and duty cycle of the waveform

appearing on the MFP output pin.

4.2.3

MFP

Pin 7 is a multi-function pin and supports the following

functions:

• Use of the OUT bit in the Control register for

single bit I/O

• Alarm Outputs – Available in VBAT mode

• FOUT mode – driven from a FOSC divider – Not

available in VBAT mode

The internal control logic for the MFP is connected to

the switched internal supply bus, this allows operation

in VBAT mode. The Alarm Output is the only mode that

operates in VBAT mode, other modes are suspended.

B.RS2 BIT SET TO ‘1’

4.2.4

VBAT

With the RS2 bit set to ‘1’, the following internal timing

If the VBAT feature is not being used, the VBAT pin

should be connected to GND. A low-value series

resistor is recommended between the external battery

and the VBAT pin.

signal is output on the MFP pin:

RS2

RS1

RS0

Output Signal

1

x

64.0 Hz

The VBAT point is defined as 1.5V typical. When VDD

falls below 1.5V the system will continue to operate

the RTCC and SRAM using the VBAT supply. The

following conditions apply:

The frequency listed in the table presumes an input

clock source of exactly 32.768 kHz. In terms of the

equivalent number of input clock cycles, the table

becomes:

TABLE 4-2:

RS2

RS1

RS0

Output Signal

Supply

Read/Write Powered

Condition

Access

By

1

x

512

VCC < VTRIP, VCC < VBAT

VCC > VTRIP, VCC < VBAT

VCC > VTRIP, VCC > VBAT

No

Yes

VBAT

VCC

Unlike the method previously described, the

calibration setting is continuously applied and affects

every cycle of the output waveform. This results in the

modulation of the frequency of the output waveform

based upon the setting of the Calibration register.

4.2.5

CRYSTAL SPECS

Using this setting, the calibration function can be

expressed as:

The MCP7940X has been designed to operate with a

standard 32 kHz crystal. Devices with a specified load

capacitance of either 12pF or 6pF can be used. The

end user should fully validate the chosen crystal across

all the expected design parameters of the system to

ensure correct operation.

T_output

where:

T_output

T_input

=

(2 * (256 +/- (2 * CALREG))) T_input

=

clock period of MFP output signal

clock period of input signal

The following crystals have been tested and shown to

work with the MCP7940X:

CALREG

decimal value of the Calibration

register setting, and the sign is

determined by the MSB of the

Calibration register.

• CM200S 12pF surface mount crystals from

Citizen

• ECS-.327 12pF surface mount crystals from ECS

INC

• CFS206 12pF leaded crystals from Citizen

Since the calibration is done every cycle, the frequency

of the output MFP waveform is constant.

This is not a definitive list and all crystals should be

tested in the target application across all temperature,

voltage and other significant environmental conditions.

DS25009A-page 14

 2011 Microchip Technology Inc.

MCP7940X

4.2.6

POWER-FAIL TIME-STAMP

The MCP7940X family of RTCC devices feature a

power-fail time-stamp feature. This feature will save

the time at which VCC crosses the VTRIP voltage. To

use this feature, a VBAT supply must be present and

the oscillator must also be running.

There are two separate sets of registers that are used

to record this information:

• The first set located at 0x18h through 0x1Bh are

loaded at the time when VCC fails and the RTCC

operates on the VBAT. The VBAT (register 0x03h

bit 4) bit is also set at this time.

• The second set of registers, located at 0x1Ch

through 0x1Fh, are loaded at the time when VCC

is restored and the RTCC switches to VCC.

The power-fail time-stamp registers are cleared when

the VBAT bit is cleared in software.

 2011 Microchip Technology Inc.

DS25009A-page 15

MCP7940X

removed, provided the VBAT supply is present and

enabled. The Unique ID is nonvolatile memory and

does not require the VBAT supply for retention.

5.0

ON BOARD MEMORY

The MCP7940X has both on-board Unique ID memory

and battery-backed SRAM. The SRAM is arranged as

64 x 8 bytes and is retained when the VCC supply is

5.1

SRAM

FIGURE 5-1:

SRAM/RTCC BYTE WRITE

S

BUS ACTIVITY

T

S

CONTROL

BYTE

ADDRESS

BYTE

MASTER

A

R

T

DATA

O

P

SDA LINE

S 1 1 0 1 1

0

x

1 1

P

A

C

K

A

C

K

A

C

K

BUS ACTIVITY

FIGURE 5-2:

SRAM/RTCC MULTIPLE BYTE WRITE

S

T

A

R

T

S

T

O

P

CONTROL

BYTE

ADDRESS

BYTE

BUS ACTIVITY

MASTER

DATA BYTE 0

DATA BYTE N

SDA LINE

x

P

1 1 1

S 1 1 0 1

0

A

C

K

A

C

K

A

C

K

A

C

K

BUS ACTIVITY

The 64 bytes of user SRAM are at location 0x20h and

can be accessed during an RTCC update. Upon POR

the SRAM will be in an undefined state.

Note: Entering an address past 5F for an SRAM

operation will result in the MCP7940X not

acknowledging the address.

Writing to the SRAM and RTCC is accomplished in a

similar way to writing to the EEPROM (as described

later in this document) with the following consider-

ations:

• There is no page. The entire 64 bytes of SRAM or

32 bytes of RTCC register can be written in one

command.

• The SRAM allows an unlimited number of read/

write cycles with no cell wear out.

• The RTCC and SRAM are not accessible when

the device is running on the external VBAT.

• The RTCC and SRAM are separate blocks. The

SRAM array may be accessed during an RTCC

update.

• Read and write access is limited to either the

RTCC register block or the SRAM array. The

Address Pointer will rollover to the start of the

addressed block.

• Data written to the RTCC and SRAM are on a per

byte basis.

DS25009A-page 16

 2011 Microchip Technology Inc.

MCP7940X

5.2

ID

ID BYTE WRITE

5.2.1

Following the Start condition from the master, the

control code and the R/W bit (which is a logic low) are

clocked onto the bus by the master transmitter. This

indicates to the addressed slave receiver that a byte

with a word address will follow after it has generated an

Acknowledge bit during the ninth clock cycle.

Therefore, the next byte transmitted by the master is

the word address and will be written into the Address

Pointer of the MCP7940X. After receiving another

Acknowledge signal from the MCP7940X, the master

device transmits the data word to be written into the

addressed memory location. The MCP7940X

acknowledges again and the master generates a Stop

condition. This initiates the internal write cycle, and,

during this time, the MCP7940X does not generate

Acknowledge signals for Unique ID Write commands. If

an attempt is made to write to an address and the

protection is set then the device will acknowledge the

command but no write cycle will occur, no data will be

written, and the device will immediately accept a new

command. After a Byte Write command, the internal

address counter will point to the address location

following the one that was just written.

Note:

Addressing undefined ID locations will

result in the MCP7940X not acknowledg-

ing the address.

 2011 Microchip Technology Inc.

DS25009A-page 17

MCP7940X

FIGURE 5-3:

ID BYTE WRITE

S

T

A

R

T

BUS ACTIVITY

MASTER

S

T

O

P

CONTROL

BYTE

ADDRESS

BYTE

DATA

SDA LINE

S 1 0 1 0 1 1 1 0

1

1 1 1

0

• • •

P

A

C

K

A

C

K

A

C

K

BUS ACTIVITY

the control byte again but with the R/W bit set to a one.

The MCP7940X will then issue an Acknowledge and

transmit the 8-bit data word. The master will not

acknowledge the transfer but it does generate a Stop

condition which causes the MCP7940X to discontinue

5.2.2

READ OPERATION

Read operations are initiated in the same way as write

operations with the exception that the R/W bit of the

control byte is set to one. There are three basic types

of read operations: current address read, random read,

and sequential read. The SRAM array can be read in

the same way as the ID using the control byte for the

SRAM ‘1101111’ with a valid address.

transmission (Figure 5-6). After

a random read

command, the internal address counter will point to the

address location following the one that was just read.

5.2.2.3

Sequential Read

5.2.2.1

Current Address Read

Sequential reads are initiated in the same way as a

random read except that after the MCP7940X transmits

the first data byte, the master issues an Acknowledge

as opposed to the Stop condition used in a random

read. This Acknowledge directs the MCP7940X to

transmit the next sequentially addressed 8-bit word

(Figure 5-7). Following the final byte transmitted to the

master, the master will NOT generate an Acknowledge

but will generate a Stop condition. To provide

sequential reads, the MCP7940X contains an internal

Address Pointer which is incremented by one at the

completion of each operation. This Address Pointer

allows the entire memory contents to be serially read

during one operation. The internal Address Pointer will

automatically roll over to the start of the Block.

The MCP7940X contains an address counter that

maintains the address of the last word accessed,

internally incremented by one. Therefore, if the

previous read access was to address n (n is any legal

address), the next current address read operation

would access data from address n + 1.

Upon receipt of the control byte with R/W bit set to one,

the MCP7940X issues an Acknowledge and transmits

the 8-bit data word. The master will not acknowledge

the transfer but does generate a Stop condition and the

MCP7940X discontinues transmission (Figure 5-5).

FIGURE 5-4:

CURRENT ADDRESS

READ (ID SHOWN)

S

T

A

R

T

S

T

O

P

BUS ACTIVITY

MASTER

CONTROL

BYTE

DATA

BYTE

SDA LINE

1 1 0

1 1

•

S 1 0 1 0

1

• •

P

1 1 1

A

C

K

N

O

BUS ACTIVITY

A

C

K

5.2.2.2

Random Read

Random read operations allow the master to access

any memory location in a random manner. To perform

this type of read operation, first the word address must

be set. This is done by sending the word address to the

MCP7940X as part of a write operation (R/W bit set to

‘0’). After the word address is sent, the master

generates a Start condition following the Acknowledge.

This terminates the write operation, but not before the

internal Address Pointer is set. Then, the master issues

DS25009A-page 18

 2011 Microchip Technology Inc.

MCP7940X

FIGURE 5-5:

RANDOM READ (UNIQUE ID SHOWN)

S

T

A

R

T

S

T

A

R

T

BUS ACTIVITY

MASTER

S

CONTROL

BYTE

ADDRESS

BYTE

CONTROL

BYTE

DATA

T

BYTE

O

P

SDA LINE

S 1 0 1 0

0

1 1 1

S 1 0 1 0

1

P

A

C

K

A

C

K

N

O

A

C

K

A

C

K

BUS ACTIVITY

FIGURE 5-6:

SEQUENTIAL READ (UNIQUE ID SHOWN)

S

T

O

P

CONTROL

BYTE

BUS ACTIVITY

MASTER

DATA n

DATA n + 1

DATA n + 2

DATA n + X

P

SDA LINE

A

C

K

A

C

K

A

C

K

A

C

K

N

O

A

C

K

BUS ACTIVITY

5.3

Unique ID

The MCP7940X features an additional 64-bit unique ID

area.

The unique ID is located at addresses 0xF0 through

0xF7. Reading the unique ID requires the user to

simply address these bytes.

The unique ID area is protected to prevent unintended

writes to these locations. The unlock sequence is

detailed in 4.2.1 “Unlock Sequence”.

The unique ID can be factory programmed on some

devices to provide a unique IEEE EUI-48 or EUI-64

value. In addition, customer-provided codes can also

be programmed.

 2011 Microchip Technology Inc.

DS25009A-page 19

MCP7940X

6.0

6.1

PACKAGING INFORMATION

Package Marking Information

8-Lead SOIC (3.90 mm)

Example:

79400I

XXXXXT

e

3

XXYYWW

SN

1109

13F

NNN

Example:

8-Lead TSSOP

9400

I109

13F

XXXX

TYWW

NNN

Example:

8-Lead MSOP

XXXXX

79401I

YWWNNN

10913F

8-Lead 2x3 TDFN

Example:

XXX

YWW

NN

AAS

109

13

1st Line Marking Codes

Part Number

TSSOP

9400

MSOP

TDFN

AAS

MCP79400

MCP79401

MCP79402

Note:

79400T

79401T

79402T

9401

9402

AAT

AAU

T = Temperature grade

NN = Alphanumeric traceability code

Legend: XX...X Customer-specific information

Y

Year code (last digit of calendar year)

YY

WW

NNN

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

e

3

Pb-free JEDEC designator for Matte Tin (Sn)

*

This package is Pb-free. The Pb-free JEDEC designator (

can be found on the outer packaging for this package.

)

e3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS25009A-page 20

 2011 Microchip Technology Inc.

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2011 Microchip Technology Inc.

DS25009A-page 21

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS25009A-page 22

 2011 Microchip Technology Inc.

MCP7940X

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DS25009A-page 23

MCP7940X

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G3ꢆꢂꢊꢍꢍꢃKꢆꢌꢋꢅꢄ

ꢎꢁꢍ%ꢆ%ꢃ(ꢊꢇ$ꢊꢋꢆꢃꢗꢅꢌꢇ$ꢈꢆ""

ꢏꢄꢊꢈ%ꢁ))ꢃ

ꢕ

ꢛ

ꢔꢐꢚꢔ

ꢔꢐꢔ;

ꢛ

1ꢐꢔꢔ

ꢛ

1ꢐꢒꢔ

1ꢐꢔ;

ꢔꢐ1;

ꢕꢒ

ꢕ1

8

G3ꢆꢂꢊꢍꢍꢃNꢌ%ꢄꢅ

Jꢐꢖꢔꢃ>ꢏ?

ꢎꢁꢍ%ꢆ%ꢃ(ꢊꢇ$ꢊꢋꢆꢃNꢌ%ꢄꢅ

ꢎꢁꢍ%ꢆ%ꢃ(ꢊꢇ$ꢊꢋꢆꢃAꢆꢈꢋꢄꢅ

ꢀꢁꢁꢄꢃAꢆꢈꢋꢄꢅ

81

ꢓ

A

ꢖꢐ<ꢔ

ꢒꢐꢜꢔ

ꢔꢐꢖ;

ꢖꢐꢖꢔ

<ꢐꢔꢔ

ꢔꢐJꢔ

ꢖꢐ;ꢔ

<ꢐ1ꢔ

ꢔꢐꢝ;

ꢀꢁꢁꢄꢉꢂꢌꢈꢄ

ꢀꢁꢁꢄꢃꢕꢈꢋꢍꢆ

Aꢆꢊ%ꢃꢗꢅꢌꢇ$ꢈꢆ""

Aꢆꢊ%ꢃNꢌ%ꢄꢅ

A1

ꢀ

1ꢐꢔꢔꢃꢘ8ꢀ

ꢔꢞ

ꢔꢐꢔꢜ

ꢔꢐ1ꢜ

ꢛ

ꢚꢞ

ꢇ

7

ꢔꢐꢒꢔ

ꢔꢐ<ꢔ

ꢓꢗꢊꢃꢉꢤ

1ꢐ (ꢌꢈꢃ1ꢃ3ꢌ"#ꢊꢍꢃꢌꢈ%ꢆ6ꢃ)ꢆꢊꢄ#ꢂꢆꢃ!ꢊꢑꢃ3ꢊꢂꢑ'ꢃ7#ꢄꢃ!#"ꢄꢃ7ꢆꢃꢍꢁꢇꢊꢄꢆ%ꢃ&ꢌꢄꢅꢌꢈꢃꢄꢅꢆꢃꢅꢊꢄꢇꢅꢆ%ꢃꢊꢂꢆꢊꢐ

ꢒꢐ ꢓꢌ!ꢆꢈ"ꢌꢁꢈ"ꢃꢓꢃꢊꢈ%ꢃ81ꢃ%ꢁꢃꢈꢁꢄꢃꢌꢈꢇꢍ#%ꢆꢃ!ꢁꢍ%ꢃ)ꢍꢊ"ꢅꢃꢁꢂꢃꢉꢂꢁꢄꢂ#"ꢌꢁꢈ"ꢐꢃꢎꢁꢍ%ꢃ)ꢍꢊ"ꢅꢃꢁꢂꢃꢉꢂꢁꢄꢂ#"ꢌꢁꢈ"ꢃ"ꢅꢊꢍꢍꢃꢈꢁꢄꢃꢆ6ꢇꢆꢆ%ꢃꢔꢐ1;ꢃ!!ꢃꢉꢆꢂꢃ"ꢌ%ꢆꢐ

<ꢐ ꢓꢌ!ꢆꢈ"ꢌꢁꢈꢌꢈꢋꢃꢊꢈ%ꢃꢄꢁꢍꢆꢂꢊꢈꢇꢌꢈꢋꢃꢉꢆꢂꢃꢕꢏꢎ8ꢃ=1ꢖꢐ;ꢎꢐ

>ꢏ?* >ꢊ"ꢌꢇꢃꢓꢌ!ꢆꢈ"ꢌꢁꢈꢐꢃꢗꢅꢆꢁꢂꢆꢄꢌꢇꢊꢍꢍꢑꢃꢆ6ꢊꢇꢄꢃ3ꢊꢍ#ꢆꢃ"ꢅꢁ&ꢈꢃ&ꢌꢄꢅꢁ#ꢄꢃꢄꢁꢍꢆꢂꢊꢈꢇꢆ"ꢐ

ꢘ8ꢀ* ꢘꢆ)ꢆꢂꢆꢈꢇꢆꢃꢓꢌ!ꢆꢈ"ꢌꢁꢈ'ꢃ#"#ꢊꢍꢍꢑꢃ&ꢌꢄꢅꢁ#ꢄꢃꢄꢁꢍꢆꢂꢊꢈꢇꢆ'ꢃ)ꢁꢂꢃꢌꢈ)ꢁꢂ!ꢊꢄꢌꢁꢈꢃꢉ#ꢂꢉꢁ"ꢆ"ꢃꢁꢈꢍꢑꢐ

ꢎꢌꢇꢂꢁꢇꢅꢌꢉ ꢗꢆꢇꢅꢈꢁꢍꢁꢋꢑ ꢓꢂꢊ&ꢌꢈꢋ ?ꢔꢖꢟꢔꢚJ>

DS25009A-page 24

 2011 Microchip Technology Inc.

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2011 Microchip Technology Inc.

DS25009A-page 25

MCP7940X

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢩꢋꢌꢖꢗꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢇꢄꢌꢧꢄꢪꢃꢆꢒꢩꢍꢔꢆꢠꢩꢍꢏꢇꢣ

ꢓꢗꢊꢃꢤ ꢀꢁꢂꢃꢄꢅꢆꢃ!ꢁ"ꢄꢃꢇ#ꢂꢂꢆꢈꢄꢃꢉꢊꢇ$ꢊꢋꢆꢃ%ꢂꢊ&ꢌꢈꢋ"'ꢃꢉꢍꢆꢊ"ꢆꢃ"ꢆꢆꢃꢄꢅꢆꢃꢎꢌꢇꢂꢁꢇꢅꢌꢉꢃ(ꢊꢇ$ꢊꢋꢌꢈꢋꢃꢏꢉꢆꢇꢌ)ꢌꢇꢊꢄꢌꢁꢈꢃꢍꢁꢇꢊꢄꢆ%ꢃꢊꢄꢃ

ꢅꢄꢄꢉ*++&&&ꢐ!ꢌꢇꢂꢁꢇꢅꢌꢉꢐꢇꢁ!+ꢉꢊꢇ$ꢊꢋꢌꢈꢋ

D

N

E

E1

NOTE 1

2

b

1

e

c

φ

A2

A

L

L1

A1

@ꢈꢌꢄ"

ꢎꢙAAꢙꢎ8ꢗ8ꢘꢏ

ꢓꢌ!ꢆꢈ"ꢌꢁꢈꢃAꢌ!ꢌꢄ"

ꢎꢙE

EGꢎ

ꢎꢕH

E#!7ꢆꢂꢃꢁ)ꢃ(ꢌꢈ"

(ꢌꢄꢇꢅ

E

ꢆ

ꢚ

ꢔꢐJ;ꢃ>ꢏ?

G3ꢆꢂꢊꢍꢍꢃKꢆꢌꢋꢅꢄ

ꢎꢁꢍ%ꢆ%ꢃ(ꢊꢇ$ꢊꢋꢆꢃꢗꢅꢌꢇ$ꢈꢆ""

ꢏꢄꢊꢈ%ꢁ))ꢃ

G3ꢆꢂꢊꢍꢍꢃNꢌ%ꢄꢅ

ꢎꢁꢍ%ꢆ%ꢃ(ꢊꢇ$ꢊꢋꢆꢃNꢌ%ꢄꢅ

G3ꢆꢂꢊꢍꢍꢃAꢆꢈꢋꢄꢅ

ꢀꢁꢁꢄꢃAꢆꢈꢋꢄꢅ

ꢕ

ꢛ

ꢔꢐꢝ;

ꢔꢐꢔꢔ

ꢛ

ꢔꢐꢚ;

1ꢐ1ꢔ

ꢔꢐꢜ;

ꢔꢐ1;

ꢕꢒ

ꢕ1

8

81

ꢓ

ꢛ

ꢖꢐꢜꢔꢃ>ꢏ?

<ꢐꢔꢔꢃ>ꢏ?

ꢔꢐJꢔ

A

ꢔꢐꢖꢔ

ꢔꢐꢚꢔ

ꢀꢁꢁꢄꢉꢂꢌꢈꢄ

ꢀꢁꢁꢄꢃꢕꢈꢋꢍꢆ

A1

ꢀ

ꢔꢐꢜ;ꢃꢘ8ꢀ

ꢛ

ꢔꢞ

ꢚꢞ

Aꢆꢊ%ꢃꢗꢅꢌꢇ$ꢈꢆ""

Aꢆꢊ%ꢃNꢌ%ꢄꢅ

ꢇ

7

ꢔꢐꢔꢚ

ꢔꢐꢒꢒ

ꢛ

ꢔꢐꢒ<

ꢔꢐꢖꢔ

ꢓꢗꢊꢃꢉꢤ

1ꢐ (ꢌꢈꢃ1ꢃ3ꢌ"#ꢊꢍꢃꢌꢈ%ꢆ6ꢃ)ꢆꢊꢄ#ꢂꢆꢃ!ꢊꢑꢃ3ꢊꢂꢑ'ꢃ7#ꢄꢃ!#"ꢄꢃ7ꢆꢃꢍꢁꢇꢊꢄꢆ%ꢃ&ꢌꢄꢅꢌꢈꢃꢄꢅꢆꢃꢅꢊꢄꢇꢅꢆ%ꢃꢊꢂꢆꢊꢐ

ꢒꢐ ꢓꢌ!ꢆꢈ"ꢌꢁꢈ"ꢃꢓꢃꢊꢈ%ꢃ81ꢃ%ꢁꢃꢈꢁꢄꢃꢌꢈꢇꢍ#%ꢆꢃ!ꢁꢍ%ꢃ)ꢍꢊ"ꢅꢃꢁꢂꢃꢉꢂꢁꢄꢂ#"ꢌꢁꢈ"ꢐꢃꢎꢁꢍ%ꢃ)ꢍꢊ"ꢅꢃꢁꢂꢃꢉꢂꢁꢄꢂ#"ꢌꢁꢈ"ꢃ"ꢅꢊꢍꢍꢃꢈꢁꢄꢃꢆ6ꢇꢆꢆ%ꢃꢔꢐ1;ꢃ!!ꢃꢉꢆꢂꢃ"ꢌ%ꢆꢐ

<ꢐ ꢓꢌ!ꢆꢈ"ꢌꢁꢈꢌꢈꢋꢃꢊꢈ%ꢃꢄꢁꢍꢆꢂꢊꢈꢇꢌꢈꢋꢃꢉꢆꢂꢃꢕꢏꢎ8ꢃ=1ꢖꢐ;ꢎꢐ

>ꢏ?* >ꢊ"ꢌꢇꢃꢓꢌ!ꢆꢈ"ꢌꢁꢈꢐꢃꢗꢅꢆꢁꢂꢆꢄꢌꢇꢊꢍꢍꢑꢃꢆ6ꢊꢇꢄꢃ3ꢊꢍ#ꢆꢃ"ꢅꢁ&ꢈꢃ&ꢌꢄꢅꢁ#ꢄꢃꢄꢁꢍꢆꢂꢊꢈꢇꢆ"ꢐ

ꢘ8ꢀ* ꢘꢆ)ꢆꢂꢆꢈꢇꢆꢃꢓꢌ!ꢆꢈ"ꢌꢁꢈ'ꢃ#"#ꢊꢍꢍꢑꢃ&ꢌꢄꢅꢁ#ꢄꢃꢄꢁꢍꢆꢂꢊꢈꢇꢆ'ꢃ)ꢁꢂꢃꢌꢈ)ꢁꢂ!ꢊꢄꢌꢁꢈꢃꢉ#ꢂꢉꢁ"ꢆ"ꢃꢁꢈꢍꢑꢐ

ꢎꢌꢇꢂꢁꢇꢅꢌꢉ ꢗꢆꢇꢅꢈꢁꢍꢁꢋꢑ ꢓꢂꢊ&ꢌꢈꢋ ?ꢔꢖꢟ111>

DS25009A-page 26

 2011 Microchip Technology Inc.

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2011 Microchip Technology Inc.

DS25009A-page 27

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS25009A-page 28

 2011 Microchip Technology Inc.

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2011 Microchip Technology Inc.

DS25009A-page 29

MCP7940X

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢫꢐꢄꢈꢆꢬꢈꢄꢊꢙꢆꢓꢗꢆꢂꢃꢄꢅꢆꢇꢄꢌꢧꢄꢪꢃꢆꢒꢩꢓꢔꢆꢕꢆꢭꢮꢚꢮꢝꢛꢯꢰꢆꢎꢎꢆꢞꢗꢅꢟꢆꢠꢥꢫꢬꢓꢣ

ꢓꢗꢊꢃꢤ ꢀꢁꢂꢃꢄꢅꢆꢃ!ꢁ"ꢄꢃꢇ#ꢂꢂꢆꢈꢄꢃꢉꢊꢇ$ꢊꢋꢆꢃ%ꢂꢊ&ꢌꢈꢋ"'ꢃꢉꢍꢆꢊ"ꢆꢃ"ꢆꢆꢃꢄꢅꢆꢃꢎꢌꢇꢂꢁꢇꢅꢌꢉꢃ(ꢊꢇ$ꢊꢋꢌꢈꢋꢃꢏꢉꢆꢇꢌ)ꢌꢇꢊꢄꢌꢁꢈꢃꢍꢁꢇꢊꢄꢆ%ꢃꢊꢄꢃ

ꢅꢄꢄꢉ*++&&&ꢐ!ꢌꢇꢂꢁꢇꢅꢌꢉꢐꢇꢁ!+ꢉꢊꢇ$ꢊꢋꢌꢈꢋ

DS25009A-page 30

 2011 Microchip Technology Inc.

MCP7940X

APPENDIX A: REVISION HISTORY

Revision A (04/2011)

Original release of this document.

 2011 Microchip Technology Inc.

DS25009A-page 31

MCP7940X

NOTES:

DS25009A-page 32

 2011 Microchip Technology Inc.

MCP79400/MCP79401/MCP79402

THE MICROCHIP WEB SITE

CUSTOMER SUPPORT

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

• Development Systems Information Line

Customers

should

contact

their

distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

• General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

Technical support is available through the web site

at: http://microchip.com/support

• Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com. Under “Support”, click on

“Customer Change Notification” and follow the

registration instructions.

 2011 Microchip Technology Inc.

DS25009A-page 33

MCP79400/MCP79401/MCP79402

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip

product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our

documentation can better serve you, please FAX your comments to the Technical Publications Manager at

(480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

TO:

RE:

Technical Publications Manager

Reader Response

Total Pages Sent ________

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Literature Number: DS25009A

Application (optional):

Would you like a reply?

Y

N

Device: MCP7940X

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS25009A-page 34

 2011 Microchip Technology Inc.

MCP7940X

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Not every possible ordering

combination is listed below.

X

/XX

PART NO.

Device

Examples:

a) MCP79400-I/SN: Industrial Temperature,

SOIC package.

Temperature Package

Range

b) MCP79400T-I/SN: Industrial Tempera-

ture, SOIC package, Tape and Reel.

2

Device:

MCP79400

=

1.8V - 5.5V I C™ Serial RTCC

2

MCP79400T= 1.8V - 5.5V I C Serial RTCC

c) MCP79400T-I/MNY: Industrial Tempera-

ture, TDFN package.

(Tape and Ree)

2

TM

MCP79401

=

1.8V - 5.5V I C Serial RTCC, EUI-48

d) MCP79401-I/SN: Industrial Temperature,

2

TM

MCP79401T= 1.8V - 5.5V I C Serial RTCC, EUI-48

SOIC package, EUI-48

.

(Tape and Reel)

e) MCP79401-I/MS: Industrial Temperature

2

TM

MCP79402

=

1.8V - 5.5V I C Serial RTCC, EUI-64

TM

MSOP package, EUI-48

.

2

MCP79402T= 1.8V - 5.5V I C Serial RTCC, EUI-64

(Tape and Reel)

f)

MCP79402-I/SN: Industrial Temperature,

TM

SOIC package, EUI-64

.

g)

h)

MCP79402-I/ST: Industrial Temperature,

TM

Temperature

Range:

I

=

-40°C to +85°C

TSSOP package, EUI-64

.

MCP79402-I/ST: Industrial Temperature,

TM

TSSOP package, Tape and Reel, EUI-64

.

Package:

SN

ST

=

8-Lead Plastic Small Outline (3.90 mm body)

8-Lead Plastic Thin Shrink Small Outline

(4.4 mm)

MS

MNY

=

8-Lead Plastic Micro Small Outline

8-Lead Plastic Dual Flat, No Lead

(1)

Note 1: ’Y’ indicates a Nickel Palladium Gold (NiPdAu) finish.

 2011 Microchip Technology Inc.

DS25009A-page 35

MCP7940X

NOTES:

DS25009A-page 36

 2011 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,

32

PIC logo, rfPIC and UNI/O are registered trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard,

dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,

ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial

Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified

logo, MPLIB, MPLINK, mTouch, Omniscient Code

Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,

PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,

TSHARC, UniWinDriver, WiperLock and ZENA are

trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

ISBN: 978-1-61341-087-5

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC^®MCUs and dsPIC^®DSCs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

 2011 Microchip Technology Inc.

DS25009A-page 37

Worldwide Sales and Service

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://www.microchip.com/

support

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4123

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

Web Address:

www.microchip.com

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

China - Beijing

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

Boston

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Korea - Seoul

China - Chongqing

Tel: 86-23-8980-9588

Fax: 86-23-8980-9500

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Cleveland

Independence, OH

Tel: 216-447-0464

Fax: 216-447-0643

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Detroit

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Taiwan - Hsin Chu

Tel: 886-3-6578-300

Fax: 886-3-6578-370

Indianapolis

Noblesville, IN

Tel: 317-773-8323

Fax: 317-773-5453

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Taiwan - Kaohsiung

Tel: 886-7-213-7830

Fax: 886-7-330-9305

Los Angeles

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

Santa Clara

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

China - Xiamen

Tel: 86-592-2388138

Fax: 86-592-2388130

Toronto

Mississauga, Ontario,

Canada

China - Zhuhai

Tel: 905-673-0699

Fax: 905-673-6509

Tel: 86-756-3210040

Fax: 86-756-3210049

02/18/11

DS25009A-page 38

 2011 Microchip Technology Inc.


型号：	MCP79400
厂家：	MICROCHIP
描述：	I2C? Real-Time Clock/Calendar with SRAM, Unique ID and Battery Switchover I2C ？实时时钟/日历与SRAM ，唯一ID和电池切换电池静态存储器时钟
文件：	总38页 (文件大小：564K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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