MIC2103YML-TR [MICROCHIP]
75V Synchronous Buck Controllers Featuring Adaptive ON-Time Control;
| 型号： | MIC2103YML-TR |
| 厂家： | 
MICROCHIP |
| 描述： | 75V Synchronous Buck Controllers Featuring Adaptive ON-Time Control |
| 文件： | 总42页 (文件大小：1398K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MIC2103/4
75V Synchronous Buck Controllers
Featuring Adaptive ON-Time Control
Features
General Description
• Hyper Speed Control® Architecture Enables:
The MIC2103/4 are constant-frequency, synchronous
buck controllers that feature a unique adaptive ON-time
control architecture. The MIC2103/4 operates over an
input supply range from 4.5V to 75V and can be used
to supply up to 15A of output current. The output
voltage is adjustable down to 0.8V with a guaranteed
accuracy of ±1%. The device operates with
programmable switching frequency from 200 kHz to
600 kHz.
The HyperLight Load® architecture provides the same
high-efficiency and ultra-fast transient response as the
Hyper Speed Control architecture under medium to
heavy loads, but also maintains high efficiency under
light load conditions by transitioning to variable
frequency, discontinuous-mode operation.
- High Delta V Operation
(VIN = 75V and VOUT = 1.2V)
- Any Capacitor™ Stable
• 4.5V to 75V Input Voltage
• Adjustable Output Voltage from 0.8V to 24V (Also
Limited by Duty Cycle)
• 200 kHz to 600 kHz Programmable Switching
Frequency
• HyperLight Load® Control (MIC2103 Only)
• Hyper Speed Control® (MIC2104 Only)
• Enable Input, Power-Good Output
• Built-In 5V Regulator for Single-Supply Operation
• Programmable Current-Limit and Fold-Back
“Hiccup” Mode Short-Circuit Protection
The MIC2103/4 offers a full suite of protection features
to ensure protection of the IC during fault conditions.
These include undervoltage lockout to ensure proper
operation under power-sag conditions, internal
soft-start to reduce inrush current, fold-back
current-limit, “hiccup” mode short-circuit protection,
and thermal shutdown.
• 5 ms Internal Soft-Start, Internal Compensation,
and Thermal Shutdown
• Supports Safe Start-Up into a Pre-Biased Output
• –40°C to +125°C Junction Temperature Range
• Available in 16-Pin 3 mm x 3 mm QFN Package
Applications
• Distributed Power Systems
Package Type
• Networking/Telecom Infrastructure
• Printers, Scanners, Graphic Cards, and Video
Cards
13
16
15
14
1
2
3
4
12
11
10
9
AGND
NC
VDD
PVDD
ILIM
EP
BST
NC
DL
6
5
7
8
Please see pin descriptions in Table 3-1.
2017 Microchip Technology Inc.
DS20005899A-page 1
MIC2103/4
Typical Application Circuit
MIC2103/4
3x3 QFN
VIN
6.0V to 75V
100μF
2.2μF
x3
FREQ
VIN
MIC2103/04
BST
DH
PVDD
VDD
AGND
EN
0.1μF
6.1μH
1μF
V
OUT
5V/10A
SW
95.3k
2.2nF
EN
PG
10k
DL
0.1μF
PG
FB
PGND
ILIM
1.91k
2.21k
Functional Block Diagram
MIC2103/4
D1
PVDD
MIC2103/04
V
IN
1μF
6.0V to 75V
VDD
VIN
LDO
2.2μF
x2
R19
R20
100μF
1μF
FIXED TON
ESTIMATE
FREQ
BST
VDD
MODIFIED
TOFF
VIN
UVLO
DH
Q1
Q3
0.1μF
2.21k
HSD
V
OUT
6.1μH
100k
5.0V/10A
SW
CONTROL
LOGIC
PVDD
EN
EN
4.7nF
TIMER
R1
10k
95.3k
0.1μF
DL
SOFT-START
LSD
PGND
ZC
*
SOFT
START
DETECTION
R2
1.91k
SHORT
ILIM
FB
THERMAL
SHUTDOWN
DETECTION
COMPENSATION
gm EA
COMP
VDD
49.9k
VREF
0.8V
8%
92%
PG
PG
AGND
ZC DETECTION* -- MIC2103 ONLY
DS20005899A-page 2
2017 Microchip Technology Inc.
MIC2103/4
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
VIN.............................................................................................................................................................. –0.3V to +76V
V
V
DD, VPVDD .................................................................................................................................................. –0.3V to +6V
FREQ, VILIM, VEN ............................................................................................................................–0.3V to (VIN + 0.3V)
VSW (DC) .........................................................................................................................................–0.3V to (VIN + 0.3V)
VSW (Transient <100 ns)..........................................................................................................................................–5.0V
VBST to VSW ................................................................................................................................................. –0.3V to +6V
VBST ........................................................................................................................................................... –0.3V to +82V
VPG................................................................................................................................................. –0.3V to (VDD + 0.3V)
VFB ................................................................................................................................................. –0.3V to (VDD + 0.3V)
PGND to AGND ........................................................................................................................................ –0.3V to +0.3V
ESD Rating .............................................................................................................................................................Note 1
Operating Ratings ‡
Supply Voltage (VIN) .................................................................................................................................. +4.5V to +75V
Enable Input (VEN)..............................................................................................................................................0V to VIN
VSW, VFREQ, VILIM...............................................................................................................................................0V to VIN
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
‡ Notice: The device is not guaranteed to function outside its operating ratings.
Note 1: Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5 kΩ in series
with 100 pF.
2017 Microchip Technology Inc.
DS20005899A-page 3
MIC2103/4
TABLE 1-1:
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: VIN = 48V, VOUT = 5V, VBST – VSW = 5V; TA = +25°C, unless noted. Bold values indicate
–40°C ≤ TJ ≤ +125°C. Note 1
Parameter
Symbol
Min.
Typ.
Max.
Units Conditions
Power Supply Input
Input Voltage Range
VIN
IQ
4.5
—
—
—
—
400
2.1
0.1
75
750
3
V
Note 2
µA
mA
µA
MIC2103, VFB = 1.5V
MIC2104, VFB = 1.5V
SW unconnected, VEN = 0V
Quiescent Supply Current
Shutdown Supply Current
ISHDN
10
V
V
V
V
DD Supply
DD Output Voltage
DD UVLO Upper Threshold
DD UVLO Hysteresis
VDD
4.8
3.8
—
5.2
4.2
400
2
5.4
4.6
—
V
V
VIN = 7V to 75V, IDD = 10 mA
VDDUV,R
∆VDDUV
VDD rising
mV
%
—
Load Regulation
∆V
0.6
3.6
IDD = 0 mA to 40 mA
DD,LOAD
Reference
0.792
0.784
—
0.8
0.8
5
0.808
0.816
500
TJ = 25°C (±1.0%)
–40°C ≤ TJ ≤ +125°C (±2%)
VFB = 0.8V
Feedback Reference Voltage
VFB
IFB
V
FB Bias Current
Enable Control
EN Logic Level High
EN Logic Level Low
EN Hysteresis
nA
VEN(HI)
VEN(LO)
VEN(HYS)
IEN
1.8
—
—
—
—
—
—
0.6
—
V
V
—
—
200
23
mV
µA
—
EN Bias Current
Oscillator
40
VEN = 48V
400
—
600
300
85
750
—
VFREQ = VIN
VFREQ = 50%VIN
—
Switching Frequency
fSW
kHz
Maximum Duty Cycle
Minimum Duty Cycle
Minimum Off-Time
DMAX
DMIN
—
—
%
%
ns
—
0
—
VFB > 0.8V
—
tOFF(MIN)
140
200
260
Soft-Start
Soft-Start Time
tSS
—
5
—
ms
—
Short-Circuit Protection
Current-Limit Threshold
Short-Circuit Threshold
Current-Limit Source Current
Short-Circuit Source Current
FET Drivers
VCL
VCL(FB)
ICL
–30
–23
60
–14
–7
0
9
mV
mV
µA
VFB = 0.79V
VFB = 0V
80
100
47
VFB = 0.79V
VFB = 0V
ICL(FB)
27
36
µA
DH, DL Output Low Voltage
VLO
—
—
—
0.1
V
V
ISINK = 10 mA
VPVDD
– 0.1V
or
DH, DL Output High Voltage
VHI
—
ISOURCE = 10 mA
VBST
–
0.1V
DH On-Resistance, High
State
RON(DHH)
—
2.1
3.3
ꢀ
—
DH On-Resistance, Low State RON(DHL)
DL On-Resistance, High State RON(DLH)
—
—
1.8
1.8
3.3
3.3
ꢀ
ꢀ
—
—
DS20005899A-page 4
2017 Microchip Technology Inc.
MIC2103/4
TABLE 1-1:
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: VIN = 48V, VOUT = 5V, VBST – VSW = 5V; TA = +25°C, unless noted. Bold values indicate
–40°C ≤ TJ ≤ +125°C. Note 1
Parameter
Symbol
Min.
Typ.
Max.
Units Conditions
DL On-Resistance, Low State RON(DLL)
—
—
1.2
—
2.3
ꢀ
—
—
SW, BST Leakage Current
ILEAK
50
µA
Power Good
Power Good Threshold
Voltage
VPGTH
85
90
95
%VOUT Sweep VFB from Low to High
%VOUT Sweep VFB from High to Low
Power Good Hysteresis
Power Good Delay Time
Power Good Low Voltage
Thermal Protection
VPGHYS
td(PG)
—
—
—
6
—
—
100
70
µs
Sweep VFB from Low to High
VFB < 90% x VNOM, IPG = 1 mA
VPG(LO)
200
mV
Overtemperature Shutdown
Threshold
TSD
—
—
160
4
—
—
°C
°C
TJ rising
—
Overtemperature Shutdown
Hysteresis
TSD(HYS)
Note 1: Specification for packaged product only
2: The application is fully functional at low VDD (supply of the control section) if the external MOSFETs have
low voltage VTH
.
2017 Microchip Technology Inc.
DS20005899A-page 5
MIC2103/4
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters
Temperature Ranges
Sym.
Min.
Typ.
Max.
Units
Conditions
Junction Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature
TJ
—
TS
—
–40
—
—
—
—
—
+125
+150
+150
+260
°C
°C
°C
°C
—
—
—
–65
—
Soldering, 10s
Package Thermal Resistances
Thermal Resistance 3x3 QFN-16Ld
Thermal Resistance 3x3 QFN-16Ld
JA
JC
—
—
50.8
25.3
—
—
°C/W
°C/W
—
—
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.
DS20005899A-page 6
2017 Microchip Technology Inc.
MIC2103/4
2.0
TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
FIGURE 2-1:
V
Operating Supply
FIGURE 2-4:
Output Voltage vs. Input
IN
Current vs. Input Voltage (MIC2103).
Voltage (MIC2103).
FIGURE 2-2:
Output Regulation vs. Input
FIGURE 2-5:
V
Operating Supply
IN
Voltage (MIC2103).
Current vs. Temperature (MIC2103).
FIGURE 2-3:
Feedback Voltage vs. Input
FIGURE 2-6:
Feedback Voltage vs.
Voltage (MIC2103).
Temperature (MIC2103).
2017 Microchip Technology Inc.
DS20005899A-page 7
MIC2103/4
FIGURE 2-7:
Load Regulation vs.
FIGURE 2-10:
Line Regulation vs. Output
Temperature (MIC2103).
Current (MIC2103).
FIGURE 2-11:
Output Current (MIC2103).
Efficiency (V = 12V) vs.
IN
FIGURE 2-8:
Temperature (MIC2103).
Line Regulation vs.
FIGURE 2-12:
Output Current (MIC2103).
Efficiency (V = 18V) vs.
IN
FIGURE 2-9:
Output Current (MIC2103).
Feedback Voltage vs.
DS20005899A-page 8
2017 Microchip Technology Inc.
MIC2103/4
FIGURE 2-13:
Efficiency (V = 24V) vs.
FIGURE 2-16:
Efficiency (V = 75V) vs.
IN
IN
Output Current (MIC2103).
Output Current (MIC2103).
FIGURE 2-17:
Current vs. Input Voltage (MIC2104).
V
Operating Supply
IN
FIGURE 2-14:
Output Current (MIC2103).
Efficiency (V = 38V) vs.
IN
FIGURE 2-18:
Voltage (MIC2104).
Feedback Voltage vs. Input
FIGURE 2-15:
Output Current (MIC2103).
Efficiency (V = 48V) vs.
IN
2017 Microchip Technology Inc.
DS20005899A-page 9
MIC2103/4
FIGURE 2-19:
Output Regulation vs. Input
FIGURE 2-22:
Line Regulation vs.
Voltage (MIC2104).
Temperature (MIC2104).
FIGURE 2-23:
Output Current (MIC2104).
Feedback Voltage vs.
FIGURE 2-20:
Current vs. Temperature (MIC2104).
V
Operating Supply
IN
FIGURE 2-24:
Current (MIC2104).
Line Regulation vs. Output
FIGURE 2-21:
Temperature (MIC2104).
Load Regulation vs.
DS20005899A-page 10
2017 Microchip Technology Inc.
MIC2103/4
FIGURE 2-25:
Efficiency (V = 12V) vs.
FIGURE 2-28:
Efficiency (V = 38V) vs.
IN
IN
Output Current (MIC2104).
Output Current (MIC2104).
FIGURE 2-29:
Output Current (MIC2104).
Efficiency (V = 48V) vs.
IN
FIGURE 2-26:
Output Current (MIC2104).
Efficiency (V = 18V) vs.
IN
FIGURE 2-30:
Output Current (MIC2104).
Efficiency (V = 75V) vs.
IN
FIGURE 2-27:
Output Current (MIC2104).
Efficiency (V = 24V) vs.
IN
2017 Microchip Technology Inc.
DS20005899A-page 11
MIC2103/4
FIGURE 2-31:
Case Temperature* (V
=
FIGURE 2-34:
V
Shutdown Current vs.
IN
IN
12V) vs. Output Current.
Input Voltage.
FIGURE 2-35:
Voltage.
V
Voltage vs. Input
DD
FIGURE 2-32:
48V) vs. Output Current.
Case Temperature* (V
=
IN
FIGURE 2-36:
Voltage.
Enable Threshold vs. Input
FIGURE 2-33:
75V) vs. Output Current.
Case Temperature* (V
=
IN
Note:
*Case Temperature: The temperature measurement was taken at the hottest point on the MIC2103 case
mounted on a 5 square inch PCB. Actual results will depend upon the size of the PCB, ambient temperature,
and proximity to other heat-emitting components.
DS20005899A-page 12
2017 Microchip Technology Inc.
MIC2103/4
FIGURE 2-37:
Switching Frequency vs.
FIGURE 2-40:
Feedback Voltage vs.
Input Voltage.
Temperature.
FIGURE 2-41:
vs. Temperature.
Output Peak Current Limit
FIGURE 2-38:
vs. Input Voltage.
Output Peak Current Limit
FIGURE 2-42:
Temperature.
V
Shutdown Current vs.
FIGURE 2-39:
Output Current.
Switching Frequency vs.
IN
2017 Microchip Technology Inc.
DS20005899A-page 13
MIC2103/4
FIGURE 2-43:
V
Voltage vs.
FIGURE 2-46:
EN Bias Current vs.
DD
Temperature.
Temperature.
FIGURE 2-47:
Temperature.
Enable Threshold vs.
FIGURE 2-44:
Temperature.
V
UVLO Threshold vs.
DD
VIN = 48V
VOUT = 5V
VIN
(50V/div)
I
OUT = 10A
V
(50V/diSvW)
VOUT
(5V/div)
IL
(10A/div)
Time (2.0ms/div)
FIGURE 2-48:
V
Soft Turn-On.
IN
FIGURE 2-45:
PG Threshold vs.
Temperature.
DS20005899A-page 14
2017 Microchip Technology Inc.
MIC2103/4
VIN
(50V/div)
VIN
(20V/div)
V
(50V/diSvW)
VIN = 48V
V
= 5V
IOOUUTT = 0A
VOUT
(2V/div)
VPRE-BIASED = 1.5V
VOUT
VIN = 48V
VOUT = 5V
IOUT = 10A
(5V/div)
V
(50V/diSvW)
IL
(10A/div)
Time (2.0ms/div)
Time (40ms/div)
FIGURE 2-49:
V
Soft Turn-Off.
FIGURE 2-52:
MIC2104 V Start-Up with
IN
IN
Pre-Biased Output.
VIN = 48V
VOUT = 5V
OUT = 10A
VEN
(2V/div)
I
VIN
VIN = 48V
(20V/div)
V
= 5V
IOOUUTT = 0A
VPRE-BIASED = 1.5V
VOUT
(2V/div)
VOUT
(5V/div)
V
(50V/diSvW)
IL
(10A/div)
Time (2.0ms/div)
Time (2.0ms/div)
FIGURE 2-53:
Pre-Biased Output.
MIC2103 V Start-Up with
FIGURE 2-50:
Rise Time.
Enable Turn-On Delay and
IN
VEN
(2V/div)
VEN
(2V/div)
VIN = 48V
VOUT = 5V
VIN = 48V
VOUT = 5V
I
OUT = 10A
I
OUT = 10A
VOUT
(5V/div)
VOUT
(5V/div)
IL
IL
(10A/div)
(10A/div)
Time (10ms/div)
Time (200μs/div)
FIGURE 2-54:
Enable Turn-On/Turn-Off.
FIGURE 2-51:
Enable Turn-Off and Fall
Time.
2017 Microchip Technology Inc.
DS20005899A-page 15
MIC2103/4
VIN = 48V
VOUT = 5V
OUT = Short
VEN
(2V/div)
I
VEN
(1V/div)
VOUT
(20mV/div)
VIN = 48V
VOUT = 5V
I
OUT = 10A
IL
vOUT
(2V/div)
(10A/div)
Time (10ms/div)
Time (400μs/div)
FIGURE 2-55:
Enable Thresholds.
FIGURE 2-58:
Enabled into Short-Circuit.
V
= 48V
VIN = 5V
I
OUT = 10A OtoUTShort
V
= 3.3V
IOOUUTT = 1.0A
VOUT
(2V/div)
VIN
(2V/div)
VOUT
(2V/div)
IL
(10A/div)
Time (20ms/div)
Time (40μs/div)
FIGURE 2-59:
Short-Circuit.
FIGURE 2-56:
V
UVLO Thresholds.
IN
VIN
(50V/div)
VIN = 48V
VOUT = 5.0V
OUT = Short
I
VOUT
(2V/div)
V
= 48V
VIN = 5V
VOUT
(20mV/div)
IOUT = ShorOtUtTo 10A
IL
IL
(10A/div)
(10A/div)
Time (2.0ms/div)
Time (4.0ms/div)
FIGURE 2-60:
Short-Circuit.
Output Recovery from
FIGURE 2-57:
Power-Up into Short-Circuit.
DS20005899A-page 16
2017 Microchip Technology Inc.
MIC2103/4
VOUT
(20mV/div)
(AC-coupled)
VIN = 48V
VOUT = 5V
I
OUT = 0A
VOUT
(2V/div)
V
(50V/diSvW)
V
= 48V
VOINUT = 5V
IOUT
(10A/div)
IL
(5A/div)
Time (40ms/div)
Time (2.0μs/div)
FIGURE 2-61:
Threshold.
Output Peak Current-Limit
FIGURE 2-64:
MIC2104 Switching
= 0A).
Waveforms (I
OUT
VOUT
(50mV/div)
(AC-coupled)
VIN = 48V
VOUT = 5V
VOUT
I
OUT = 0A
(2V/div)
V
(50V/diSvW)
VIN = 48V
VOUT = 5V
IOUT = 2A
V
IL
(50V/diSvW)
(5A/div)
Time (2.0ms/div)
Time (4μs/div)
FIGURE 2-65:
MIC2103 Switching
= 0A, DCM).
FIGURE 2-62:
Thermal Shutdown.
Output Recovery from
Waveforms (I
OUT
VOUT
(50mV/div)
(AC-coupled)
VOUT
(20mV/div)
(AC-coupled)
VIN = 48V
VOUT = 5V
OUT = 0A
I
V
(50V/diSvW)
V
(50V/diSvW)
VIN = 48V
VOUT = 5V
IOUT = 10A
IL
IL
(5A/div)
(10A/div)
Time (4ms/div)
Time (2.0μs/div)
FIGURE 2-66:
MIC2103 Switching
= 0A, DCM).
FIGURE 2-63:
MIC2104 Switching
= 10A).
Waveforms (I
Waveforms (I
OUT
OUT
2017 Microchip Technology Inc.
DS20005899A-page 17
MIC2103/4
IL
VIN = 48V
VOUT = 5V
IOUT = 10A
IL
(10A/div)
(10A/div)
V
IN = 48V
VOUT = 5V
OUT = 0A
I
V
V
(50V/diSvW)
(50V/diSvW)
V
V
(50/diDvH)
(50/diDvH)
VDL
(5/div)
VDL
(5V/div)
Time (2.0μs/div)
Time (2μs/div)
FIGURE 2-67:
MIC2103 Switching
= 10A).
FIGURE 2-70:
Waveforms (I
MIC2104 Switching
= 0A).
OUT
Waveforms (I
OUT
IL
VOUT
(500mV/div)
(AC Couple)
(5A/div)
V
(50V/diSvW)
VIN = 48V
VOUT = 5V
V
I
OUT = 0A to 10A
(50/diDvH)
VIN = 48V
VOUT = 5V
VDL
(5/div)
I
OUT = 0A
IOUT
(10A/div)
Time (4ms/div)
Time (100μs/div)
FIGURE 2-71:
Response.
MIC2104 Transient
FIGURE 2-68:
MIC2103 Switching
= 0A, DCM).
Waveforms (I
OUT
IL
VIN = 48V
VOUT = 5V
OUT = 10A
VOUT
(500mV/div)
(AC-Coupled)
(10A/div)
I
V
(50V/diSvW)
VIN = 48V
VOUT = 5V
OUT = 0A to 10A
I
V
(50/diDvH)
VDL
(5/div)
IOUT
(10A/div)
Time (100μs/div)
Time (2.0μs/div)
FIGURE 2-72:
Response.
MIC2103 Transient
FIGURE 2-69:
Waveforms (I
MIC2104 Switching
= 10A).
OUT
DS20005899A-page 18
2017 Microchip Technology Inc.
MIC2103/4
VIN = 48V
VOUT = 5V
I
OUT = 0A
VIN
(20V/div)
VIN
(20V/div)
VOUT
(5/div)
VOUT
(5/div)
V
IN = 48V
V
V
VOUT = 5V
IOUT = 0A
(5V/diPvG)
(5/diPvG)
Time (4.0ms/div)
Time (100ms/div)
FIGURE 2-73:
Power Good at V Soft
FIGURE 2-74:
Power Good at V Soft
IN
IN
Turn-On.
Turn-Off.
2017 Microchip Technology Inc.
DS20005899A-page 19
MIC2103/4
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
Pin Number
PIN FUNCTION TABLE
Pin Name
Description
1
VDD
Internal +5V linear regulator output. VDD is the internal supply bus for the device. A
1 μF ceramic capacitor from VDD to AGND is required for decoupling. In the
applications with VIN < +5.5V, VDD should be tied to VIN to bypass the linear regulator.
2
PVDD
5V supply input for the low-side N-channel MOSFET driver, which can be tied to VDD
externally. A 1 μF ceramic capacitor from PVDD to PGND is recommended for
decoupling.
3
4
ILIM
DL
Current-Limit Setting. Connect a resistor from SW to ILIM to set the overcurrent
threshold for the converter.
Low-Side Drive output. High-current driver output for external low-side MOSFET of a
buck converter. The DL driving voltage swings from ground to VDD. Adding a small
resistor between DL pin and the gate of the low-side N-channel MOSFET can slow
down the turn-on and turn-off speed of the MOSFET.
5
PGND
Power Ground. PGND is the return path for the buck converter power stage and the
low-side MOSFET driver. The PGND pin connects to the sources of low-side
N-channel external MOSFET, the negative terminals of input capacitors, and the
negative terminals of output capacitors. The return path for the power ground should
be as small as possible and separate from the Signal ground (AGND) return path.
6
7
FREQ
DH
Switching Frequency Adjust input. Tie this pin to VIN to operate at 600 kHz and place
a resistor divider to reduce the frequency.
High-Side Drive output. High-current driver output for external high-side MOSFET of a
buck converter. The DH driving voltage is floating on the switch node voltage (VSW).
Adding a small resistor between DH pin and the gate of the high-side N-channel
MOSFET can slow down the turn-on and turn-off speed of the MOSFET.
8
SW
Switch node, current-sense input, and high-current high-side MOSFET driver return
path. The SW pin connects directly to the switch node. Due to the high-speed
switching on this pin, the SW pin should be routed away from sensitive nodes. The
SW pin also senses the current by monitoring the voltage across the low-side
MOSFET during OFF time. In order to sense the current accurately, connect the
low-side MOSFET drain to the SW pin using a Kelvin connection.
9, 11
10
NC
No connection.
BST
Voltage Supply Pin input for the high-side N-channel MOSFET driver, which can be
powered by a bootstrapped circuit connected between VDD and SW, using a Schottky
diode and a 0.1 μF ceramic capacitor. Adding a small resistor at BST pin can slow
down the turn-on speed of the high-side MOSFET.
12
13
AGND
FB
Signal ground for VDD and the control circuitry, which is connected to Thermal Pad
electronically. The signal ground return path should be separate from the power
ground (PGND) return path.
Feedback input. Input to the transconductance amplifier of the control loop. The FB
pin is regulated to 0.8V. A resistor divider connecting the feedback to the output is
used to set the desired output voltage.
14
15
PG
EN
Power Good output. Open-Drain Output, an external pull-up resistor to VDD or
external power rail is required.
Enable input. A logic signal to enable or disable the buck converter operation. The EN
pin is CMOS compatible. Logic high enables the device, logic low disables the
regulator. In the disable mode, the VDD supply current for the device is minimized to
0.7 mA typically.
16
VIN
Supply voltage. The VIN operating voltage range is from 4.5V to 75V. A 1 μF ceramic
capacitor from VIN to AGND is required for decoupling.
DS20005899A-page 20
2017 Microchip Technology Inc.
MIC2103/4
TABLE 3-1:
Pin Number
EP
PIN FUNCTION TABLE (CONTINUED)
Pin Name
Description
ePAD
Exposed Pad. Connect the EPAD to PGND plain on the PCB to improve the thermal
performance.
2017 Microchip Technology Inc.
DS20005899A-page 21
MIC2103/4
EQUATION 4-2:
4.0
FUNCTIONAL DESCRIPTION
The MIC2103/4 are adaptive on-time synchronous
buck controllers built for high-input voltage to
low-output voltage conversion applications. They are
designed to operate over a wide input voltage range,
from 4.5V to 75V, and the output is adjustable with an
external resistive divider. An adaptive on-time control
scheme is employed to obtain a constant switching
frequency and to simplify the control compensation.
Overcurrent protection is implemented by sensing
low-side MOSFET’s RDS(ON). The device features
internal soft-start, enable, UVLO, and thermal
shutdown.
tS – tOFFMIN
----------------------------------
200ns
tS
--------------
DMAX
=
= 1 –
tS
Where:
tS = 1/fSW
.
It is not recommended to use MIC2103/4 with a
OFF-time close to tOFF(min) during steady-state
operation.
The adaptive ON-time control scheme results in a
constant switching frequency in the MIC2103/4. The
actual ON-time and resulting switching frequency will
vary with the different rising and falling times of the
external MOSFETs. Also, the minimum tON results in a
lower switching frequency in high VIN to VOUT
applications. During load transients, the switching
frequency is changed due to the varying OFF-time.
4.1
Theory of Operation
The Functional Block Diagram illustrates the block
diagram of the MIC2103/4. The output voltage is
sensed by the MIC2103/4 feedback pin FB via the
voltage divider R1 and R2, and compared to a 0.8V
reference voltage VREF at the error comparator through
a low-gain transconductance (gm) amplifier. If the
feedback voltage decreases and the amplifier output is
below 0.8V, then the error comparator will trigger the
control logic and generate an ON-time period. The
ON-time period length is predetermined by the “Fixed
tON Estimator” circuitry:
To illustrate the control loop operation, one must
analyze both the steady-state and load transient
scenarios. For easy analysis, the gain of the gm
amplifier is assumed to be 1. With this assumption, the
inverting input of the error comparator is the same as
the feedback voltage.
Figure 4-1 shows the MIC2103/4 control loop timing
during steady-state operation. During steady-state, the
gm amplifier senses the feedback voltage ripple, which
is proportional to the output voltage ripple plus injected
voltage ripple, to trigger the ON-time period. The
ON-time is predetermined by the tON estimator. The
termination of the OFF-time is controlled by the
feedback voltage. At the valley of the feedback voltage
ripple, which occurs when VFB falls below VREF, the
OFF period ends and the next ON-time period is
triggered through the control logic circuitry.
EQUATION 4-1:
VOUT
-----------------------
=
tONESTIMATED
VIN fSW
Where:
VOUT = Output voltage.
VIN = Power stage input voltage.
fSW = Switching frequency.
At the end of the ON-time period, the internal high-side
driver turns off the high-side MOSFET and the low-side
driver turns on the low-side MOSFET. The OFF-time
period length depends upon the feedback voltage in
most cases. When the feedback voltage decreases
and the output of the gm amplifier is below 0.8V, the
ON-time period is triggered and the OFF-time period
ends. If the OFF-time period determined by the
feedback voltage is less than the minimum OFF-time
tOFF(min), which is about 200 ns, the MIC2103/4 control
logic will apply the tOFF(min) instead. tOFF(min) is
required to maintain enough energy in the boost
capacitor (CBST) to drive the high-side MOSFET.
2
VDH
The maximum duty cycle is obtained from the 200 ns
FIGURE 4-1:
Timing.
MIC2103/4 Control Loop
tOFF(min)
:
Figure 4-2 shows the operation of the MIC2103/4
during a load transient. The output voltage drops due to
the sudden load increase, which causes the VFB to be
DS20005899A-page 22
2017 Microchip Technology Inc.
MIC2103/4
less than VREF. This causes the error comparator to
trigger an ON-time period. At the end of the ON-time
period, a minimum OFF-time tOFF(min) is generated to
charge CBST because the feedback voltage is still
below VREF. Then, the next ON-time period is triggered
due to the low feedback voltage. Therefore, the
switching frequency changes during the load transient,
but returns to the nominal fixed frequency once the
output has stabilized at the new load current level. With
the varying duty cycle and switching frequency, the
output recovery time is fast and the output voltage
deviation is small in MIC2103/4 converter.
4.2
Discontinuous Mode (MIC2103
Only)
In continuous mode, the inductor current is always
greater than zero. However, at light loads, the MIC2103
is able to force the inductor current to operate in
discontinuous mode. Discontinuous mode is where the
inductor current falls to zero, as indicated by trace (IL)
shown in Figure 4-3. During this period, the efficiency is
optimized by shutting down all the non-essential
circuits and minimizing the supply current. The
MIC2103 wakes up and turns on the high-side
MOSFET when the feedback voltage VFB drops below
0.8V.
FULL LOAD
IOUT
The MIC2103 has a zero crossing comparator (ZC
Detection) that monitors the inductor current by
sensing the voltage drop across the low-side MOSFET
during its ON-time. If the VFB > 0.8V and the inductor
current goes slightly negative, then the MIC2103
automatically powers down most of the IC circuitry and
goes into a low-power mode.
NO LOAD
VOUT
Once the MIC2103 goes into discontinuous mode, both
DH and DL are low, which turns off the high-side and
low-side MOSFETs. The load current is supplied by the
output capacitors and VOUT drops. If the drop of VOUT
causes VFB to go below VREF, then all the circuits will
wake up into normal continuous mode. First, the bias
currents of most circuits reduced during the
discontinuous mode are restored, then a tON pulse is
triggered before the drivers are turned on to avoid any
possible glitches. Finally, the high-side driver is turned
on. Figure 4-3 shows the control loop timing in
discontinuous mode.
VREF
VFB
VDH
tOFF(min)
MIC2103/4 Load Transient
FIGURE 4-2:
Response.
Unlike true current-mode control, the MIC2103/4 uses
the output voltage ripple to trigger an ON-time period.
The output voltage ripple is proportional to the inductor
current ripple if the ESR of the output capacitor is large
enough.
In order to meet the stability requirements, the
MIC2103/4 feedback voltage ripple should be in phase
with the inductor current ripple and are large enough to
be sensed by the gm amplifier and the error
comparator. The recommended feedback voltage
ripple is 20 mV~100 mV over full input voltage range. If
a low ESR output capacitor is selected, then the
feedback voltage ripple may be too small to be sensed
by the gm amplifier and the error comparator. Also, the
output voltage ripple and the feedback voltage ripple
are not necessarily in phase with the inductor current
ripple if the ESR of the output capacitor is very low. In
these cases, ripple injection is required to ensure
proper operation. Please refer to the Ripple Injection
subsection in Application Information for more details
about the ripple injection technique.
VDH
VDL
FIGURE 4-3:
Timing (Discontinuous Mode).
MIC2103 Control Loop
2017 Microchip Technology Inc.
DS20005899A-page 23
MIC2103/4
During discontinuous mode, the bias current of most
circuits are reduced. As a result, the total power supply
current during discontinuous mode is only about
400 μA, allowing the MIC2103 to achieve high
efficiency in light load applications.
The VRCL drop allows programming of short limit
through the value of the resistor (RCL), If the absolute
value of the voltage drop on the bottom FET is greater
than VRCL in that case the V(ILIM) is lower than PGND
and a short-circuit event is triggered. A hiccup cycle to
treat the short event is generated. The hiccup
sequence including the soft-start reduces the stress on
the switching FETs and protects the load and supply for
severe short conditions.
4.3
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time.
The input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The short-circuit current-limit can be programmed by
using the following formula:
EQUATION 4-3:
The MIC2103/4 implements an internal digital soft-start
by making the 0.8V reference voltage VREF ramp from
0 to 100% in about 6 ms with 9.7 mV steps. Therefore,
the output voltage is controlled to increase slowly by a
stair-case VFB ramp. Once the soft-start cycle ends, the
related circuitry is disabled to reduce current
consumption. VDD must be powered up at the same
time or after VIN to make the soft-start function
correctly.
ICLIM + ILPP 0.5 RDSON + VCL
-----------------------------------------------------------------------------------------------------
=
RCL
ICL
Where:
= Desired output current limit.
I
CLIM
∆I
= Inductor current, peak-to-peak.
= On resistance of low-side power
MOSFET.
L(PP)
R
DS(ON)
4.4
Current-Limit
V
= Current-limit threshold. Typical value is 14 mV.
CL
I
= Current-limit source current. Typical value is
80 µA.
CL
The MIC2103/4 uses the RDS(ON) and external resistor
connected from ILIM pin to SW node to decide the
current limit.
In case of a hard short, the short limit is folded down to
allow an indefinite hard short on the output without any
destructive effect. It is mandatory to make sure that the
inductor current used to charge the output capacitance
during soft start is under the folded short limit,
otherwise the supply will go in hiccup mode and may
not be finishing the soft-start successfully.
VIN
CIN
DH
Q1
L
SW
CONTROL
LOGIC
COUT
TIMER
The MOSFET RDS(ON) varies 30% to 40% with
temperature; therefore, it is recommended to add a
50% margin to the calculated RCL in Equation 4-3 to
avoid false current limiting due to increased MOSFET
junction temperature rise. It is also recommended to
connect SW pin directly to the drain of the low-side
DL
SOFT-START
Q3
RCL
PGND
CL
ILIM
DETECTION
CCL
ICL
MOSFET to accurately sense the MOSFETs RDS(ON)
.
4.5
MOSFET Gate Drive
FIGURE 4-4:
MIC2103/4 Current Limiting
Circuit.
The MIC2103/4 high-side drive circuit is designed to
switch an N-channel MOSFET. The Functional Block
Diagram shows a bootstrap circuit, consisting of D1 (a
Schottky diode is recommended) and CBST. This circuit
supplies energy to the high-side drive circuit. Capacitor
CBST is charged while the low-side MOSFET is on and
the voltage on the SW pin is approximately 0V. When
the high-side MOSFET driver is turned on, energy from
CBST is used to turn the MOSFET on. As the high-side
MOSFET turns on, the voltage on the SW pin increases
to approximately VIN. Diode D1 is reverse biased and
CBST floats high while continuing to keep the high-side
MOSFET on. The bias current of the high-side driver is
less than 10 mA, so a 0.1 μF to 1 μF is sufficient to hold
In each switching cycle of the MIC2103/4 converter, the
inductor current is sensed by monitoring the low-side
MOSFET in the OFF period. The sensed voltage V(ILIM)
is compared with the power ground (PGND) after a
blanking time of 150 ns. In this way the drop voltage
over the resistor RCL (VRCL) is compared with the drop
over the bottom FET generating the short current-limit.
The small capacitor (CCL) connected from the ILIM pin
to PGND filters the switching node ringing during the off
time allowing a better short limit measurement. The
time constant created by RCL and CCL should be much
less than the minimum off time.
DS20005899A-page 24
2017 Microchip Technology Inc.
MIC2103/4
the gate voltage with minimal droop for the power
stroke (high-side switching) cycle, i.e., ∆BST = 10 mA
x 3.33 μs/0.1 μF = 333 mV. When the low-side
MOSFET is turned back on, CBST is recharged through
D1. A small resistor RG, which is in series with CBST
,
can be used to slow down the turn-on time of the
high-side N-channel MOSFET.
The drive voltage is derived from the VDD supply
voltage. The nominal low-side gate drive voltage is VDD
and the nominal high-side gate drive voltage is
approximately VDD – VDIODE, where VDIODE is the
voltage drop across D1. An approximate 30 ns delay
between the high-side and low-side driver transitions is
used to prevent current from simultaneously flowing
unimpeded through both MOSFETs.
2017 Microchip Technology Inc.
DS20005899A-page 25
MIC2103/4
For a more precise setting, it is recommended to use
the following graph:
5.0
APPLICATION INFORMATION
5.1
Setting the Switching Frequency
600
The
MIC2103/4
are
adjustable-frequency,
R19 = 100k, IOUT =10A
500
synchronous buck controllers that feature a unique
adaptive on-time control architecture. The switching
frequency can be adjusted between 200 kHz and
600 kHz by changing the resistor divider network
consisting of R19 and R20.
VIN = 48V
400
VIN =75V
300
200
100
0
MIC2103/04
VDD
1μF
VDD/PVDD
AGND
10.00
100.00
1000.00
10000.00
R20 (kȍ)
VIN
VIN
FIGURE 5-2:
Switching Frequency vs.
R19
R20
R20.
2.2μF
x3
FREQ
5.2
MOSFET Selection
PGND
The MIC2103/4 controllers work from input voltages of
4.5V to 75V and have an internal 5V VDD LDO. This
internal VDD LDO provides power to turn on the
external N-channel power MOSFETs for the high-side
FIGURE 5-1:
Adjustment.
Switching Frequency
and low-side switches. For applications where VDD
<
The following formula gives the estimated switching
frequency:
5V, it is necessary that the power MOSFETs used are
sub-logic level and are in full conduction mode for VGS
of 2.5V. For applications when VDD > 5V; logic-level
MOSFETs, whose operation is specified at VGS = 4.5V
must be used.
EQUATION 5-1:
There are different criteria for choosing the high-side
and low-side MOSFETs. These differences are more
significant at lower duty cycles. In such an application,
the high-side MOSFET is then required to switch as
quickly as possible in order to minimize transition
losses, whereas the low-side MOSFET can switch
slower, but must handle larger RMS currents. When the
duty cycle approaches 50%, the current carrying
capability of the high-side MOSFET starts to become
critical.
R20
R19 + R20
-------------------------
fSW_ADJ = fO
Where:
f
O = Switching frequency when R19 is 100 kꢀ and
R20 is open. Typically 550 kHz.
It is important to note that the on-resistance of a
MOSFET increases with increasing temperature. A
75°C rise in junction temperature will increase the
channel resistance of the MOSFET by 50% to 75% of
the resistance specified at 25°C. This change in
resistance must be accounted for when calculating
MOSFET power dissipation and in calculating the value
of current limit. Total gate charge is the charge required
to turn the MOSFET on and off under specified
operating conditions (VDS and VGS). The gate charge
is supplied by the MIC2103/4 gate-drive circuit. At
200 kHz switching frequency, the gate charge can be a
significant source of power dissipation in the
DS20005899A-page 26
2017 Microchip Technology Inc.
MIC2103/4
MIC2103/4. At low output load, this power dissipation is
noticeable as a reduction in efficiency. The average
current required to drive the high-side MOSFET is:
Parameters that are important to MOSFET switch
selection are:
• Voltage rating
• On-resistance
• Total gate charge
EQUATION 5-2:
The voltage ratings for the high-side and low-side
MOSFETs are essentially equal to the power stage
input voltage VHSD. A safety factor of 20% should be
added to the VDS(max) of the MOSFETs to account for
voltage spikes due to circuit parasitic elements.
IGHIGH – SIDEAVG = QG fSW
Where:
IG(HIGH-SIDE(AVG)) = Average high-side MOSFET gate
current.
QG = Total gate charge for the high-side MOSFET
taken from the manufacturer’s data sheet for
The power dissipated in the MOSFETs is the sum of the
conduction losses during the on-time (PCONDUCTION
)
and the switching losses during the period of time when
the MOSFETs turn on and off (PAC).
V
GS = VDD.
fSW = Switching frequency.
EQUATION 5-5:
The low-side MOSFET is turned on and off at VDS = 0
because an internal body diode or external
freewheeling diode is conducting during this time. The
switching loss for the low-side MOSFET is usually
negligible. Also, the gate-drive current for the low-side
MOSFET is more accurately calculated using CISS at
VDS = 0 instead of gate charge.
PSW = PCONDUCTION + PAC
PCONDUCTION = ISWRMS2 RDSON
For the low-side MOSFET:
EQUATION 5-3:
PAC = PACOFF + PACON
Where:
IGLOW – SIDEAVG = CISS VGS fSW
ISW(RMS) = RMS current of the MOSFET switch.
RDS(ON) = On-resistance of the MOSFET switch.
Because the current from the gate drive comes from
the VDD, which is the output of the internal linear
regulator powered by VIN, the power dissipated in the
MIC2103/4 due to gate drive is:
The high-side MOSFET and low-side MOSFET RMS
currents can be calculated by Equation 5-6:
EQUATION 5-6:
EQUATION 5-4:
I
SWHSRMS IOUTMAX D
PGATEDRIVE
I
SWLSRMS IOUTMAX 1 – D
= VIN IGHIGH – SIDEAVG + IGLOW – SIDEAVG
Where:
D = Duty cycle = VOUT/VHSD
A convenient figure of merit for switching MOSFETs is
the on resistance multiplied by the total gate charge;
RDS(ON) × QG. Lower numbers translate into higher
efficiency. Low gate-charge logic-level MOSFETs are a
good choice for use with the MIC2103/4. Also, the
RDS(ON) of the low-side MOSFET will determine the
current-limit value. Please refer to the Current-Limit
subsection in the Functional Description for more
details.
.
2017 Microchip Technology Inc.
DS20005899A-page 27
MIC2103/4
Making the assumption that the turn-on and turn-off
transition times are equal; the transition times can be
approximated by:
EQUATION 5-9:
VOUT VINMAX – VOUT
INMAX fSW 20% IOUTMAX
----------------------------------------------------------------------------------------
L =
EQUATION 5-7:
V
Where:
CISS VDD + COSS VHSD
fSW = Switching frequency.
20% = Ratio of AC ripple current to DC output
current.
-------------------------------------------------------------------
=
tT
IG
Where:
ISS and COSS are measured at VDS = 0.
G = Gate drive current.
VIN(MAX) = Max. power stage input voltage.
C
I
The peak-to-peak inductor current ripple is:
The total high-side MOSFET switching loss is:
EQUATION 5-10:
EQUATION 5-8:
VOUT VINMAX – VOUT
-------------------------------------------------------------------
=
ILPP
V
INMAX fSW L
PAC = VHSD + VD ILPK tT fSW
Where:
tT = Switching transition time.
VD = Body diode drop (0.5V).
fSW = Switching frequency.
The peak inductor current is equal to the average
output current plus one half of the peak-to-peak
inductor current ripple.
The high-side MOSFET switching losses increase with
the switching frequency and the power stage input
voltage VHSD. The low-side MOSFET switching losses
are negligible and can be ignored for these
calculations.
EQUATION 5-11:
ILPK = IOUTMAX + 0.5 ILPP
5.3
Inductor Selection
The RMS inductor current is used to calculate the I2R
losses in the inductor.
Values for inductance, peak, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine
the peak-to-peak inductor ripple current. Generally,
higher inductance values are used with higher input
voltages. Larger peak-to-peak ripple currents will
increase the power dissipation in the inductor and
MOSFETs. Larger output ripple currents will also
require more output capacitance to smooth out the
larger ripple current. Smaller peak-to-peak ripple
EQUATION 5-12:
2
ILPP
2
--------------------
ILRMS
=
IOUTMAX
+
12
currents require
a larger inductance value and
therefore a larger and more expensive inductor.
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance.
The high frequency operation of the MIC2103/4
requires the use of ferrite materials for all but the most
cost sensitive applications. Lower cost iron powder
cores may be used but the increase in core loss will
reduce the efficiency of the buck converter. This is
especially noticeable at low output power. The winding
resistance decreases efficiency at the higher output
current levels. The winding resistance must be
minimized although this usually comes at the expense
of a larger inductor. The power dissipated in the
inductor is equal to the sum of the core and copper
A good compromise among size, loss and cost is to set
the inductor ripple current to be equal to 20% of the
maximum output current.
The inductance value is calculated by Equation 5-9:
DS20005899A-page 28
2017 Microchip Technology Inc.
MIC2103/4
losses. At higher output loads, the core losses are
usually insignificant and can be ignored. At lower
output currents, the core losses can be a significant
contributor. Core loss information is usually available
from the magnetic vendor.
The total output ripple is a combination of voltage
ripples caused by the ESR and output capacitance.
The total ripple is calculated in Equation 5-16:
EQUATION 5-16:
Copper loss in the inductor is calculated by
Equation 5-13:
VOUTPP
=
EQUATION 5-13:
2
ILPP
+ ILPP ESRCOUT2
-------------------------------------
COUT fSW 8
PINDUCTORCu = ILRMS2 RWINDING
Where:
COUT = Output capacitance value.
SW = Switching frequency.
f
The resistance of the copper wire, RWINDING, increases
with the temperature. The value of the winding
resistance used should be at the operating
temperature.
As described in the Theory of Operation subsection in
Functional Description, the MIC2103/4 requires at least
20 mV peak-to-peak ripple at the FB pin to make the gm
amplifier and the error comparator behave properly.
Also, the output voltage ripple should be in phase with
the inductor current. Therefore, the output voltage
ripple caused by the output capacitors value should be
much smaller than the ripple caused by the output
capacitor ESR. If low ESR capacitors, such as ceramic
capacitors, are selected as the output capacitors, a
ripple injection method should be applied to provide
enough feedback voltage ripple. Please refer to the
Ripple Injection subsection for more details.
EQUATION 5-14:
RWINDINGHt = RWINDING20C
1 + 0.0042 TH – T20C
Where:
TH = Temp. of wire under full load.
T20°C = Ambient temperature.
RWINDING(20°C) = Room temperature winding
resistance (usually specified by
the manufacturer).
The voltage rating of the capacitor should be twice the
output voltage for a tantalum and 20% greater for
aluminum electrolytic or OS-CON. The output capacitor
RMS current is calculated in Equation 5-17:
EQUATION 5-17:
5.4
Output Capacitor Selection
The type of the output capacitor is usually determined
by its ESR (equivalent series resistance). Voltage and
RMS current capability are two other important factors
for selecting the output capacitor. Recommended
capacitor types are tantalum, low-ESR aluminum
electrolytic, OS-CON and POSCAP. The output
capacitor’s ESR is usually the main cause of the output
ripple. The output capacitor ESR also affects the
control loop from a stability point of view. The maximum
value of ESR is calculated:
ILPP
------------------
12
ICOUTRMS
=
The power dissipated in the output capacitor is:
EQUATION 5-18:
EQUATION 5-15:
PDISSCOUT = ICOUTRMS2 ESRCOUT
VOUTPP
ILPP
---------------------------
ESRCOUT
Where:
5.5
Input Capacitor Selection
∆VOUT(PP) = Peak-to-peak output voltage ripple.
∆IL(PP) = Peak-to-peak inductor current ripple.
The input capacitor for the power stage input VIN
should be selected for ripple current rating and voltage
rating. Tantalum input capacitors may fail when
2017 Microchip Technology Inc.
DS20005899A-page 29
MIC2103/4
subjected to high inrush currents, caused by turning the
input supply on. A tantalum input capacitor’s voltage
rating should be at least two times the maximum input
voltage to maximize reliability. Aluminum electrolytic,
OS-CON, and multilayer polymer film capacitors can
handle the higher inrush currents without voltage
de-rating.
5.6
Voltage Setting Components
The MIC2103/4 requires two resistors to set the output
voltage as shown in Figure 5-3:
The input voltage ripple will primarily depend on the
input capacitor’s ESR. The peak input current is equal
to the peak inductor current, so:
EQUATION 5-19:
VIN = ILPK ESRCIN
FIGURE 5-3:
Voltage-Divider
Configuration.
The output voltage is determined by the following
equation:
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak-to-peak inductor current ripple is low:
EQUATION 5-22:
EQUATION 5-20:
R1
R2
------
VOUT = VFB 1 +
Where:
I
CINRMS IOUTMAX D 1 – D
VFB = 0.8V.
A typical value of R1 can be between 3 kꢀ and 10 kꢀ.
If R1 is too large, it may allow noise to be introduced
into the voltage feedback loop. If R1 is too small in
value, it will decrease the efficiency of the buck
converter, especially at light loads. Once R1 is
selected, R2 can be calculated using Equation 5-23:
The power dissipated in the input capacitor is:
EQUATION 5-21:
PDISSCIN = ICINRMS2 ESRCIN
EQUATION 5-23:
VFB R1
-----------------------------
R2 =
V
OUT – VFB
DS20005899A-page 30
2017 Microchip Technology Inc.
MIC2103/4
The output voltage ripple is fed into the FB pin through
a feed-forward capacitor Cff in this situation, as shown
in Figure 5-5. The typical Cff value is between 1 nF and
100 nF. With the feed-forward capacitor, the feedback
voltage ripple is very close to the output voltage ripple:
5.7
Ripple Injection
The VFB ripple required for proper operation of the
MIC2103/4 gm amplifier and error comparator is 20 mV
to 100 mV. However, the output voltage ripple is
generally designed as 1% to 2% of the output voltage.
For a low output voltage, such as a 1V, the output
voltage ripple is only 10 mV to 20 mV, and the feedback
voltage ripple is less than 20 mV. If the feedback
voltage ripple is so small that the gm amplifier and error
comparator cannot sense it, then the MIC2103/4 will
lose control and the output voltage is not regulated. In
order to have some amount of VFB ripple, a ripple
injection method is applied for low output voltage ripple
applications.
EQUATION 5-25:
VFBPP ESR ILPP
3. Virtually no ripple at the FB pin voltage due to
the very-low ESR of the output capacitors:
The applications are divided into three situations
according to the amount of the feedback voltage ripple:
L
1. Enough ripple at the feedback voltage due to the
large ESR of the output capacitors.
SW
Cinj
MIC2103/04
R1
R2
Rinj
FB
COUT
ESR
Cff
L
SW
COUT
MIC2103/04
R1
R2
FB
FIGURE 5-6:
Invisible Ripple at FB.
ESR
In this situation, the output voltage ripple is less than
20 mV. Therefore, additional ripple is injected into the
FB pin from the switching node SW via a resistor Rinj
and a capacitor Cinj, as shown in Figure 5-6. The
injected ripple is:
FIGURE 5-4:
Enough Ripple at FB.
As shown in Figure 5-4, the converter is stable without
any ripple injection. The feedback voltage ripple is:
EQUATION 5-26:
EQUATION 5-24:
1
----------------
VFBPP = VIN KDIV D 1 – D
R2
R1 + R2
fSW
-------------------
ESRCOUT ILPP
VFBPP
Where:
=
Where:
VIN = Power stage input voltage.
D = Duty cycle.
∆IL(PP) = Peak-to-peak inductor current ripple.
fSW = Switching frequency.
2. Inadequate ripple at the feedback voltage due to
the small ESR of the output capacitors.
τ
= (R1//R2//Rinj) x Cff.
EQUATION 5-27:
L
SW
COUT
MIC2103/04
R1
R2
FB
R1//R2
Rinj + R1//R2
Cff
---------------------------------
=
KDIV
ESR
In Equation 5-26 and Equation 5-27, it is assumed that
the time constant associated with Cff must be much
greater than the switching period:
FIGURE 5-5:
Inadequate Ripple at FB.
2017 Microchip Technology Inc.
DS20005899A-page 31
MIC2103/4
EQUATION 5-28:
1
T
----------------
--
=
« 1
fSW
If the voltage divider resistors R1 and R2 are in the kꢀ
range, then a Cff of 1 nF to 100 nF can easily satisfy the
large time constant requirements. Also, a 100 nF
injection capacitor Cinj is used in order to be considered
as short for a wide range of the frequencies.
The process of sizing the ripple injection resistor and
capacitors is:
1. Select Cff to feed all output ripples into the feed-
back pin and make sure the large time constant
assumption is satisfied. Typical choice of Cff is
1 nF to 100 nF if R1 and R2 are in kꢀ range.
2. Select Rinj according to the expected feedback
voltage ripple using Equation 5-29:
EQUATION 5-29:
VFBPP
fSW
D 1 – D
----------------------- ----------------------------
KDIV
=
VIN
Then the value of Rinj is obtained as:
EQUATION 5-30:
1
– 1
------------
Rinj = R1//R2
KDIV
3. Select Cinj as 100 nF, which could be consid-
ered as short for a wide range of the frequen-
cies.
DS20005899A-page 32
2017 Microchip Technology Inc.
MIC2103/4
• Keep the switch node (SW) away from the
feedback (FB) pin.
6.0
PCB LAYOUT GUIDELINES
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power and
signal return paths.
• The SW pin should be connected directly to the
drain of the low-side MOSFET to accurately
sense the voltage across the low-side MOSFET.
• To minimize noise, place a ground plane
underneath the inductor.
The following guidelines should be followed to insure
proper operation of the MIC2103/4 buck controllers.
6.5
Output Capacitor
6.1
IC
• Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
• The 1 µF ceramic capacitors, which are
connected to the VDD and PVDD pins, must be
located right at the IC. The VDD pin is very noise
sensitive and placement of the capacitor is very
critical. Use wide traces to connect to the VDD
PVDD, AGND, and PGND pins.
• Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
,
• The signal ground pin (AGND) must be connected
directly to the ground planes. Do not route the
AGND pin to the PGND pin on the top layer.
• The feedback trace should be separate from the
power trace and connected as close as possible
to the output capacitor. Sensing a long
high-current load trace can degrade the DC load
regulation.
• Place the IC close to the point of load (POL).
• Use fat traces to route the input and output power
lines.
• Signal and power grounds should be kept
separate and connected at only one location.
6.6
MOSFETs
• Low-side MOSFET gate drive trace (DL pin to
MOSFET gate pin) must be short and routed over
a ground plane. The ground plane should be the
connection between the MOSFET source and
PGND.
6.2
Input Capacitor
• Place the input capacitors on the same side of the
board and as close to the MOSFETs as possible.
• Choose a low-side MOSFET with a high CGS/CGD
ratio and a low internal gate resistance to
minimize the effect of dv/dt inducted turn-on.
• Place several vias to the ground plane close to
the input capacitor ground terminal.
• Use either X7R or X5R dielectric ceramic input
capacitors. Do not use Y5V or Z5U type
capacitors.
• Do not put a resistor between the low-side
MOSFET gate drive output and the gate.
• Use a 4.5V VGS rated MOSFET. Its higher gate
threshold voltage is more immune to glitches than
a 2.5V or 3.3V rated MOSFET. MOSFETs that are
rated for operation at less than 4.5V VGS should
not be used.
• Do not replace the ceramic input capacitor with
any other type of capacitor. Any type of capacitor
can be placed in parallel with the input capacitor.
• If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended
for switching regulator applications and the
operating voltage must be derated by 50%.
• In “Hot-Plug” applications, a Tantalum or
Electrolytic bypass capacitor must be used to limit
the over-voltage spike seen on the input supply
with power is suddenly applied.
6.3
RC Snubber
• Place the RC snubber on the same side of the
board and as close to the SW pin as possible.
6.4
Inductor
• Keep the inductor connection to the switch node
(SW) short.
• Do not route any digital lines underneath or close
to the inductor.
2017 Microchip Technology Inc.
DS20005899A-page 33
MIC2103/4
7.0
7.1
PACKAGING INFORMATION
Package Marking Information
16-Pin QFN*
Example
Y
XXXX
NNN
Y
2103
626
Legend: XX...X Product code or customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
3
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
e
*
e
3
)
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (⎯) symbol may not be to scale.
DS20005899A-page 34
2017 Microchip Technology Inc.
MIC2103/4
16-Lead QFN 3 mm x 3 mm Package Outline and Recommended Land Pattern
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2017 Microchip Technology Inc.
DS20005899A-page 35
MIC2103/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
DS20005899A-page 36
2017 Microchip Technology Inc.
MIC2103/4
APPENDIX A: REVISION HISTORY
Revision A (December 2017)
• Converted Micrel document MIC2103/4 to Micro-
chip data sheet DS20005899A.
• Minor text changes throughout.
2017 Microchip Technology Inc.
DS20005899A-page 37
MIC2103/4
NOTES:
DS20005899A-page 38
2017 Microchip Technology Inc.
MIC2103/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
PART NO.
Device
X
X
XX
–XX
a) MIC2103YML-TR:
75V, Synchronous Buck
Controller featuring Adap-
tive On-Time Control, Hyper-
Light Load, –40°C to +125°C
Temp. Range, 16-Lead
3 mm x 3 mm QFN, 5,000/
Reel
Features
Junction Temp. Package Media Type
Range
MIC210_:
75V, Synchronous Buck Controller featur-
ing Adaptive On-Time Control
Device:
®
3
4
=
=
HyperLight Load
Features:
b) MIC2104YML-TR:
75V, Synchronous Buck
Controller featuring Adap-
tive On-Time Control, Hyper
Speed Control, –40°C to
+125°C Temp. Range, 16-
Lead 3 mm x 3 mm QFN,
5,000/Reel
®
Hyper Speed Control
Junction
Temperature
Range:
Y
=
–40°C to +125°C, RoHS-Compliant
Package:
ML
TR
=
=
16-Lead 3 mm x 3 mm QFN
5,000/Reel
Media Type:
Note 1:
Tape and Reel identifier only appears in the
catalog part number description. This identifier is
used for ordering purposes and is not printed on
the device package. Check with your Microchip
Sales Office for package availability with the
Tape and Reel option.
2017 Microchip Technology Inc.
DS20005899A-page 39
MIC2103/4
NOTES:
DS20005899A-page 40
2017 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENAare trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
QUALITYꢀMANAGEMENTꢀꢀSYSTEMꢀ
CERTIFIEDꢀBYꢀDNVꢀ
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-2438-3
== ISO/TSꢀ16949ꢀ==ꢀ
2017 Microchip Technology Inc.
DS20005899A-page 41
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DS20005899A-page 42
2017 Microchip Technology Inc.
10/25/17
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