MIC2127 [MICROCHIP]
The MIC2127A is a constant-frequency synchronous buck controllers featuring a unique adaptive ON-t;型号: | MIC2127 |
厂家: | MICROCHIP |
描述: | The MIC2127A is a constant-frequency synchronous buck controllers featuring a unique adaptive ON-t |
文件: | 总38页 (文件大小:827K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MIC2127A
75V, Synchronous Buck Controller Featuring Adaptive
On-Time Control
Features
General Description
• Hyper Speed Control® Architecture Enables:
The MIC2127A is a constant-frequency synchronous
buck controller featuring a unique adaptive on-time
control architecture. The MIC2127A operates over an
input voltage range from 4.5V-75V. The output voltage
is adjustable down to 0.6V with an accuracy of ±1%.
The device operates with programmable switching
frequency from 270 kHz-800 kHz.
- High Input to Output Voltage Conversion
Ratio Capability
- Any Capacitor™ Stable
- Ultra-Fast Load Transient Response
• Wide 4.5V-75V Input Voltage Range
• Adjustable Output Voltage from 0.6V to 30V
The MIC2127A features a MODE pin that allows the
user to select either Continuous Conduction mode or
Hyper Light Load (HLL) mode under light loads. An
auxiliary bootstrap LDO improves the system efficiency
by supplying the MIC2127A internal circuit bias power
and gate drivers from the output of the converter. A
logic level enable (EN) signal can be used to enable or
disable the controller. The MIC2127A can start-up
monotonically into a prebiased output. The MIC2127A
features an open drain power good signal (PG) that
signals when the output is in regulation and can be
used for simple power supply sequencing.
• 270 kHz-800 kHz Programmable Switching Fre-
quency
• Built-In 5V Regulator for Single-Supply Operation
• Auxiliary Bootstrap LDO for Improving System
Efficiency
• Internal Bootstrap Diode
• Selectable Light Load Operating Mode
• Enable Input and Power Good Output
• Programmable Current Limit
• Hiccup Mode Short-Circuit Protection
The MIC2127A offers a full suite of protection features
to ensure protection of the IC during Fault conditions.
These include undervoltage lockout to ensure proper
operation under power-sag conditions, “hiccup” mode
short-circuit protection, internal soft start of 5 ms to
reduce inrush current during start-up and thermal shut-
down.
• Soft Start, Internal Compensation and Thermal
Shutdown
• Supports Safe Start-Up into a Prebiased Output
Applications
• Networking/Telecom Equipment
• Base Station, Servers
The MIC2127A is available in a 16-pin 3 mm x 3 mm
VQFN package, with an operating junction temperature
range from –40°C to +125°C.
• Distributed Power Systems
• Industrial Power Supplies
Typical Application
VIN
PVDD
VIN
4.5V* to 75V
4.7 μF
0.1 μF
0.1 μF
2.2 μFX3
Q1
DH
10
BST
L1
10 μH
VDD
VOUT
5V@5A
4.7 μF
SW
ILIM
C1
+
330 μF
MIC2127A
47 μF
1.3 k
0.1 μF
PG
EN
Q2
DL
7.5 k
4.7 nF
VIN
36 k
VDD
MODE
FB
1 k
100 k
60 k
EXTVDD
VOUT
FREQ
VIN
1 μF
AGND
PGND
Q1,Q3: SiR878ADP
L1: SRP1265A-100M, Bourns
C1: 10SVP330M
*Output voltage follows input voltage when the input is below the target output voltage
2016 Microchip Technology Inc.
DS20005676B-page 1
MIC2127A
Package Types
MIC2127A
3 x 3 VQFN*
(Top View)
13
16 15 14
PG
ILIM
1
2
3
4
MODE
FREQ
EN
12
11
EP
SW
10
9
BST
EXTVDD
5
6
7
8
* Includes Exposed Thermal Pad (EP); see Table 3-1.
Functional Block Diagram
PVDD
VIN
VDD
EXTVDD
EN
9
8
10
16
15
LINEAR
REGULATOR
LINEAR
REGULATOR
UVLO
4
5
3
BST
DH
THERMAL
SHUTDOWN
12
11
MODE
FREQ
Control
Logic
TON
ESTIMATION
Zero Crossing
Detection (ZCD) and
Negative Current Limit
SW
DL
COMPENSATION
gm
PVDD
13
FB
7
Soft
Start
CURRENT
LIMIT
DETECTION
VREF
0.6V
100 µA
2
6
ILIM
PG
1
VREF
FB
0.9
PGND
14
AGND
DS20005676B-page 2
2016 Microchip Technology Inc.
MIC2127A
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
VIN, FREQ, ILIM, SW to PGND.................................................................................................................... –0.3V to +76V
VDD, PVDD, FB, PG, MODE to AGND ........................................................................................................... –0.3V to +6V
EXTVDD to AGND...................................................................................................................................... –0.3V to +16V
BST to SW .................................................................................................................................................. –0.3V to +6V
BST to AGND ............................................................................................................................................. –0.3V to +82V
EN to AGND ...................................................................................................................................... –0.3V to (VIN +0.3V)
DH, DL to AGND ............................................................................................................................. –0.3V to (VDD +0.3V)
PGND to AGND .......................................................................................................................................... –0.3V to +0.3V
Junction Temperature .......................................................................................................................................... +150°C
Storage Temperature (TS)..................................................................................................................... –65°C to +150°C
Lead Temperature (soldering, 10s)........................................................................................................................ 260°C
ESD Rating(1)......................................................................................................................................................... 1000V
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods
may affect device reliability.
Note 1: Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5 k in series with
100 pF.
(1)
Operating Ratings
Supply Voltage (VIN) ..................................................................................................................................... 4.5V to 75V
SW, FREQ, ILIM, EN........................................................................................................................................... 0V to VIN
Junction Temperature (TJ) .................................................................................................................... –40°C to +125°C
Package Thermal Resistance (3 mm × 3 mm VQFN 16LD)
Junction to Ambient (JA).................................................................................................................................. 50.8°C/W
Junction to Case (JC)....................................................................................................................................... 25.3°C/W
Note 1: The device is not ensured to function outside the operating range.
2016 Microchip Technology Inc.
DS20005676B-page 3
MIC2127A
ELECTRICAL CHARACTERISTICS (Note 1)
Electrical Specifications: unless otherwise specified, VIN = 12V, VOUT = 1.2V; VBST – VSW = 5V, TA = +25°C.
Boldface values indicate –40°C TJ +125°C (Note 2).
Parameter
Symbol
Min.
Typ.
Max. Units
Test Conditions
Power Supply Input
Input Voltage Range
VVIN
4.5
—
5.5
V
PVDD and VDD shorted to VIN
(VPVDD = VVIN = VVDD
)
5.5
—
75
Quiescent Supply Current
IQ
—
1.4
1.8
mA
µA
VFB = 1.5V, MODE = VDD
no switching
,
—
300
600
VFB = 1.5V, MODE = AGND
,
no switching
Shutdown Supply Current
IVIN(SHDN)
—
—
0.1
30
5
µA
µA
EN = Low
60
EN = Low, VIN = VDD = 5.5V
PVDD,VDD and EXTVDD
PVDD Output Voltage
VPVDD
4.8
5.1
5.4
V
VVIN = 7V to 75V,
IPVDD = 10 mA
VDD UVLO Threshold
VVDD_UVLO_Rise
VVDD_UVLO_Hys
VEXTVDD_Rise
VEXTVDD_Hys
3.7
—
4.2
600
4.6
4.5
—
V
VDD rising
VDD UVLO Hysteresis
EXTVDD Bypass Threshold
EXTVDD Bypass Hysteresis
EXTVDD Dropout Voltage
Reference
mV
V
VDD falling
4.4
—
4.85
—
EXTVDD rising
200
250
mV
mV
—
—
VEXTVDD = 5V, IPVDD = 25 mA
Feedback Reference Voltage
VREF
IFB
0.597
0.594
—
0.6
0.6
50
0.603
0.606
500
V
V
TJ = 25°C
–40°C TJ 125°C
VFB = 0.6V
FB Bias Current (Note 3)
nA
Enable Control
EN Logic Level High
EN Logic Level Low
EN Hysteresis
VEN_H
VEN_L
VEN_Hys
IEN
1.6
—
—
—
—
—
—
0.6
—
V
V
100
6
mV
µA
EN Bias Current
ON Timer
30
VEN = 12V
Switching Frequency
f0
—
800
270
—
kHz VFREQ = VVIN, VVIN = 12V
230
300
VFREQ = 33% of VVIN
,
VVIN = 12V
Maximum Duty Cycle
Minimum Duty Cycle
Minimum ON Time
Minimum OFF Time
MODE
DMAX
DMIN
—
—
85
0
—
—
%
%
VFREQ = VVIN = 12V
VFB > 0.6V
tON(MIN)
tOFF(MIN)
—
80
230
—
ns
ns
150
350
MODE Logic High Level
VMODE_H
VMODE_L
1.6
—
—
—
70
—
0.6
—
V
V
MODE Logic Low Level
MODE Hysteresis
VMODE_Hys
—
mV
Note 1: Specification for packaged product only.
2: The application is fully functional at low VDD (supply of the control section) if the external MOSFETs have
low voltage VTH
3: Design specification.
.
DS20005676B-page 4
2016 Microchip Technology Inc.
MIC2127A
ELECTRICAL CHARACTERISTICS (Note 1)
Electrical Specifications: unless otherwise specified, VIN = 12V, VOUT = 1.2V; VBST – VSW = 5V, TA = +25°C.
Boldface values indicate –40°C TJ +125°C (Note 2).
Parameter
Current Limit
Symbol
Min.
Typ.
Max. Units
Test Conditions
Current-Limit Comparator
Offset
VOFFSET
ICL
–15
0
15
mV
VFB = 0.59V
VFB = 0.59V
I
I
LIM Source Current
90
—
—
100
0.3
48
110
—
µA
µA/°C
mV
LIM Source Current Tempco
Negative Current Limit
Comparator Threshold
—
—
Zero Crossing Detection Comparator
Zero Crossing Detection
Comparator Threshold
–24
–8
8
mV
FET Drivers
DH On-Resistance, High
State
RDH(PULL-UP)
RDH(PULL_DOWN)
RDL(PULL-UP)
—
—
—
—
2
2
3
4
DH On-Resistance, Low
State
DL On-Resistance, High
State
2
4
DL On-Resistance, Low State RDL(PULL_DOWN)
0.36
0.8
SW, VIN and BST Leakage
BST Leakage
—
—
—
—
—
—
—
—
—
30
50
50
µA
µA
µA
VIN Leakage
SW Leakage
Power Good (PG)
PG Threshold Voltage
PG Hysteresis
VPG_Rise
VPG_Hys
85
—
—
—
—
6
95
—
%VOUT VFB rising
%VOUT VFB falling
PG Delay Time
PG_R_DLY
VOL_PG
150
140
—
µs
VFB rising
PG Low Voltage
Thermal Protection
Overtemperature Shutdown
200
mV
VFB < 90% × VNOM, IPG = 1 mA
TSHDN
—
—
150
15
—
—
°C
°C
Junction temperature rising
Overtemperature Shutdown
Hysteresis
TSHDN_Hys
Note 1: Specification for packaged product only.
2: The application is fully functional at low VDD (supply of the control section) if the external MOSFETs have
low voltage VTH
.
3: Design specification.
TEMPERATURE SPECIFICATIONS
Electrical Specifications: unless otherwise specified, VIN = 12V, VOUT = 1.2V; VBST – VSW = 5V, TA = +25°C.
Parameters
Temperature Ranges
Sym.
Min. Typ.
Max.
Units
Conditions
Storage Temperature
TS
TJ
–65
–40
—
—
+150
+150
°C
°C
Junction Temperature
Package Thermal Resistances
Thermal Resistance,
16 Lead,
3 x 3 mm VQFN
Junction to Ambient
Junction to Case
JA
JC
—
50.8
25.3
—
°C/W
°C/W
2016 Microchip Technology Inc.
DS20005676B-page 5
MIC2127A
2.0
TYPICAL CHARACTERISTIC CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
25
20
15
10
5
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
VOUT = 5V
IOUT = 0A
EXTVDD = GND
FSW = 300 kHz
VEN = VVIN
VEXTVDD = VOUT
VVIN = 48V
IOUT = 0A
FSW = 300 kHz
VEN = VIN
HLL Mode
0
-50
-25
0
25
50
75
100
6
12 18 24 30 36 42 48 54 60 66 72 78
Input Voltage (V)
Temperature (°C)
FIGURE 2-1:
Input Supply Current vs.
FIGURE 2-4:
Input Supply Current vs.
Input Voltage.
Temperature (HLL Mode).
30
25
20
15
600
VVIN = 48V, with resistor divider
between VIN and AGND at FREQ pin
500
400
300
200
100
0
(100 k and 60 k)
EXTVDD = GND
VEXTVDD = VOUT
EN = GND
10
VVIN = 48V
IOUT = 0A
5
FSW = 300 kHz
0
-50
-25
0
25
50
75
100
6
18
30
42
54
66
78
Input Voltage (V)
Temperature (°C)
FIGURE 2-2:
Input Supply Current vs.
FIGURE 2-5:
Input Shutdown Current vs.
Temperature.
Input Voltage.
0.7
0.6
0.5
0.4
0.3
350
VVIN = 48V, with resistor divider between VIN
340
330
320
310
300
290
280
270
260
250
and AGND at FREQ pin
(100 k and 60 k)
EN = GND
VOUT =5V
0.2
IOUT =0A
FSW =300 kHz
0.1
0
VEN =VVIN
HLL Mode
6
12 18 24 30 36 42 48 54 60 66 72 78
Input Voltage (V)
-50
-25
0
25
50
75
100
Temperature (°C)
FIGURE 2-3:
Input Supply Current vs.
FIGURE 2-6:
Input Shutdown Current vs.
Input Voltage (HLL Mode).
Temperature.
DS20005676B-page 6
2016 Microchip Technology Inc.
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
4.5
4.3
4.1
3.9
3.7
3.5
3.3
3.1
5.4
5.3
5.2
5.1
5
IPVDD = 10 mA
V
EN = VVIN
VVDD rising
EXTVDD = GND
VDD falling
100
4.9
4.8
IVDD = 0 mA
EXTVDD = GND
6
12 18 24 30 36 42 48 54 60 66 72 78
Input Voltage (V)
-50
-25
0
25
50
75
125
Temperature (°C)
FIGURE 2-7:
PVDD Line Regulation.
FIGURE 2-10:
V
DD UVLO Threshold vs.
Temperature.
4.8
4.7
4.6
4.5
4.4
4.3
4.2
5.4
VVIN = 48V
I
PVDD = 10 mA
5.3
5.2
5.1
5
VEN = VVIN
VEXTVDD rising
VEXTVDD = 12V
EXTVDD = GND
VEXTVDD falling
4.9
4.8
VEXTVDD = 5V
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
FIGURE 2-8:
Temperature.
PVDD Voltage vs.
FIGURE 2-11:
Temperature.
EXTVDD Threshold vs.
5.2
5
1.6
1.4
1.2
1.0
0.8
0.6
VEXTVDD = 12V
EXTVDD = GND
4.8
4.6
4.4
4.2
VEN rising
VEXTVDD = 5V
VEN falling
VVIN = 48V
VEN = VVIN
4
0
10
20
30
40
50
60
-50
-25
0
25
50
75
100
125
IPVDD (mA)
Temperature (°C)
FIGURE 2-9:
PVDD Load Regulation.
FIGURE 2-12:
Enable Threshold vs.
Temperature.
2016 Microchip Technology Inc.
DS20005676B-page 7
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
140
5.6
VVIN = 12V
130
120
110
100
90
VEN = 5V
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
80
70
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
FIGURE 2-13:
Enable Bias Current vs.
FIGURE 2-16:
ILIM Source Current vs.
Temperature.
Temperature.
320
310
300
290
280
270
260
250
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
IOUT = 5A
IOUT = 0A
VOUT = 5V
SW_SETPONIT = 300 kHz
EXTVDD = VOUT
VEN = VVIN
240
230
220
F
V
-50
-25
0
25
50
75
100
125
6
12 18 24 30 36 42 48 54 60 66 72 78
Input Voltage (V)
Temperature (°C)
FIGURE 2-14:
Switching Frequency vs.
FIGURE 2-17:
Current Limit Comparator
Input Voltage.
Offset vs Temperature.
606.0
604.0
602.0
600.0
598.0
596.0
594.0
310
305
300
TA = 25°C
TA = -40°C
TA = 85°C
295
290
285
280
275
270
265
VVIN = 48V
OUT = 5V
SW_SETPONIT = 300 kHz
V
F
VEXTVDD = VOUT
VEN = VVIN
3.5
0
0.5
1
1.5
2
2.5
3
4
4.5
5
-50
-25
0
25
50
75
100
125
Load Current (A)
Temperature (°C)
FIGURE 2-15:
Switching Frequency vs.
FIGURE 2-18:
Feedback Voltage vs.
Load Current.
Temperature.
DS20005676B-page 8
2016 Microchip Technology Inc.
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
VOUT = 1.0V
VOUT =1.0V
VOUT = 1.2V
VOUT = 1.2V
V=1.5V
VOUT = 1.5V
OUT
VOUT = 1.8V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 2.5V
V
= 3.3V
OUT
VOUT = 3.3V
VOUT = 5V
VOUT = 5V
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Output Current (A)
Output Current (A)
FIGURE 2-19:
Efficiency vs. Output
FIGURE 2-22:
Efficiency vs. Output
Current (Input Voltage = 12V, CCM Mode).
Current (Input Voltage = 48V, CCM Mode).
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
VOUT = 1.0V
VOUT = 1.2V
V=1.5V
OUT
V
= 1.2V
VOUT = 1.0V
OUUT .
VOUT = 1.8V
V
= 1.8V
VOUT = 2.5V
V=1.5V
OUT
OUT
V
= 3.3V
OUT
V
= 3.3V
VOUT = 2.5V
OUT
VOUT = 5V
VOUT = 5V
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Output Current (A)
Output Current (A)
FIGURE 2-20:
Efficiency vs. Output
FIGURE 2-23:
Efficiency vs. Output
Current (Input Voltage = 24V, CCM Mode).
Current (Input Voltage = 60V, CCM Mode).
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
100%
90%
80%
70%
VOUT =1.0V
60%
VOUT =1.2V
50%
VOUT =1.5V
40%
V
= 1.2V
VOUT = 1.0V
2
VOUT =1.8V
30%
OUT
V
= 1.5V
V
= 1.8V
VOUT = 2.5V
OUT
OUT
20%
10%
0%
V
= 3.3V
VOUT = 2.5V
VOUT = 3.3V
OUT
V
= 5V
V
= 5V
OUT
OUT
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Output Current (A)
Output Current (A)
FIGURE 2-21:
Efficiency vs. Output
FIGURE 2-24:
Efficiency vs. Output
Current (Input Voltage = 36V, CCM Mode).
Current (Input Voltage = 75V, CCM Mode).
2016 Microchip Technology Inc.
DS20005676B-page 9
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
V=5V
VOUT = 3.3V
OUT
VOUT = 5V
VOUT = 3.3V
V=2.5V
OUT
V
= 2.5V
OUT
V
= 1.8V
OUT
V
= 1.8V
OUT
V
= 1.5V
OUT
V
= 1.5V
OUT
VOUT =1.2V
V
= 1.2V
OUT
VOUT = 1.0V
VOUT = 1.0V
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Load Current (A)
Load Current (A)
FIGURE 2-25:
Efficiency vs. Output
FIGURE 2-28:
Efficiency vs. Output
Current (Input Voltage = 12V, HLL Mode).
Current (Input Voltage = 48V, HLL Mode).
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
VOUT = 5V
V=5V
OUT
VOUT = 3.3V
VOUT = 3.3V
VOUT = 2.5V
VOUT = 2.5V
VOUT = 1.8V
V=1.8V
OUT
V
= 1.5V
V=1.5V
OUT
OUT
V
= 1.2V
VOUT = 1.2V
VOUT = 1.0V
VOUT=1.2V
OUT
V
= 1.0V
OUT
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Load Current (A)
Load Current (A)
FIGURE 2-26:
Efficiency vs. Output
FIGURE 2-29:
Efficiency vs. Output
Current (Input Voltage = 24V, HLL Mode).
Current (Input Voltage = 60V, HLL Mode).
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
VOUT = 5V
VOUT = 3.3V
VOUT = 2.5V
= 1.8V
V
OUT
V
= 3.3V
VOUT = 2.5V
OUT
VOUT = 5V
V
= 1.5V
OUT
V=1.8V
VOUT = 1.2V
OUT
V
= 1.2V
OUT
V=1.5V
VOUT = 1.0V
VOUT=1.0V
OUT
V
= 1.0V
OUT
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Load Current (A)
Load Current (A)
FIGURE 2-27:
Current (Input Voltage = 36V, HLL Mode).
Efficiency vs. Output
FIGURE 2-30:
Current (Input Voltage = 75V, HLL Mode).
Efficiency vs. Output
DS20005676B-page 10
2016 Microchip Technology Inc.
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
VVIN
20V/div
VVIN
20V/div
VSW
VSW
20V/div
20V/div
VVIN = 0V to 48V
VOUT = 5V
IOUT = 5A
VVIN = 0V to 48V
VOUT = 5V
IOUT = 0.1A
VOUT
2V/div
VOUT
2V/div
IL
5A/div
IL
2A/div
10 ms/div
10 ms/div
FIGURE 2-31:
Power-Up.
FIGURE 2-34:
Power-Up at Light Load in
HLL Mode (IOUT = 0.1A).
VVIN
20V/div
VVIN = 48V to 0V
VVIN = 48V
VOUT = 5V
IOUT = 5A
V
OUT = 5V
IOUT = 5A
VEN
2V/div
VSW
20V/div
VOUT
2V/div
VOUT
2V/div
IL
5A/div
IL
5A/div
VPG
5V/div
10 ms/div
4 ms/div
FIGURE 2-32:
Power-Down.
FIGURE 2-35:
Enable Turn-On/Turn-Off.
VVIN
20V/div
VEN
2V/div
VVIN = 48V
VOUT = 5V
IOUT = 5A
VSW
20V/div
VVIN = 0V to 48V
V
OUT = 5V
VOUT
2V/div
IOUT = 0.1A
VOUT
2V/div
IL
5A/div
I
VPG
L
5V/div
2 ms/div
10 ms/div
2A/div
FIGURE 2-36:
Enable Turn-On Delay.
FIGURE 2-33:
Power-Up at Light Load in
CCM Mode (IOUT = 0.1A).
2016 Microchip Technology Inc.
DS20005676B-page 11
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
VEN
2V/div
VVIN = 48V
OUT = 5V
IOUT = 5A
V
VEN
2V/div
VOUT
2V/div
VOUT
2V/div
VVIN = 48V
VOUT = 5V
IOUT = 0A
V
OUT_PREBIAS = 2.5V
IL
5A/div
VSW
50V/div
VPG
5V/div
IL
2A/div
2 ms/div
4 ms/div
FIGURE 2-37:
Enable Turn-Off Delay.
FIGURE 2-40:
Enable Turn-On with
Prebiased Output (CCM Mode).
VVIN = 48V
VOUT = 5V
IOUT = 0.2A
VEN
2V/div
VEN
2V/div
VOUT
2V/div
VVIN = 48V
VOUT = 5V
IOUT = 0A
VOUT
2V/div
VOUT_PREBIAS = 2.5V
VSW
50V/div
IL
2A/div
IL
2A/div
VPG
5V/div
10 ms/div
4 ms/div
FIGURE 2-38:
Enable Turn-On/Turn-Off at
FIGURE 2-41:
Enable Turn-On with
Light Load in CCM Mode.
Prebiased Output (HLL Mode).
VVIN = 48V
VVIN = 48V
V
OUT = 5V
V
OUT = 5V
IOUT = 0.2A
IOUT = 0A
VEN
2V/div
VEN
1V/div
VOUT
2V/div
VOUT
2V/div
IL
2A/div
VSW
50V/div
VPG
5V/div
4 ms/div
10 ms/div
FIGURE 2-39:
Enable Turn-On/Turn-Off at
FIGURE 2-42:
Enable Thresholds.
Light Load in HLL Mode.
DS20005676B-page 12
2016 Microchip Technology Inc.
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
VVIN = Rising
VVDD
1V/div
VOUT = 5V
IOUT = 0A
VVIN = 0V to 48V
VOUT = 5V
VVIN
20V/div
Load = Short
ILIM = 1.3 k
R
VOUT
500 mV/div
VOUT
2V/div
IL
5A/div
VSW
5V/div
4 ms/div
10 ms/div
FIGURE 2-43:
VDD UVLO Threshold-
FIGURE 2-46:
Power-Up into Output Short.
Rising.
VVIN = 48V
VVDD
1V/div
V
OUT = 5V
VVIN = Falling
VOUT = 5V
IOUT = 0A
RILIM = 1.3 k
VOUT
2V/div
VOUT
2V/div
VSW
5V/div
IOUT
5A/div
2 ms/div
100 ms/div
FIGURE 2-47:
Threshold.
Output Current Limit
FIGURE 2-44:
Falling.
V
DD UVLO Threshold-
VVIN = 48V
VOUT = 5V
Load = Short
VOUT
2V/div
R
ILIM = 1.3 k
VEN
2V/div
VVIN = 48V
VOUT = 5V
Load = Short
RILIM = 1.3 k
VOUT
500 mV/div
IL
5A/div
IL
5A/div
4 ms/div
2 ms/div
FIGURE 2-45:
Enable into Output Short.
FIGURE 2-48:
Output Short Circuit.
2016 Microchip Technology Inc.
DS20005676B-page 13
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
VVIN = 48V
VOUT = 5V
Load = Short
VOUT
2V/div
R
ILIM = 1.3 k
VOUT
100 mV/div
AC coupled
VVIN = 48V
VOUT = 5V
IOUT = 0A to 2.5A
IL
5A/div
IOUT
2A/div
4 ms/div
100 µs/div
FIGURE 2-49:
Recovery from Output Short
FIGURE 2-52:
Load Transient Response
Circuit.
(CCM Mode).
VOUT
200 mV/div
AC coupled
VOUT
100 mV/div
AC coupled
VVIN = 48V
VOUT = 5V
VVIN = 48V
VOUT = 5V
IOUT = 0A to 2.5A
I
OUT = 0A to 5A
IOUT
IOUT
2A/div
2A/div
2 ms/div
100 µs/div
FIGURE 2-50:
Load Transient Response
FIGURE 2-53:
Load Transient Response
(CCM Mode).
(HLL Mode).
VOUT
100 mV/div
AC coupled
VOUT
200 mV/div
AC coupled
VVIN = 48V
VVIN = 48V
VOUT = 5V
V
OUT = 5V
IOUT = 2.5A to 5A
I
OUT = 0A to 5A
IOUT
IOUT
2A/div
2A/div
100 µs/div
2 ms/div
FIGURE 2-51:
Load Transient Response
FIGURE 2-54:
Load Transient Response
(HLL Mode).
(HLL Mode).
DS20005676B-page 14
2016 Microchip Technology Inc.
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RILIM = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application circuit).
VVIN = 48V
VOUT = 5V
IOUT = 0A
VVIN = 48V
OUT = 5V
IOUT = 5A
V
VOUT
VOUT
50 mV/div
AC coupled
50 mV/div
AC coupled
VSW
50V/div
IL
2A/div
IL
5A/div
VSW
50 V/div
2 µs/div
2 µs/div
FIGURE 2-55:
Switching Waveform at No
FIGURE 2-57:
Switching Waveform at Full
Load (CCM Mode).
Load.
VVIN = 48V
V
OUT = 5V
IOUT = 0A
VOUT
50 mV/div
AC coupled
IL
2A/div
VSW
50V/div
10 µs/div
FIGURE 2-56:
Switching Waveform at No
Load (HLL Mode).
2016 Microchip Technology Inc.
DS20005676B-page 15
MIC2127A
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
MIC2127A
PIN FUNCTION TABLE
Symbol
Pin Function
1
2
PG
ILIM
Open-drain Power Good Output Pin
Current Limit Setting Resistor Connection Pin
Switch Pin and Current Sense Input for negative current limit
Bootstrap Capacitor Connection Pin
High-side N-MOSFET Gate Driver Output
Power Ground
3
SW
4
BST
DH
5
6
PGND
DL
7
Low-side N-MOSFET Gate Driver Output
Internal Low Dropout Regulators Output of the MIC2127A
Supply Input for the internal low voltage LDO
Enable Input
8
PVDD
EXTVDD
EN
9
10
11
12
13
14
15
16
17
FREQ
MODE
FB
Switching Frequency Programming Input
Light Load Mode Selection Input
Feedback Input
AGND
VDD
Analog Ground
Supply Input for the MIC2127A internal analog circuits
Supply Input for the internal high-voltage LDO
Exposed Pad
VIN
EP
3.1
Power Good Output Pin (PG)
3.5
High-Side N-MOSFET Gate Driver
Output Pin (DH)
Connect PG to VDD through a pull-up resistor. PG is low
when the FB voltage is 10% below the 0.6V reference
voltage.
High-side N-MOSFET gate driver Output. Connect DH
to the gate of external high-side N-MOSFET.
3.2
Current Limit Pin (I
)
LIM
3.6
Power Ground Pin (P
)
GND
Connect a resistor from ILIM to SW to set the current
limit. Refer to Section 4.3 “Current Limit (ILIM)” for
more details.
PGND provides the return path for the internal low-side
N-MOSFET gate driver output and also acts as
reference for the current limit comparator. Connect
PGND to the external low-side N-MOSFET source
terminal and to the return terminal of PVDD bypass
capacitor.
3.3
Switch Pin (SW)
The SW pin provides the return path for the high-side
N-MOSFET gate driver when High-Side MOSFET
Gate Drive (DH) is low and is also used to sense
low-side MOSFET current by monitoring the SW node
voltage for negative current limit function.
3.7
Low-Side N-MOSFET Gate Driver
Output Pin (DL)
Low-side N-MOSFET gate driver output. Connect to
the gate terminal of the external low-side N-MOSFET.
Connect SW to the pin where the high-side MOSFET
source and the low-side MOSFET drain terminal are
connected together.
3.8
Internal Low Dropout Regulators
Output Pin (P
)
VDD
3.4
Bootstrap Capacitor Pin (BST)
Combined output of the two internal LDOs (one LDO
powered by VIN and the other LDO powered by
EXTVDD). PVDD is the supply for the low-side
MOSFET driver and for the floating high-side MOSFET
driver. Connect a minimum of 4.7 µF low ESR ceramic
BST capacitor acts as supply for the high-side
N-MOSFET driver. Connect a minimum of 0.1 µF low
ESR ceramic capacitor between BST and SW. Refer to
Section 4.5 “High-Side MOSFET Gate Drive (DH)”
for more details.
capacitor from PVDD to PGND
.
DS20005676B-page 16
2016 Microchip Technology Inc.
MIC2127A
3.9
EXTVDD
3.13 Feedback Input Pin (FB)
Supply to the internal low voltage LDO. Connect
EXTVDD to the output of the buck converter if it is
between 4.7V to 14V to improve system efficiency.
Bypass EXTVDD with a minimum of 1 µF low ESR
ceramic capacitor.
FB is input to the transconductance amplifier of the
control loop. The control loop regulates the FB voltage
to 0.6V. Connect the FB node to the mid-point of the
resistor divider between output and AGND
.
3.14 Analog Ground Pin (A
)
GND
3.10 Enable Input Pin (EN)
AGND is the reference to the analog control circuits
inside the MIC2127A. Connect AGND to PGND at one
point on the PCB.
EN is a logic input. Connect to logic high to enable the
converter, and connect to logic low to disable the
converter.
3.15 Bias Voltage Pin (V
)
DD
3.11 Switching Frequency
Supply for the MIC2127A internal analog circuits. Con-
nect VDD to PVDD of the MIC2127A through a low-pass
filter. Connect a minimum of 4.7 µF low ESR ceramic
capacitor from VDD to AGND for decoupling.
Programming Input Pin (FREQ)
Switching Frequency Programming Input. Connect to
mid-point of the resistor divider formed between VIN
and AGND to set the switching frequency of the con-
verter. Tie FREQ to VIN to set the switching frequency
to 800 kHz. Refer to Section 5.1 “Setting the Switch-
ing Frequency” for more details.
3.16 Input Voltage Pin (V )
IN
Supply Input to the internal high-voltage LDO. Connect
to the main power source and bypass to PGND with a
minimum of 0.1 µF low ESR ceramic capacitor.
3.12 Light Load Mode Selection Input
Pin (MODE)
3.17 Exposed Pad (EP)
Light Load Mode Selection Input. Connect MODE pin
to VDD to select Continuous Conduction mode under
light loads, or connect to AGND to select Hyper Light
Load (HLL) mode of operation under light loads. Refer
to Section 4.2 “Light Load Operating Mode
(MODE)” for further details.
Connect to the AGND copper plane to improve thermal
performance of the MIC2127A.
2016 Microchip Technology Inc.
DS20005676B-page 17
MIC2127A
The maximum duty cycle can be calculated using
Equation 4-2:
4.0
FUNCTIONAL DESCRIPTION
The MIC2127A is an adaptive on-time synchronous
buck controller, designed to cover a wide range of input
voltage applications ranging from 4.5V-5V. An adaptive
on-time control scheme is employed to get a fast
transient response and to obtain high-voltage
conversion ratios at constant switching frequency.
Overcurrent protection is implemented by sensing
low-side MOSFET's RDS(ON), which eliminates lossy
current sense resistor. The device features internal
soft-start, enable input, UVLO, power good output
(PG), secondary bootstrap LDO and thermal shutdown.
EQUATION 4-2:
tSW – tOFFMIN
230 ns
tSW
DMAX = --------------------------------------- = 1 – ---------------
tSW
Where:
t
=
Switching period, equal to 1/f
SW
SW
It is not recommended to use the MIC2127A with an
OFF time close to tOFF(MIN) during steady-state
operation.
4.1
Theory of Operation
The adaptive on-time control scheme results in a
constant switching frequency over the wide range of
input voltage and load current. The actual ON time and
resulting switching frequency varies with the different
rising and falling times of the external MOSFETs. The
minimum controllable ON time (tON(MIN)) results in a
lower switching frequency than the target switching
frequency in high VIN to VOUT ratio applications.
The MIC2127A is an adaptive on-time synchronous
buck controller that operates based on ripple at the
feedback node. The output voltage is sensed by the
MIC2127A feedback pin (FB) and is compared to a
0.6V reference voltage (VREF
) at the low-gain
transconductance error amplifier (gM), as shown in the
Functional Block Diagram. Figure 4-1 shows the
MIC2127A control loop timing during steady-state
operation.
Equation 4-3 shows the output-to-input voltage ratio,
below which the MIC2127A lowers the switching
frequency in order to regulate the output to set value.
The error amplifier behaves as the short circuit for the
ripple voltage frequency on the FB pin, which causes
the error amplifier output voltage ripple to follow the
feedback voltage ripple. When the transconductance
error amplifier output (VgM) is below the reference
voltage of the comparator, which is same as the error
amplifier reference (VREF), the comparator triggers and
generates an on-time event. The on-time period is
predetermined by the fixed tON estimator circuitry,
which is given by Equation 4-1:
EQUATION 4-3:
VOUT
------------- tON(MIN) fSW
VIN
Where:
V
V
f
=
=
=
=
Output voltage
OUT
IN
Input voltage
Switching frequency
EQUATION 4-1:
SW
t
Minimum controllable ON time (80 ns typ.)
ON(MIN)
VOUT
tONESTIMATED = --------------------------
VVIN fSW
Where:
V
V
=
=
=
Output voltage
OUT
VIN
Power stage input voltage
Switching frequency
f
SW
At the end of the ON time, the internal high-side driver
turns off the high-side MOSFET and the low-side driver
turns on the low-side MOSFET. The OFF time of the
high-side MOSFET depends on the feedback voltage.
When the feedback voltage decreases, the output of
the gM amplifier (VgM) also decreases. When the output
of the gM amplifier (VgM) is below the reference voltage
of the comparator (which is same as the error amplifier
reference (VREF)), the OFF time ends and ON time is
triggered. If the OFF time determined by the feedback
voltage is less than the minimum OFF time (tOFF(MIN)
)
of the MIC2127A, which is about 230 ns (typical), the
MIC2127A control logic applies the tOFF(MIN), instead.
DS20005676B-page 18
2016 Microchip Technology Inc.
MIC2127A
Full Load
ǻIL
IL
IL
No Load
ǻVOUT
VOUT
ǻVOUT = ESR*ǻIL
VOUT
ǻVFB
VREF
VFB
ǻVFB = ǻVOUT *(VREF/VOUT
)
ǻVFB
VREF
VREF
VgM
VFB
MIC2127A Triggers ON-Time event if
the error amplifier output (VgM) is below VREF
VDH
VREF
VgM
Estimated ON-Time
FIGURE 4-1:
MIC2127A Control Loop
Timing.
Figure 4-2 shows operation of the MIC2127A during
load transient. The output voltage drops due to a
sudden increase in load, which results in the error
amplifier output (VgM) falling below VREF. This causes
the comparator to trigger an on-time event. At the end
of the ON time, a minimum OFF time tOFF(MIN) is
generated to charge the bootstrap capacitor. The next
ON time is triggered immediately after the tOFF(MIN) if
the error amplifier output voltage (VgM) is still below
VREF due to the low feedback voltage. This operation
results in higher switching frequency during load
transients. The switching frequency returns to the
nominal set frequency once the output stabilizes at new
load current level. The output recovery time is fast and
the output voltage deviation is small in the MIC2127A
converter due to the varying duty cycle and switching
frequency.
VDH
toff(MIN)
FIGURE 4-2:
Response.
MIC2127A Load Transient
Unlike true current-mode control, the MIC2127A uses
the output voltage ripple to trigger an on-time event. In
order to meet the stability requirements, the MIC2127A
feedback voltage ripple should be in phase with the
inductor current ripple and large enough to be sensed
by the internal error amplifier. The recommended
feedback voltage ripple is approximately 20 mV-
100 mV over the full input voltage range. If a low-ESR
output capacitor is selected, then the feedback voltage
ripple may be too small to be sensed by the internal
error amplifier. Also, the output voltage ripple and the
feedback voltage ripple are not necessarily in phase
with the inductor current ripple if the ESR of the output
capacitor is very low. For these applications, ripple
injection is required to ensure proper operation. Refer
to Section 5.7 “Ripple Injection” for details about the
ripple injection technique.
2016 Microchip Technology Inc.
DS20005676B-page 19
MIC2127A
4.2
Light Load Operating Mode
(MODE)
4.3
Current Limit (I
)
LIM
The MIC2127A uses the low-side MOSFET RDS(ON) to
sense inductor current. In each switching cycle of the
MIC2127A converter, the inductor current is sensed by
monitoring the voltage across the low-side MOSFET
during the OFF period of the switching cycle, during
which low-side MOSFET is ON. An internal current
source of 100 µA generates a voltage across the
external current limit, setting resistor RCL as shown in
Figure 4-4.
MIC2127A features a MODE pin that allows the user to
select either Continuous Conduction mode or Hyper
Light Load (HLL) mode under light loads. HLL mode
increases the system efficiency at light loads by
reducing the switching frequency. Continuous
Conduction mode keeps the switching frequency
almost constant over the load current range.
Figure 4-3 shows the control loop timing in HLL mode.
The MIC2127A has a zero crossing comparator
(ZC Detection) that monitors the inductor current by
sensing the voltage drop across the low-side MOSFET
during its ON time. The zero crossing comparator
triggers whenever the low-side MOSFET current goes
negative and turns off the low-side MOSFET. The
switching instant of the high-side MOSFET depends on
the error amplifier output, which is same as the
comparator inverting input (see the Functional Block
Diagram). If the error amplifier output is higher than the
comparator reference, then the MIC2127A enters into
Sleep mode. During Sleep mode, both the high-side
and low-side MOSFETs are kept off and the efficiency
is optimized by shutting down all the nonessential
circuits inside the MIC2127A. The load current is
supplied by the output capacitor during Sleep mode.
The control circuitry wakes up when the error amplifier
output falls below the comparator reference and a tON
pulse is triggered.
VIN
DH
MIC2127A
L1
SW
Control
Logic
RCL
DL
PGND
CURRENT
LIMIT
DETECTION
ICL
ILIM
FIGURE 4-4:
MIC2127A Current Limiting
Circuit.
The ILIM pin voltage (VILIM) is the difference of the
voltage across the low-side MOSFET and the voltage
across the resistor (VCL). The sensed voltage VILIM is
compared with the power ground (PGND) after a
blanking time of 150 ns.
Low side MOSFET current crosses 0A and the comparator inverting input, VgM, is higher than its reference.
This condition triggers the HLL mode
The comparator inverting input, VgM, is lower than its reference. The
MIC2127A comes out of HLL mode
IL
0A
If the absolute value of the voltage drop across the
low-side MOSFET is greater than the absolute value of
the voltage across the current setting resistor (VCL), the
MIC2127A triggers the current limit event. Consecutive
eight-current limit events trigger the Hiccup mode.
Once the controller enters into Hiccup mode, it initiates
a soft-start sequence after a hiccup timeout of 4 ms
(typical). Both the high-side and low-side MOSFETs
are turned off during hiccup timeout. The hiccup
sequence, including the soft start, reduces the stress
on the switching FETs and protects the load and supply
from severe short conditions.
VREF
VFB
VREF
VgM
ZCD
The current limit can be programmed by using the
following Equation 4-4.
VDH
VDL
FIGURE 4-3:
MIC2127A Control Loop
Timing (HLL Mode).
The typical no-load supply current during HLL mode is
only about 300 µA, allowing the MIC2127A to achieve
high efficiency at light load operation.
DS20005676B-page 20
2016 Microchip Technology Inc.
MIC2127A
bootstrap diode between the PVDD and BST pins. This
circuit supplies energy to the high-side drive circuit. A
low ESR ceramic capacitor should be connected
between BST and SW pins (refer to the Typical
Application circuit).The capacitor between BST and
SW pins, CBST, is charged while the low-side MOSFET
is on. When the high-side MOSFET driver is turned on,
energy from CBST is used to turn the MOSFET on. A
minimum of 0.1 µF low ESR ceramic capacitor is
recommended between BST and SW pins. The
required value of CBST can be calculated using the
following Equation 4-6:
EQUATION 4-4:
ILPP
ICLIM + --------------- RDSON + VOFFSET
2
RCL = --------------------------------------------------------------------------------------------------
ICL
Where:
I
=
=
=
=
=
Load current limit
CLIM
R
On-resistance of low-side power MOSFET
Inductor peak-to-peak ripple current
Current-limit comparator offset (15 mV max.)
Current-limit source current (100 µA typ)
DS (ON)
IL
PP
V
OFFSET
I
CL
EQUATION 4-6:
Since MOSFET RDS(ON) varies from 30%-40% with
temperature, it is recommended to consider the
RDS(ON) variation while calculating RCL in the above
equation, to avoid false current limiting due to
increased MOSFET junction temperature rise. Also
connect the SW pin directly to the drain of the low-side
QG_HS
CBST = ---------------
VBST
Where:
Q
=
=
High-side MOSFET total gate charge
Drop across the C
G_HS
V
,
BST
MOSFET to accurately sense the MOSFETs RDS(ON)
.
BST
generally 50 mV to 100 mV
To improve the current limit variation, the MIC2127A
adjusts the internal source current of the current limit
(ICL) at a rate of 0.3 µA/°C when the MIC2127A
junction temperature changes to compensate the
RDS(ON) variation of external low-side MOSFET. The
effectiveness of this method depends on the thermal
gradient between the MIC2127A and the external
low-side MOSFET. The lower the thermal gradient, the
better the current limit variation.
A small resistor in series with CBST can be used to slow
down the turn-on time of the high-side N-channel
MOSFET.
4.6
Low-Side MOSFET Gate Drive (DL)
The MIC2127A's low-side drive circuit is designed to
switch an N-Channel external MOSFET. The internal
low-side MOSFET driver is powered by PVDD. Connect
a minimum of 4.7 µF low-ESR ceramic capacitor to
supply the transient gate current of the external
MOSFET.
A small capacitor (CCL) can be connected from the ILIM
pin to PGND to filter the switch node ringing during the
OFF time, allowing a better current sensing. The time
constant of RCL and CCL should be less than the
minimum OFF time.
4.7
Auxiliary Bootstrap LDO
(EXTVDD)
4.4
Negative Current Limit
The MIC2127A features an auxiliary bootstrap LDO
that improves the system efficiency by supplying the
MIC2127A internal circuit bias power and gate drivers
from the converter output voltage. This LDO is enabled
when the voltage on the EXTVDD pin is above 4.6V
(typical) and, at the same time, the main LDO that
operates from VIN is disabled to reduce power
consumption.
The MIC2127A implements negative current limit by
sensing the SW voltage when the low-side FET is ON.
If the SW node voltage exceeds 48 mV typical, the
device turns off the low-side FET for 500 ns. Negative
current limit value is shown in Equation 4-5.
EQUATION 4-5:
48mV
INLIM = --------------------
RDSON
Where:
I
=
=
Negative current limit
NLIM
R
On-resistance of low-side power MOSFET
DS (ON)
4.5
High-Side MOSFET Gate Drive
(DH)
The MIC2127A's high-side drive circuit is designed to
switch an N-Channel external MOSFET. The
MIC2127A Functional Block diagram shows
a
2016 Microchip Technology Inc.
DS20005676B-page 21
MIC2127A
5.2
Output Voltage Setting
5.0
5.1
APPLICATIONS INFORMATION
The output voltage can be adjusted using a resistor
divider from output to AGND whose mid-point is
connected to the FB pin, as shown the Figure 5-3.
Setting the Switching Frequency
The MIC2127A is an adjustable-frequency, synchro-
nous buck controller, featuring a unique adaptive
on-time control architecture. The switching frequency
can be adjusted between 270 kHz-800 kHz by chang-
ing the resistor divider network between VIN and AGND
pins consisting of R1 and R2, as shown in Figure 5-1.
MIC2127A
VOUT
MIC2127A
R1
VIN
COMPENSATION
VIN
16
11
4.5V to 75V
FB
13
gm
R1
R2
SOFT-
START
R2
FREQ
Comparator
VREF
0.6V
AGND
14
FIGURE 5-3:
Output Voltage Adjustment.
The output voltage can be calculated using
Equation 5-2.
FIGURE 5-1:
Adjustment.
Switching Frequency
Equation 5-1 shows the estimated switching frequency.
EQUATION 5-2:
R1
EQUATION 5-1:
VOUT = VREF 1 + -----
R2
R2
Where:
fSW_ADJ = fO ------------------
R1 + R2
V
= 0.6V
REF
fO is the switching frequency when R1 is 100 k and R2
being open; fO is typically 800 kHz. For more precise
setting, it is recommended to use Figure 5-2.
The maximum output voltage that can be programmed
using the MIC2127A is limited to 30V, if not limited by
the maximum duty cycle (see Equation 4-2).
A typical value of R1 is less than 30 k. If R1 is too
large, it may allow noise to be introduced into the
voltage feedback loop. It also increases the offset
between the set output voltage and actual output
voltage because of the error amplifier bias current. If R1
is too small in value, it will decrease the efficiency of the
power supply, especially at light loads. Once R1 is
selected, R2 can be calculated using Equation 5-3.
800
VOUT = 5V
R
1 = 100 k
700
600
500
400
300
200
IOUT = 5A
VIN = 48V
VIN = 75V
VIN = 24V
EQUATION 5-3:
50
500
R2 (k)
5000
R1
R2 = ----------------------
VOUT
------------- – 1
VREF
FIGURE 5-2:
Switching Frequency vs. R2.
DS20005676B-page 22
2016 Microchip Technology Inc.
MIC2127A
EQUATION 5-5:
IRMSHS = ILOAD
5.3
MOSFET Selection
Important parameters for MOSFET selection are:
D
• Voltage rating
• On-resistance
• Total gate charge
ILOAD is the load current and D is the operating duty
cycle, given by Equation 5-6.
The voltage rating for the high-side and low-side
MOSFETs is essentially equal to the power stage input
voltage VIN. A safety factor of 30% should be added to
the VIN(MAX) while selecting the voltage rating of the
MOSFETs to account for voltage spikes due to circuit
parasitic elements.
EQUATION 5-6:
VOUT
D = -------------
VIN
5.3.1
HIGH-SIDE MOSFET POWER
LOSSES
EQUATION 5-7:
The total power loss in the high-side MOSFET
(PHSFET) is the sum of the power losses because of
conduction (PCONDUCTION), switching (PSW), reverse
recovery charge of low-side MOSFET body diode
(PQrr) and MOSFET's output capacitance discharge, as
calculated in the Equation 5-4.
Q
SWHS RDHPULL_UP + RHSGATE
tR = -----------------------------------------------------------------------------------------------------
DD – VTH
V
EQUATION 5-8:
Q
SWHS RDHPULL_DOWN + RHSGATE
tF = -------------------------------------------------------------------------------------------------------------
VTH
EQUATION 5-4:
Where:
PHSFET = PCONDUCTIONHS + PSWHS + PQrr + PCOSS
R
= High-side gate driver pull-up
resistance
DH(PULL-UP)
DH(PULL-DOWN)
HS(GATE)
PCONDUCTIONHS = IRMSHS2 RDSON_HS
R
= High-side gate driver pull-down
resistance
PSWHS = 0.5 VIN ILOAD tR + tF fSW
PQrr = VIN Qrr fSW
R
V
= High-side MOSFET gate resistance
= Gate to Source threshold voltage of
the high-side MOSFET
TH
1
PCOSS = -- COSSHS + COSSHS VIN2 fSW
Q
= Switching gate charge of the
high-side MOSFET which can be
approximated by Equation 5-9.
SW(HS)
2
Where:
R
=
=
=
=
=
On-resistance of the high-side MOSFET
Operating input voltage
DS(ON_HS)
V
IN
EQUATION 5-9:
I
f
Load current
LOAD
SW
QGSHS
Operating switching frequency
QSWHS = -------------------- + Q GDHS
2
Q
Reverse recovery charge of low-side
MOSFET body diode or of external
diode across low-side MOSFET
rr
Where:
Q
= High-side MOSFET gate to source
charge
GS(HS)
C
C
=
=
=
Effective high-side MOSFET output
capacitance
OSS(HS)
OSS(LS)
Q
)
= High-side MOSFET gate to drain charge
GD(HS
Effective low-side MOSFET output
capacitance
IRMS(HS)
RMS current of the high-side MOSFET
which can be calculated using
Equation 5-5.
=
The high-side MOSFET turn-on and
turn-off transition times which can be
approximated by Equation 5-7 and
Equation 5-8
tR, F
t
2016 Microchip Technology Inc.
DS20005676B-page 23
MIC2127A
5.3.2
LOW-SIDE MOSFET POWER
LOSSES
The total power loss in the low-side MOSFET (PLSFET
EQUATION 5-12:
VOUT VIN – VOUT
L = -----------------------------------------------------
)
VIN fSW 0.3 IFL
is the sum of the power losses because of conduction
(PCONDUCTION(LS)) and body diode conduction during
the dead time (PDT), as calculated in Equation 5-10.
Where:
V
= Input voltage
IN
f
I
= Switching frequency
= Full load current
= Output voltage
SW
FL
EQUATION 5-10:
V
PLSFET = PCONDUCTIONLS + PDT
OUT
PCONDUCTIONLS = IRMSLS2 RDSON_LS
For a selected Inductor, the peak-to-peak inductor
current ripple can be calculated using Equation 5-13.
PDT = 2 VF ILOAD tDT fSW
EQUATION 5-13:
Where:
VOUT VIN – VOUT
R
V
= On-resistance of the low-side MOSFET
DS(ON_LS)
IL_PP = -----------------------------------------------------
VIN fSW L
= Low-side MOSFET body diode forward
voltage drop
F
t
f
I
= Dead time which is approximately 20 ns
= Switching Frequency
DT
The peak inductor current is equal to the load current
plus one half of the peak-to-peak inductor current ripple
which is shown in Equation 5-14.
SW
= RMS current of the low-side MOSFET
which can be calculated using
Equation 5-11
RMS(LS)
EQUATION 5-14:
IL_PP
EQUATION 5-11:
IRMSLS = ILOAD
IL_PK = ILOAD + ----------------
2
1 – D
The RMS and saturation current ratings of the selected
inductor should be at least equal to the RMS current
and saturation current calculated in Equation 5-15 and
Equation 5-16.
Where:
ILOAD = load current
D
= operating duty cycle
EQUATION 5-15:
5.4
Inductor Selection
IL_PP2
IL_RMS
=
ILOAD(MAX)2 + -----------------------
Inductance value, saturation and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine
the peak-to-peak inductor ripple current.
12
Where:
I
= Maximum load current
LOAD(MAX)
The lower the inductance value, the higher the
peak-to-peak ripple current through the inductor, which
increases the core losses in the inductor. Higher
inductor ripple current also requires more output
capacitance to smooth out the ripple current. The
greater the inductance value, the lower the
peak-to-peak ripple current, which results in a larger
and more expensive inductor.
EQUATION 5-16:
RCL ICL + 15mV
IL_SAT = -------------------------------------------------
RDS(ON)
Where:
R
= Current limit resistor
CL
I
= Current-Limit Source Current
(100 µA typical)
CL
A good compromise between size, loss and cost is to
set the inductor ripple current to be equal to 30% of the
maximum output current.
R
= On-resistance of low-side power MOSFET
DS (ON)
The inductance value is calculated by Equation 5-12.
DS20005676B-page 24
2016 Microchip Technology Inc.
MIC2127A
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance.
Use of ferrite materials is recommended in the higher
switching frequency applications. Lower-cost iron
powder cores may be used, but the increase in core
loss reduces the efficiency of the power supply. This is
especially noticeable at low output power. The winding
resistance decreases efficiency at the higher output
current levels. The winding resistance must be
minimized, although this usually comes at the expense
of a larger inductor. The power dissipated in the
inductor is equal to the sum of the core and copper
losses. At higher output loads, the core losses are
usually insignificant and can be ignored. At lower
output currents, the core losses can be a significant
contributor. Core loss information is usually available
from the magnetic’s vendor.
EQUATION 5-19:
IL_PP
COUT = -------------------------------------------------
8 fSW VOUT_PP
Where:
C
= Output capacitance value
= Switching frequency
OUT
f
SW
V
= Steady state output voltage ripple
OUT_PP
As described in Section 4.1 “Theory of Operation”,
the MIC2127A requires at least 20 mV peak-to-peak
ripple at the FB pin to ensure that the gM amplifier and
the comparator behave properly. Also, the output
voltage ripple should be in phase with the inductor
current. Therefore, the output voltage ripple caused by
the output capacitor’s value should be much smaller
than the ripple caused by the output capacitor ESR. If
low-ESR capacitors, such as ceramic capacitors, are
selected as the output capacitors, a ripple injection
circuit should be used to provide enough
feedback-voltage ripple. Refer to the Section 5.7
“Ripple Injection” for details.
The amount of copper loss in the inductor is calculated
by Equation 5-17.
EQUATION 5-17:
PINDUCTORCU = IL_RMS2 RDCR
The voltage rating of the capacitor should be twice the
output voltage for tantalum and 20% greater for alumi-
num electrolytic, ceramic or OS-CON. The output
capacitor RMS current is calculated in Equation 5-20.
5.5
Output Capacitor Selection
The main parameters for selecting the output capacitor
are capacitance value, voltage rating and RMS current
rating. The type of the output capacitor is usually
determined by its equivalent series resistance (ESR).
Recommended capacitor types are ceramic, tantalum,
low-ESR aluminum electrolytic, OS-CON and
POSCAP. The output capacitor ESR also affects the
control loop from a stability point of view. The maximum
value of ESR can be calculated using Equation 5-18.
EQUATION 5-20:
IL_PP
IC_OUT(RMS) = ----------------
12
The power dissipated in the output capacitor is shown
in Equation 5-21.
EQUATION 5-21:
EQUATION 5-18:
PDIS(C_OUT) = IC_OUT(RMS)2 ESRC_OUT
VOUT_PP
ESR -------------------------
IL_PP
Where:
V
I
= Peak-to-peak output voltage ripple
= Peak-to-peak inductor current ripple
OUT_PP
L_PP
The required output capacitance to meet steady state
output voltage ripple can be calculated using
Equation 5-19.
2016 Microchip Technology Inc.
DS20005676B-page 25
MIC2127A
The applications are divided into three situations
according to the amount of the feedback voltage ripple:
5.6
Input Capacitor Selection
The input capacitor reduces peak current drawn from
the power supply and reduces noise and voltage ripple
on the input. The input voltage ripple depends on the
input capacitance and ESR. The input capacitance and
ESR values can be calculated using Equation 5-22.
1. Enough ripple at the feedback due to the large
ESR of the output capacitor (Figure 5-4). The
converter is stable without any additional ripple
injection at the FB node. The feedback voltage
ripple is given by Equation 5-25.
EQUATION 5-22:
EQUATION 5-25:
ILOAD D 1 – D
R2
CIN = ------------------------------------------------
fSW VIN_C
VFBPP = ------------------ ESR IL_PP
R2 + R1
VIN_ESR
ESRC_IN = -----------------------
IL_PP is the peak-to-peak value of the inductor current
ripple.
IL_PK
Where:
I
I
= Load Current
LOAD
L_PK
= Peak Inductor Current
L
SW
V
V
η
= Input ripple due to capacitance
= Input ripple due to input capacitor ESR
= Power conversion efficiency
INC
R1
COUT
INESR
MIC2127A
FB
ESR
R2
The input capacitor should be rated for ripple current
rating and voltage rating. The RMS value of input
capacitor current is determined at the maximum output
current. The RMS current rating of the input capacitor
should be greater than or equal to the input capacitor
RMS current calculated using Equation 5-23.
FIGURE 5-4:
Enough Ripple at FB.
2. Inadequate ripple at the feedback voltage due to
the small ESR of the output capacitor.
EQUATION 5-23:
The output voltage ripple can be fed into the FB pin
through a feed forward capacitor, CFF in this case, as
shown in Figure 5-5. The typical CFF value is between
1 nF-100 nF. With the feed forward capacitor, the feed-
back voltage ripple is very close to the output voltage
ripple, which is shown in Equation 5-26.
IC_IN(RMS) = ILOAD(MAX)
D 1 – D
The power dissipated in the input capacitor is
calculated using Equation 5-24.
EQUATION 5-26:
EQUATION 5-24:
VFBPP = ESR IL_PP
PDISS(C_IN) = IC_IN(RMS)2 ESRC_IN
5.7
Ripple Injection
L
SW
The minimum recommended ripple at the FB pin for
proper operation of the MIC2127A error amplifier and
comparator is 20 mV. However, the output voltage
ripple is generally designed as 1%-2% of the output
voltage. For low output voltages, such as a 1V, the
output voltage ripple is only 10 mV-20 mV, and the
feedback voltage ripple is less than 20 mV. If the
feedback voltage ripple is so small that the gM amplifier
and comparator cannot sense it, then the MIC2127A
loses control and the output voltage is not regulated. In
order to have sufficient VFB ripple, the ripple injection
method should be applied for low output voltage ripple
applications.
R1
R2
CFF
COUT
ESR
MIC2127A
FB
FIGURE 5-5:
Inadequate Ripple at FB.
3. Virtually no ripple at the FB pin voltage due to
the very-low ESR of the output capacitors.
DS20005676B-page 26
2016 Microchip Technology Inc.
MIC2127A
In this case, additional ripple can be injected into the
FB pin from the switching node SW, via a resistor RINJ
and a capacitor CINJ, as shown in Figure 5-6.
5.8
Power Dissipation in MIC2127A
The MIC2127A features two Low Dropout Regulators
(LDOs) to supply power at the PVDD pin from either VIN
or EXTVDD depending on the voltage at the EXTVDD
pin. PVDD powers MOSFET drivers and VDD pin, which
is recommended to connect to PVDD through a low
pass filter, powers the internal circuitry. In the
applications where the output voltage is 5V and above
(up to 14V), it is recommended to connect EXTVDD to
the output to reduce the power dissipation in the
MIC2127A, to reduce the MIC2127A junction
temperature and to improve the system efficiency.
L
SW
RINJ
R1
R2
CFF
COUT
ESR
CINJ
MIC2127A
FB
The power dissipation in the MIC2127A depends on
the internal LDO being in use, on the gate charge of the
external MOSFETs and on the switching frequency.
The power dissipation and the junction temperature of
the MIC2127A can be estimated using Equations 5-30,
5-31 and 5-32.
FIGURE 5-6:
Invisible Ripple at FB.
The injected ripple at the FB pin in this case is given by
the Equation 5-27.
EQUATION 5-27:
Power dissipation in the MIC2127A when EXTVDD is
not used.
VOUT 1 – D
VFBPP = ------------------------------------------
CFF RINJ fSW
EQUATION 5-30:
In Equation 5-27, it is assumed that the time constant
associated with the CFF meets the criterion shown in
Equation 5-28.
PIC = VIN ISW + IQ
Power dissipation in the MIC2127A when EXTVDD is
used.
EQUATION 5-28:
TSW
EQUATION 5-31:
= CFF R1 R2 RINJ
PIC = VEXTVDD ISW + IQ
ISW = QG fSW
QG = QG_HS + QG_LS
The process of sizing the ripple injection resistor and
capacitors is:
1. Select CINJ in the range of 47 nF-100 nF, which
can be considered as short for a wide range of
the frequencies.
Where:
2. Select CFF in the range of 0.47 nF-10 nF, if R1
I
I
= Switching current into the V pin
SW
Q
IN
and R2 are in k range.
= Quiescent current
3. Select RINJ according to Equation 5-29.
Q
= Total gate charge of the external MOS-
FETs which is sum of the gate charge of
G
high-side MOSFET (Q
)
and the
EQUATION 5-29:
G_HS
low-side MOSFET (Q
) at 5V gate to
G_LS
source voltage. Gate charge information
can be obtained from the MOSFETs
datasheet.
VOUT 1 – D
RINJ = -------------------------------------------------------
CFF fSW VFBPP
Where:
V
= Voltage at the EXTVDD pin
EXTVDD
V
= Output voltage
= Duty cycle
OUT
(4.6 ≤ V
≤ 14 V typ.)
EXTVDD
D
f
= Switching frequency
The junction temperature of the MIC2127A can be
estimated using Equation 5-32.
SW
V (pp) = Feedback Ripple
FB
Once all the ripple injection component values are cal-
culated, ensure that the criterion shown in
Equation 5-28 is met.
2016 Microchip Technology Inc.
DS20005676B-page 27
MIC2127A
EQUATION 5-32:
EQUATION 5-33:
·
PIC = 48V 10 mA + 1.5mA
TJ = PIC JA + TA
PIC = 0.552W
Where:
TJ = 0.552W 50.8C W + 85C
TJ = 113C
T
= Junction temperature
= Power dissipation
J
P
IC
θ
= Junction Ambient Thermal resistance
(50.8°C/W)
JA
When the 5V output is used as the input to the
EXTVDD pin, the MIC2127A junction temperature
reduces from +113°C to +88°C, as calculated in
Equation 5-34.
The maximum recommended operating junction
temperature for the MIC2127A is +125°C.
Using the output voltage of the same switching
regulator, when it is between 4.6V (typ.) to 14V, as the
voltage at the EXTVDD pin significantly reduces the
power dissipation inside the MIC2127A. This reduces
the junction temperature rise as illustrated in
Equation 5-34.
EQUATION 5-34:
PIC = 5V 10 mA +1.5 mA
PIC = 0.058W
TJ = 0.058W 50.8C W + 85C
TJ = 88C
For the typical case of VVIN = 48V, VOUT = 5V,
maximum ambient temperature of +85°C and 10 mA of
ISW, the MIC2127A junction temperature when the
EXTVDD is not used is given by Equation 5-33.
DS20005676B-page 28
2016 Microchip Technology Inc.
MIC2127A
6.4
Output Capacitor
6.0
PCB LAYOUT GUIDELINES
• Use a copper plane to connect the output
capacitor ground terminal to the input capacitor
ground terminal.
PCB layout is critical to achieve reliable, stable and
efficient performance. The following guidelines should
be followed to ensure proper operation of the
MIC2127A converter.
• The feedback trace should be separate from the
power trace and connected as closely as possible
to the output capacitor. Sensing a long
high-current load trace can degrade the DC load
regulation.
6.1
IC
• The ceramic bypass capacitors, which are con-
nected to the VDD and PVDD pins, must be located
right at the IC. Use wide traces to connect to the
VDD, PVDD and AGND, and PGND pins respectively.
6.5
MOSFETs
• MOSFET gate drive traces must be short and
wide. The ground plane should be the connection
• The signal ground pin (AGND) must be connected
directly to the ground planes.
between the MOSFET source and PGND
.
• Place the IC close to the point-of-load (POL).
• Chose a low-side MOSFET with a high CGS/CGD
ratio and a low internal gate resistance to
minimize the effect of dv/dt inducted turn-on.
• Signal and power grounds should be kept
separate and connected at only one location.
• Use a 4.5V VGS rated MOSFET. Its higher gate
threshold voltage is more immune to glitches than
a 2.5V or 3.3V rated MOSFET.
6.2
Input Capacitor
• Place the input ceramic capacitors as closely as
possible to the MOSFETs.
• Place several vias to the ground plane closely to
the input capacitor ground terminal.
6.3
Inductor
• Keep the inductor connection to the switch node
(SW) short.
• Do not route any digital lines underneath or close
to the inductor.
• Keep the switch node (SW) away from the
feedback (FB) pin.
• The SW pin should be connected directly to the
drain of the low-side MOSFET to accurately
sense the voltage across the low-side MOSFET.
2016 Microchip Technology Inc.
DS20005676B-page 29
MIC2127A
7.0
7.1
PACKAGING INFORMATION
Package Marking Information
16-Pin QFN (3 x 3 mm)
Example
Legend: XX...X Product code or customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
e
3
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
e
3
)
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (⎯) symbol may not be to scale.
DS20005676B-page 30
2016 Microchip Technology Inc.
MIC2127A
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2016 Microchip Technology Inc.
DS20005676B-page 31
MIC2127A
NOTES:
DS20005676B-page 32
2016 Microchip Technology Inc.
MIC2127A
APPENDIX A: REVISION HISTORY
Revision B (December 2016)
• Minor editorial corrections.
• Updated Product Identification System page.
Revision A (December 2016)
• Original Release of this Document.
2016 Microchip Technology Inc.
DS20005676B-page 33
MIC2127A
NOTES:
DS20005676B-page 34
2016 Microchip Technology Inc.
MIC2127A
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
X
XX
XX
PART NO.
Device
Examples:
a) MIC2127AYML-TR: 75V, Synchronous Buck
Controller Featuring
Temperature
Package Code Media Type
Adaptive On-Time Control,
–40°C to +125°C junction
temperature range, 16-LD
VQFN package, 5000/reel
Device:
MIC2127A: 75V, Synchronous Buck Controller Featuring
Adaptive On-Time Control
b) MIC2127AYML-T5: 75V, Synchronous Buck
Controller Featuring
Temperature:
Y
= Industrial Temperature Grade
Adaptive On-Time Control,
–40°C to +125°C junction
(-40°C to +125°C)
temperature range, 16-LD
VQFN package, 500/reel
Package:
ML
=
16 Lead, 3x3 mm VQFN
TR
T5
=
=
5000/reel
500/reel
Media Type:
2016 Microchip Technology Inc.
DS20005676B-page 35
MIC2127A
NOTES:
DS20005676B-page 36
2016 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
© 2016, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-1227-4
== ISO/TS 16949 ==
2016 Microchip Technology Inc.
DS20005676B-page 37
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DS20005676B-page 38
2016 Microchip Technology Inc.
11/07/16
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