MIC2595R-2YMTR_技术文档

MIC2589/MIC2595

Single-Channel, Negative High-Voltage Hot

Swap Power Controller/Sequencer

General Description

Features

The MIC2589 and MIC2595 are single-channel,

negative voltage hot swap controllers designed to

address the need for safe insertion and removal of

circuit boards into “live” system backplanes, while using

few external components. The MIC2589/MIC2589R and

the MIC2595/MIC2595R are each available in 14-pin

SOIC packaging and work in conjunction with an

external N-Channel MOSFET for which the gate drive is

controlled to provide inrush current limiting and output

voltage slew-rate control. Overcurrent fault protection is

also provided via a programmable overcurrent threshold

and filter. Very fast fault response is provided to ensure

that system power supplies maintain regulation even

during output short circuits. These controllers offer two

responses to a circuit breaker fault condition: the

MIC2589 and MIC2595 latch the circuit breaker’s output

off when the overcurrent threshold interval is exceeded

and the overcurrent filter times out while the MIC2589R

and MIC2595R automatically attempt to restart at a fixed

duty cycle after a current limit fault. A primary Power-

Good signal and two secondary (delayed and

staggered) Power-Good signals are provided to indicate

that the output voltage is within its valid operating range.

These signals can be used to perform an all-at-once or

a sequenced enabling of one or more DC-DC power

modules.

• Provides safe insertion and removal from live –48V

(nominal) backplanes

• Operates from –19V to –80V

• Fast responding circuit breaker (<1µs) to short circuit

conditions

• User-programmable overcurrent detector response

time

• Electronic circuit breaker function:

Output latch OFF (MIC2589/MIC2595)

Output auto-retry (MIC2589R/MIC2595R)

• Active current regulation to control inrush currents

• Programmable undervoltage and overvoltage

lockouts (MIC2589/MIC2589R)

• Programmable UVLO hysteresis

(MIC2595/MIC2595R)

• Staggered ‘Power-Good’ output signals provide load

sequencing

Active-HIGH (-1)

Active-LOW (-2)

Applications

• Central office switching

• –48V power distribution

• Distributed power systems

• AdvancedTCA

All support documentation can be found on Micrel’s web

site at www.micrel.com.

_________________________________________________________________________________________________________

Ordering Information

Part Number

PWRGD

Polarity

Circuit Breaker

Function

Lockout Functions

Package

Standard

Pb-Free

MIC2589-1BM

MIC2589-2BM

MIC2589-1YM

MIC2589-2YM

Active-High

Active-Low

Active-High

Active-Low

Active-High

Active-Low

Active-High

Active-Low

Programmable UVLO & OVLO

Programmable UVLO Hysteresis

Latched Off

Auto Retry

Latched Off

Auto Retry

14-Pin SOIC

MIC2589R-1BM MIC2589R-1YM

MIC2589R-2BM MIC2589R-2YM

MIC2595-1BM

MIC2595-2BM

MIC2595-1YM

MIC2595-2YM

MIC2595R-1BM MIC2595R-1YM

MIC2595R-2BM MIC2595R-2YM

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Typical Applications

-48V RTN

(Long Pin)

-48V RTN

MIC2589-2BM

*D1

SMAT70A

1

2

3

4

5

6

7

14

13

12

11

10

9

/PWRGD1

VDD

/PWRGD3

/PWRGD2

DRAIN

IN+

OUT+

+5V_OUT

R1

689k

1%

R2

11.8k

1%

C4

100µF

C_TIMER

0.068µF

C3

0.1µF

ON/OFF*

PGTIMER

UV

-48V RTN

(Short Pin)

IN–

IN+

OUT–

+5V RTN

OV

C_FILTER

2.2µF

C1

0.47µF

OUT+

+2.5V_OUT

CFILTER

CNLD

VEE

GATE

C6

100µF

C5

0.1µF

ON/OFF*

R3

12.4k

1%

SENSE

N/C

C_NLD

0.068µF

IN–

OUT–

+2.5V RTN

*C2

8

0.1µF

R4

10

IN+

OUT+

+1.8V_OUT

C8

100µF

C7

0.1µF

ON/OFF*

IN– OUT–

-48V RTN

(Long Pin)

+1.8V RTN

R_SENSE

0.01

5%

M1

SUM110N10-09

Nominal Undervoltage and Overvoltage Thresholds:

_UV=36.5V

V

V_OV=71.2V

Overcurrent TImer Delay

~

t_FLT=30ms

*Optional components (See Funtional Description and Applications Information for more details)

#An external pull-up resistor for the power-good signal is necessary for DC-DC convertors (and all other load modules) not equipped with an

internal pull-up impedance

2

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Pin Configuration

14-Pin SOIC

MIC2589-2BM

MIC2589R-2BM

MIC2589-2YM

MIC2589R-2YM

MIC2589-1BM

MIC2589R-1BM

MIC2589-1YM

MIC2589R-1YM

14-Pin SOIC

MIC2595-1BM

MIC2595R-1BM

MIC2595-1YM

MIC2595R-1YM

14-Pin SOIC

MIC2595-2BM

MIC2595R-2BM

MIC2595-2YM

MIC2595R-2YM

3

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Pin Description

Pin Number

Pin Name

Pin Function

Power-Good Output 1: Asserted when the voltage on the DRAIN pin (V_DRAIN) is within

_PGTHof VEE, indicating that the output voltage is within proper specifications. For

the MIC2589-1 and MIC2595-1, PWRGD1 will be high impedance when V_DRAINis

less than V_PGTH, and will pull-down to V_DRAINwhen V_DRAINis greater than V_PGTH. For

the MIC2589-2 and MIC2595-2, /PWRGD1 will pull-down to V_DRAINwhen V_DRAINis

1

PWRGD1

(MIC25XX-1)

Active High

V

/PWRGD1

(MIC25XX-2)

Active Low

less than V_PGTH, and will be high-impedance when V_DRAINis greater than V_PGTH

.

2

3

PGTIMER

A capacitor connected from this pin to VEE sets the time interval between assertions

of PWRGD2 (or /PWRGD2) and PWRGD3 (or /PWRGD3) relative to PWRGD1 (or

/PWRGD1). See the “Functional Description” for further detail.

UV

Undervoltage Threshold Input: When the voltage at the UV pin is less than the V_UVL

threshold, the GATE pin is immediately pulled low by an internal 100µA current pull-

down. The UV pin is also used to cycle the device off and on to reset the circuit

breaker. Taken together, the OV and UV pins form a window comparator that defines

the limits of V_EEto deliver power to the load.

(MIC2589

and

MIC2589R)

3

4

OFF

(MIC2595

and

Turn-Off Threshold: When the voltage at the OFF pin is less than the V_OFFL

threshold, the GATE pin is immediately pulled low by an internal 100µA current pull-

down. The OFF pin is also used to cycle the device off and on to reset the circuit

breaker. Taken together, the ON and OFF pins provide programmable hysteresis for

the MIC2595 to be enabled.

MIC2595R)

OV

(MIC2589

and

Overvoltage Threshold Input: When the voltage at the OV pin is greater than the

V

_OVHthreshold, the GATE pin is immediately pulled low by an internal 100µA current

pull-down.

MIC2589R)

4

5

ON

(MIC2595

and

Turn-On Threshold: At initial system power-up or after the part has been shut off by

the OFF pin, the voltage on the ON pin must be above the V_ONHthreshold in order for

the MIC2595 to be enabled.

MIC2595R)

CFILTER

Current Limit Response Timer: A capacitor connected between this pin and VEE

provides filtering against nuisance tripping of the circuit breaker by setting a time

delay, t_FLT, for which an overcurrent event must last prior to signaling a fault condition

and latching the output off. The minimum time for t_FLTwill be the time it takes for the

output (capacitance) to charge to VEE during start-up. This pin is held to VEE with a

3µA current pull-down when no current limit condition exists. See the “Functional

Description” for further details.

6

7

CNLD

VEE

No-Load Detect Timer: The absence of a load for the MIC2589/MIC2589R is defined

for any current load that is less than 20% of the full-scale current limit (i.e., 0.20 ×

I

_LIM). A capacitor between CNLD and VEE sets the filter delay, t_NLD, for a load current

that is 80% (or greater) below the full-scale current limit before the circuit breaker is

tripped.

Negative Supply Voltage Input: Connect the negative, or low side, terminal of the

input power supply.

8

9

NC

No Internal Connection

SENSE

Circuit Breaker Sense Input: A resistor between this pin and VEE sets the current

limit trip point for the circuit. When the current limit threshold of IR = 50mV is

exceeded for t_FLT, the circuit breaker is tripped and the GATE pin is immediately

pulled low by I_GATEOFF. Toggling UV or OV will reset the circuit breaker. In order to

disable the circuit breaker (i.e., eliminate overcurrent V_SENSE-V_EEprotection), connect

(short) the SENSE pin to VEE and also connect the CNLD pin to VEE to disable the

no-load detection feature.

10

11

GATE

Gate Drive Output: Connects to the Gate of an N-Channel MOSFET.

Drain Sense Input: Connects to the Drain of an N-Channel MOSFET.

DRAIN

4

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Pin Desription (cont.)

Pin Number

Pin Name

Pin Function

Power-Good Output 2: Asserted when the following is true: (PWRGD1 = Asserted)

12

PWRGD2

(MIC25XX-1) AND (Time after Assertion of PWRGD1 = Time PWRGD2, as programmed by the

capacitor on PGTIMER). Once PWRGD1 is asserted, the PGTIMER pin begins to

charge and PWRGD2 will assert when PGTIMER crosses the PWRGD2 threshold

(V_THRESH(PG2)= 0.63V, typical). Also see PWRGD1 and PGTIMER pin descriptions

12

13

/PWRGD2

/Power-Good Output 2: Asserted when the following is true: (/PWRGD1 = Asserted)

(MIC25XX-2) AND (Time after Assertion of /PWRGD1 = Time /PWRGD2, as programmed by the

capacitor on PGTIMER). Once /PWRGD1 is asserted, the PGTIMER pin begins to

charge and /PWRGD2 will assert when PGTIMER crosses the /PWRGD2 threshold

(V_THRESH(PG2)= 0.63V, typical). Also see /PWRGD1 and PGTIMER pin descriptions.

PWRGD3

Power-Good Output 3: Asserted when the following is true: (PWRGD1 = Asserted)

(MIC25XX-1) AND (Time after Assertion of PWRGD1 = Time PWRGD3, as programmed by the

capacitor on PGTIMER). Once PWRGD1 is asserted, the PGTIMER pin begins to

charge and PWRGD3 will assert when PGTIMER crosses the PWRGD3 threshold

(V_THRESH(PG3)= 1.15V, typical). Also see PWRGD1 and PGTIMER pin descriptions.

/PWRGD3

/Power-Good Output 3: Open Collector. Asserted when the following is true:

(MIC25XX-2) (/PWRGD1 = Asserted) AND (Time after Assertion of /PWRGD1 = Time /PWRGD3,

as programmed by the capacitor on PGTIMER). Once /PWRGD1 is asserted, the

PGTIMER pin begins to charge and /PWRGD3 will assert when PGTIMER crosses

the /PWRGD3 threshold (V_THRESH(PG3)= 1.15V, typical). Also see /PWRGD1 and

PGTIMER pin descriptions.

14

VDD

Positive Supply Input: Connect to the positive, or high side, terminal of the input

power supply.

5

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Operating Ratings⁽²⁾

Absolute Maximum Ratings⁽¹⁾

(All voltages are referred to V_EE)

Supply Voltage (V_DD-V_EE) ...............................+19V to +80V

Ambient Temperature Range (T_A).................–40°C to 85°C

Junction Temperature (T_J)..........................................125°C

Package Thermal Resistance

Supply Voltage (V_DD– V_EE) ........................... –0.3V to 100V

DRAIN, PWRGD pins.................................... –0.3V to 100V

GATE pin...................................................... –0.3V to 12.5V

SENSE, OV, UV, ON, OFF pins........................ –0.3V to 6V

Lead Temperature (soldering)

SOIC (θ_JA) ....................................................... 120°C/W

Standard Package (-xBM)

(IR Reflow, Peak Temperature...........240°C +0°C/-5°C

Pb-Free Package (-xYM)

(IR Reflow, Peak Temperature...........260°C +0°C/-5°C

ESD Ratings(3)

Human Body Model..................................................2kV

Machine Model ......................................................100V

DC Electrical Characteristics⁽⁴⁾

V_DD= 48V, V_EE= 0V, T_A= 25°C, unless otherwise noted. Bold indicates specifications apply over the full operating temperature

range of –40°C to 85°C.

Symbol

V_DD– V_EE

I_DD

Parameter

Condition

Min

19

Typ

Max

80

6

Units

V

Supply Voltage

Supply Current

4

mA

mV

V_TRIP

Circuit Breaker Trip Voltage

No-Load Detect Threshold

(% of full-scale current limit)

GATE Drive Voltage, (V_GATE– V_EE

)

40

50

60

I_NLDTH

I

_OUTdecreasing

20

22

%

I_OUTincreasing

I_NLDHYS

V_CNLD

I_CNLD

No-Load Detect Threshold

Hysteresis

2

1.24

25

%

No-Load Detect Timer High

Threshold Voltage

1.17

10

9

1.33

40

V

No-Load Detect Timer

µA

V

Capacitor Charge Current⁽⁵⁾

V_GATE

I_GATEON

GATE Drive Voltage,

15V ≤ (V_DD– V_EE) ≤ 80V

10

11

(V_GATE– V_EE

)

GATE Pin Pull-Up Current

V

_GATE= V_EEto 8V

30

45

60

µA

19V ≤ (V_DD– V_EE) ≤ 80V

I_SENSE

SENSE Pin Current

V_SENSE= 50mV

0.2

µA

I_GATEOFF

GATE Pin Sink Current

(V_SENSE– V_EE) = 100mV

100

65

240

mA

V

_GATE= 2V

CFILTER Pin Charge Current (V_SENSE– V_EE) > V_TRIP

_CFILTER= 0.75V

I_CFILTER

95

4

135

6

µA

V

V_GATE= 3V

CFILTER Discharge Current

(V_SENSE– V_EE) < V_TRIP

V_CFILTER= 0.75V

2

V

_GATE= 3V

V_{CFILTER(TRIP)}

High Threshold Voltage

Overcurrent Detect Timer

(V_SENSE– V_EE) > V_TRIP

1.17

0.17

1.25

0.22

1.33

0.25

V

V_{CFILTER(RETRY)}Voltage on CFILTER

(decreasing) to Trigger Auto-

Retry

(MIC2589R and MIC2595R)

PGTIMER Charge Current

I_PGTIMER

Voltage on PGTIMER = 0.75 V

6

30

45

80

µA

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Notes:

1. Exceeding the absolute maximum rating may damage the device.

2. The device is not guaranteed to function outside its operating rating.

3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.

4. Specification for packaged product only.

5. Not 100% tested. Parameters are guaranteed by design.

DC Electrical Characteristics⁽⁶⁾

V_DD= 48V, V_EE= 0V, T_A= 25°C, unless otherwise noted. Bold indicates specifications apply over the full operating temperature

range of –40°C to 85°C.

Symbol

Parameter

Condition

Min

0.5

Typ

Max

0.8

Units

V_THRESH(PG2)PGTIMER Threshold Voltage for

PWRGD2 and /PWRGD2

0.63

V

V_THRESH(PG3)PGTIMER Threshold Voltage for

PWRGD3 and /PWRGD3

1.00

1.15

1.30

V

R_PGTIMER

V_OVH

PGTIMER Discharge Resistance Voltage on PGTIMER = 0.5 V

250

500

750

Ω

OV Pin High Threshold Voltage

(MIC2589 and MIC2589R)

Low-to-High transition

1.198

1.223

1.247

V

V_OVL

OV Pin Low threshold Voltage

(MIC2589 and MIC2589R)

High-to-Low transition

1.165

1.203

20

1.232

V

mV

V

V_OVHYS

V_UVL

OV Pin Hysteresis

(MIC2589 and MIC2589R)

UV Pin Low threshold Voltage

(MIC2589 and MIC2589R)

High-to-Low transition

Low-to-High transition

1.198

1.213

1.223

1.243

20

1.247

1.272

V_UVH

UV Pin High Threshold Voltage

(MIC2589 and MIC2589R)

V

V_UVHYS

V_ONH

UV Pin Hysteresis

(MIC2589 and MIC2589R)

mV

V

ON Pin High Threshold Voltage

(MIC2595 and MIC2595R)

Low-to-High transition

High-to-Low transition

V_INPUT= 1.25V

1.198

1.223

1.247

0.5

V_OFFL

I_CNTRL

V_PGTH

V_OLPG

OFF Pin Low Threshold Voltage

(MIC2595 and MIC2595R)

V

Input Current (OV, UV, ON, OFF

Pins)

µA

V

Power-Good Threshold

High-to-Low Transition

1.1

1.26

1.40

0.8

(V_DRAIN– V_EE

)

PWRGD Output Voltage

(relative to voltage at the DRAIN

pin)

0 ≤ I_PG≤ 1mA

MIC25XX-1

-0.25

V

(V_DRAIN– V_EE) > V_PGTH

MIC25XX-2

(V_DRAIN– V_EE) < V_PGTH

0.8

V

V_OLPG– V_DRAIN

I_LKG(PG)

Note:

PWRGD Output Leakage

Current

V_PWRGD= V_DD= 80 V

1

µA

6. Specification for packaged product only.

7

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

AC Electrical Characteristics⁽⁷⁾

Symbol

Parameter

Condition

Min

Typ

Max

Units

t_OCSENSE

Overcurrent Sense to GATE

Low Trip Time⁽⁸⁾

Figure 2

V_SENSE– V_EE= 100mV

3.5

µs

t_OVPHL

t_OVPLH

t_UVPHL

t_UVPLH

t_OFFPHL

t_ONPLH

t_PGLH1

OV High to GATE Low⁽⁸⁾

(MIC2589 and MIC2589R)

Figure 3

OV Low to GATE High⁽⁸⁾,

(MIC2589 and MIC2589R)

Figure 3

UV Low to GATE Low⁽⁸⁾,

(MIC2589 and MIC2589R)

Figure 4

UV High to GATE High⁽⁸⁾

(MIC2589 and MIC2589R)

Figure 4

OFF Low to GATE Low⁽⁸⁾,

Figure 5 (MIC2595 and

MIC2595R)

ON High to GATE High⁽⁸⁾

(MIC2595 and MIC2595R)

Figure 5

OV = 1.5V

OV = 1.0V

UV = 1.0V

UV = 1.5V

OFF = 1.0V

ON = 1.5V

1

3

µs

DRAIN Low to PWRGD1 Output C_LOADon PWRGDx = 50pF

High⁽⁸⁾

R_PULLUP= 100kΩ

(MIC25XX-1XX)

t_PGHL1

t_PGHL2

t_PGLH2

DRAIN High to all PWRGDx

Outputs Low⁽⁸⁾

C

_LOADon PWRGDx = 50pF

5

3

µs

R_PULLUP= 100kΩ

(MIC25XX-1XX)

DRAIN Low to /PWRGD1

Output Low⁽⁸⁾

C_LOADon /PWRGDx = 50pF

R_PULLUP= 100kΩ

(MIC25XX-2)

DRAIN High to all /PWRGDx

Outputs High⁽⁸⁾

C_LOADon /PWRGDx = 50pF

R_PULLUP= 100kΩ

(MIC25XX-2)

Note:

7. Specification for packaged product only.

8. Not 100% production tested. Parameters are guaranteed by design.

8

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Timing Diagrams

OVERCURRENT

EVENT

t < t_FLT

t ≥ t_FLT

I_LIMIT

I_LOAD

t_NLD

I_NLDTH

0A

Output OFF

(at V_DD

Load current is regulated

at I_LIMIT= 50mV/R_SENSE

)

V_DRAIN

(at V_EE

)

(at V_EE

)

(at V_EE)

V_UV(MIC2589)

V

_OFF, V_ON(MIC2595)

V_UVL

V_UVH

(V_UVV_EE

Reduction in V _DRAINto support

_LIMIT= 50mV/R_SENSE

(V_UVV_EE

)

I

(at V_EE

)

Figure 1. Overcurrent and Undercurrent (No Load) Response

Figure 2. SENSE to GATE Timing Response

Figure 3. MIC2589/MIC2595 Overvoltage Response

Figure 4. MIC2589/MIC2589R Undervoltage Response

9

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Figure 5a. MIC2595/MIC2595R OFF to GATE Drive Response

1.223V

V_ON

t_ONLH

V_GATE

1V

Figure 5b. MIC2595/MIC2595R ON to GATE Drive Response

Figure 6. DRAIN to Power-Good Response

10

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Typical Characteristics

GATE Drive (V_GATE- V_EE

vs. Temperature

)

Supply Current

vs. Temperature

Supply Current

vs. Supply Voltage

6

5

4

3

2

1

0

12

10

8

5

4

3

2

1

0

6

4

2

0

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

15 25 35 45 55 65 75 85

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

GATE Drive (V_GATE- V_EE

vs. Supply Voltage

)

GATE Pull-Up Current

vs. Temperature

GATE Sink Current

vs. Temperature

12

10

8

60

350

300

250

200

150

100

50

40

30

20

10

0

6

4

2

0

15 25 35 45 55 65 75 85

SUPPLY VOLTAGE (V)

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

TEMPERATURE (°C)

Power-Good Threshold

vs. Temperature

OV Pin Threshold

vs. Temperature

UV Pin Threshold

vs. Temperature

1.28

1.27

1.26

1.25

1.24

1.23

1.22

1.21

1.2

2

1.8

1.6

1.4

1.2

1

1.27

1.26

1.25

1.24

1.23

1.22

1.21

1.2

V_UVH

PGTH+

PGTH-

V_OVH

V_UVL

0.8

0.6

0.4

0.2

0

V_OVL

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

TEMPERATURE (°C)

PGTimer Charge Current

vs. Temperature

PGTimer Thresholds

vs. Temperature

PGTimer Discharge Current

vs. Temperature

100

90

80

70

60

50

40

30

20

2

1.8

1.6

1.4

1.2

1

4

3.5

3

PG2TH

PG3TH

2.5

2

I_PGTIMER

I_PGTIMEROFF

0.8

0.6

0.4

0.2

0

1.5

1

0.5

0

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

TEMPERATURE (°C)

11

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Typical Characteristics (cont.)

P_GTIMERDischarge Resistance

Circuit Breaker Trip Voltage

vs. Temperature

Power-Good Low Voltage

vs. Temperature

1000

0.5

0.45

0.4

60

58

56

54

52

50

48

46

44

42

40

900

800

R_PGTIMER

700

0.35

0.3

V_TRIP

600

500

400

300

200

100

0

0.25

0.2

V_OLPG

0.15

0.1

0.05

0

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

TEMPERATURE (°C)

No-Load Detect Threshold

vs. Temperature

No-Load Detect Timer Charging

No-Load Detect Timer Discharging

Current vs. Temperature

50

45

40

35

30

25

20

15

10

5

50

1.4

45

40

35

1.2

1

30

I_CNLD

0.8

0.6

0.4

0.2

0

I_NLDTH

25

20

15

10

5

0

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

TEMPERATURE (°C)

CFILTER Threshold

vs. Temperature

CFILTER (Auto-Retry) Threshold

CFILTER Charge Current

vs. Temperature

1.5

1.45

1.4

0.5

140

120

100

80

0.45

0.4

0.35

0.3

1.35

1.3

V_{CFILTER(trip)}

V_{CFILTER(retry)}

1.25

1.2

0.25

0.2

60

1.15

1.1

0.15

0.1

40

20

1.05

1

0.05

0

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

TEMPERATURE (°C)

CFILTER Discharge Current

vs. Temperature

ON Pin Threshold

vs. Temperature

OFF Pin Threshold

vs. Temperature

10

9

8

7

6

5

4

3

2

1

0

1.5

1.45

1.4

1.5

1.45

1.4

1.35

1.3

1.35

1.3

V_OFFL

V_ONH

1.25

1.2

1.25

1.2

1.15

1.1

1.15

1.1

1.05

1

1.05

1

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

-40 -20

0

20 40 60 80 100

TEMPERATURE (°C)

12

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Test Circuit

-48V RTN

(Long Pin)

-48V RTN

R5

47k

R6

47k

R7

47k

MIC2589-2BM

*D1

1

2

3

4

5

6

7

14

13

12

11

10

9

SMAT70A

/PWRGD1

VDD

/PWRGD3

/PWRGD2

DRAIN

C_LOAD

C4

0.1µF

R1

689k

1%

R2

11.8k

1%

C_TIMER

PGTIMER

UV

-48V RTN

(Short Pin)

OV

C_FILTER

2.2µF

C1

0.47µF

CFILTER

CNLD

VEE

GATE

SENSE

N/C

C_NLD

0.068µF

R3

12.4k

1%

*C2

0.22µF

8

C_GATE

R4

10

-48V RTN

(Long Pin)

-48V_OUT

M1

SUM110N10-09

R_SENSE

0.01

5%

Test Circuit

13

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Functional Characteristics

14

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Functional Diagram

Block Diagram

15

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

overcurrent delay and the no-load detection timers

must be set accordingly to allow the output load to

fully charge during the start-up cycle. See the “Circuit

Breaker Function” and “No-Load Detection” sections

for further details.

Functional Description

Hot Swap Insertion

When circuit boards are inserted into systems carrying

live supply voltages (“hot swapped”), high inrush

currents often result due to the charging of bulk

capacitance that resides across the circuit board’s

supply pins. These current spikes can cause the

system’s supply voltages to temporarily go out of

regulation causing data loss or system lock-up. In

more extreme cases, the transients occurring during a

hot swap event may cause permanent damage to

connectors or onboard components.

Resistor R4, in series with the power MOSFET’s gate,

may be required in some layouts to minimize the

potential for parasitic oscillations occurring in M1.

Note that resistance in this device of the circuit has a

slight

destabilizing

effect

upon

the

MIC2589/MIC2595’s current regulation loop. If

possible, use high-frequency PCB layout techniques

and use a dummy resistor (R4 = 0Ω) for the initial

evaluation. If during prototyping an R4 is required,

common values for R4 range between 4.7Ω to 20Ω for

various power MOSFETs.

The MIC2589 and the MIC2595 are designed to

address these issues by limiting the maximum current

that is allowed to flow during hot swap events. This is

achieved by implementing a constant-current loop at

turn-on. In addition to inrush current control, the

MIC2589 and the MIC2595 incorporate input voltage

supervisory functions and user programmable

overcurrent protection, thereby providing robust

protection for both the system and the circuit board.

Circuit Breaker Function

The MIC2589 and MIC2595 device family employs an

electronic circuit breaker that protects the external

power MOSFET and other system components

against large-scale faults, such as short circuits. The

current-limit threshold is set via an external resistor,

R_SENSE, connected between the VEE and SENSE pins.

GATE Start-Up and Control

V_TRIP

When the input voltage to the controller is between

the overvoltage and undervoltage threshold settings

(MIC2589) or is greater than the ON threshold setting

(MIC2595), a start cycle is initiated to deliver power to

the load. During the start-up cycle, the GATE pin of

the controller applies a constant charging current

(45µA, nominal) to the gate of the external MOSFET,

charging the MOSFET gate from 0V to 10V,

referenced to V_EE. An external capacitor (C2) can be

used to adjust and control the slew rate of the GATE

output, while resistor R4 can be used to minimize the

potential for parasitic high-frequency oscillations

occurring on the gate of the external MOSFET (M1).

I_LIMIT

=

R_SENSE

An overcurrent filter period is set via a capacitor from

the CFILTER pin to ground (C_FILTER) that determines

the length of the time period (t_FLT) for which the device

remains in current limit before the circuit breaker is

tripped. This programmable delay prevents tripping of

the circuit breaker due to the large inrush current

charging bulk and distributed capacitive loads.

Whenever the voltage across R_SENSEexceeds 50mV,

two things happen:

1. A constant-current regulation loop is engaged

which is designed to hold the voltage across

R_SENSEequal to 50mV. This protects both the

load and the MIC2589/MIC2595 circuits from

excessively high currents. This current-

regulation loop will engage in less than 1µs

from the time at which the overcurrent trip

threshold on R_SENSEis exceeded.

See Typical Application circuit.

The following

equation is used to approximate the expected inrush

current given the values of the capacitance at the gate

and the load (i.e., the gate of the external MOSFET

and the drain of the external MOSFET, respectively).

C_LOAD

INRUSH =

×I_GATE(ON)

C_GATE

2. Capacitor C_FILTERis charged up to an internal

V_{CFILTER(TRIP)}

threshold

of

1.25V

by

Active current limiting for the MIC2589/MIC2595 is

implemented by controlling the voltage on the GATE

I_{CFILTER(CHARGE)}an internal 95µA current

source. If the voltage across CFILTER

crosses this threshold, the circuit breaker trips

and the GATE pin is immediately pulled low

by an internal current pull-down. This

operation turns off the MOSFET quickly and

disconnects the input from the load. The time

period that allows for the output to regulate in

pin via an internal feedback circuit.

The

MIC2589/MIC2595 is defined to be in current limit

when the GATE output voltage level is between 2.5V

and 5.5V. Once in current limit, the GATE output

voltage is regulated to limit the load current to the

programmed value (I_LIMIT).

Additionally, the

16

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

current limit is defined as the overcurrent fault

timer, t_FLT, and is determined by the following

equation.

(

1500µF × 72V

)

= 36ms (use 40ms)

t_TURN−ON

=

3A

Allowing for capacitor tolerances and a nominal 40ms

turn-on time, an initial worst-case value for C_FILTERis:

_{FILTER(WORST-CASE)}= 40ms×(115×10^–6µF/sec) = 4.6µF

C_FILTER× V_{CFILTER(trip)}

t_FLT

=

I_{CFILTER(CHARGE)}

C

The value of C_FILTERshould be selected to

allow the circuit’s minimum regulated value of

I_OUTto equal I_LIMITfor somewhat longer than

the time it takes to charge the total load

capacitance.

The closest standard ±10% tolerance capacitor value

is 4.7µF and would be a good initial starting value for

prototyping.

Whenever the hot swap controller is not in current

limit, CFILTER is discharged to VEE by an internal

4µA current source.

During startup, the CFILTER pin will begin to charge

once the GATE crosses 2.5V. In order to avoid false-

tripping of the circuit breaker by allowing the

overcurrent filter to time out, the overcurrent delay

must be set to exceed the time it takes to ramp the

GATE output above 5.5V (i.e., charge the output load

capacitance).

For the MIC2589R/MIC2595R devices, the circuit

breaker automatically resets after approximately 25

t_FLTtime constants (23.75 × t_{FLT_AUTO}). If the fault

condition still exists, capacitor C_FILTERwill again

charge up to V_{CFILTER(TRIP),}tripping the circuit breaker.

Capacitor C_FILTERwill then be discharged by an

internal 4µA current source until the voltage across

C_FILTERgoes below V_{CFILTER(RETRY)}, at which time

another start cycle is initiated. This will continue until

the fault condition is removed or input power is

removed/cycled. The duty cycle of the auto-restart

function is therefore fixed at 4.25% and the period of

the auto-restart cycle is given by:

An initial value for C_FILTERis found by calculating the

time it will take for the MIC2589/MIC2595 to

completely charge up the output capacitive load.

Assuming the load is enabled by the PWRGDX (or

/PWRGDX) signal(s) of the controller, the turn-on

delay time is derived from I = C × (dv/dt):

C_LOAD

×

(

V_DD− V_EE

I_LIMIT

values

)

t_TURN−ON

=

t_RETRY= t_FLT+ t_{FLT_AUTO}

Using parametric

specific

to

the

[

C_FILTER

×

(

V_{CFILTER(TRIP)}- V_CFILTER

)

]

(retry

)

MIC2589/MIC2595, an expression relating C_FILTERto

the circuit’s turn-on delay time is:

t_RETRY= t_FLT+

I_{CFILTER(pull−down}

)

(

t_TURN−ON×I_CFILTER

)

C_FILTER

=

The auto-restart period for the example above where

the worst-case C_FILTERwas determined to be 4.7µF is:

V_CFILTER

Substituting the variables above with the specification

limits of the MIC2589/MIC2595, an expression for the

worst-case value for C_FILTERis given by:

t_AUTO-RESTART= 1.27s

No-Load Detection

135µA

1.17V

⎛

⎜

⎞

⎟

For applications in which a minimum load current will

always be present, the no-load detect capability of the

MIC2589 product family offers system designers the

ability to perform a shutdown operation on such fault

conditions, such as an unscheduled or unexpected

removal of PC boards from the system or on-board

fuse failure. As long as the minimum current drawn by

the load is at least 20% of the current limit (defined by

C_FILTER(max)= t_TURN−ON

×

⎝

⎛

⎠

µF

⎞

⎟

C_FILTER(max)= t_TURN−ON× 115 ×10⁻⁶

⎜

sec

⎝

⎠

For example, in a system with a C_LOAD= 1500µF, a

maximum (V_DD– V_EE) = 72V, and a maximum load

current on a nominal –48V buss of 2.5A, the nominal

circuit design equations steps are:

V_TRIP

), the output of the hot swap controller will

R_SENSE

1. Choose I_LIMIT= I_{HOT_SWAP}(nom) = 3A (2.5A + 20%);

38.8mV

remain enabled. If the output current falls below 20%

of the actual current limit, the controller’s no-load

detection loop is enabled. In this loop, an internal

current source, I_CNLD, will charge an external capacitor

2. Select an R_SENSE

=

= 12.9mΩ (closest

3A

1% standard value is 13.0mΩ);

3. Using I_CHARGE= I_LIMIT= 3A, the application circuit

turn-on time is calculated:

C_NLD. An expression for the controller’s no-load time-

out delay is given by:

17

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

(

V_THRESH(PG3)− V_THRESH(PG2)

)

× C_PG

⎛

⎜

⎝

⎞

⎟

⎠

C_NLD

t_PGDLY3−2

=

t_NLD= V_CNLD

×

I_PGTIMER

I_CNLD

where V_THRESH(PG3)(1.15V, typical) is the PWRGD3

threshold voltage for PGTIMER. Therefore, power-

good output signal PWRGD2 (/PWRGD2) will be

delayed after the assertion of PWRGD1 (/PWRGD1)

by:

where V_CNLD= 1.24V (typ); I_CNLD= 25µA (typ); and

C_NLDis an external capacitor connected from Pin 6 to

VEE. Once the voltage on CNLD reaches its no-load

threshold voltage, V_CNLD, the loop times out and the

controller will shut down until it is reset manually

(MIC2589/MIC2595) or until it performs an auto-retry

operation (MIC2589R/MIC2595R). During start-up, the

no-load detection circuit begins to monitor the load

current and the CNLD pin starts ramping along with

the GATE output. In order to keep the output from

shutting down, t_NLDmust be long enough to ensure

that the output MOSFET switches on to deliver the

required minimum load-detect current to the output

load before the no-load timer times out.

t_PGDLY2-1(ms) ≅ 14 × C_PG(µF)

Power-good output signal PWRGD3 (/PWRGD3)

follows the assertion of PWRGD2 by a delay:

t_PGDLY3-2(ms) ≅ 11.5 × C_PG(µF)

For example, for a 10µF value for C_PG, power-good

output signal PWRGD2 will be asserted 140ms after

PWRGD1. Power-good signal PWRGD3 will then be

asserted 115ms after PWRGD2 and 255ms after the

assertion of PWRGD1. The relationships between

The Power-Good Output Signals

V

_DRAIN, V_PGTH, PWRGD1, PWRGD2, and PWRGD3

are shown in Figure 6.

For

the

MIC2589/MIC2595-1

and

MIC2589R/MIC2595R-1, power-good output signal

PWRGD1 will be high impedance when V_DRAINdrops

below V_PGTH, and will pull-down to the potential at the

Undervoltage/Overvoltage Detection (MIC2589 and

MIC2589R)

The MIC2589 and the MIC2589R have “UV” and “OV”

input pins that can be used to detect input supply rail

DRAIN when V_DRAINis above V_PGTH

. For the

MIC2589/95-2 and the MIC2589R/95R-2, power-good

output signal /PWRGD1 will pull down to the potential

of the DRAIN pin when V_DRAINdrops below V_PGTHand

undervoltage

and

overvoltage

conditions.

Undervoltage lockout prevents the output from

switching on until the supply input is stable and within

tolerance. In a similar fashion, overvoltage shutdown

prevents damage to sensitive circuit components

should the input voltage exceed normal operating

limits. Each of these pins is internally connected to

analog comparators with 20mV of hysteresis. When

the UV pin falls below its V_UVLthreshold or the OV pin

is above its V_OVHthreshold, the GATE pin is

immediately pulled low. The GATE pin will be held low

until the UV pin is above its V_UVHthreshold and the OV

pin is below its V_OVLthreshold. The circuit’s UV and

OV threshold voltage levels are programmed using

the resistor divider R1, R2, and R3 as shown in the

“Typical Application” circuit and the equations to set

the trip points are shown below. The circuit’s UV

threshold is set to V_UV= 37V and the OV threshold is

set at V_OV= 72V, values commonly used in Central

Office power distribution applications.

will be high impedance when V_DRAINis above V_PGTH

.

Hence, the -1 parts have an active-high PWRGDX

signal and the -2 parts have an active-low /PWRGDX

output. PWRGDX (or /PWRGDX) may be used as an

enable signal for one or more following DC/DC

converter modules or for other system uses as

desired. When used as an enable signal, the time

necessary for the PWRGD (or /PWRGD) signal to

pull-up (when in high impedance state) will depend

upon the load (RC) that is present on this output.

Power-good output signals PWRGD2 (/PWRGD2) and

PWRGD3 (/PWRGD3) follow the assertion of

PWRGD1 (/PWRGD1) with a sequencing delay set by

an external capacitor (C_PG) from the controller’s

PGTIMER pin (Pin 2) to VEE. An expression for the

sequencing delay between PWRGD2 and PWRGD1

is given by:

V_THRESH(PG2)× C_PG

(

R1+ R2 + R3

)

t_PGDLY2−1

=

V_UV= V_UVL(typ)×

I_PGTIMER

(

R2 + R3

R1+ R2 + R3

R3

)

where VTHRESH(PG2) (= 0.63V, typically) is the

PWRGD2 threshold voltage for PGTIMER and I_PGTIMER

(= 45µA, typically) is the internal PGTIMER charge

current. Similarly, an expression for the sequencing

delay between PWRGD3 and PWRGD2 is given by:

(

)

V_OV= V_OVL(typ)×

Given V_UV, V_OV, and any one of the resistor values,

the remaining two resistor values can be determined.

A suggested value for R3 is selected to provide

approximately 100µA (or more) of current through the

voltage divider chain at V_DD= V_UV. This yields the

18

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

following as a starting point:

fault condition. Should either event occur, the GATE

pin is immediately pulled low and will remain low until

the ON pin voltage once again rises above its V_ONH

threshold. The circuit’s turn-on and turn-off voltage

levels are set using the resistor divider R1, R2, and

R3 similar to the “Typical Application” circuit and the

equations to set the trip points are shown below. For

the following example, the circuit’s ON threshold is set

to V_ON= 40V and the circuit’s OFF threshold is set to

V_OVH(typ)

100µA

1.223V

100µA

R3 =

=

= 12.23kꢀ

The closest standard 1% value for R3 = 12.4kꢀ.

Solving for R2 and R1 yields:

⎡

⎢

⎤

⎛

⎜

⎝

⎞

⎟

⎠

V

OV

R2 = R3 ×

− 1

⎥

V

⎢

⎣

⎥

⎦

UV

V

_OFF= 35V.

⎡

⎛

⎤

72V

37V

⎞

⎟

R2 = 12.4kꢀ ×

− 1 = 11.73kꢀ

⎜

⎢

(

R1+ R2 + R3

)

⎥

V_ON= V_ONH(typ)×

V_OFF= V_OFFL(typ)×

⎝

⎣

⎠

⎦

R3

R1+ R2 + R3

R2 + R3

The closest standard 1% values for R2 = 11.8kꢀ.

Lastly, the value for R1 is calculated:

(

)

(

V_OV− 1.223V

)

⎡

⎤

Given V_OFF, V_ON, and any one of the resistor values,

the remaining two resistor values can be readily

determined. A suggested value for R3 is selected to

provide approximately 100µA (or more) of current

through the voltage divider chain at V_DD= V_OFF. This

yields the following as a starting point:

R1 = R3 ×

− R2

⎢

⎣

⎥

1.223V

⎦

(

72V − 1.223V

)

⎡

⎤

R1 = 12.4kꢀ ×

− 11.8kꢀ

⎢

⎥

1.223V

⎣

⎦

R1 = 705.81kꢀ

The closest standard 1% value for R1 = 698kꢀ.

V_OFFL(typ)

100µA

1.223V

100µA

R3 =

=

= 12.23kꢀ

Using standard 1% resistor values, the circuit’s

nominal UV and OV thresholds are:

The closest standard 1% value for R3 = 12.4kꢀ.

V

_UV= 36.5V

_OV= 71.2V

Solving for R2 and R1 yields:

⎡

⎢

⎤

⎥

⎛

⎜

⎝

⎞

V_ON

⎟

− 1

R2 = R3 ×

Good general engineering design practices must

consider the tolerances associated with these

parameters, including but not limited to, power supply

tolerance, undervoltage and overvoltage threshold

tolerances, and the tolerances of the external passive

components.

⎟

V_OFF

⎢

⎣

⎥

⎦

⎠

⎡

⎤

40V

35V

⎛

⎞

R2 = 12.4kꢀ ×

− 1 = 1.77kꢀ

⎜

⎟

⎢

⎥

⎝

⎣

⎠

⎦

The closest standard 1% value for R2 = 1.78kꢀ.

Lastly, the value for R1 is calculated:

Programmable UVLO Hysteresis (MIC2595 and

MIC2595R)

(

V_ON− 1.223V

)

− R2

R1 = R3 ×

1.223V

The MIC2595 and the MIC2595R devices have user-

programmable hysteresis by means of the ON and

OFF pins (Pins 4 and 3, respectively). This allows

setting the MIC2595/MIC2595R to turn on at a voltage

V1, and not turn off until a second voltage V2, where

V2 < V1. This can significantly simplify dealing with

source impedances in the supply buss while at the

same time increasing the amount of available

operating time from a loosely regulated power rail (for

example, a battery supply). The MIC2595/MIC2595R

holds the output off until the voltage at the ON pin is

above its V_ONHthreshold value given in the “Electrical

Characteristics” table. Once the output has been

enabled by the ON pin, it will remain on until the

voltage at the OFF pin falls below its respective V_OFFL

threshold value, or the part turns off due to an external

40V − 1.223V

R1 = 12.4kꢀ ×

− 1.78kꢀ

1.223V

R1 = 391.38kꢀ

The closest standard 1% value for R1 = 392kꢀ.

Using standard 1% resistor values, the circuit’s

nominal ON and OFF thresholds are:

V

_ON= 40.1V

_OFF= 35V

Good general engineering design practices must

consider the tolerances associated with these

parameters, including but not limited to, power supply

tolerance, undervoltage and overvoltage threshold

tolerances, and the tolerances of the external passive

components.

19

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

the MIC2589/MIC2595, and the resulting

transient does have enough voltage and

energy to damage this, or any, high-voltage

hot swap controller.

Application Information

Optional External Circuits for Added

Protection/Performance

2. If the load’s bypass capacitance (for

example, the input filter capacitors for DC-

DC converter module(s)) is on a board from

which the board with the MIC2589/MIC2595

and the MOSFET can be unplugged, the

same type of inductive transient damage

can occur to the MIC2589/MIC2595.

In many telecom applications, it is very common for

circuit boards to encounter large-scale supply-voltage

transients in backplane environments. Because

backplanes

present

a

complex

impedance

environment, these transients can be as high as 2.5

times steady-state levels, or 120V in worst-case

situations. In addition, a sudden load dump anywhere

on the circuit card can generate a very high voltage

spike at the drain of the output MOSFET that will

appear at the DRAIN pin of the MIC2589/MIC2595. In

both cases, it is good engineering practice to include

protective measures to avoid damaging sensitive ICs

or the hot swap controller from these large-scale

transients. Two typical scenarios in which large-scale

transients occur are described below:

For many applications, the use of additional circuit

components can be implemented for optimum system

performance and/or protection. The circuit, shown in

Figure 7, includes several components to address

some the following system (dynamic) responses

and/or functions: 1) suppression of transient voltage

spikes, 2) elimination of false “tripping” of the circuit

breaker due to undervoltage and overcurrent glitches,

and 3) the implementation of an external reset circuit.

1. An output current load dump with no bypass

(charge bucket or bulk) capacitance to V_EE.

For example, if L_LOAD= 5µH, V_IN= 56V and

t_OFF= 0.7µs, the resulting peak short-circuit

current prior to the MOSFET turning off

would reach:

It is not mandatory that these techniques be utilized,

however, the application environment will dictate

suitability. For protection against sudden on-card load

dumps at the DRAIN pin of the MIC2589/MIC2595

controller, a 68V, 1W, 5% Zener diode clamp (D2)

connected from the DRAIN to the VEE of the

controller can be implemented as shown. To protect

the controller from large-scale transients at the card

input, a 100V clamp diode (D1, SMAT70A or

equivalent) can be used. In either case, very short

lead lengths and compact layout design is strongly

recommended to prevent unwanted transients in the

protection circuitry. Power buss inductance often

produces localized (plug-in card) high-voltage

transients during a turn-off event. Managing these

repeated voltage stresses with sufficient input bulk

capacitance and/or transient suppressing diode

clamps is highly recommended for maximizing the life

of the hot swap controller(s).

(

56V × 0.7µs

)

= 7.8A

5µH

If there is no other path for this current to

take when the MOSFET turns off, it will

avalanche the drain-source junction of the

MOSFET.

Since

the

total

energy

represented is small relative to the

sturdiness of modern power MOSFETs, it’s

unlikely that this will damage the transistor.

However, the actual avalanche voltage is

unknown; all that can be guaranteed is that

it

will

be

greater

than

the

V_BD(D-S)of the MOSFET. The drain of the

transistor is connected to the DRAIN pin of

20

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

-48V RTN

(Long Pin)

-48V RTN

R5

47k

MIC2589-2BM

*D1

SMAT70A

1

2

3

4

5

6

7

14

13

12

11

10

9

/PWRGD1

VDD

/PWRGD3

/PWRGD2

DRAIN

C5

100µF

C4

0.1µF

R1

689k

1%

R2

11.8k

1%

C_TIMER

PGTIMER

UV

-48V RTN

(Short Pin)

OV

C_FILTER

2.2µF

C1

0.47µF

CFILTER

CNLD

VEE

GATE

*C3

0.1µF

System

Reset

*M2

SENSE

N/C

C_NLD

0.068µF

R3

12.4k

1%

*C2

0.1µF

8

*D2

ZMM5266B

R4

10

R_SENSE

0.01

5%

-48V RTN

(Long Pin)

-48V_OUT

M1

SUM110N10-09

*Optional components (See Functional Description and Applications Information for more details)

M2 is an SOT-323, B8S138W or equivalent

D2 is a 68V, 500mW Zener diode

Figure 7. Optional Components for Added Performance/Protection

The circuit in Figure 7 consisting of M2, R5, and a

digital control signal, can be used to reset the

controller after the GATE (and output) turns off. Once

the output has been latched off, applying a low-high-

low pulse on the GATE of M2 via the System Enable

control can toggle the UV pin. System Enable is a

user-defined signal referenced to V_EE.

value of R_SENSEhas been calculated, it is good

practice to check the maximum hot swap load current

(I_{HOT_SWAP(MAX)}) that the circuit may let pass in the case

of tolerance build-up in the opposite direction. Here,

the worse case maximum is found using a V_TRIP(MAX)

threshold of 60mV and a sense resistor 3% low in

value:

60mV

61.9mV

Sense Resistor Selection

I_{HOT_SWAP(m ax)}

=

(

0.97 × R_SENSE(nom)

)

R_SENSE(nom)

The sense resistor is nominally valued at:

In this case, the application circuit must be sturdy

enough to operate up to approximately 1.5x the

steady-state hot swap load current. For example, if an

MIC2589 circuit must pass a minimum hot swap load

current of 4A without nuisance trips, R_SENSEshould be

set to:

V

TRIP(typ)

HOT_SWAP(nom)

R

=

SENSE(nom)

I

where V_TRIP(TYP)is the typical (or nominal) circuit

breaker threshold voltage (50mV) and I_{HOT_SWAP(NOM)}is

the nominal load current level necessary to trip the

internal circuit breaker.

40mV

R

=

= 10mꢀ

SENSE(nom)

4A

To accommodate worse-case tolerances in the sense

resistor (for a ±1% initial tolerance, allow ±3%

tolerance for variations over time and temperature)

and circuit breaker threshold voltages, a slightly more

detailed calculation must be used to determine the

minimum and maximum hot swap load currents.

where the nearest 1% standard value is 10.0mꢀ. At

the other tolerance extremes, I_{HOT_SWAP(MAX)}for the

circuit in question is then simply:

61.9mV

I_{HOT_SWAP(m ax)}

=

= 6.19A

10mꢀ

As the MIC2589’s minimum current limit threshold

voltage is 40mV, the minimum hot swap load current

is determined where the sense resistor is 3% high:

With a knowledge of the application circuit’s maximum

hot swap load current, the power dissipation rating of

the sense resistor can be determined using P = I²× R.

Here, the current is I_{HOT_SWAP(max)}= 6.19A and the

resistance

40mV

38.8mV

I_{HOT_SWAP(min)}

=

(

1.03 × R_SENSE(nom)

)

R_SENSE(nom)

R

_SENSE(max)= (1.03)(R_SENSE(nom)) = 10.3mꢀ.

Keep in mind that the minimum hot swap load current

should be greater than the application circuit’s upper

steady-state load current boundary. Once the lower

Thus, the sense resistor’s maximum power dissipation

is:

P

_MAX= (6.19A)²× (10.3mꢀ) = 0.395W

21

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

A 0.5W sense resistor is a good choice in this

application.

voltage of 4.5V and 10V. For MIC2589/MIC2595

applications, choose the gate-source ON resistance at

10V and call this value R_ON. Since a heavily enhanced

MOSFET acts as an ohmic (resistive) device, almost

all that’s required to determine steady-state power

dissipation is to calculate I²R. The one addendum to

this is that MOSFETs have a slight increase in R_ON

Power MOSFET Selection

Selecting the proper external MOSFET for use with

theMIC2589/MIC2595 involves three straightforward

tasks:

with

increasing

die

temperature.

A

good

• Choice of a MOSFET that meets minimum voltage

approximation for this value is 0.5% increase in R_ON

per °C rise in junction temperature above the point at

which R_ONwas initially specified by the manufacturer.

For instance, if the selected MOSFET has a

calculated R_ONof 10mꢀ at T_J= 25°C, and the actual

junction temperature ends up at 110°C, a good first

cut at the operating value for R_ONwould be:

requirements.

• Selection of a device to handle the maximum

continuous current (steady-state thermal issues).

• Verify the selected part’s ability to withstand any

peak currents (transient thermal issues).

Power MOSFET Operating Voltage Requirements

R_ON≈ 10mꢀ[1 + (110 – 25)(0.005)] ≈14.3mꢀ

The first voltage requirement for the MOSFET is that

the drain-source breakdown voltage of the MOSFET

must be greater than V_IN(MAX)= V_DD– V_EE(min).

The final step is to make sure that the heat sinking

available to the MOSFET is capable of dissipating at

least as much power (rated in °C/W) as that with

which the MOSFET’s performance was specified by

the manufacturer. Here are a few practical tips:

The second breakdown voltage criterion that must be

met is the gate-source voltage. For the

MIC2589/MIC2595, the gate of the external MOSFET

is driven up to a maximum of 11V above VEE. This

means that the external MOSFET must be chosen to

have a gate-source breakdown voltage of 12V or

more; 20V is recommended. Most power MOSFETs

with a 20V gate-source voltage rating have a 30V

drain-source breakdown rating or higher. For many

48V telecom applications, transient voltage spikes can

approach, and sometimes exceed, 100V. The

absolute maximum input voltage rating of the

MIC2589/MIC2595 is 100V; therefore, a drain-source

breakdown voltage of 100V is suggested for the

external MOSFET. Additionally, an external input

voltage clamp is strongly recommended for

applications that do not utilize conditioned power

supplies.

1. The heat from a TO-263 power MOSFET

flows almost entirely out of the drain tab. If

the drain tab can be soldered down to one

square inch or more, the copper will act as

the heat sink for the part. This copper must

be on the same layer of the board as the

MOSFET drain.

2. Airflow works. Even a few LFM (linear feet

per minute) of air will cool a MOSFET down

substantially. If you can, position the

MOSFET(s) near the inlet of a power

supply’s fan, or the outlet of a processor’s

cooling fan.

3. The best test of a candidate MOSFET for

an application (assuming the above tips

show it to be a likely fit) is an empirical one.

Check the MOSFET’s temperature in the

actual layout of the expected final circuit, at

Power MOSFET Steady-State Thermal Issues

The selection of a MOSFET to meet the maximum

continuous current is a fairly straightforward exercise.

First, arm yourself with the following data:

full operating current. The use of

a

thermocouple on the drain leads, or infrared

pyrometer on the package, will then give a

reasonable idea of the device’s junction

temperature.

• The value of I_{LOAD(CONT, MAX.)}for the output in

question (see Sense Resistor Selection).

• The manufacturer’s datasheet for the candidate

MOSFET.

• The maximum ambient temperature in which the

Power MOSFET Transient Thermal Issues

device will be required to operate.

If the prospective MOSFET has been shown to

withstand the environmental voltage stresses and the

worst-case steady-state power dissipation is

addressed, the remaining task is to verify if the

MOSFET is capable of handling extreme overcurrent

• Any knowledge you can get about the heat sinking

available to the device (e.g., can heat be dissipated

into the ground plane or power plane, if using a

surface-mount part? Is any airflow available?).

The datasheet will almost always give a value of ON

resistance for a given MOSFET at a gate-source

load faults, such as

overheating. A power MOSFET can handle a much

a

short circuit, without

22

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

higher pulsed power without damage than its

continuous power dissipation ratings imply due to an

inherent trait, thermal inertia. With respect to the

specification and use of power MOSFETs, the

parameter of interest is the “Transient Thermal

Impedance”, or Z_θ, which is a real number (variable

factor) used as a multiplier of the thermal resistance

(R_θ). The multiplier is determined using the given

“Transient Thermal Impedance Graph”, normalized to

R_θ, that displays curves for the thermal impedance

versus power pulse duration and duty cycle. The

single-pulse curve is appropriate for most hot swap

applications. Z_θis specified from junction-to-case for

power MOSFETs typically used in telecom

applications.

following equation based on the highest ambient

temperature of the system environment.

T_C(max) = T_A(max) + P_D× (R_θ(J-A)– R_θ(J-C)

)

(2)

Let’s assume a maximum ambient of 60°C. The

power dissipation of the MOSFET is determined by

the current through the MOSFET and the ON

resistance (I²R_ON), which we will estimate at 17mꢀ

(specification given at T_J= 125°C).

Using our

example information and substituting into Equation 2,

T_C(max)

= 60°C+[((3A)²×17mꢀ)×(40–0.4)°C/W]

= 66.06°C

Substituting the variables into Equation 1, T_Jis

determined by:

T(steady-state) ≅T_C(max)+[R_ON+(T_C(max)–T_C)(0.005)

J

× (R_ON)][I²×(R_θ(J-A)–R_θ(J-C))]

≅66.06°C+[17mꢀ+(66.06°C–25°C)(0.005/°C)

×(17mꢀ)][(3A)²×(40–0.4)°C/W]

≅66.06°C + 7.30°C

The following example provides

a method for

estimating the peak junction temperature of a power

MOSFET in determining if the MOSFET is suitable for

a

particular

application.

V_IN(VDD – VEE) = 48V, I_LIM= 4.2A, t_FLTis 20ms, and

the power MOSFET is the SUM110N10-09 (TO-263

package) from Vishay-Siliconix. This MOSFET has an

R_ONof 9.5mꢀ (T_J= 25°C), the junction-to-case

thermal resistance (R_θ(J-C)) is 0.4°C/W, junction-to-

ambient thermal resistance (R_θ(J-A)) is 40°C/W, and the

Transient Thermal Impedance Curve is shown in

Figure 8. Consider, say, the MOSFET is switched on

at time t1 and the steady-state load current passing

through the MOSFET is 3A. At some point in time

after t1, at time t2, there is an unexpected short-circuit

applied to the load, causing the MIC2589/MIC2595

controller to adjust the GATE output voltage and

regulate the load current for 20ms at the programmed

current limit value, 4.2A in this example. During this

short-circuit load condition, the dissipation in the

MOSFET is calculated by:

≅73.36°C

Since this is not a closed-form equation, getting a

close approximation may take one or two iterations.

On the second iteration, start with T_Jequal to the

value calculated above. Doing so in this example

yields;

T_J(steady-state)

≅

66.06°C+[17mꢀ+(73.36°C

-25°C)×(0.005/°C)

×(17mꢀ)][(3A)²×(40–0.4)]°C/W

≅

73.62°C

Another iteration shows that the result (73.63°C) is

converging quickly, so we’ll estimate the maximum

T

_{J(steady-state)}at 74°C.

The use of the Transient Thermal Impedance Curves

is necessary to determine the increase in junction

temperature associated with a worst-case transient

P_D(short) = V_DS× I_LIM; V_DS= 0V – (-48V) = 48V

P_D(short) = 48V × 4.2A = 201.6W for 20ms.

condition.

From our previous calculation of the

At first glance, it would appear that a very hefty

MOSFET is required to withstand this extreme

overload condition. Upon further examination, the

calculation to approximate the peak junction

temperature is not a difficult task. The first step is to

determine the maximum steady-state junction

temperature, then add the rise in temperature due to

the maximum power dissipated during a transient

overload caused by a short circuit condition. The

equation to estimate the maximum steady-state

junction temperature is given by:

maximum power dissipated during a short circuit

event for the MIC2589/MIC2595, we calculate the

transient junction temperature increase as:

T_J(transient) = P_D(short) × R_θ(J-C)× Multiplier

(3)

Assume the MOSFET has been on for a long time –

several minutes or more – and delivering the steady-

state load current of 3A to the load when the load is

short circuited. The controller will regulate the GATE

output voltage to limit the current to the programmed

value of 4.2A for 20ms before immediately shutting off

the output. For this situation and almost all hot swap

applications, this can be considered a single pulse

event as there is no significant duty cycle. From

Figure 8, find the point on the X-axis (“Square-Wave

Pulse Duration”) for 25ms, allowing for a 25% margin

T_J(steady-state) ≅ T_C(max) + ∆T_J

(1)

T_C(max) is the highest anticipated case temperature,

prior to an overcurrent condition, at which the

MOSFET will operate and is estimated from the

23

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

of the t_FLT, and read up the Y-axis scale to find the

intersection of the Single Pulse curve. This point is

the normalized transient thermal impedance (Z_θ(J-C)),

and the effective transient thermal impedance is the

product of R_θ(J-C)and the multiplier, 0.9 in this

example. Solving Equation 3,

Finally, add this result to the maximum steady state

junction temperature calculated previously to

determine the estimated maximum transient junction

temperature of the MOSFET: T_J(max.transient) =

74°C + 72.6°C = 146.6°C, which is safely under the

specified maximum junction temperature of 200°C for

the SUM110N10-09.

T_J(transient) = (201.6W) × (0.4°C/W) × 0.9 = 72.6°C

Figure 8. Transient Thermal Impedance – SUM110N10-09

24

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

the power (V_EEand Return) trace widths (W) need to

be wide enough to allow the current to flow while the

rise in temperature for a given copper plate (e.g., 1oz.

or 2oz.) is kept to a maximum of 10°C to 25°C. The

return (or power ground) trace should be the same

width as the positive voltage power traces (input/load)

and isolated from any ground and signal planes so

that the controller’s power is common mode. Also,

these traces should be as short as possible in order to

minimize the IR drops between the input and the load.

PCB Layout Considerations

4-Wire Kelvin Sensing

Because of the low value typically required for the

sense resistor, special care must be used to measure

accurately the voltage drop across it. Specifically, the

measurement technique across each R_SENSEmust

employ 4-wire Kelvin sensing. This is simply a means

of making sure that any voltage drops in the power

traces connecting to the resistors are not picked up by

the signal conductors measuring the voltages across

the sense resistors.

Finally, the use of plated-through vias will be

necessary to make circuit connections to the power,

ground and signal planes of multi-layer PCBs.

Figure 9 illustrates how to implement 4-wire Kelvin

sensing. As the figure shows, all the high current in

the circuit (from V_EEthrough R_SENSE, and then to the

source of the output MOSFET) flows directly through

the power PCB traces and R_SENSE. The voltage drop

resulting across R_SENSEis sampled in such a way that

the high currents through the power traces will not

introduce any parasitic voltage drops in the sense

leads. It is recommended to connect the hot swap

controller’s sense leads directly to the sense resistor’s

metalized contact pads.

R_SENSEmetalized

contact pads

Power Trace

From V_EE

Power Trace

To MOSFET Source

R_SENSE

PCB Track Width:

0.03" per Ampere

using 1oz Cu

Signal Trace

to MIC2589/MIC2595 V_EEPin

Signal Trace

to MIC2589/MIC2595 SENSE Pin

Note: Each SENSE lead trace shall be

balanced for best performance with equal

length/equal aspect ratio.

Other Layout Considerations

Figure 9. 4-Wire Kelvin Sense Connections for

R_SENSE

Figure 10 is a suggested PCB layout diagram for the

MIC2589/MIC2595. Many hot swap applications will

require load currents of several amperes. Therefore,

25

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

W

Current Flow

to the Load

Vias to bottom layer

Return/Ground plane

(VDD)

MIC2589-2BM

1

2

3

4

5

6

7

/PWRGD1

VDD 14

**C_TIMER

PGTIMER

UV

/PWRGD3 13

**R1

12

/PWRGD2

**R2

**R3

OV

11

DRAIN

CFILTER

CNLD

VEE

10

9

GATE

**C_FILTER

SENSE

C1

0.47uF

**C_NLD

Via to bottom layer

Return/Ground plane

(VDD)

N/C

8

D1

SMAT70A

Via to bottom layer

Return/Ground plane

(VDD)

Current Flow

from the Load

C_LOAD2

0.1uF

**C_LOAD1

**C_GATE

**R_GATE

W

Via to the

ground plane

*SENSE RESISTOR

(WSR-2 or

*POWER MOSFET

(TO-263)

WSL2512)

- DRAWING IS NOT TO SCALE-

*See Table 1 for part numbers and vendors

**Component values application specific, determined by user

Trace width (W) guidelines and additional information given in "PCB Layout

Recommendations" section of the datasheet

Figure 10. Recommended PCB Layout for Sense Resistor, Power MOSFET, Overvoltage/Undervoltage

Resistive Divider Network, and Timer Capacitors

26

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

caused by common mode transients. Such is the

case when an EMI filter is utilized to prevent DC-DC

converter switching noise from being injected back

onto the power supply. The circuit of Figure 11 shows

how to configure an optoisolator driven by the

/PWRGD signal of the MIC2589 controller.

Power-Good Signals Driving Optoisolators

The PWRGDx signals can be used to drive

optoisolators or LEDs. The use of an optoisolator is

sometimes needed to protect I/O signals (e.g.,

/PWRGD, RESET, ENABLE) of both the controller

and downstream DC-DC converter(s) from damage

R7

43k

R6

43k

R5

43k

OPTO#1

OPTO#2

OPTO#3

1

6

1

6

1

6

MOC207-M

2

5

2

5

2

5

-48V RTN

(Long Pin)

-48V RTN

MIC2589-2BM

*D1

SMAT70A

1

2

3

4

5

6

7

14

/PWRGD1

VDD

/PWRGD3

/PWRGD2

DRAIN

IN+

OUT+

+5V_OUT

R1

689k

1%

R2

11.8k

1%

C4

100µF

C_TIMER

0.068µF

C3

0.1µF

ON/OFF*

13

12

11

10

9

PGTIMER

UV

-48V RTN

(Short Pin)

IN–

IN+

OUT–

+5V RTN

OV

C_FILTER

2.2µF

C1

0.47µF

OUT+

+2.5V_OUT

CFILTER

CNLD

VEE

GATE

C6

100µF

C5

0.1µF

ON/OFF*

R3

12.4k

1%

SENSE

N/C

C_NLD

0.068µF

IN–

OUT–

+2.5V RTN

*C2

8

0.1µF

R4

10

IN+

OUT+

+1.8V_OUT

C8

100µF

C7

0.1µF

ON/OFF*

IN– OUT–

-48V RTN

(Long Pin)

+1.8V RTN

R_SENSE

M1

0.01

5%

SUM110N10-09

Nominal Undervoltage and Overvoltage Thresholds:

V_UV= 36.5V

V_OV= 71.2V

*Optional components (See Funtional Description and Applications Information for more details)

#An external pull-up resistor for the power-good signal is necessary for DC-DC convertors (and all other load modules) not equipped with an

internal pull-up impedance

Figure 11. Optoisolators Driven by /PWRGD Signals

27

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

MOSFET and Sense Resistor Vendors

Device types, part numbers, and manufacturer

contacts for power MOSFTETS and sense resistors

are provided in Table 1.

MOSFET Vendors

Key MOSFET Type(s)

Breakdown Voltage (V_DSS

)

Contact Information

www.siliconix.com

(203) 452-5664

SUM75N06-09L (TO-263)

SUM70N06-11 (TO-263)

SUM50N06-16L (TO-263)

60V

Vishay - Siliconix

SUP85N10-10 (TO-220AB)

SUB85N10-10 (TO-263)

SUM110N10-09 (TO-263)

SUM60N10-17 (TO-263)

100V

www.siliconix.com

(203) 452-5664

IRF530 (TO-220AB)

IRF540N (TO-220AB)

100V

www.irf.com

(310) 322-3331

International Rectifier

Renesas

2SK1298 (TO-3PFM)

2SK1302 (TO-220AB)

2SK1304 (TO-3P)

60V

100V

www.renesas.com

(408) 433-1990

Resistor Vendors

Resistor Types

Contact Data

Vishay (Dale)

“WSL” Series

www.vishay.com/docs/wsl_30100.pdf

(203)452-5664

IRC

“OARS” Series

“LR” Series

(second source to “WSL”)

www.irctt.com/pdf_files/OARS.pdf

www.irctt.com/pdf_files/LRC.pdf

(828) 264-8861

Table 1. MOSFET and Sense Resistors

28

M9999-120505

(408) 955-1690

December 2005

Micrel

MIC2589/MIC2595

Package Information

14-Pin SOIC (M)

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com

The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for

its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a

product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for

surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant

injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk

and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.

29

M9999-120505

(408) 955-1690

December 2005


型号：	MIC2595R-2YMTR
厂家：	MICROCHIP
描述：	1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14, LEAD FREE, SOIC-14 光电二极管
文件：	总29页 (文件大小：4205K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MIC2595R-2YMTR [MICROCHIP]

相关型号：

MIC2601

MIC2601YML

MIC2602

MIC26023-5134W-LF3

MIC2602YML

MIC2602YMLTR

MIC2605

MIC2605YML

MIC2605YML-TR

MIC2605YMLTR

MIC2605_09

MIC2606