MIC2810-44MYML-TR [MICROCHIP]

2-CHANNEL POWER SUPPLY SUPPORT CKT, QCC16;
MIC2810-44MYML-TR
型号: MIC2810-44MYML-TR
厂家: MICROCHIP    MICROCHIP
描述:

2-CHANNEL POWER SUPPLY SUPPORT CKT, QCC16

文件: 总26页 (文件大小:1022K)
中文:  中文翻译
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MIC2810  
Digital Power Management IC 2 MHz, 600 mA DC/DC with Dual  
300 mA/300 mA Low V LDOs  
IN  
Features  
General Description  
• 2.7V to 5.5V Input Voltage Range  
• 2 MHz DC/DC Converter and Two LDOs  
• Integrated Power-on Reset (POR)  
• Adjustable POR Delay Time  
• LOWQ Mode  
The MIC2810 is  
a
high performance power  
management IC, featuring three output voltages with  
independent enable control: a 2 MHz DC/DC converter  
and two 300 mA LDOs. The MIC2810 features a  
LOWQ mode, reducing the total current draw while in  
this mode to less than 30 µA. In LOWQ mode, the  
- 30 µA Total IQ When in LOWQ Mode  
• DC/DC Converter  
output noise of the DC/DC converter is 53 µVRMS  
,
significantly lower than other converters that use a  
PFM light load mode that can interfere with sensitive  
RF circuitry.  
- Up to 600 mA of Output Current in PWM  
Mode  
The DC/DC converter uses small values of L and C to  
reduce board space but still retains high efficiency over  
a wide load range, while supporting load currents up to  
600 mA.  
- LOWQ Mode: No Ripple Light Load Mode  
- 53 µVRMS Output Noise in LOWQ Mode  
- 2 MHz PWM Mode Operation  
- >90% Efficiency  
The LDOs operate with very small ceramic output  
capacitors for stability, therefore, reducing required  
board space and component cost. It is available in  
various output voltage options in the 16-pin 3 mm x  
3 mm QFN leadless package.  
• LDO1  
- 1.65V to 5.5V Input Voltage Range  
- 300 mA Output Current  
- Output Voltage Down to 0.8V  
• LDO2  
Package Type  
- 2.7V to 5.5V Input Voltage Range  
- 300 mA Output Current  
MIC2810  
16-PIN 3 mm X 3 mm QFN  
- Output Voltage Down to 0.8V  
• Thermal Shutdown Protection  
• Current-Limit Protection  
• Simple, Leakage-Free Interfacing to Host MPU in  
Applications with Backup Power  
• Tiny 16-Pin 3 mm x 3 mm QFN Package  
Pin 1 LOWQ  
Pin 2 BIAS  
Pin 3 SGND  
POR  
LDO1  
VIN1  
LDO  
Pin 12  
Pin 11  
Pin 10  
Pin 9  
Applications  
• Embedded MPU and MCU Power  
• Portable and Wearable Applications  
• Low-Power RF Systems  
• Backup Power Systems  
Pin 4 PGND  
2017 Microchip Technology Inc.  
DS20005910A-page 1  
MIC2810  
Typical Application Circuit (simplified)  
Functional Diagram  
VIN  
SW  
BIAS  
EN  
LDO  
DC/DC  
/LOWQ  
VIN1  
LDO1  
LDO2  
LDO1  
LDO2  
EN1  
VIN2  
EN2  
POR  
LOGIC  
REFERENCE AND  
QUICK START  
POR  
PGND  
SGND  
CSET  
DS20005910A-page 2  
2017 Microchip Technology Inc.  
MIC2810  
1.0  
ELECTRICAL CHARACTERISTICS  
Absolute Maximum Ratings †  
Supply Voltage (VIN, VIN1, VIN2)..................................................................................................................... 0V to +6.0V  
Enable Input Voltage (VEN, VEN1, VEN2)..............................................................................................................0V to VIN  
Power Dissipation (Note 1) ....................................................................................................................Internally Limited  
ESD Rating (Note 2) ..................................................................................................................................................2 kV  
Operating Ratings ‡  
Supply Voltage (VIN, VIN2)......................................................................................................................... +2.7V to +5.5V  
Supply Voltage (VIN1)..............................................................................................................................+1.65V to +5.5V  
Enable Input Voltage (VEN, VEN1, VEN2)........................................................................................................... 0V to +VIN  
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.  
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated  
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended  
periods may affect device reliability.  
‡ Notice: The device is not guaranteed to function outside its operating ratings.  
1: The maximum allowable power dissipation of any TA (ambient temperature) is PD(max) = (TJ(max) – TA) / θJA  
.
Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the  
regulator will go into thermal shutdown.  
2: Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5 kin series with  
100 pF.  
2017 Microchip Technology Inc.  
DS20005910A-page 3  
 
 
MIC2810  
TABLE 1-1:  
ELECTRICAL CHARACTERISTICS (Note 1)  
Electrical Characteristics: VIN = EN1 = EN2 = LOWQ = VOUT (Note 2) + 1V; COUTDC/DC = 2.2 µF, CLDO1 = CLDO2  
=
2.2 µF; IOUTDC/DC = 100 mA; IOUTLDO1 = IOUTLDO2 = 100 µA; TJ = 25°C, bold values indicate –40°C TJ +125°C;  
unless noted.  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Units  
Conditions  
UVLO Threshold  
UVLO Hysteresis  
UVLOTH  
2.45  
2.55  
100  
800  
55  
2.65  
V
Rising input voltage during turn-on  
UVLOHYS  
mV  
1100  
85  
VFB = GND (not switching)  
Ground Pin Current  
IGND  
µA  
µA  
LDO1 or LDO2 (EN = GND; EN1 or  
EN2 = GND)  
95  
Ground Pin Current in  
Shutdown  
IGND_SHDN  
0.2  
5
EN = EN1 = EN2 = 0V  
30  
60  
All channels on, IDC/DC = ILDO1  
ILDO2 = 0 mA (LOWQ = GND)  
=
80  
Ground Pin Current  
(LOWQ mode)  
IGND_LOWQ  
µA  
LDO1 or LDO2 (EN = GND; EN1 or  
EN2 = GND);  
20  
70  
IOUT = 0 mA (LOWQ = GND)  
Overtemperature  
Shutdown  
TSD  
160  
23  
°C  
°C  
Overtemperature  
Shutdown Hysteresis  
TSDHYS  
Enable Inputs (EN; EN1; EN2; LOWQ)  
VIH  
1.0  
0.2  
1
V
V
Logic Low  
Logic High  
VIL 0.2V  
Enable Input Voltage  
VIL  
0.1  
0.1  
µA  
µA  
Enable Input Current  
IENLK  
1
VIH 1.0V  
Turn-on Time  
Turn-on Time  
(LDO1 and LDO2)  
tTURN-ON  
tTURN-ON  
240  
83  
500  
350  
µs  
µs  
(LOWQ = VIN; ILOAD = 300 mA);  
(LOWQ = GND; ILOAD = 10 mA)  
Turn-on Time (DC/DC)  
POR Output  
Low Threshold, % of nominal  
(VDC/DC or VLDO1 or VLDO2) (Flag  
ON)  
POR Threshold Voltage,  
Falling  
VTHLOW_POR  
90  
91  
96  
%
%
High Threshold, % of nominal  
POR Threshold Voltage,  
Rising  
VTHIGH_POR  
99  
(VDC/DC and VLDO1 and VLDO2  
(Flag OFF)  
)
POR Output Logic Low Voltage; IL =  
250 µA  
VOL  
VOLPOR  
10  
100  
1
mV  
µA  
IPOR  
ILEAKPOR  
0.01  
Flag Leakage Current, Flag OFF  
SET INPUT  
SET Pin Current Source  
ISET  
0.75  
1.25  
1.25  
1.75  
µA  
V
VSET = 0V  
SET Pin Threshold  
Voltage  
VTHSET  
POR = High  
Note 1: Specification for packaged product only.  
2: VOUT denotes the highest of the three output voltages of DC/DC, LDO1 and LDO2.  
DS20005910A-page 4  
2017 Microchip Technology Inc.  
 
 
MIC2810  
TABLE 1-2:  
ELECTRICAL CHARACTERISTICS - DC/DC CONVERTER  
Electrical Characteristics: VIN = VOUTDC/DC + 1V; EN1 = VIN; EN2 = GND; IOUTDC/DC = 100 mA; L = 2.2 µH;  
COUTDC/DC = 2.2 µF; TJ = 25°C, bold values indicate –40°C to + 125°C; unless noted.  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Units  
Conditions  
LOWQ = High (Full Power Mode)  
–2  
2
Output Voltage Accuracy  
VOUT  
%
Nominal VOUT tolerance  
–3  
3
VOUT > 2.4V; VIN = VOUT + 300 mV  
to 5.5V, ILOAD= 100 mA  
VOUT < 2.4V; VIN = 2.7V to 5.5V,  
ILOAD= 100 mA  
Output Voltage Line  
Regulation  
(VOUT/VOUT  
)
0.2  
%/V  
/VIN  
Output Voltage Load  
Regulation  
VOUT/VOUT  
100  
0.1  
%
%
20 mA < ILOAD < 600 mA  
Maximum Duty Cycle  
DCMAX  
VFB 0.4V  
ISW = 150 mA, VFB = 0.7VFB_NOM  
PMOS  
0.5  
PWM Switch  
ON-Resistance  
ISW = –150 mA, VFB = 1.1VFB_NOM  
NMOS  
1.8  
0.6  
2
MHz  
A
Oscillator Frequency  
fosc  
2.2  
1.6  
Current Limit in PWM  
Mode  
0.75  
1
VFB = 0.9 * VNOM  
LOWQ = Low (Light Load Mode)  
–2  
2
Variation from nominal VOUT  
Output Voltage Accuracy  
VOUT  
%
Variation from nominal VOUT  
–40°C to +125°C  
;
–3  
3
80  
0.02  
0.3  
0.6  
1.5  
V
IN = VOUT + 1V to 5.5V;  
(VOUT/VOUT  
)
Line Regulation  
%/V  
/VIN  
IOUT = 100 µA  
Load Regulation  
Ripple Rejection  
Current Limit  
VOUT/VOUT  
PSRR  
0.4  
45  
%
dB  
mA  
IOUT = 100 µA to 50 mA  
f = up to 1 kHz  
ILIM_LOWQ  
VN  
120  
53  
190  
VOUT = 0V  
Output Voltage Noise  
µVRMS 10 Hz to 100 kHz  
2017 Microchip Technology Inc.  
DS20005910A-page 5  
MIC2810  
TABLE 1-3:  
ELECTRICAL CHARACTERISTICS - LDO1/LDO2  
Electrical Characteristics: VIN1 = VIN2 = VOUTLDO1 + 1.0V or VIN1 = VIN2 = VOUTLDO2 + 1.0V; EN = GND; EN1 =  
EN2 = VIN1 = VIN2; CLDO1 = CLDO2 = 2.2 µF; IOUTLDO1 = 100 µA; TJ = 25°C, bold values indicate  
–40°C TJ +125°C; unless noted.  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Units  
Conditions  
LOWQ = High (Full Power Mode)  
–2  
2
Variation from nominal VOUT  
Output Voltage Accuracy  
Line Regulation  
VOUT  
%
Variation from nominal VOUT  
–40°C to +125°C  
;
–3  
3
400  
0.02  
0.3  
0.6  
%/V  
V
IN = VOUT +1V to 5.5V  
0.20  
0.25  
0.40  
70  
IOUT = 100 µA to 150 mA  
Load Regulation  
Dropout Voltage  
VOUT/VOUT  
%
I
I
OUT = 100 µA to 200 mA  
OUT = 100 µA to 300 mA  
1.5  
IOUT = 150 mA  
IOUT = 200 mA  
VDO  
94  
mV  
142  
35  
300  
IOUT = 300 mA  
f = up to 1 kHz  
VOUT = 0V  
Ripple Rejection  
Current Limit  
PSRR  
ILIM  
dB  
600  
91  
850  
mA  
Output Voltage Noise  
VN  
µVRMS 10 Hz to 100 kHz  
LOWQ = Low (Light Load Mode)  
–3  
3
Variation from nominal VOUT  
Output Voltage Accuracy  
VOUT  
%
Variation from nominal VOUT  
–40°C to +125°C  
;
–4  
4
50  
0.02  
0.3  
0.6  
1.0  
35  
Line Regulation  
Load Regulation  
Dropout Voltage  
VOUT/VOUT  
VDO  
%/V  
%
VIN = VOUT +1V to 5.5V  
0.2  
22  
IOUT = 100 µA to 10 mA  
IOUT = 10 mA  
mV  
50  
Current Limit  
ILIM  
85  
125  
mA  
dB  
VIN = 2.7V; VOUT = 0V  
f = up to 1 kHz  
Ripple Rejection  
PSRR  
35  
DS20005910A-page 6  
2017 Microchip Technology Inc.  
MIC2810  
TABLE 1-4:  
TEMPERATURE SPECIFICATIONS (Note 1)  
Parameters  
Sym.  
Min.  
Typ.  
Max.  
Units  
Conditions  
Temperature Ranges  
Storage Temperature Range  
Lead Temperature  
TS  
TJ  
–65  
+150  
+260  
+125  
°C  
°C  
°C  
Soldering, 10 sec.  
Junction Temperature  
Package Thermal Resistance  
16-Ld QFN  
–40  
θJA  
56  
°C/W  
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable  
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the  
maximum allowable power dissipation will cause the device operating junction temperature to exceed the  
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.  
2017 Microchip Technology Inc.  
DS20005910A-page 7  
 
MIC2810  
2.0  
TYPICAL PERFORMANCE CURVES  
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
For this page only, DC/DC Normal Mode (LOWQ = VIN)  
FIGURE 2-1:  
1.2V  
Efficiency.  
FIGURE 2-4:  
Load Regulation.  
OUT  
FIGURE 2-2:  
Switching Frequency vs.  
FIGURE 2-5:  
Line Regulation.  
Input Voltage.  
FIGURE 2-6:  
Current Limit vs. Input  
FIGURE 2-3:  
Switching Frequency vs.  
Voltage.  
Temperature.  
DS20005910A-page 8  
2017 Microchip Technology Inc.  
MIC2810  
For this page only, DC/DC LOWQ Mode (LOWQ = GND)  
FIGURE 2-7:  
Power Supply Rejection  
FIGURE 2-10:  
Current Limit vs. Input  
Ratio.  
Voltage.  
FIGURE 2-8:  
Load Regulation.  
FIGURE 2-11:  
Output Noise Spectral  
Density.  
FIGURE 2-9:  
Line Regulation.  
2017 Microchip Technology Inc.  
DS20005910A-page 9  
MIC2810  
FIGURE 2-15:  
Ratio LDO2 (LOWQ Mode).  
Power Supply Rejection  
FIGURE 2-12:  
Ratio LDO1 (LOWQ Mode).  
Power Supply Rejection  
FIGURE 2-16:  
Ratio LDO2 (Normal Mode).  
Power Supply Rejection  
FIGURE 2-13:  
Ratio LDO1 (Normal Mode).  
Power Supply Rejection  
FIGURE 2-17:  
LDO2 Load Regulation.  
FIGURE 2-14:  
LDO1 Line Regulation.  
DS20005910A-page 10  
2017 Microchip Technology Inc.  
MIC2810  
FIGURE 2-18:  
Output Current.  
LDO2 Ground Current vs.  
LDO2 Ground Current vs.  
LDO2 Dropout Voltage vs.  
FIGURE 2-21:  
Temperature.  
LDO2 Dropout Voltage vs.  
FIGURE 2-19:  
Temperature.  
FIGURE 2-22:  
Density.  
LDO2 Output Noise Spectral  
FIGURE 2-20:  
FIGURE 2-23:  
LDO2 (LOWQ Mode) Load  
Output Current.  
Transient.  
2017 Microchip Technology Inc.  
DS20005910A-page 11  
MIC2810  
FIGURE 2-24:  
Transient.  
LDO2 (Normal Mode) Load  
DC/DC (LOWQ Mode) Load  
DC/DC (LOWQ Mode)  
FIGURE 2-27:  
DC/DC PWM Waveforms.  
FIGURE 2-28:  
DC/DC Load Transient.  
FIGURE 2-25:  
Transient.  
FIGURE 2-29:  
DC/DC Start-Up  
FIGURE 2-26:  
Waveforms.  
Start-Up Waveform.  
DS20005910A-page 12  
2017 Microchip Technology Inc.  
MIC2810  
FIGURE 2-30:  
POR Behavior; EN1 = EN2  
FIGURE 2-33:  
C
Pin Voltage for Correct  
SET  
= High, Low-to-High Transition on EN.  
Sequencing.  
FIGURE 2-31:  
POR Behavior; EN = EN2 =  
FIGURE 2-34:  
POR Behavior for Correct  
High, Low-to-High Transition on EN1.  
Sequencing.  
FIGURE 2-32:  
POR Behavior; EN = EN1 =  
High, Low-to-High Transition on EN2.  
2017 Microchip Technology Inc.  
DS20005910A-page 13  
 
 
 
 
 
MIC2810  
3.0  
PIN DESCRIPTIONS  
The descriptions of the pins are listed in Table 3-1.  
TABLE 3-1:  
PIN FUNCTION TABLE  
Pin Number Pin Name  
Description  
LOWQ Mode. Active Low Input. Logic High = Full Power Mode; Logic Low = LOWQ  
Mode; Do not leave floating.  
1
2
LOWQ  
BIAS  
Internal circuit bias supply. It must be decoupled to signal ground with a 0.1 µF  
capacitor and should not be loaded.  
3
4
5
SGND  
PGND  
SW  
Signal ground.  
Power ground.  
Switch (Output): Internal power MOSFET output switches.  
Supply Input – DC/DC and other circuitry shared with LDO1 and LDO2. Must be  
connected to Pin 7.  
6
VIN  
7
8
VIN2  
LDO2  
LDO  
Supply Input – LDO2. Must be connected to Pin 6.  
Output of LDO regulator 2.  
9
LDO Output: Connect to VOUT of the DC/DC for LOWQ mode operation.  
Supply Input – LDO1.  
10  
11  
VIN1  
LDO1  
Output of LDO regulator 1.  
Power-on Reset Output: Open-drain output. Active low indicates an output  
undervoltage condition on either one of the three regulated outputs.  
12  
13  
14  
15  
16  
POR  
CSET  
EN1  
EN  
Delay Set Input: Connect external capacitor to GND to set the internal delay for the  
POR output. When left open, there is a minimum delay. This pin cannot be grounded.  
Enable Input (LDO1). Active High Input. Logic high = On; Logic low = Off; do not leave  
floating.  
Enable Input (DC/DC). Active High Input. Logic High = On; Logic Low = Off; Do not  
leave floating.  
Enable Input (LDO2). Active High Input. Logic high = On; Logic low = Off; do not leave  
floating.  
EN2  
3.1  
LOWQ  
3.2  
BIAS  
The LOWQ pin provides a logic level control between  
the internal PWM switching regulator mode, and the  
low noise linear regulator mode. With LOWQ pulled low  
(0.2V), quiescent current of the device is greatly  
reduced by switching to a low noise linear regulator  
mode that has a typical supply current of 38 µA. In  
linear (LDO) mode, the output can deliver 60 mA of  
current to the output. By placing LOWQ high (1V), the  
device transitions into a constant frequency PWM  
step-down regulator mode. This allows the device the  
ability to efficiently deliver up to 600 mA of output  
current at the same output voltage.  
The BIAS pin supplies the power to the internal control  
and reference circuitry. The bias is powered from VIN  
through an internal 6resistor. A small 0.1 µF  
capacitor is required for bypassing.  
3.3  
SGND  
Signal ground (SGND) is the ground path for the  
biasing and control circuitry. The current loop for the  
signal ground should be as small as possible.  
3.4  
PGND  
LOWQ mode also limits the output load of both LDO1  
and LDO2 to less than 50 mA.  
Power ground (PGND) is the ground path for the high  
current PWM mode. The current loop for the power  
ground should be as small as possible.  
DS20005910A-page 14  
2017 Microchip Technology Inc.  
 
MIC2810  
If any of the outputs are subsequently pulled out of  
regulation (e.g., due to a momentary overload), the  
POR signal goes low and it remains low as long as the  
affected output is out of regulation. If the affected  
output returns within regulation, POR is asserted high  
after the delay time programmed with the capacitor at  
the CSET pin.  
3.5  
SW  
The switch (SW) pin connects directly to the inductor  
and provides the switching current necessary to  
operate in PWM mode. Due to the high speed  
switching on this pin, the switch node should be routed  
away from sensitive nodes.  
The ESD protection of the POR pin is free from  
clamping diodes to the input supply rails. Therefore, the  
POR signal can be asserted to host I/Os under backup  
power domains or pulled up to backup power sources  
without the risk of parasitic leakage, even if the main  
power to the MIC2810 is removed.  
3.6  
VIN/VIN1/VIN2  
Three input voltage pins provide power to the switch  
mode regulator, LDO1, and LDO2. VIN provides power  
to the control circuitry of the DC/DC converter and  
voltage reference circuitry shared by all the regulators  
in the MIC2810. LDO1’s input voltage (VIN1) can go  
down to 1.65V, but LDO2 and the DC/DC converter  
input voltages are limited to 2.7V minimum.  
3.11 CSET  
The CSET pin is a current source output that charges  
a capacitor that sets the delay time for the power-on  
reset output from low to high. The delay for POR high  
to low (detecting an undervoltage on any of the outputs)  
is always minimal. The current source of 1.25µA  
charges a capacitor up from 0V. When the capacitor  
reaches 1.25V, the output of the POR is allowed to go  
high. The delay time in microseconds is equal to the  
CSET in picofarads.  
For the switch mode regulator, VIN provides power to  
the MOSFET along with current limiting sense circuitry.  
Due to the high switching speeds, a 4.7 µF capacitor is  
recommended close to VIN and the power ground  
(PGND) pin for bypassing. Please refer to the PCB  
layout section for an example of an appropriate circuit  
layout.  
3.7  
LDO2  
EQUATION 3-1:  
Regulated output voltage of LDO2. Power is provided  
by VIN2 The minimum recommended output  
capacitance is 2.2 µF.  
.
PORDelays= C  
pF  
SET  
3.8  
LDO  
3.12 EN/EN1/EN2  
The LDO pin is the output of the linear regulator and  
should be connected to the output of the step-down  
PWM regulator. In LOWQ mode (LOWQ < 0.2V), the  
LDO provides the output voltage of the DC/DC  
regulator.  
All enable inputs are active high, requiring 1.0V for  
guaranteed operation. EN provides logic control for the  
DC/DC regulator. EN2 provides logic control for LDO2,  
and EN1 provides logic control for LDO1. The enable  
inputs are CMOS logic and cannot be left floating.  
3.9  
LDO1  
The enable pins provide logic level control of the  
specified outputs. When all enable pins are in the off  
state, supply current of the device is greatly reduced  
(typically <1 µA). When the DC/DC regulator is in the  
off state, the output drive is placed in a "tri-stated"  
condition, where both the high side P-channel  
MOSFET and the low-side N-channel are in an “off” or  
non-conducting state. Do not drive any of the enable  
pins above the supply voltage.  
Regulated output voltage of LDO1. Input power is  
provided by VIN1. The minimum recommended output  
capacitance is 2.2 µF.  
3.10 Power-on Reset (POR)  
The power-on reset output is an open-drain N-Channel  
device, requiring a pull-up resistor to either the input  
voltage or output voltage for proper voltage levels. The  
POR output has a delay time that is programmable with  
a capacitor from the CSET pin to ground. The delay  
time can be programmed to be as long as 1 second. In  
steady-state conditions, the POR output is high if at  
least one channel (DC/DC, LDO1, and LDO2) is  
enabled and has reached regulation. This is equivalent  
to performing a logic OR operation on the status of the  
output voltages.  
2017 Microchip Technology Inc.  
DS20005910A-page 15  
 
MIC2810  
recommended due to their lower ESR and ESL. Please  
refer to the PCB layout section for an example of an  
appropriate circuit layout.  
4.0  
APPLICATION INFORMATION  
The MIC2810 is a power management IC with a single  
integrated step-down regulator and two low dropout  
regulators. LDO1 and LDO2 are 300 mA low dropout  
regulators supplied from the input voltage pins. The  
step-down regulator is a 600 mA PWM power supply.  
All three regulators utilize a LOWQ light load mode to  
maximize battery efficiency under light load conditions.  
This is achieved with a LOWQ control pin that, when  
pulled low, shuts down all the biasing and drive current  
for the PWM regulator, along with reducing the current  
limit of the two independent LDOs. When the LOWQ  
pin is pulled low, the MIC2810 draws only 30 µA of  
operating current. This mode allows the output to be  
regulated through the LDO output, which is capable of  
providing 60 mA of output current. This method has the  
advantage of producing a clean, low current, ultra-low  
noise output in LOWQ mode. During LOWQ mode, the  
SW node becomes high impedance, blocking current  
flow. Other methods of reducing quiescent current,  
such as pulse frequency modulation (PFM) or bursting  
techniques create large amplitude and low frequency  
ripple voltages that can be detrimental to system  
operation.  
4.3  
Inductor Selection  
The MIC2810 is designed for use with a 2.2 µH  
inductor. Proper selection should ensure the inductor  
can handle the maximum average and peak currents  
required by the load. Maximum current ratings of the  
inductor are generally given in two methods;  
permissible DC current and saturation current.  
Permissible DC current can be rated either for a 40°C  
temperature rise or a 10% to 20% loss in inductance.  
Ensure that the inductor selected can handle the  
maximum operating current. When saturation current is  
specified, make sure that there is enough margin that  
the peak current will not saturate the inductor. Peak  
inductor current can be calculated as follows:  
EQUATION 4-1:  
V
OUT  
----------------  
V
1  
OUT  
V
IN  
-----------------------------------------------  
I
= I  
+
PK  
OUT  
2 f L  
When more than 60 mA is required, the LOWQ pin can  
be forced high, causing the MIC2810 to enter PWM  
mode. In this case, the LDO output makes a "hand-off"  
to the PWM regulator with virtually no variation in  
output voltage. The LDO output then turns off allowing  
up to 600 mA of current to be efficiently supplied  
through the PWM output to the load.  
Where:  
PK = Peak inductor current.  
IOUT = Output/load current.  
VIN = Input voltage.  
VOUT = Output voltage.  
f = Switching frequency of the PWM regulator.  
L = Inductor value.  
I
4.1  
Output Capacitor  
LDO1 and LDO2 outputs require a 2.2 µF ceramic  
output capacitor for stability. The DC/DC switch mode  
regulator also requires a 2.2 µF ceramic output  
capacitor to be stable. All output capacitor values can  
be increased to improve transient response, but  
performance has been optimized for a 2.2 µF ceramic  
on the LDOs and the DC/DC regulator. X7R/X5R  
dielectric-type ceramic capacitors are recommended  
4.4  
POR Delay Time  
The POR signal also goes low for the duration of the  
delay time given by Equation 3-1 when only one of the  
enable inputs (EN, EN1, EN2) transitions from low to  
high, with the others being already high and the  
corresponding output being in regulation. This is shown  
in Figure 2-30, Figure 2-31, and Figure 2-32. At the  
low-to-high transition of either enable input, the CSET  
pin capacitor is discharged to ground, and the POR  
delay time is restarted.  
because  
of  
their  
temperature  
performance.  
X5R/X7R-type capacitors change capacitance by 15%  
over their operating temperature range and are the  
most stable type of ceramic capacitors. Z5U and Y5V  
dielectric capacitors change value by as much as 50%  
to 60% respectively over their operating temperature  
ranges.  
At start-up, in order to prevent a momentary HIGH  
glitch of the POR signal between subsequent enable  
commands, it is recommended to set the POR delay  
time longer than the maximum delay expected between  
the enable command signals plus the turn-on time  
4.2  
Input Capacitor  
tTURN-ON  
.
A minimum 1 µF ceramic, 4.7 µF recommended,  
should be placed as close as possible to the VIN pin for  
optimal bypassing. X5R or X7R dielectrics are  
recommended for the input capacitor. Y5V dielectrics  
lose most of their capacitance over temperature and  
are therefore, not recommended. A minimum 1 µF is  
recommended close to the VIN and PGND pins for high  
frequency filtering. Smaller case size capacitors are  
For a given delay between the enable signals, an  
example of correct POR delay time design is shown in  
Figure 2-33 and Figure 2-34. In Figure 2-33, it can be  
seen that the CSET voltage is reset to ground by  
subsequent low-to-high enable signals transitions  
before it reaches the VTHCSET voltage (1.25V typ.),  
thus extending the duration of the POR LOW assertion  
(Figure 2-34).  
DS20005910A-page 16  
2017 Microchip Technology Inc.  
MIC2810  
5.0  
5.1  
PACKAGING INFORMATION  
Package Marking Information  
Example  
16-Pin QFN*  
Part Number  
Code  
MIC2810-1JGMYML-TR  
MIC2810-1J6JYML-TR  
MIC2810-1J6SYML-TR  
MIC2810-44MYML-TR  
MIC2810-4GKYML-TR  
MIC2810-4GMYML-TR  
MIC2810-4GPYML-TR  
MIC2810-4GSYML-TR  
MIC2810-4LSYML-TR  
MIC2810-4MSYML-TR  
MIC2810-CGJYML-TR  
MIC2810-FGSYML-TR  
D1JGM  
D1J6J  
Y
Y
XXXXX  
NNN  
YD4GP  
D1J6S  
231  
YD44M  
YD4GK  
YD4GM  
YD4GP  
YD4GS  
YD4LS  
YD4MS  
YDCGJ  
YDFGS  
Refer to the Product Identification System  
section for information on the output voltage  
for each device.  
Legend: XX...X Product code or customer-specific information  
Y
YY  
WW  
NNN  
Year code (last digit of calendar year)  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
Pb-free JEDEC® designator for Matte Tin (Sn)  
e
3
*
This package is Pb-free. The Pb-free JEDEC designator (  
can be found on the outer packaging for this package.  
)
e3  
, , Pin one index is identified by a dot, delta up, or delta down (triangle  
mark).  
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line, thus limiting the number of available  
characters for customer-specific information. Package may or may not include  
the corporate logo.  
Underbar (_) and/or Overbar () symbol may not be to scale.  
2017 Microchip Technology Inc.  
DS20005910A-page 17  
MIC2810  
16-Lead QFN 3 mm x 3 mm Package Outline and Recommended Land Pattern  
Note: For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging.  
DS20005910A-page 18  
2017 Microchip Technology Inc.  
MIC2810  
Note: For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging.  
2017 Microchip Technology Inc.  
DS20005910A-page 19  
MIC2810  
NOTES:  
DS20005910A-page 20  
2017 Microchip Technology Inc.  
MIC2810  
APPENDIX A: REVISION HISTORY  
Revision A (November 2017)  
• Converted Micrel document MIC2810 to Micro-  
chip data sheet DS20005910A.  
• Minor text changes throughout.  
2017 Microchip Technology Inc.  
DS20005910A-page 21  
MIC2810  
NOTES:  
DS20005910A-page 22  
2017 Microchip Technology Inc.  
MIC2810  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.  
Examples:  
(1)  
PART NO.  
Device  
X
X
XX  
X
X
a) MIC2810-44MYML-TR:  
Digital Power Management  
IC 2 MHz, 600 mA DC/DC  
with Dual 300 mA/300 mA  
Low VIN LDOs,  
Tape and Reel Option  
Output Temperature Package  
Voltages  
1.2V/1.2V/2.8V Output Voltage,  
–40°C to +125°C, 16LD QFN  
Package, 5,000/Reel  
Device:  
MIC2810:  
Digital Power Management IC 2 MHz,  
600 mA DC/DC with Dual 300 mA/300 mA  
Low VIN LDOs  
b) MIC2810-4GMYML-TR:  
c) MIC2810-4GSYML-TR:  
Digital Power Management  
IC 2 MHz, 600 mA DC/DC  
with Dual 300 mA/300 mA  
Low VIN LDOs, 1.2V/1.8V/2.8V  
Output Voltage, –40°C to +125°C  
16LD QFN Package, 5,000/Reel  
Digital Power Management  
IC 2 MHz, 600 mA DC/DC  
with Dual 300 mA/300 mA  
Low VIN LDOs, 1.2V/1.8V/3.3V  
Output Voltage, –40°C to +125°C  
16LD QFN Package, 5,000/Reel  
Output Voltages: 1JGM=  
(DC/DC, LDO1,  
LDO2)  
1.25V/1.8V/2.8V  
1J6J =  
1J6S=  
44M =  
4GK =  
4GM=  
4GP =  
4GS =  
4LS =  
4MS =  
CGJ =  
FGS =  
1.25V/1.4V/2.5V  
1.25V/1.4V/3.3V  
1.2V/1.2V/2.8V  
1.2V/1.8V/2.6V  
1.2V/1.8V/2.8V  
1.2V/1.8V/3.0V  
1.2V/1.8V/3.3V  
1.2V/2.7V/3.3V  
1.2V/2.8V/3.3V  
1.2V/1.8V/2.5V  
1.5V/1.8V/3.3V  
d) MIC2810-4MSYML-TR:  
e) MIC2810-FGSYML-TR:  
Digital Power Management  
IC 2 MHz, 600 mA DC/DC  
with Dual 300 mA/300 mA  
Low VIN LDOs, 1.2V/2.8V/3.3V  
Output Voltage, –40°C to +125°C  
16LD QFN Package, 5,000/Reel  
Temperature:  
Y
=
Pb-Free with Industrial Temperature Grade  
(–40°C to +125°C)  
Digital Power Management  
IC 2 MHz, 600 mA DC/DC  
with Dual 300 mA/300 mA  
Low VIN LDOs, 1.5V/1.8V/3.3V  
Output Voltage, –40°C to +125°C  
16LD QFN Package, 5,000/Reel  
Package:  
ML  
TR  
=
=
16-lead, 3 mm x 3 mm QFN, 0.85 mm thickness  
5,000/Reel  
Tape and Reel:  
Note 1:  
Tape and Reel identifier only appears in the  
catalog part number description. This identifier is  
used for ordering purposes and is not printed on  
the device package. Check with your Microchip  
Sales Office for package availability with the  
Tape and Reel option.  
2017 Microchip Technology Inc.  
DS20005910A-page 23  
MIC2810  
NOTES:  
DS20005910A-page 24  
2017 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is provided only for your convenience  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
MICROCHIP MAKES NO REPRESENTATIONS OR  
WARRANTIES OF ANY KIND WHETHER EXPRESS OR  
IMPLIED, WRITTEN OR ORAL, STATUTORY OR  
OTHERWISE, RELATED TO THE INFORMATION,  
INCLUDING BUT NOT LIMITED TO ITS CONDITION,  
QUALITY, PERFORMANCE, MERCHANTABILITY OR  
FITNESS FOR PURPOSE. Microchip disclaims all liability  
arising from this information and its use. Use of Microchip  
devices in life support and/or safety applications is entirely at  
the buyer’s risk, and the buyer agrees to defend, indemnify and  
hold harmless Microchip from any and all damages, claims,  
suits, or expenses resulting from such use. No licenses are  
conveyed, implicitly or otherwise, under any Microchip  
intellectual property rights unless otherwise stated.  
Trademarks  
The Microchip name and logo, the Microchip logo, AnyRate, AVR,  
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,  
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,  
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,  
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,  
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip  
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST  
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered  
trademarks of Microchip Technology Incorporated in the U.S.A.  
and other countries.  
ClockWorks, The Embedded Control Solutions Company,  
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,  
mTouch, Precision Edge, and Quiet-Wire are registered  
trademarks of Microchip Technology Incorporated in the U.S.A.  
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any  
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,  
CodeGuard, CryptoAuthentication, CryptoCompanion,  
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average  
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial  
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,  
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,  
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,  
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,  
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple  
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,  
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,  
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and  
ZENAare trademarks of Microchip Technology Incorporated in the  
U.S.A. and other countries.  
SQTP is a service mark of Microchip Technology Incorporated in  
the U.S.A.  
Microchip received ISO/TS-16949:2009 certification for its worldwide  
headquarters, design and wafer fabrication facilities in Chandler and  
Tempe, Arizona; Gresham, Oregon and design centers in California  
and India. The Company’s quality system processes and procedures  
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
Silicon Storage Technology is a registered trademark of Microchip  
Technology Inc. in other countries.  
GestIC is a registered trademark of Microchip Technology  
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology  
Inc., in other countries.  
All other trademarks mentioned herein are property of their  
respective companies.  
QUALITYMANAGEMENTꢀꢀSYSTEMꢀ  
CERTIFIEDBYDNVꢀ  
© 2017, Microchip Technology Incorporated, All Rights Reserved.  
ISBN: 978-1-5224-2428-4  
== ISO/TS16949==ꢀ  
2017 Microchip Technology Inc.  
DS20005910A-page 25  
Worldwide Sales and Service  
AMERICAS  
ASIA/PACIFIC  
ASIA/PACIFIC  
EUROPE  
Corporate Office  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7200  
Fax: 480-792-7277  
Technical Support:  
http://www.microchip.com/  
support  
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Tel: 61-2-9868-6733  
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Tel: 91-80-3090-4444  
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Fax: 43-7242-2244-393  
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India - New Delhi  
Tel: 91-11-4160-8631  
Denmark - Copenhagen  
Tel: 45-4450-2828  
Fax: 45-4485-2829  
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DS20005910A-page 26  
2017 Microchip Technology Inc.  
10/25/17  

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