MIC45116-1YMP-TR [MICROCHIP]

DC-DC REG PWR SUPPLY MODULE;
MIC45116-1YMP-TR
型号: MIC45116-1YMP-TR
厂家: MICROCHIP    MICROCHIP
描述:

DC-DC REG PWR SUPPLY MODULE

文件: 总42页 (文件大小:3049K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MIC45116  
20V/6A DC/DC Power Module  
Features  
General Description  
• Up to 6A Output Current  
• >93% Peak Efficiency  
The MIC45116 is a synchronous step-down regulator  
module, featuring a unique adaptive ON-time control  
architecture. The module incorporates a DC/DC  
controller, power MOSFETs, bootstrap diode, bootstrap  
capacitor, and an inductor in a single package;  
simplifying the design and layout process for the end  
user.  
• Output Voltage of 0.8V to 85% of Input with ±1%  
Accuracy  
• Fixed 600 kHz Switching Frequency  
• Enable Input and Open-Drain Power Good Output  
• HyperLight Load® (MIC45116-1) Improves Light  
Load Efficiency  
• Hyper Speed Control® (MIC45116-2) Architecture  
Enables Fast Transient Response  
This highly integrated solution expedites system  
design and improves product time-to-market. The  
internal MOSFETs and inductor are optimized to  
achieve high efficiency at a low output voltage. The fully  
optimized design can deliver up to 6A current under a  
wide input voltage range of 4.75V to 20V without  
requiring additional cooling.  
• Supports Safe Start-Up into Pre-Biased Output  
• –40°C to +125°C Junction Temperature Range  
• Thermal Shutdown Protection  
The MIC45116-1 uses HyperLight Load® (HLL) which  
maintains high efficiency under light load conditions by  
transitioning to variable frequency, discontinuous-  
mode operation. The MIC45116-2 uses Hyper Speed  
Control® architecture which enables ultra-fast load  
transient response, allowing for a reduction of output  
capacitance. The MIC45116 offers 1% output accuracy  
that can be adjusted from 0.8V to 85% of the input  
(PVIN) with two external resistors. Additional features  
include thermal-shutdown protection, adjustable  
current limit, and short-circuit protection. The  
MIC45116 allows for safe start-up into a pre-biased  
output.  
• Short-Circuit Protection with Hiccup Mode  
• Adjustable Current Limit  
• Available in 52-Pin 8 mm x 8 mm x 3 mm QFN  
Package  
Applications  
• High Power Density Point-of-Load Conversion  
• Servers, Routers, Networking, and Base Stations  
• FPGAs, DSP, and Low-Voltage ASIC Power  
Supplies  
• Industrial and Medical Equipment  
Typical Application Circuit  
MIC45116  
8x8x3 QFN  
PVDD  
5VDD  
PG  
10k  
VOUT  
VIN  
PVIN  
VOUT  
FB  
CFF  
RFB1  
RFB2  
MIC45116  
VIN  
COUT  
CIN  
RINJ  
EN  
CINJ  
SW  
RLIM  
ILIM  
PGND  
2016 Microchip Technology Inc.  
DS20005571A-page 1  
MIC45116  
Package Type  
MIC45116  
8x8x3 QFN (MP)  
50  
49  
47  
52  
48  
44  
43  
42  
51  
46  
45  
41  
40  
39  
NC  
NC  
VIN  
EN  
PG  
1
2
PVIN  
PVIN  
KEEPOUT  
PVDD  
3
38  
37  
4
5
BST  
PGND ePAD  
36  
35  
34  
FB  
6
7
8
BST  
PGND  
NC  
KEEPOUT  
SW  
SW ePAD  
33  
32  
31  
NC  
9
SW  
SW  
NC  
10  
11  
PGND  
NC  
KEEPOUT  
VOUT  
30  
29  
28  
27  
12  
13  
14  
15  
PGND ePAD  
VOUT ePAD  
NC  
NC  
NC  
VOUT  
VOUT  
VOUT  
24  
25  
26  
16  
17  
18  
21  
22  
23  
19  
20  
DS20005571A-page 2  
2016 Microchip Technology Inc.  
MIC45116  
Functional Block Diagram  
MIC45116  
VIN  
VIN  
BST  
BST  
PVDD  
5VDD  
PVDD  
VDD  
PVIN  
CONTROLLER  
PVDD  
SW  
DH  
EN  
PG  
FB  
EN  
PG  
SW  
VOUT  
DL  
FB  
AGND  
PGND  
PGND  
ILIM  
ILIM  
2016 Microchip Technology Inc.  
DS20005571A-page 3  
MIC45116  
1.0  
ELECTRICAL CHARACTERISTICS  
Absolute Maximum Ratings †  
PVIN – VIN to PGND..................................................................................................................................... –0.3V to +30V  
PVDD – 5VDD to PGND.................................................................................................................................. –0.3V to +6V  
VSW, VILIM, VEN to PGND ................................................................................................................. –0.3V to (VIN + 0.3V)  
VBST to VSW ................................................................................................................................................. –0.3V to +6V  
VBST to PGND.............................................................................................................................................. –0.3V to +36V  
VPG to PGND................................................................................................................................. –0.3V to (5VDD + 0.3V)  
VFB to PGND ................................................................................................................................. –0.3V to (5VDD + 0.3V)  
ESD Rating(Note 1)....................................................................................................................................ESD Sensitive  
Operating Ratings ‡  
Supply Voltage (PVIN – VIN).....................................................................................................................+4.75V to +20V  
Output Current ..............................................................................................................................................................6A  
Enable Input (VEN) ............................................................................................................................................. 0V to VIN  
Power Good (VPG) .......................................................................................................................................... 0V to 5VDD  
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.  
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated  
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended  
periods may affect device reliability.  
‡ Notice: The device is not guaranteed to function outside its operating ratings.  
Note 1: Devices are ESD sensitive. Handling precautions are recommended.  
DS20005571A-page 4  
2016 Microchip Technology Inc.  
 
MIC45116  
TABLE 1-1:  
ELECTRICAL CHARACTERISTICS  
Electrical Characteristics: VIN = VEN = 12V, VOUT = 3.3V, VBST – VSW = 5V, TJ = +25ºC. Bold values indicate  
–40°C TJ +125°C, unless otherwise noted. (Note 1).  
Symbol  
Parameters  
Min.  
Typ.  
Max.  
Units  
Conditions  
Power Supply Input  
VIN, PVIN Input Voltage Range  
4.75  
20  
V
IQ  
IQ  
IIN  
Quiescent Supply Current  
(MIC45116-1)  
0.35  
0.75  
mA  
VFB = 1.5V  
Quiescent Supply Current  
(MIC45116-2)  
1.03  
29.4  
mA  
mA  
VFB = 1.5V  
Operating Current  
PVIN = VIN = 12V,  
VOUT = 1.8V, IOUT = 0A  
(MIC45116-2)  
ISHDN  
Shutdown Supply Current  
5.3  
5.2  
10  
µA  
V
VEN = 0V  
5VDD Output  
VDD  
5VDD Output Voltage  
4.8  
5.4  
VIN = 7V to 20V,  
I5VDD = 10 mA  
UVLO  
5VDD UVLO Threshold  
5VDD UVLO Hysteresis  
5VDD Load Regulation  
3.8  
4.2  
400  
2
4.6  
V
mV  
%
V5VDD Rising  
V5VDD Falling  
UVLO_HYS  
0.6  
3.6  
I5VDD = 0 mA to 40 mA  
Reference  
VFB  
Feedback Reference Voltage  
0.792  
0.784  
0.8  
0.8  
5
0.808  
0.816  
500  
V
TJ = 25°C  
–40°C TJ +125°C  
VFB = 0.8V  
IFB_BIAS FB Bias Current  
nA  
Enable Control  
ENHIGH  
ENLOW  
ENHYS  
IENBIAS  
Oscillator  
fSW  
EN Logic Level High  
EN Logic Level Low  
EN Hysteresis  
1.8  
0.6  
V
V
200  
5
mV  
µA  
EN Bias Current  
10  
VEN = 12V  
Switching Frequency  
Maximum Duty Cycle  
Minimum Duty Cycle  
400  
600  
85  
750  
kHz  
%
IOUT = 2A  
DMAX  
DMIN  
0
%
VFB = 1V  
tOFF(MIN) Minimum Off-Time  
140  
250  
350  
ns  
Soft-Start  
tSS  
Soft-Start Time  
3.3  
ms  
FB from 0V to 0.8V  
Short-Circuit Protection  
VCL  
VSC  
ICL  
Current-Limit Threshold  
–30  
–23  
60  
–14  
–7  
0
9
mV  
mV  
µA  
VFB = 0.79V  
VFB = 0V  
Short-Circuit Threshold  
Current-Limit Source Current  
Short-Circuit Source Current  
80  
100  
45  
VFB = 0.79V  
VFB = 0V  
ISC  
25  
35  
µA  
Note 1: Specification for packaged product only.  
2016 Microchip Technology Inc.  
DS20005571A-page 5  
 
MIC45116  
TABLE 1-1:  
ELECTRICAL CHARACTERISTICS (CONTINUED)  
Electrical Characteristics: VIN = VEN = 12V, VOUT = 3.3V, VBST – VSW = 5V, TJ = +25ºC. Bold values indicate  
–40°C TJ +125°C, unless otherwise noted. (Note 1).  
Symbol  
Parameters  
Min.  
Typ.  
Max.  
Units  
Conditions  
Power Good (PG)  
VPG_TH  
VPG_HYS PG Hysteresis  
tPG_DLY PG Delay Time  
PG Threshold Voltage  
85  
88  
6
95  
% VFB  
% VFB  
µs  
Sweep VFB from low-to-high  
Sweep VFB from high-to-low  
Sweep VFB from low-to-high  
VFB < 90% x VNOM, IPG = 1 mA  
80  
60  
VPG_LOW PG Low Voltage  
200  
mV  
Thermal Protection  
TSHD  
Overtemperature Shutdown  
160  
15  
°C  
°C  
TJ rising  
TSHD_HYS  
Overtemperature Shutdown  
Hysteresis  
Note 1: Specification for packaged product only.  
DS20005571A-page 6  
2016 Microchip Technology Inc.  
MIC45116  
TEMPERATURE SPECIFICATIONS  
Parameters  
Temperature Ranges  
Sym.  
Min.  
Typ.  
Max.  
Units  
Conditions  
Junction Temperature Range  
Maximum Junction Temperature  
Storage Temperature Range  
Lead Temperature  
TJ  
TS  
–40  
+125  
+150  
+150  
+260  
°C  
°C  
°C  
°C  
Note 1  
–65  
Soldering, 10s  
Package Thermal Resistances  
52-pin 8 mm x 8 mm x 3 mm QFN  
52-pin 8 mm x 8 mm x 3 mm QFN  
JA  
JC  
22  
5
°C/W Note 2  
°C/W Note 2  
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable  
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the  
maximum allowable power dissipation will cause the device operating junction temperature to exceed the  
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.  
2:  
JA and JC were measured using the MIC45116 evaluation board.  
2016 Microchip Technology Inc.  
DS20005571A-page 7  
 
 
MIC45116  
2.0  
TYPICAL PERFORMANCE CURVES  
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
FIGURE 2-1:  
V
Operating Supply  
FIGURE 2-4:  
Feedback Voltage vs.  
IN  
Current vs. Temperature (MIC45116-1).  
Temperature.  
FIGURE 2-2:  
V
Shutdown Current vs.  
FIGURE 2-5:  
Switching Frequency vs.  
IN  
Temperature.  
Temperature.  
FIGURE 2-3:  
V
Voltage vs.  
FIGURE 2-6:  
Output Current Limit vs.  
DD  
Temperature.  
Temperature.  
DS20005571A-page 8  
2016 Microchip Technology Inc.  
MIC45116  
FIGURE 2-7:  
V
UVLO Threshold vs.  
FIGURE 2-10:  
Output Voltage vs.  
DD  
Temperature.  
Temperature (MIC45116-1).  
FIGURE 2-11:  
Temperature (MIC45116-1).  
Load Regulation vs.  
FIGURE 2-8:  
Temperature.  
Enable Threshold vs.  
FIGURE 2-12:  
Line Regulation vs.  
FIGURE 2-9:  
EN Bias Curent vs.  
Temperature (MIC45116-1).  
Temperature.  
2016 Microchip Technology Inc.  
DS20005571A-page 9  
MIC45116  
FIGURE 2-13:  
Efficiency (V = 5V) vs.  
FIGURE 2-16:  
Efficiency (V = 5V) vs.  
IN  
IN  
Output Current (MIC45116-1).  
Output Current (MIC45116-2).  
FIGURE 2-14:  
Efficiency (V = 12V) vs.  
FIGURE 2-17:  
Efficiency (V = 12V) vs.  
IN  
IN  
Output Current (MIC45116-1).  
Output Current (MIC45116-2).  
FIGURE 2-15:  
Efficiency (V = 18V) vs.  
FIGURE 2-18:  
Efficiency (V = 18V) vs.  
IN  
IN  
Output Current (MIC45116-1).  
Output Current (MIC45116-2).  
DS20005571A-page 10  
2016 Microchip Technology Inc.  
MIC45116  
FIGURE 2-22:  
5V) vs. Output Current (MIC45116-2).  
Power Dissipation (V  
=
=
=
FIGURE 2-19:  
5V) vs. Output Current (MIC45116-1).  
Power Dissipation (V  
=
=
=
IN  
IN  
IN  
IN  
IN  
IN  
FIGURE 2-23:  
12V) vs. Output Current (MIC45116-2).  
Power Dissipation (V  
FIGURE 2-20:  
12V) vs. Output Current (MIC45116-1).  
Power Dissipation (V  
FIGURE 2-24:  
18V) vs. Output Current (MIC45116-2).  
Power Dissipation (V  
FIGURE 2-21:  
18V) vs. Output Current (MIC45116-1).  
Power Dissipation (V  
2016 Microchip Technology Inc.  
DS20005571A-page 11  
MIC45116  
FIGURE 2-25:  
Line Regulation vs. Output  
FIGURE 2-28:  
Line Regulation vs. Output  
Current (MIC45116-1).  
Current (MIC45116-2).  
FIGURE 2-26:  
Output Voltage vs. Output  
FIGURE 2-29:  
Output Voltage vs. Output  
Current (MIC45116-1).  
Current (MIC45116-2).  
FIGURE 2-27:  
Switching Frequency vs.  
FIGURE 2-30:  
Switching Frequency vs.  
Output Current (MIC45116-1).  
Output Current (MIC45116-2).  
DS20005571A-page 12  
2016 Microchip Technology Inc.  
MIC45116  
FIGURE 2-31:  
Feedback Voltage vs. Input  
FIGURE 2-34:  
Feedback Voltage vs. Input  
Voltage (MIC45116-1).  
Voltage (MIC45116-2).  
FIGURE 2-32:  
Output Regulation vs. Input  
FIGURE 2-35:  
Output Regulation vs. Input  
Voltage (MIC45116-1).  
Voltage (MIC45116-2).  
FIGURE 2-33:  
Switching Frequency vs.  
FIGURE 2-36:  
Switching Frequency vs.  
Input Voltage (MIC45116-1).  
Input Voltage (MIC45116-2).  
2016 Microchip Technology Inc.  
DS20005571A-page 13  
MIC45116  
VIN  
(5V/div)  
VOUT  
VIN = 12V  
VOUT = 1.8V  
IOUT = 6A  
(1V/div)  
V
(5V/diPvG)  
IIN  
(2A/div)  
Time (2.0ms/div)  
FIGURE 2-37:  
Enable Input Current vs.  
FIGURE 2-40:  
V
Soft Turn-Off.  
IN  
Input Voltage.  
VIN = 12V  
VOUT = 1.8V  
OUT = 6A  
I
VEN  
(2V/div)  
VOUT  
(1V/div)  
V
(5V/diPvG)  
IIN  
(1A/div)  
Time (2.0ms/div)  
FIGURE 2-41:  
Enable Turn-On Delay and  
FIGURE 2-38:  
Enable Threshold vs. Input  
Rise Time.  
Voltage.  
VIN = 12V  
VIN = 12V  
VOUT = 1.8V  
OUT = 6A  
VOUT = 1.8V  
I
OUT = 6A  
I
VEN  
(2V/div)  
VIN  
(5V/div)  
VOUT  
(1V/div)  
V
VOUT  
(1V/div)  
V
(5V/diPvG)  
(5V/diPvG)  
IIN  
IIN  
(2A/div)  
(1A/div)  
Time (2.0ms/div)  
Time (40μs/div)  
FIGURE 2-42:  
Enable Turn-On Delay and  
FIGURE 2-39:  
V
Soft Turn-On.  
IN  
Fall Time.  
DS20005571A-page 14  
2016 Microchip Technology Inc.  
MIC45116  
V
= 12V  
VOUTIN= 1.8V  
VEN  
(2V/div)  
VEN  
(2V/div)  
I
OUT = Short Wire across output  
VOUT  
(1V/div)  
V
VOUT  
(200mV/div)  
(5V/diPvG)  
V
= 12V  
VOUTIN= 1.8V  
IOUT = 0A  
IIN  
(200mA/div)  
VPRE-BIAS = 1.2V  
Time (2.0ms/div)  
Time (400μs/div)  
FIGURE 2-43:  
Enable Start-Up with  
FIGURE 2-46:  
Enabled Into Short-Circuit.  
Pre-Biased Output.  
VIN = 12V  
VOUT = 1.8V  
I
OUT = 6A  
VEN  
(2V/div)  
VOUT  
(1V/div)  
VOUT  
(1V/div)  
V
(5V/diPvG)  
V
(5V/diPvG)  
VIN = 12V  
VOUT = 1.8V  
IOUT = 6A  
IOUT  
(5A/div)  
IIN  
(1A/div)  
Time (200μs/div)  
Time (2ms/div)  
FIGURE 2-47:  
Short-Circuit During Steady  
FIGURE 2-44:  
Enable Turn-On/Turn-Off.  
State.  
V
= 12V  
VOUTIN= 1.8V  
IOUT = Short wire across output  
VIN  
VOUT  
(5V/div)  
VOUT  
(200mV/div)  
(1V/div)  
V
(5V/diPvG)  
V
= 12V  
VIONUT = 1.8V  
IIN  
IOUT  
(5A/div)  
I
OUT = 6A  
(500mA/div)  
Time (2.0ms/div)  
Time (2.0ms/div)  
FIGURE 2-45:  
Power Up Into Short-Circuit.  
FIGURE 2-48:  
Output Recovery from  
Short-Circuit.  
2016 Microchip Technology Inc.  
DS20005571A-page 15  
MIC45116  
VIN = 12V  
VIN = 12V  
VOUT = 1.8V  
VOUT = 1.8V  
I
OUT = 6A  
I
PK_CL = 8.1A  
VOUT  
(1V/div)  
VOUT  
(1V/div)  
V
(10V/diSvW)  
V
(5V/diPvG)  
V
(5V/diPvG)  
IOUT  
(5A/div)  
IOUT  
(5A/div)  
Time (400μs/div)  
Time (2ms/div)  
FIGURE 2-49:  
Peak Current-Limit  
FIGURE 2-52:  
Output Recovery from  
Threshold.  
Thermal Shutdown.  
VIN = 12V  
VOUT = 1.8V  
OUT = 6A  
I
VOUT  
(AC-Coupled)  
(20mV/div)  
VIN  
(5V/div)  
VOUT  
(1V/div)  
V
V
(5V/diSvW)  
(5V/diPvG)  
V
= 12V  
VIONUT = 1.8A  
IOUT = 6A  
IIN  
IOUT  
(5A/div)  
(1A/div)  
Time (2ms/div)  
Time (400ns/div)  
FIGURE 2-50:  
Inrush with 3000 µF.  
FIGURE 2-53:  
MIC45116-1 Switching  
= 6A).  
Waveforms (I  
OUT  
VIN = 12V  
VOUT = 1.8V  
OUT = 6A  
I
VOUT  
VOUT  
(AC-Coupled)  
(20mV/div)  
(1V/div)  
V
(10V/diSvW)  
V
V
VIN = 12V  
VOUT = 1.8V  
OUT = 0A  
(5V/diPvG)  
(5V/diSvW)  
I
IOUT  
(5A/div)  
IOUT  
(5A/div)  
Time (1ms/div)  
Time (4ms/div)  
FIGURE 2-51:  
Thermal Shutdown.  
FIGURE 2-54:  
Waveforms (I  
MIC45116-1 Switching  
= 0A).  
OUT  
DS20005571A-page 16  
2016 Microchip Technology Inc.  
MIC45116  
VOUT  
(AC-Coupled)  
(50mV/div)  
V
= 12V  
VOUTIN= 1.8V  
IOUT  
(1A/div)  
I
OUT = 0.5A to 3.5A  
Time (100μs/div)  
FIGURE 2-55:  
Transient Response  
(MIC45116-1).  
VOUT  
(AC-Coupled)  
(50mV/div)  
V
= 12V  
VOUTIN= 1.8V  
IOUT  
(2A/div)  
IOUT = 3A to 6A  
Time (100μs/div)  
FIGURE 2-56:  
Transient Response  
(MIC45116-2).  
FIGURE 2-57:  
Control Loop Frequency  
Response.  
2016 Microchip Technology Inc.  
DS20005571A-page 17  
MIC45116  
3.0  
PIN DESCRIPTIONS  
The descriptions of the pins are listed in Table 3-1.  
TABLE 3-1:  
Pin Number  
PIN FUNCTION TABLE  
Pin Name  
Description  
1, 2, 52  
4, 44  
PVIN  
PVDD  
BST  
SW  
Power Input Voltage. Connection to the drain of the internal high-side power  
MOSFET. Connect an input capacitor from PVIN to PGND  
.
Supply input for the internal power MOSFET drivers. Connect PVDD pins together. Do  
not leave floating.  
5, 6  
Connection to the internal bootstrap circuitry and high-side power MOSFET drive  
circuitry. Connect the two BST pins together.  
8-10, 48-51  
The SW pin connects directly to the switch node. Due to the high-speed switching on  
this pin, the SW pin should be routed away from sensitive nodes. The SW pin also  
senses the current by monitoring the voltage across the low-side MOSFET during  
OFF time.  
12-21  
VOUT  
NC  
Output Voltage. Connected to the internal inductor, the output capacitor should be  
connected from this pin to PGND as close to the module as possible.  
23-25, 27-30,  
32-34, 40, 41  
Not internally connected.  
26, 31, 35, 42,  
45  
PGND  
Power Ground. PGND is the return path for the step-down power module power stage.  
The PGND pin connects to the source of internal low-side power MOSFET, the  
negative terminals of input capacitors, and the negative terminals of output capacitors.  
Signal Ground and Power Ground of MIC45116 are internally connected.  
36  
FB  
Feedback. Input to the transconductance amplifier of the control loop. The FB pin is  
referenced to 0.8V. A resistor divider connecting the feedback to the output is used to  
set the desired output voltage. Connect the bottom resistor from FB to system ground.  
External ripple injection (series R and C) can be connected between FB and SW.  
37  
38  
PG  
EN  
Power Good. Open-Drain Output. If used, connect to an external pull-up resistor of at  
least 10 kbetween PG and the external bias voltage.  
Enable. A logic signal to enable or disable the step-down regulator module operation.  
The EN pin is TTL/CMOS compatible. Logic-high = enable, logic-low = disable or  
shutdown. EN pin has an internal 1 M(typical) pull-down resistor to GND. Do not  
leave floating.  
39  
43  
47  
VIN  
5VDD  
ILIM  
Input for the internal linear regulator. Allows for split supplies to be used when there is  
an external bus voltage available. Connect to PVIN for single supply operation.  
Bypass with a 0.1 µF capacitor from VIN to PGND  
.
Internal +5V Linear Regulator Output. Powered by VIN, 5VDD is the internal supply  
bus for the device. In the applications with VIN < +5.5V, 5VDD should be tied to VIN to  
bypass the linear regulator.  
Current Limit. Connect a resistor between ILIM and SW to program the current limit.  
3, 7, 11, 22, 46 KEEPOUT Depopulated pin positions.  
V
OUT ePad VOUT Exposed Pad. Internally connected to VOUT pins. Please see the PCB Layout  
Guidelines section.  
SW ePad SW Exposed Pad. Internally connected to SW pins. Please see the PCB Layout  
Guidelines section.  
PGND  
ePAD  
PGND Exposed Pads. Please see the PCB Layout Guidelines section for the  
connection to the system Ground.  
DS20005571A-page 18  
2016 Microchip Technology Inc.  
 
MIC45116  
At the end of the ON-time period, the internal high-side  
driver turns off the high-side MOSFET and the low-side  
driver turns on the low-side MOSFET. The OFF-time  
period length depends upon the feedback voltage in  
most cases. When the feedback voltage decreases  
and the output of the gm amplifier falls below 0.8V, the  
ON-time period is triggered and the OFF-time period  
ends. If the OFF-time period determined by the  
feedback voltage is less than the minimum OFF-time  
tOFF(MIN), which is about 250 ns, the MIC45116 control  
logic will apply the tOFF(MIN) instead. tOFF(MIN) is  
required to maintain enough energy in the internal  
boost capacitor (CBST) to drive the high-side MOSFET.  
4.0  
FUNCTIONAL DESCRIPTION  
The MIC45116 is an adaptive ON-time synchronous  
buck regulator module built for high-input voltage to  
low-output voltage conversion applications. The  
MIC45116 is designed to operate over a wide input  
voltage range, from 4.75V to 20V, and the output is  
adjustable with an external resistor divider. An adaptive  
ON-time control scheme is employed to obtain a  
constant switching frequency in steady state and to  
simplify the control compensation. Hiccup mode  
over-current protection is implemented by sensing  
low-side MOSFET’s RDS(ON). The device features  
internal soft-start, enable, UVLO, and thermal  
shutdown. The module has integrated switching FETs,  
inductor, bootstrap diode, and bypass capacitors.  
The maximum duty cycle is obtained from the 250 ns  
tOFF(MIN)  
:
EQUATION 4-2:  
4.1  
Theory of Operation  
tS tOFFMIN  
250ns  
Figure 4-1, in association with Equation 4-1, shows the  
output voltage is sensed by the MIC45116 feedback pin  
(FB) via the voltage divider RFB1 and RFB2 and  
compared to a 0.8V reference voltage (VREF) at the  
error comparator through a low-gain transconductance  
(gm) amplifier. If the feedback voltage decreases, and  
the amplifier output falls below 0.8V, then the error  
comparator will trigger the control logic and generate  
an ON-time period. The ON-time period length is  
predetermined by the Fixed tON Estimator circuitry:  
DMAX = ---------------------------------- = 1 – --------------  
tS tS  
Where:  
tS  
1/fSW  
It is not recommended to use MIC45116 with an  
OFF-time close to tOFF(MIN) during steady-state  
operation.  
The adaptive ON-time control scheme results in a  
constant switching frequency in the MIC45116 during  
steady state operation. The actual ON-time and  
resulting switching frequency will vary with the different  
rising and falling times of the MOSFETs. Also, the  
minimum tON results in a lower switching frequency in  
high VIN to VOUT applications. During load transients,  
the switching frequency is changed due to the varying  
OFF-time.  
SW  
INTERNAL  
RIPPLE  
INJECTION  
COMPENSATION  
RFB1  
VINJ  
gM EA  
FB  
COMP  
To illustrate the control loop operation, we will analyze  
both the steady-state and load transient scenarios. For  
easy analysis, the gain of the gm amplifier is assumed  
to be 1. With this assumption, the inverting input of the  
error comparator is the same as the feedback voltage.  
RFB2  
VREF  
0.8V  
Figure 4-2 shows the MIC45116 control loop timing  
during steady-state operation. During steady-state, the  
gm amplifier senses the feedback voltage ripple, which  
is proportional to the output voltage ripple plus injected  
voltage ripple, to trigger the ON-time period. The  
ON-time is predetermined by the tON estimator. The  
termination of the OFF-time is controlled by the  
feedback voltage. At the valley of the feedback voltage  
ripple, which occurs when VFB falls below VREF, the  
OFF period ends and the next ON-time period is  
triggered through the control logic circuitry.  
FIGURE 4-1:  
FB Pin.  
Output Voltage Sense via  
EQUATION 4-1:  
VOUT  
tONESTIMATED= -----------------------  
VIN fSW  
Where:  
VOUT  
VIN  
Output Voltage  
Power Stage Input Voltage  
Switching Frequency  
fSW  
2016 Microchip Technology Inc.  
DS20005571A-page 19  
 
 
 
 
MIC45116  
Unlike true current-mode control, the MIC45116 uses  
the output voltage ripple to trigger an ON-time period.  
The output voltage ripple is proportional to the inductor  
current ripple if the ESR of the output capacitor is large  
enough.  
IL  
IOUT  
¨IL(PP)  
VOUT  
In order to meet the stability requirements, the  
MIC45116 feedback voltage ripple should be in phase  
with the inductor current ripple and is large enough to  
be sensed by the gm amplifier and the error  
comparator. The recommended feedback voltage  
ripple is 20 mV~100 mV over full input voltage range. If  
a low ESR output capacitor is selected, then the  
feedback voltage ripple may be too small to be sensed  
by the gm amplifier and the error comparator. Also, the  
output voltage ripple and the feedback voltage ripple  
are not necessarily in phase with the inductor current  
ripple if the ESR of the output capacitor is very low. In  
these cases, ripple injection is required to ensure  
proper operation. Please refer to the Ripple Injection  
subsection in the Application Information section for  
more details about the ripple injection technique.  
¨VOUT(PP) = ESR îꢀ¨IL(PP)  
COUT  
VFB  
RFB2  
VREF  
¨VFB(PP) = ¨VOUT(PP)  
×
RFB4 + RFB2  
DH  
TRIGGER ON-TIME IF VFB IS BELOW VREF  
ESTIMATED ON TIME  
FIGURE 4-2:  
Timing.  
MIC45116 Control Loop  
Figure 4-3 shows the operation of the MIC45116 during  
a load transient. The output voltage drops due to the  
sudden load increase, which causes the VFB to be less  
than VREF. This will cause the error comparator to  
trigger an ON-time period. At the end of the ON-time  
period, a minimum OFF-time tOFF(MIN) is generated to  
charge the bootstrap capacitor (CBST) since the  
feedback voltage is still below VREF. Then, the next  
ON-time period is triggered due to the low feedback  
voltage. Therefore, the switching frequency changes  
during the load transient, but returns to the nominal  
fixed frequency once the output has stabilized at the  
new load current level. With the varying duty cycle and  
switching frequency, the output recovery time is fast  
and the output voltage deviation is small. Note that the  
instantaneous switching frequency during load  
transient remains bounded and cannot increase  
4.2  
Discontinuous Mode (MIC45116-1  
Only)  
In continuous mode, the inductor current is always  
greater than zero; however, at light loads, the  
MIC45116-1 is able to force the inductor current to  
operate in discontinuous mode. Discontinuous mode is  
where the inductor current falls to zero, as indicated by  
trace (IL) shown in Figure 4-4. During this period, the  
efficiency is optimized by shutting down all the  
non-essential circuits and minimizing the supply  
current as the switching frequency is reduced. The  
MIC45116-1 wakes up and turns on the high-side  
MOSFET when the feedback voltage VFB drops below  
0.8V.  
arbitrarily. The minimum period is limited by tON  
+
tOFF(MIN). Because the variation in VOUT is relatively  
limited during load transient, tON stays virtually close to  
its steady-state value.  
The MIC45116-1 has a zero crossing comparator (ZC)  
that monitors the inductor current by sensing the  
voltage drop across the low-side MOSFET during its  
ON-time. If the VFB > 0.8V and the inductor current  
goes slightly negative, then the MIC45116-1  
automatically powers down most of the IC circuitry and  
goes into a low-power mode.  
Once the MIC45116-1 goes into discontinuous mode,  
both low driver (DL) and high driver (DH) are low, which  
turns off the high-side and low-side MOSFETs. The  
load current is supplied by the output capacitors and  
VOUT drops. If the drop of VOUT causes VFB to go below  
VREF, then all the circuits will wake up into normal  
continuous mode. First, the bias currents of most  
circuits reduced during the discontinuous mode are  
restored, and then a tON pulse is triggered before the  
drivers are turned on to avoid any possible glitches.  
Finally, the high-side driver is turned on. Figure 4-4  
shows the control loop timing in discontinuous mode.  
FIGURE 4-3:  
Response.  
MIC45116 Load Transient  
DS20005571A-page 20  
2016 Microchip Technology Inc.  
 
MIC45116  
compared with the power ground (PGND) after a  
blanking time of 150 ns. In this way the drop voltage  
over the resistor R26 (VCL) is compared with the drop  
over the bottom FET generating the short current limit.  
The small capacitor (C16) connected from the ILIM pin  
to PGND filters the switching node ringing during the  
off-time allowing a better short-limit measurement. The  
time constant created by R26 and C16 should be much  
less than the minimum off time.  
IL CROSSES 0 AND VFB > 0.8  
DISCONTINUOUS MODE STARTS  
V
< 0.8. WAKE UP FROM  
DFISB CONTINUOUS MODE  
IL  
0
VFB  
VREF  
MIC45116  
ZC  
DH  
VIN  
PVIN  
SW  
C5  
R26  
C16  
ILIM  
ESTIMATED ON-TIME  
DL  
PGND  
FIGURE 4-5:  
MIC45116 Current-Limiting  
Circuit.  
FIGURE 4-4:  
MIC45116-1 Control Loop  
(Discontinuous Mode).  
The VCL drop allows short-limit programming based on  
the value of the resistor (R26). If the absolute value of  
the voltage drop on the bottom FET becomes greater  
than VCL, and the VILIM falls below PGND, an  
overcurrent is triggered causing the IC to enter hiccup  
mode. The hiccup sequence including the soft-start  
reduces the stress on the switching FETs and protects  
the load and supply for severe short conditions.  
During discontinuous mode, the bias current of most  
circuits is substantially reduced. As a result, the total  
power supply current during discontinuous mode is  
only about 350 µA, allowing the MIC45116-1 to achieve  
high efficiency in light load applications.  
4.3  
Soft-Start  
The short-circuit current limit can be programmed by  
using Equation 4-3.  
Soft-start reduces the input power supply surge current  
at startup by controlling the output voltage rise time.  
The input surge appears while the output capacitor is  
charged up.  
EQUATION 4-3:  
The MIC45116 implements an internal digital soft-start  
by making the 0.8V reference voltage VREF ramp from  
0 to 100% in about 3 ms with 9.7 mV steps. Therefore,  
the output voltage is controlled to increase slowly by a  
stair-case VFB ramp. Once the soft-start cycle ends, the  
related circuitry is disabled to reduce current  
consumption. PVDD must be powered up at the same  
time or after VIN to make the soft-start function  
correctly.  
ICLIM + ILPP0.5 – 0.1  RDSON+ VCL  
R26 = ------------------------------------------------------------------------------------------------------------------  
ICL  
Where:  
ICLIM  
Desired current limit.  
RDS(ON)  
On-resistance of low-side power  
MOSFET, 16 mtypically.  
VCL  
ICL  
Current-limit threshold (typical  
absolute value is 14 mV).  
4.4  
Current Limit  
Current-limit source current (typical  
value is 80 µA).  
The MIC45116 uses the RDS(ON) of the low-side  
MOSFET and external resistor connected from the ILIM  
pin to SW node to set the current limit.  
IL(PP)  
Inductor current peak-to-peak,  
since the inductor is integrated, use  
Equation 4-4 to calculate the  
inductor ripple current.  
In each switching cycle of the MIC45116, the inductor  
current is sensed by monitoring the low-side MOSFET  
in the OFF period. The sensed voltage VLIM is  
2016 Microchip Technology Inc.  
DS20005571A-page 21  
 
MIC45116  
The peak-to-peak inductor current ripple is:  
EQUATION 4-4:  
VOUT  VINMAXVOUT  
ILPP= -------------------------------------------------------------------  
V
INMAXfSW L  
The MIC45116 has a 1.0 µH inductor integrated into  
the module. In case of a hard short, the short limit is  
folded down to allow an indefinite hard short on the  
output without any destructive effect. It is mandatory to  
make sure that the inductor current used to charge the  
output capacitance during soft-start is under the folded  
short limit; otherwise the supply will go in hiccup mode  
and may not finish the soft-start successfully.  
With R26 = 1.62 kand C16 = 15 pF, the typical output  
current limit is 8A.  
DS20005571A-page 22  
2016 Microchip Technology Inc.  
MIC45116  
The output capacitor RMS current is calculated in  
Equation 5-3:  
5.0  
5.1  
APPLICATION INFORMATION  
Output Capacitor Selection  
EQUATION 5-3:  
The type of the output capacitor is usually determined  
by the application and its equivalent series resistance  
(ESR). Voltage and RMS current capability are two  
other important factors for selecting the output  
capacitor. Recommended capacitor types are MLCC,  
OS-CON and POSCAP. The output capacitor’s ESR is  
usually the main cause of the output ripple. The  
MIC45116 requires ripple injection and the output  
capacitor ESR affects the control loop from a stability  
point of view.  
ILPP  
ICOUTRMS= ------------------  
12  
The power dissipated in the output capacitor is:  
EQUATION 5-4:  
PDISSCOUT= ICOUTRMS2 ESRCOUT  
Equation 5-1 shows how the maximum value of ESR is  
calculated.  
EQUATION 5-1:  
5.2  
Input Capacitor Selection  
VOUTPP  
ILPP  
---------------------------  
ESRCOUT  
The input capacitor for the power stage input PVIN  
should be selected for ripple current rating and voltage  
rating.  
Where:  
VOUT(PP) Peak-to-peak output voltage ripple  
The input capacitor must be rated for the input current  
ripple. The RMS value of input capacitor current is  
determined at the maximum output current. Assuming  
the peak-to-peak inductor current ripple is low:  
IL(PP)  
Peak-to-peak inductor current  
ripple  
The total output ripple is a combination of the ESR and  
output capacitance. The total ripple is calculated in  
Equation 5-2:  
EQUATION 5-5:  
I
CINRMSIOUTMAXD  1 – D  
EQUATION 5-2:  
VOUTPP  
=
The power dissipated in the input capacitor is:  
2  
ILPP  
+ ILPPESRCOUT2  
-------------------------------------  
COUT fSW 8  
EQUATION 5-6:  
PDISSCIN= ICINRMS2 ESRCIN  
Where:  
D
Duty cycle  
COUT  
fSW  
Output capacitance value  
Switching frequency  
The general rule is to pick the capacitor with a ripple  
current rating equal to or greater than the calculated  
worst-case RMS capacitor current.  
As described in the Theory of Operation subsection in  
the Functional Description, the MIC45116 requires at  
least 20 mV peak-to-peak ripple at the FB pin to make  
the gm amplifier and the error comparator behave  
properly. Also, the output voltage ripple should be in  
phase with the inductor current. Therefore, the output  
voltage ripple caused by the output capacitors value  
should be much smaller than the ripple caused by the  
output capacitor ESR. If low-ESR capacitors, such as  
ceramic capacitors, are selected as the output  
capacitors, a ripple injection method should be applied  
to provide enough feedback voltage ripple. Please refer  
to Ripple Injection subsection for more details.  
Equation 5-7 should be used to calculate the input  
capacitor. Also it is recommended to keep some margin  
on the calculated value:  
EQUATION 5-7:  
I
OUTMAX 1 – D  
--------------------------------------------------  
CIN  
fSW dV  
Where:  
dV  
fSW  
Input ripple  
Switching frequency  
2016 Microchip Technology Inc.  
DS20005571A-page 23  
 
 
 
 
MIC45116  
5.3  
Output Voltage Setting  
Components  
TABLE 5-1:  
RFB2  
V
PROGRAMMING  
OUT  
RESISTOR LOOK-UP  
The MIC45116 requires two resistors to set the output  
voltage as shown in Figure 5-1.  
VOUT  
OPEN  
40.2 kꢀ  
20 kꢀ  
0.8V  
1.0V  
1.2V  
1.5V  
1.8V  
2.5V  
3.3V  
5.0V  
11.5 kꢀ  
8.06 kꢀ  
4.75 kꢀ  
3.24 kꢀ  
1.91 kꢀ  
RFB1  
gM AMP  
FB  
RFB2  
5.4  
Ripple Injection  
The VFB ripple required for proper operation of the  
MIC45116 gm amplifier and error comparator is 20 mV  
to 100 mV. However, the output voltage ripple is  
generally too small to provide enough ripple amplitude  
at the FB pin and this issue is more visible in lower  
output voltage applications. If the feedback voltage  
ripple is so small that the gm amplifier and error  
comparator cannot sense it, then the MIC45116 will  
lose control and the output voltage is not regulated. In  
order to have some amount of VFB ripple, a ripple  
injection method is applied for low output voltage ripple  
applications.  
VREF  
FIGURE 5-1:  
Configuration.  
Voltage Divider  
The output voltage is determined by Equation 5-8:  
EQUATION 5-8:  
The applications are divided into three situations  
according to the amount of the feedback voltage ripple:  
RFB1  
VOUT = VFB 1 + ------------  
RFB2  
• Enough ripple at the feedback voltage due to the  
large ESR of the output capacitors (Figure 5-2).  
The converter is stable without any ripple  
injection.  
Where:  
VFB  
0.8V  
A typical value of RFB1 used on the standard evaluation  
board is 10 k. If RFB1 is too large, it may allow noise  
to be introduced into the voltage feedback loop. If RFB1  
is too small in value, it will decrease the efficiency of the  
power supply, especially at light loads. Once RFB1 is  
selected, RFB2 can be calculated using Equation 5-9:  
VOUT  
RFB1  
MIC45116  
COUT  
FB  
ESR  
RFB2  
EQUATION 5-9:  
PGND  
VFB RFB1  
RFB2 = -----------------------------  
V
OUT VFB  
FIGURE 5-2:  
Enough Ripple at FB.  
The feedback voltage ripple is:  
For fixed RFB1 = 10 k, output voltage can be selected  
by RFB2. Table 5-1 provides RFB2 values for some  
common output voltages.  
EQUATION 5-10:  
RFB2  
-------------------------------  
VFBPP  
Where:  
=
ESR  
 ILPP  
COUT  
RFB1 + RFB2  
IL(PP) Peak-to-Peak Value of the Inductor  
Current Ripple  
DS20005571A-page 24  
2016 Microchip Technology Inc.  
 
 
 
 
 
MIC45116  
• Inadequate ripple at the feedback voltage due to  
the small ESR of the output capacitors.  
The injected ripple is calculated via:  
EQUATION 5-12:  
VFBPP= VIN Kdiv D  1 – D   
Where:  
The output voltage ripple is fed into the FB pin  
through a feed-forward capacitor, CFF in this  
situation, as shown in Figure 5-3. The typical CFF  
value is between 1 nF and 100 nF.  
1
----------------  
fSW    
EQUATION 5-11:  
VIN  
D
Power stage input voltage  
Duty cycle  
VFBPP= ESRCOUT  ILPP  
fSW  
τ
Switching frequency  
(RFB1//RFB2//RINJ) x CFF  
With the feed-forward capacitor, the feedback  
voltage ripple is very close to the output voltage  
ripple.  
EQUATION 5-13:  
RFB1//RFB2  
Kdiv = ----------------------------------------------  
RINJ + RFB1//RFB2  
VOUT  
CFF  
COUT  
RFB1  
MIC45116  
Where:  
RINJ  
20 kꢀ  
FB  
ESR  
RFB2  
In Equation 5-13 and Equation 5-14, it is assumed that  
the time constant associated with CFF must be much  
greater than the switching period:  
PGND  
FIGURE 5-3:  
Inadequate Ripple at FB.  
EQUATION 5-14:  
• Virtually no ripple at the FB pin voltage due to the  
very low ESR of the output capacitors, such is the  
case with ceramic output capacitors.  
1
T
---------------- = -- « 1  
fSW    
In this situation, the VFB ripple waveform needs to be  
generated by injecting suitable signal. A series RC  
network between the SW pin and FB pin, RINJ and  
CINJ as shown in Figure 5-4 injects a square-wave  
current waveform into the FB pin, which, by means of  
integration across the capacitor (CFF), generates an  
appropriate sawtooth FB ripple waveform.  
If the voltage divider resistors RFB1 and RFB2 are in the  
krange, a CFF of 1 nF to 100 nF can easily satisfy the  
large time constant requirements.  
5.5  
Thermal Measurements and Safe  
Operating Area (SOA)  
Measuring the IC’s case temperature is recommended  
to ensure it is within its operating limits. Although this  
might seem like a very elementary task, it is easy to get  
erroneous results. The most common mistake is to use  
the standard thermal couple that comes with a thermal  
meter. This thermal couple wire gauge is large, typically  
22 gauge, and behaves like a heatsink, resulting in a  
lower case measurement.  
VOUT  
CFF  
COUT  
RFB1  
MIC45116  
FB  
ESR  
SW  
RFB2  
CINJ RINJ  
PGND  
Two methods of temperature measurement are using a  
smaller thermal couple wire or an infrared  
thermometer. If a thermal couple wire is used, it must  
be constructed of 36-gauge wire or higher (smaller wire  
size) to minimize the wire heat-sinking effect. In  
addition, the thermal couple tip must be covered in  
either thermal grease or thermal glue to make sure that  
the thermal couple junction is making good contact with  
the case of the IC. Omega brand thermal couple  
(5SC-TT-K-36-36) is adequate for most applications.  
FIGURE 5-4:  
Circuit at FB.  
External Ripple Injection  
2016 Microchip Technology Inc.  
DS20005571A-page 25  
 
 
 
 
MIC45116  
Wherever possible, an infrared thermometer is  
recommended. The measurement spot size of most  
infrared thermometers is too large for an accurate  
reading on a small form factor ICs. However, an IR  
thermometer from Optris has a 1 mm spot size, which  
makes it a good choice for measuring the hottest point  
on the case. An optional stand makes it easy to hold the  
beam on the IC for long periods of time.  
The safe operating area (SOA) of the MIC45116 is  
shown in Figure 10 and Figure 11. These thermal  
measurements were taken on MIC45116 evaluation  
board with no air flow. Since the MIC45116 is an entire  
system comprised of switching regulator controller,  
MOSFETs, and inductor, the part needs to be  
considered as a system. The SOA curves will give  
guidance to reasonable use of the MIC45116.  
SOA curves should only be used as a point of  
reference. SOA data was acquired using the MIC45116  
evaluation board. Thermal performance depends on  
the PCB layout, board size, copper thickness, number  
of thermal vias, and actual airflow.  
7
6
5
4
1.0V OUTPUT  
3
2
3.3V OUTPUT  
5.0V OUTPUT  
1
75 80 85 90  
95 100 105 110 115 120 125  
AMBIENT TEMPERATURE (°C)  
FIGURE 5-5:  
MIC45116 Power Derating  
vs. Output Voltage with 12V Input with No  
Airflow.  
7
6
5
4
5V OUTPUT  
3
12V OUTPUT  
2
1
75 80 85 90  
95 100 105 110 115 120 125  
AMBIENT TEMPERATURE (°C)  
FIGURE 5-6:  
MIC45116 Power Derating  
vs. Input Voltage with 1.0V Output with No  
Airflow.  
DS20005571A-page 26  
2016 Microchip Technology Inc.  
MIC45116  
6.5  
Output Capacitor  
6.0  
PCB LAYOUT GUIDELINES  
• Use a wide trace to connect the output capacitor  
ground terminal to the input capacitor ground  
terminal.  
PCB layout is critical to achieve reliable, stable and  
efficient performance. A ground plane is required to  
control EMI and minimize the inductance in power,  
signal and return paths. The following guidelines  
should be followed to ensure proper operation of the  
MIC45116 module.  
• Phase margin will change as the output capacitor  
value and ESR changes.  
• The feedback trace should be separate from the  
power trace and connected as close as possible  
to the output capacitor. Sensing a long  
high-current load trace can degrade the DC load  
regulation.  
6.1  
Module  
• Place the module close to the point-of-load.  
• Use wide polygons to route the input and output  
power lines.  
Figure 6-1 is optimized from a small form factor point of  
view shows top and bottom layer of a four layer PCB. It  
is recommended to use mid layer 1 as a continuous  
ground plane.  
• Follow the instructions in Package Information  
and Recommended Landing Pattern to connect  
the Ground exposed pads to system ground  
planes.  
6.2  
Input Capacitor  
• Place the input capacitors on the same side of the  
board and as close to the module as possible.  
• Place several vias to the ground plane close to  
the input capacitor ground terminal.  
• Use either X7R or X5R dielectric input capacitors.  
Do not use Y5V or Z5U type capacitors.  
• Do not replace the ceramic input capacitor with  
any other type of capacitor. Any type of capacitor  
can be placed in parallel with the ceramic input  
capacitor.  
• If a non-ceramic input capacitor is placed in  
parallel with the input capacitor, it must be  
recommended for switching regulator applications  
and the operating voltage.  
• In “Hot-Plug” applications, an electrolytic bypass  
capacitor must be used to limit the over-voltage  
spike seen on the input supply with power is  
suddenly applied. If hot-plugging is the normal  
operation of the system, using an appropriate  
hot-swap IC is recommended.  
6.3  
RC Snubber (Optional)  
FIGURE 6-1:  
Top and Bottom of a  
• Depending on the operating conditions, a RC  
snubber can be used. Place the RC and as close  
to the SW pin as possible if needed. Placement of  
the snubber on the same side as module is  
preferred.  
Four-Layer Board.  
6.4  
SW Node  
• Do not route any digital lines underneath or close  
to the SW node.  
• Keep the switch node (SW) away from the  
feedback (FB) pin.  
2016 Microchip Technology Inc.  
DS20005571A-page 27  
 
MIC45116  
After completion of the periphery pad design, the larger  
exposed pads will be designed to create the mounting  
surface of the QFN exposed heatsink. The primary  
transfer of heat out of the QFN will be directly through  
the bottom surface of the exposed heatsink. To aid in  
the transfer of generated heat into the PCB, the use of  
an array of plated through-hole vias beneath the  
mounted part is recommended. The typical via hole  
diameter is 0.30 mm to 0.35 mm, with center-to-center  
pitch of 0.80 mm to 1.20 mm.  
7.0  
SIMPLIFIED PCB DESIGN  
RECOMMENDATIONS  
7.1  
Periphery I/O Pad Layout and  
Large Pad for Exposed Heatsink  
The board design should begin with copper/metal pads  
that sit beneath the periphery leads of a mounted QFN.  
The board pads should extend outside the QFN  
package edge a distance of approximately 0.20 mm  
per side:  
EQUATION 7-1:  
TotalPadLength = 8mm + 0.20mm 2sides= 8.4mm  
FIGURE 7-1:  
Package Bottom View vs. PCB Recommended Exposed Metal Trace.  
Please note the exposed metal trace is a “mirror image” of the package bottom view.  
DS20005571A-page 28  
2016 Microchip Technology Inc.  
MIC45116  
7.2  
Solder Paste Stencil Design  
(Recommended Stencil Thickness  
= 112.5 ±12.5 µm)  
The solder stencil aperture openings should be smaller  
than the periphery or large PCB exposed pads to  
reduce any chance of build-up of excess solder at the  
large exposed pad area which can result to solder  
bridging.  
The suggested reduction of the stencil aperture  
opening is typically 0.20 mm smaller than exposed  
metal trace.  
Please note that a critical requirement is to not  
duplicate land pattern of the exposed metal trace as  
solder stencil opening because the design and  
dimension values are different.  
Cyan-colored shaded pad areas indicate exposed  
trace keep-out area in Figure 7-2 and Figure 7-3.  
FIGURE 7-3:  
Stack-Up of Pad Layout and  
Solder Paste Stencil.  
FIGURE 7-2:  
Solder Stencil Opening.  
2016 Microchip Technology Inc.  
DS20005571A-page 29  
MIC45116  
8.0  
8.1  
PACKAGING INFORMATION  
Package Marking Information  
52-Pin QFN*  
Example  
XXX  
XXXXX-X  
WNNN  
MIC  
45116-1  
6420  
Legend: XX...X Product code or customer-specific information  
Y
Year code (last digit of calendar year)  
YY  
WW  
NNN  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
Pb-free JEDEC® designator for Matte Tin (Sn)  
This package is Pb-free. The Pb-free JEDEC designator (  
can be found on the outer packaging for this package.  
e
3
*
)
e
3
, , Pin one index is identified by a dot, delta up, or delta down (triangle  
mark).  
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line, thus limiting the number of available  
characters for customer-specific information. Package may or may not include  
the corporate logo.  
Underbar (_) symbol may not be to scale.  
DS20005571A-page 30  
2016 Microchip Technology Inc.  
MIC45116  
52-Lead H3QFN 8 mm x 8 mm Package Outline and Recommended Land Pattern  
Note:  
For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging  
2016 Microchip Technology Inc.  
DS20005571A-page 31  
MIC45116  
Note:  
For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging  
DS20005571A-page 32  
2016 Microchip Technology Inc.  
MIC45116  
Note:  
For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging  
2016 Microchip Technology Inc.  
DS20005571A-page 33  
MIC45116  
Thermally Enhanced Land Pattern  
DS20005571A-page 34  
2016 Microchip Technology Inc.  
MIC45116  
2016 Microchip Technology Inc.  
DS20005571A-page 35  
MIC45116  
NOTES:  
DS20005571A-page 36  
2016 Microchip Technology Inc.  
MIC45116  
APPENDIX A: REVISION HISTORY  
Revision A (August 2016)  
• Converted Micrel document MIC45116 to Micro-  
chip data sheet DS20005571A.  
• Minor text changes throughout.  
2016 Microchip Technology Inc.  
DS20005571A-page 37  
MIC45116  
NOTES:  
DS20005571A-page 38  
2016 Microchip Technology Inc.  
MIC45116  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.  
Examples:  
PART NO.  
Device  
X
X
XX  
XX  
a)  
MIC45116-1YMP-TR: 20V/6A DC/DC Power  
Module, HyperLight Load,  
–40°C to +125°C Temp.  
Features  
Temperature Package Media Type  
Range, 52-Pin QFN,  
1,500/Reel  
Device:  
MIC45116:  
20V/6A DC/DC Power Module  
b)  
MIC45116-2YMP-TR: 20V/6A DC/DC Power  
Module, Hyper Speed  
Features:  
1
2
=
=
HyperLight Load  
Hyper Speed Control  
Control, –40°C to +125°C  
Temp. Range, 52-Pin QFN  
1,500/Reel  
Temperature:  
Package:  
Y
=
–40°C to +125°C  
MP  
TR  
=
=
52-Pin 8 mm x 8 mm x 3 mm QFN  
1,500/Reel  
Media Type:  
2016 Microchip Technology Inc.  
DS20005571A-page 39  
MIC45116  
NOTES:  
DS20005571A-page 40  
2016 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is provided only for your convenience  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
MICROCHIP MAKES NO REPRESENTATIONS OR  
WARRANTIES OF ANY KIND WHETHER EXPRESS OR  
IMPLIED, WRITTEN OR ORAL, STATUTORY OR  
OTHERWISE, RELATED TO THE INFORMATION,  
INCLUDING BUT NOT LIMITED TO ITS CONDITION,  
QUALITY, PERFORMANCE, MERCHANTABILITY OR  
FITNESS FOR PURPOSE. Microchip disclaims all liability  
arising from this information and its use. Use of Microchip  
devices in life support and/or safety applications is entirely at  
the buyer’s risk, and the buyer agrees to defend, indemnify and  
hold harmless Microchip from any and all damages, claims,  
suits, or expenses resulting from such use. No licenses are  
conveyed, implicitly or otherwise, under any Microchip  
intellectual property rights unless otherwise stated.  
Trademarks  
The Microchip name and logo, the Microchip logo, AnyRate,  
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,  
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,  
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo,  
RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O  
are registered trademarks of Microchip Technology  
Incorporated in the U.S.A. and other countries.  
ClockWorks, The Embedded Control Solutions Company,  
ETHERSYNCH, Hyper Speed Control, HyperLight Load,  
IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are  
registered trademarks of Microchip Technology Incorporated  
in the U.S.A.  
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,  
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,  
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,  
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip  
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,  
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,  
MPLINK, MultiTRAK, NetDetach, Omniscient Code  
Generation, PICDEM, PICDEM.net, PICkit, PICtail,  
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,  
Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total  
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,  
WiperLock, Wireless DNA, and ZENA are trademarks of  
Microchip Technology Incorporated in the U.S.A. and other  
countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
Microchip received ISO/TS-16949:2009 certification for its worldwide  
headquarters, design and wafer fabrication facilities in Chandler and  
Tempe, Arizona; Gresham, Oregon and design centers in California  
and India. The Company’s quality system processes and procedures  
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
Silicon Storage Technology is a registered trademark of  
Microchip Technology Inc. in other countries.  
GestIC is a registered trademarks of Microchip Technology  
Germany II GmbH & Co. KG, a subsidiary of Microchip  
Technology Inc., in other countries.  
All other trademarks mentioned herein are property of their  
respective companies.  
QUALITYMANAGEMENTꢀꢀSYSTEMꢀ  
CERTIFIEDBYDNVꢀ  
© 2016, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
ISBN: 978-1-5224-0842-0  
== ISO/TS16949==ꢀ  
2016 Microchip Technology Inc.  
DS20005571A-page 41  
Worldwide Sales and Service  
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support  
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06/23/16  
DS20005571A-page 42  
2016 Microchip Technology Inc.  

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