PIC16C65AT-20/TQ [MICROCHIP]
8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PQFP44, 10 X 10 MM, PLASTIC, MS-026, TQFP-44;型号: | PIC16C65AT-20/TQ |
厂家: | MICROCHIP |
描述: | 8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PQFP44, 10 X 10 MM, PLASTIC, MS-026, TQFP-44 可编程只读存储器 时钟 微控制器 外围集成电路 |
文件: | 总4页 (文件大小:51K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PIC16C65A → PIC16C65B Migration
DEVICE MIGRATIONS
This document is intended to describe the functional differences and the electrical specification differences that are
present when migrating from one device to the next.
Note: Even though compatible devices are specified to be tested to the same electrical specification, the charac-
teristics of the devices may be different from each other (due to process difference). For systems that were
designed to the device specifications, these process differences should not cause any issues in the appli-
cation. For systems that did not tightly meet the electrical specifications, the process differences may cause
the device to behave differently in the application.
Note: While there are no functional or electrical changes to the device oscillator specifications, the user should
verify that the device oscillator starts and performs as expected. Adjusting the loading capacitor values and/
or the oscillator mode may be required.
Table 1 shows the considerations that must be taken into account when migrating from the PIC16C65A to the
PIC16C65B.
TABLE 1:
Functional Differences due to Errata or Module Update
No. Module Difference
PIC16C65A → PIC16C65B DIFFERENCES
H/W S/W Prog.
1
2
3
CCP
CCP Special Event Trigger clears Timer1.
Compare mode drives pin correctly.
—
—
—
✔
✔
✔
—
—
—
Timers
Reading or writing TMR1H or TMR1L may affect TMR1H or TMR1L
unexpectedly.
4
5
6
7
WDT/TMR0 prescaler assignment changes do not affect TMR0 count.
TMR2 SPI™ clock synchronized to start of SPI Transmission.
Can now transmit multiple words in SPI mode.
—
—
—
—
✔
✔
✔
✔
—
—
—
—
SSP
Supports all four SPI modes. (Now uses SSP vs BSSP module.)
See SSP module in the PICmicro™ Mid-Range MCU Family Reference Man-
ual (DS33023A).
I2C™ no longer generates ACK pulses when module is enabled.
Async receive errors due to BRGH setting corrected.
8
9
—
✔
—
USART
—
—
✔
✔
✔
✔
—
—
—
—
10 Oscillator TOST delay may be skipped when waking from SLEEP.
11 RESET
12
Short MCLR pulses may cause improper operation on the PIC16C65B.
Operating voltage and frequency ranges have been redefined.
—
—
H/W - Issues may exist with regard to the application circuits.
S/W - Issues may exist with regard to the user program.
Prog. - Issues may exist when writing the program to the controller.
2000 Microchip Technology Inc.
DS30322A-page 1
TABLE 2:
ELECTRICAL SPECIFICATION DIFFERENCES
PIC16C65A
PIC16C65B
Typ†
Param
No.
Symbol
Characteristic
Unit
Min
Typ†
Max
Min
Max
Core
VDD
Supply Voltage
D001
D001A
XT, LP and RC mode
HS mode
BOR enabled (Note 1)
4.0
4.5
—
—
—
—
6.0
5.5
—
4.0
4.0
VBOR
—
—
—
5.5
5.5
5.5
V
V
V
D005
D150
VBOR
VOD
Brown-out Reset Voltage
3.7
4.0
4.3
3.65
—
—
4.35
8.5
V
V
Open-Drain High Voltage on
RA4
—
—
14.0
—
SSP in SPI mode
71
TscH
SCK input high
time (slave mode)
Continuous TCY+20
Single Byte
—
—
—
—
1.25TCY + 30
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
71A
72
40
1.25TCY + 30
40
TscL
SCK input low
time (slave mode)
Continuous TCY+20
Single Byte
72A
73
TdiV2scH Setup time of SDI data input to
TdiV2scL SCK edge
50
—
50
—
—
—
—
10
—
—
—
25
100
73A
(Note 2)
TB2B
Last clock edge of Byte1 to the
1st clock edge of Byte2
1.5TCY + 40
100
—
—
—
—
ns
ns
74
75
TscH2diL Hold time of SDI data input to
TscL2diL SCK edge
TdoR
SDO data output PIC16CXX
rise time
—
—
—
—
10
20
10
20
25
45
25
45
ns
ns
ns
ns
PIC16LCXX
SCK output rise PIC16CXX
78
80
83
TscR
—
—
—
10
—
—
25
50
—
time (master
mode)
PIC16LCXX
TscH2doV SDO data output PIC16CXX
TscL2doV valid after SCK
edge
—
—
—
—
50
ns
ns
PIC16LCXX
100
TscH2ssH SS ↑ after SCK edge
TscL2ssH
1.5TCY + 40
—
—
ns
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Note 1: When BOR is enabled, the device will operate until VDD drops below VBOR.
2: Specification 73A is only required if specifications 71A and 72A are used.
DS30322A-page 2
2000 Microchip Technology Inc.
NOTES:
2000 Microchip Technology Inc.
DS30322A-page 3
WORLDWIDE SALES AND SERVICE
AMERICAS
AMERICAS (continued)
ASIA/PACIFIC (continued)
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8/01/00
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San Jose
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.
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All rights reserved. © 2000 Microchip Technology Incorporated. Printed in the USA. 8/00
Printed on recycled paper.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates.
It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by
Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights
arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written
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rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other
trademarks mentioned herein are the property of their respective companies.
DS30322A-page 4
2000 Microchip Technology Inc.
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