RE46C180E16FA [MICROCHIP]
CMOS Programmable Ionization Smoke Detector ASIC with Interconnect, Timer Mode and Alarm Memory;
| 型号： | RE46C180E16FA |
| 厂家： | 
MICROCHIP |
| 描述： | CMOS Programmable Ionization Smoke Detector ASIC with Interconnect, Timer Mode and Alarm Memory |
| 文件： | 总58页 (文件大小：1882K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RE46C180
CMOS Programmable Ionization Smoke Detector ASIC with
Interconnect, Timer Mode and Alarm Memory
Features
Description
• 6V to 12V Operation
The RE46C180 is a next generation low-power, CMOS
ionization-type, smoke detector IC. With minimal exter-
nal components, this circuit will provide all the required
features for an ionization-type smoke detector.
• Low-Quiescent Current Consumption
• Programmable Standby Sensitivity
• Programmable HUSH Sensitivity
• Programmable Hysteresis
An on-chip oscillator strobes power to the smoke
detection circuitry for 5 ms every 10 seconds to keep
the standby current to a minimum.
• Programmable Chamber Voltage for Push-to-Test
(PTT) and Chamber Test
A check for a Low Battery condition is performed every
80s and an ionization chamber test is performed once
every 320s when in Standby. The temporal horn pattern
complies with the National Fire Protection Association
NFPA 72® National Fire Alarm and Signaling Code® for
emergency evacuation signals.
• Programmable ±150 mV Low Battery Set Point
• Internal Ionization Chamber Test
• Internal Low Battery Test
• Internal Power-on Reset and Power-up Low
Battery Test
• Alarm Memory
An interconnect pin allows multiple detectors to be con-
nected, such that when one unit alarms, all units will
sound. A charge dump feature quickly discharges the
interconnect line when exiting a Local Alarm condition.
The interconnect input is also digitally filtered.
• Auto Alarm Locate
• Horn Synchronization
• IO Filter and Charge Dump
• Smart Interconnect
An internal 9 minute or 80s timer can be used for a
Reduced Sensitivity mode.
• Interconnect up to 40 Detectors
• ±5% All Internal Oscillator
An alarm memory feature allows the user to determine
whether the unit has previously entered a Local Alarm
condition.
• 9 Minute or 80 Second Timer for Sensitivity
Control
• Temporal or Continuous Horn Pattern
• Guard Outputs for Ion Detector Input
• ±0.75 pA Detect Input Current
Utilizing low-power CMOS technology, the RE46C180
is designed for use in smoke detectors that comply with
the Standard for Single and Multiple Station Smoke
Alarms, UL217 and the Standard for Smoke Detectors
for Fire Alarm Systems, UL268.
• 10-year End-of-Life Indication
Package Types
RE46C180
PDIP, SOIC
TEST
IO
1
16 GUARD2
DETECT
GUARD1
T3
2
3
15
14
GLED
CHAMBER
4
5
6
13
12
11
RLED
VDD
T2
HS
7
8
10
9
TESTOUT
HB
FEED
VSS
2011-2021 Microchip Technology Inc.
DS20002275C-page 1
RE46C180
Functional Block Diagram
DS20002275C-page 2
2011-2021 Microchip Technology Inc.
RE46C180
Typical Application
TEST and HUSH
To Other
Units
R5
100
C3
10 µF
RE46C180
TEST
IO
16
1
2
3
GUARD2
DETECT 15
14
Gled
Rled
GLED
GUARD1
R2
390
R1
390
T3 13
4 CHAMBER
12
T2
5
6
7
RLED
11
+
-
VDD
HS
9V
Battery
1 µF
C2
TESTOUT
HB
10
9
FEED
VSS
8
R4
220K
R3
1.5M
C1
.001 µF
Note 1: R3, R4 and C1 are typical values, and may be adjusted to maximize sound pressure.
2: C2 should be located as close as possible to the device power pins.
3: Route the pin 8 PC board trace away from pin 4 to avoid coupling.
4: No internal reverse battery protection. External reverse battery protection circuitry required.
2011-2021 Microchip Technology Inc.
DS20002275C-page 3
RE46C180
† Notice: Stresses above those listed under “Maximum
ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above those
indicated in the operation listings of this specification is
not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
1.1
Absolute Maximum Ratings†
VDD.................................................................................12.5V
Input Voltage Range Except FEED, IO.......... V = -.3V to V +.3V
IN DD
FEED Input Voltage Range..................... VINFD =-10 to +22V
IO Input Voltage Range................................. VIO1= -.3 to 15V
Input Current except FEED...................................IIN = 10 mA
Operating Temperature ............................... TA = -10 to +60°C
Storage Temperature ........................... TSTG = -55 to +125°C
Maximum Junction Temperature............................TJ = +150°
DC ELECTRICAL CHARACTERISTICS
DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C,
DD = 9V, VSS = 0V (Note 1)
V
Test
Pin
Parameter
Symbol
Min
Typ
Max
Units
Conditions
Supply Voltage
Supply Current
VDD
IDD1
IDD2
6
6
6
6
—
3.8
—
12
5.3
6
V
Operating
—
—
µA
µA
Operating, RLED off, GLED off
Operating, VDD = 12V,
RLED off, GLED off
IDD3
IDD4
6
6
—
—
9.6
13.9
30
µA
µA
Operating, RLED off,
GLED off, Smoke check
21.4
Operating, RLED off, GLED off,
Low Battery check
Input Voltage High
Input Voltage Low
Input Leakage Low
VIH1
VIH2
VIH3
VIH4
VIL1
8
2
6
3
—
—
—
—
—
—
—
—
—
—
—
V
V
V
V
V
V
V
No Local Alarm, IO as an input
No Local Alarm, IO as an input
1
5.6
5.6
—
—
—
—
—
—
12
8
—
2.8
1
VIL2
2
VIL3
1
3.4
3.4
-0.75
VIL4
12
15
ILDET1
pA
pA
VDD = 9V, DETECT = VSS
,
,
0-40% RH, TA = +25°C
ILDET2
15
—
—
-1.5
VDD = 9V, DETECT = VSS
85% RH, TA = +25°C (Note 2)
ILFD1
ILFD2
8
8
—
—
—
—
-50
µA
nA
FEED = -10V
-100
FEED = VSS
Note 1: Production tested at room temperature with temperature guard banded limits.
2: Sample test only.
3: Not 100% production tested.
4: Same limit range at each programmable step, see Table 4-1.
DS20002275C-page 4
2011-2021 Microchip Technology Inc.
RE46C180
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C,
DD = 9V, VSS = 0V (Note 1)
V
Test
Pin
Parameter
Symbol
IHDET1
IHDET2
Min
Typ
Max
Units
Conditions
Input Leakage High
15
—
—
0.75
pA
VDD = 9V, DETECT = VDD
0–40% RH, TA = +25°C
,
,
15
—
—
1.5
pA
VDD = 9V, DETECT = VDD
85% RH, TA = +25°C (Note 2)
IHFD1
IHFD2
IIOL2
8
8
—
—
—
—
—
—
—
—
50
100
150
1
µA
nA
µA
µA
FEED = 22V
FEED = VDD
2
No Alarm, VIO = 15V
Output Off Leakage High
Input Pull Down Current
IIOHZ
3, 5
Outputs Off,
V
RLED = 9V, VGLED = 9V
IPD1
IPD2
1
12
20
0.4
6.3
—
—
25
-4
50
0.8
—
—
—
—
—
—
80
1.3
—
µA
mA
V
TEST = 9V
T2 = 9V
Output High Voltage
Output Low Voltage
VOH1
VOL1
VOL3
IIOL1
10,11
10,11
3, 5
2
IOH = -16 mA, VDD = 7.2V
IOL = 16 mA, VDD = 7.2V
IOL = 10 mA, VDD = 7.2V
No Alarm, VIO = VDD -2V
Alarm, VIO = 4V or VIO = 0V
0.9
1
V
V
Output Current
60
-16
—
µA
mA
mA
IIOH1
IIODMP
2
2
5
At conclusion of Local Alarm
or PTT, VIO = 1V
Low Battery Voltage
VLB
6
6.75
7.05
7.35
7.65
-50
-50
-50
2
6.9
7.2
7.5
7.8
—
7.05
7.35
7.65
7.95
50
V
V
LBTR[2:1] = 1 0
LBTR[2:1] = 1 1
V
LBTR[2:1] = 0 0
V
LBTR[2:1] = 0 1
Offset Voltage
VGOS1
VGOS2
VGOS3
VCM1
14,15
15,16
15
mV
mV
mV
V
Guard amplifier
—
50
Guard amplifier
—
50
Smoke comparator
Guard amplifier (Note 3)
Smoke comparator (Note 3)
Guard amplifier outputs (Note 3)
Common Mode Voltage
Output Impedance
14,15
15
—
VDD–.5
VDD–2
—
VCM2
0.5
—
V
ZOUT
14,16
4
—
10
4.5
k
V
Chamber Voltage in
PTT/Chamber Test
VCHAMBER
4.49
4.51
User programmable
(2.1V to 6.75V) (Note 4)
Hysteresis
VHYS
13
140
150
160
mV
No Alarm to Alarm condition,
user programmable
(50 to 225 mV) (Note 4)
Note 1: Production tested at room temperature with temperature guard banded limits.
2: Sample test only.
3: Not 100% production tested.
4: Same limit range at each programmable step, see Table 4-1.
2011-2021 Microchip Technology Inc.
DS20002275C-page 5
RE46C180
AC ELECTRICAL CHARACTERISTICS
AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C,
VDD = 9V, VSS = 0V.
Test
Pin
Parameter
Symbol
Min
Typ
Max
Units
Conditions
Time Base
Internal Oscillator Period
Internal Clock Period
RLED Indicator
On Time
TPOSC
TPCLK
7
593
9.5
625
10
657
µs
Test mode (Note 1)
Operating
10.5
ms
TON1
5
5
5
5
9.5
304
0.95
9.5
10
320
1
10.5
336
ms
s
Operating
Period
TPLED1
TPLED2
TPLED3
Standby
1.05
10.5
s
Local alarm
10
s
HUSH mode, No Local Alarm
GLED Indicator
Period
TPLED4
TPLED5
TOFLED1
TOFLED2
TAMTO
3
3
3
3
3
38
237
0.95
36
40
250
1
42
263
1.05
40
s
ms
s
Alarm Memory Indication
GLED period, No Alarm,
no PTT
Alarm Memory Indication
GLED period upon PTT,
AMLEDEn = 1
Off Time
Alarm Memory Indication
GLED off time between
pulses
38
s
Alarm Memory Indication
GLED off time between pulse
trains (3x)
Alarm Memory Indication
Timeout Period
22.8
45.6
0
24
48
0
25.2
50.4
0
Hour AMTO[2:1] = 0 0
Hour AMTO[2:1] = 0 1
Hour AMTO[2:1] = 1 0,
No Alarm Memory Indication
—
—
—
—
AMTO[2:1] = 1 1,
Alarm Memory Indication
never times out, as long as
Alarm Memory Latch is set
Smoke Check
Smoke Check Time
Smoke Check Period
TSCT
TPER0
TPER1
—
—
—
4.7
9.5
5
10
1
5.3
ms
s
Operating
10.5
1.05
Standby, No Alarm
0.95
s
Standby, after one valid
smoke sample and before
entering Local Alarm, no PTT
TPER2
TPER3
TPCT1
—
—
—
237
0.95
304
250
1
263
1.05
336
ms
s
Standby, upon start of PTT
and before entering Local
Alarm
Local Alarm (after three con-
secutive valid smoke
samples) or Remote Alarm
Chamber Test Period
320
s
Operating
Note 1: TPOSC is 100% production tested. All other timing is verified by functional testing.
2: See timing diagram for CO alarm horn pattern.
3: See timing diagram for smoke alarm temporal and non-temporal horn pattern.
4: See timing diagram for horn synchronization and Auto Alarm Locate (AAL).
DS20002275C-page 6
2011-2021 Microchip Technology Inc.
RE46C180
AC ELECTRICAL CHARACTERISTICS (CONTINUED)
AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C,
VDD = 9V, VSS = 0V.
Test
Pin
Parameter
Symbol
Min
Typ
Max
Units
Conditions
Low Battery
Low Battery Check
Period
TPLB1
TPLB2
—
—
76
80
84
s
s
Standby, No Alarm,
No Low Battery
304
320
336
Standby, No Alarm, Low
Battery
Horn Operation
Horn Delay
THDLY1
THDLY2
10, 11
10, 11
475
380
500
400
525
420
ms
ms
From Local Alarm to Horn
Active, temporal horn pattern
From Local Alarm to Horn
Active, continuous horn
pattern
Horn Period
THPER1 10, 11
THPER2 10, 11
THPER3 10, 11
38
38
40
40
42
42
s
s
Low Battery, No Alarm
Chamber Failure, No Alarm
237
250
263
ms
Alarm Memory Indication
upon PTT, AMHCEn=1
THPER4 10, 11
5.5
9.5
5.8
10
6.1
s
CO Alarm horn period
(Note 2)
Horn On Time
THON1
10, 11
10.5
ms
1. Low Battery, No Alarm
2. Chamber Failure
3. Alarm Memory
Indication upon PTT,
AMHCEn = 1
THON2
THON3
10, 11
10, 11
475
332
500
350
525
368
ms
ms
Smoke Alarm, temporal horn
pattern (Note 3)
Smoke Alarm, continuous
horn pattern (Note 3)
THON4
THOF1
10, 11
10, 11
95
100
500
105
525
ms
ms
CO Alarm, COEn = 1
Horn Off Time
475
Smoke Alarm, temporal horn
pattern (Note 3)
THOF2
THOF3
THOF4
THOF5
THOF6
10, 11
10, 11
10, 11
10, 11
10, 11
1.43
143
37
1.5
150
39
1.58
158
41
s
Smoke Alarm, temporal horn
pattern (Note 3)
ms
s
Smoke Alarm, continuous
horn pattern (Note 3)
Chamber Fail horn off time
between pulse trains (3x)
465
95
490
100
515
105
ms
ms
Chamber Fail horn off time
between pulses
CO Alarm horn off time
between pulses,
COEn = 1 (Note 2)
THOF7
10, 11
4.8
5.1
5.4
s
CO alarm horn off time
between pulse trains,
COEn = 1 (Note 2)
Note 1: TPOSC is 100% production tested. All other timing is verified by functional testing.
2: See timing diagram for CO alarm horn pattern.
3: See timing diagram for smoke alarm temporal and non-temporal horn pattern.
4: See timing diagram for horn synchronization and Auto Alarm Locate (AAL).
2011-2021 Microchip Technology Inc.
DS20002275C-page 7
RE46C180
AC ELECTRICAL CHARACTERISTICS (CONTINUED)
AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C,
VDD = 9V, VSS = 0V.
Test
Pin
Parameter
Symbol
Min
Typ
Max
Units
Conditions
Interconnect
IO Active Delay
TIODLY1
2
2
2
3.5
3.1
3.7
3.3
3.9
3.5
851
s
s
From start of Local Alarm
to IO Active. SyncEn = 1
From start of Local Alarm
to IO Active. SyncEn = 0
Remote Smoke Alarm
Delay
TIODLY2
769
810
ms
No Local Alarm,
from IO Active to Alarm,
temporal horn pattern
TIODLY3
2
299
315
331
ms
No Local Alarm,
from IO Active to alarm,
continuous horn pattern
IO Filter for Remote
Smoke Alarm
TIOFILT
TIOPW1
TIOTO1
2
2
2
2
—
37
—
—
291
290
5.4
ms
ms
s
IO pulse-width to be filtered
IO as input, no Local Alarm
IO Pulse On Time
for CO Alarm
No Local Alarm, 2 valid
pulses required for CO
IO Pulse Off Time
for CO Alarm
—
—
IO = Low
IO Dump
TIODMP1
475
500
525
ms
At conclusion of Local Alarm
or PTT
Horn Synchronization
IO Pulse Period
TPIO1
TONIO
TIODMP2
TIODLY4
2
2
2
2
3.8
3.41
95
4
4.2
3.77
105
315
s
Local Alarm, temporal horn
pattern, SyncEn =1 (Note 4)
IO Pulse On Time
3.59
100
300
s
Local Alarm, temporal horn
pattern, SyncEn =1 (Note 4)
Horn Sync IO Dump
ms
ms
Local Alarm,
SyncEn =1 (Note 4)
Horn Sync IO Dump
Delay
285
Local Alarm,
SyncEn =1 (Note 4)
Auto Alarm Locate (AAL)
IO Cycle Period
TPIO2
2
2
15.2
4.19
16
16.8
4.63
s
s
Local Alarm, temporal horn
pattern, SyncEn =1,
NoAAL = 0 (Note 4)
IO Cycle Off Time
TOFIO
4.41
Local Alarm, temporal horn
pattern, SyncEn = 1,
No AAL = 0, IO off time
between IO pulse trains (3x)
(Note 4)
HUSH Timer Operation
HUSH Timer Period
TTPER
—
—
8.5
76
9
9.5
84
min
s
No Alarm, ShrtTO = 0
No Alarm, ShrtTO = 1
80
EOL
End-of-Life Age Sample
TEOL
—
346
364
382
Hours Standby, EOLEn = 1
Note 1:
TPOSC is 100% production tested. All other timing is verified by functional testing.
2: See timing diagram for CO alarm horn pattern.
3: See timing diagram for smoke alarm temporal and non-temporal horn pattern.
4: See timing diagram for horn synchronization and Auto Alarm Locate (AAL).
DS20002275C-page 8
2011-2021 Microchip Technology Inc.
RE46C180
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 9V, VSS = 0V
Parameters
Temperature Ranges
Sym
Min
Typ
Max
Units
Conditions
Operating Temperature Range
Storage Temperature Range
TA
-10
-55
—
—
+60
°C
°C
TSTG
+125
Thermal Package Resistances
Thermal Resistance, 16L-PDIP
Thermal Resistance, 16L-SOIC (150 mil.)
θJA
θJA
—
—
70
—
—
°C/W
°C/W
86.1
2011-2021 Microchip Technology Inc.
DS20002275C-page 9
RE46C180
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Symbol
RE46C180
PDIP, SOIC
Function
1
TEST
IO
This input is used to invoke Push-to-Test, Timer mode and Alarm Memory
Indication. This input has an internal pull-down.
2
This bidirectional pin provides the capability to interconnect many detectors
in a single system. This pin has an internal pull-down device and a charge
dump device.
3
4
5
GLED
CHAMBER
RLED
Open drain NMOS output, used to drive a visible LED to provide visual
indication of an Alarm Memory condition.
Connect to the ionization smoke chamber. This pin provides power to the
chamber
Open drain NMOS output, used to drive a visible LED. This pin provides the
load current for the Low Battery test, and is a visual indicator for alarm and
HUSH mode.
6
7
VDD
Connect to the positive supply voltage
TESTOUT
This output is an indicator of the internal IO dump signal. This pin is also
used for Test modes.
8
FEED
Usually connected to the feedback electrode through a current limiting
resistor. If not used, this pin must be connected to VDD or VSS
.
9
VSS
HB
HS
Connect to the negative supply voltage.
10
11
This pin is connected to the metal electrode of a piezoelectric transducer.
This pin is a complementary output to HB, connected to the ceramic
electrode of the piezoelectric transducer.
12
13
14
T2
T3
Test input to invoke Test modes. This pin has an internal pull-down.
Test output for Test modes.
GUARD1
Output of the guard amplifier. This allows for measurement of the DETECT
input without loading the ionization chamber.
15
16
DETECT
GUARD2
Connect to the CEV of the ionization smoke chamber.
Output of the guard amplifier. This allows for measurement of the DETECT
input without loading the ionization chamber.
DS20002275C-page 10
2011-2021 Microchip Technology Inc.
RE46C180
3.3
Supervisory Tests
3.0
3.1
DEVICE DESCRIPTIONS
Standby Internal Timing
Once every 80s, the status of the battery voltage is
checked by comparing a fraction of the VDD voltage to
an internal reference. In each period of 320s, the bat-
tery is checked four times. Of these four battery
checks, three are unloaded and one is loaded with
RLED enabled, which provides a battery load. Low bat-
tery status is latched at the end of the 10 ms RLED
pulse.
The internal oscillator is manufactured to ±5% toler-
ance. The oscillator period, TPOSC, is 625 µs. The inter-
nal clock period, TPCLK, of 10 ms is derived from the
internal oscillator period.
In Standby, once every 10s, the smoke detection cir-
cuitry is powered on for 5 ms. At the conclusion of the
5 ms, the status of the smoke comparator is latched. If
a Smoke condition is present, the period to the next
detection decreases and additional checks are made.
If the Low Battery test fails, the horn will chirp for 10 ms
every 40s, and will continue to chirp until the next
loaded Low Battery check is passed. The unloaded
Low Battery checks are skipped in Low Battery
condition.
In Standby, once every 80s, the Low Battery detection
circuitry is powered on for 10 ms. At the conclusion of
the 10 ms, the status of the Low Battery comparator is
latched. RLED is enabled for 10 ms every 320s to
provide a battery load in the loaded battery test.
As a user programmable option, a Low Battery Hush
mode can be selected. If a Low Battery condition
exists, upon release of PTT, the unit will enter the Low
Battery Hush mode, and the 10 ms horn chirp will be
silenced for 8 hours. At the conclusion of the 8 hours
the audible indication will resume, if the Low Battery
condition still exists
In Standby, once every 320s, the chamber test circuitry
is powered on for 5 ms. At the conclusion of the 5 ms,
the status of the chamber test is latched. See
Section 3.3 “Supervisory Tests” for details.
In addition, every 320s, a background chamber test is
performed by internally lowering the CHAMBER volt-
age to a pre-determined level (user programmable) for
3.7s. This will emulate a Smoke condition. At the end of
this 3.7s period, the smoke detection circuitry is pow-
ered on for 5 ms, and the Smoke condition is detected.
3.2
Smoke Detection Circuitry
The collection electrode voltage (CEV) of the ionization
chamber is compared to the stored reference voltage at
the conclusion of the 5 ms smoke sample period. After
the first Smoke condition is detected, the smoke detec-
tion rate increases to once every 1s. Three consecutive
smoke detections will cause the device to go into Local
Alarm, and the horn circuit and IO will be active. RLED
will turn on for 10 ms at 1 Hz rate.
If two consecutive chamber tests failed to detect a sim-
ulated Smoke condition, the chamber fail latch is set
and the failure warning is generated. The horn will chirp
three times every 40s. Each chirp is 10 ms long and
three chirps are spaced at a 0.5s interval. The chamber
fail warning chirp is separated from the Low Battery
warning chirp by about 20s.
In Local Alarm, the smoke reference voltage (smoke
sensitivity) is internally increased to provide alarm
hysteresis.
The horn will continue this pattern until the chamber fail
latch is reset. The chamber fail latch resets when any
one of the followings is active:
There are three separate smoke sensitivity settings (all
user programmable):
• Two consecutive chamber tests pass
• Local smoke alarm
• Standby sensitivity
• Local alarm (hysteresis) sensitivity
• HUSH sensitivity
• PTT smoke alarm
After the chamber test is completed, the CHAMBER
voltage goes back to its normal standby level.
During PTT, the standby smoke sensitivity is used in
smoke detection; but the CHAMBER voltage is user
programmable.
Chamber test is performed approximately 140s after
the loaded Low Battery test.
The guard amplifier and outputs are always active, and
will be within 50 mV of the DETECT input to reduce
surface leakage. The guard outputs also allow for
measurement of the DETECT input without loading the
ionization chamber.
In a Local Alarm, PTT Alarm or Remote Alarm condi-
tion, the chamber test is not performed, and the Low
Battery chirping is prohibited.
2011-2021 Microchip Technology Inc.
DS20002275C-page 11
RE46C180
greater than 37 ms and within 5.4s, a CO Alarm condi-
tion is detected, and the CO temporal horn pattern will
sound. The CO temporal pattern will sound at least two
times, if a CO Alarm condition is detected.
3.4
Push-to-Test (PTT)
PTT is an event when TEST is activated (VIH3).
Release of PTT is an event when TEST is deactivated
(VIL3). PTT has different functions for different circum-
stances. In Standby, PTT tests the unit. Upon start of
PTT, the CHAMBER voltage is lowered to a pre-deter-
mined level (user programmable) to emulate a Smoke
condition. The smoke detection rate increases to once
every 250 ms. After three consecutive smoke detec-
tions, the unit will go into a Local Alarm condition. In
alarm, the smoke detection rate decreases to once
every 1s. Upon release of PTT, the unit is immediately
reset out of Local Alarm, and the horn is silenced. The
chamber voltage goes back to the normal standby
level, and the detection rate goes back to once every
10s.
3.6
Reduced Sensitivity Mode
(HUSH Mode)
Upon release of PTT, the unit may or may not go into a
HUSH mode, depending on the user’s selection.
If the hush-in-alarm-only option is selected, then only
the release of PTT in a Local Alarm condition can initi-
ate a HUSH mode. Upon release of PTT, the unit is
immediately reset out of alarm, and the horn is
silenced.
If the hush-in-alarm-only option is not selected, then
anytime a release of PTT occurs, the HUSH mode is
initiated.
When the unit exits a Local Alarm condition, the alarm
memory latch is set. PTT will activate the alarm mem-
ory indication if the alarm memory latch is set and if the
alarm memory indication function has been enabled. If
the alarm memory indication function has not been
enabled and the alarm memory latch is set, PTT will
test the unit as described above. The release of PTT
will always reset the alarm memory latch.
In HUSH mode, the smoke sensitivity is lowered to a
pre-determined level, which is user programmable.
RLED is turned on for 10 ms every 10s.
The HUSH mode period is user programmable – it can
be either 9 minutes or 80s. After this period times out,
the unit goes back to its standby sensitivity.
In Standby and Low Battery conditions, PTT tests the
unit and RLED will be constantly enabled. This allows
the user to easily identify the low battery unit without
waiting for 40s to hear a horn chirp. Upon release of
PTT, RLED goes back to normal standby pulse rate.
The Low Battery HUSH mode is then activated, if this
function is enabled.
If the unit is currently in a HUSH mode, then PTT will
test the unit with the standby sensitivity. Upon release
of PTT, a new HUSH mode will be initiated.
As another user-programmable option, HUSH mode
can be terminated earlier by a smart hush function.
This function allows the HUSH mode to be canceled by
either a high smoke alarm, or a remote smoke alarm.
High smoke alarm is the local smoke alarm caused by
a smoke level that exceeds the reduced sensitivity
level.
3.5
Interconnect Operation
The bidirectional IO pin allows the interconnection of
multiple detectors. In a Local Alarm condition, this pin
is driven high 3.7s after a Local Alarm condition is
sensed through a constant current source. Shorting
this output to ground will not cause excessive current.
The IO is ignored as input during a Local Alarm.
3.7
Alarm Memory
Alarm memory is a user-programmable option. If a unit
has entered a Local Alarm, when exiting that Local
Alarm, the alarm memory latch is set. The GLED can
be used to visually identify any unit that had previously
been in a Local Alarm condition. The GLED is pulsed
on three times every 40s. Each GLED pulse is 10 ms
long and 1s spaced from the next pulse. This alarm
memory indication period can be 0, 24, 48 hours or no
limit, depending on the user’s selection.
The IO also has an NMOS discharge device that is
active for 0.5s after the conclusion of any type of Local
Alarm. This device helps to quickly discharge any
capacitance associated with the interconnect line.
If a remote active high signal is detected, the device
goes into Remote Alarm and the horn will be active.
RLED will be off, indicating a Remote Alarm condition.
Internal protection circuitry allows the signaling unit to
have higher supply voltage than the signaled unit, with-
out excessive current draw.
The user will be able to identify a unit with an active
alarm memory anytime by PTT. Upon start of PTT, the
alarm memory indication will be activated. Depending
on the user’s selection, it can be 4 Hz horn chirp, 4 Hz
GLED pulse, or both. Upon release of PTT, the alarm
memory latch will be reset.
The interconnect input has a 291 ms maximum digital
filter. This allows for interconnection to other types of
alarms (CO, for example) that may have a pulsed
interconnect signal.
Anytime a release of PTT occurs, the alarm memory
latch will be reset. The initial visual GLED indication is
not displayed if a Low Battery condition exists.
As a user-programmable option, the smart intercon-
nect (smart IO) function can be selected. If the IO input
is pulsed high twice with a nominal pulse on time
DS20002275C-page 12
2011-2021 Microchip Technology Inc.
RE46C180
3.8
End-of-Life (EOL) Indicator
3.11 Auto Alarm Locate
The EOL indicator is a user-programmable function. If
the EOL indicator function is enabled, then approxi-
mately every 15 days of continuous operation, TEOL,
the circuit will read an age count stored in EEPROM,
and will increment this age. After 10 years of operation,
an audible indication will be given to signal that the unit
should be replaced. The EOL indicator is the same as
the chamber test failure warning.
Auto Alarm Locate (AAL) is also a user-programmable
function. To use AAL, the horn synchronization has to
be selected first. The purpose of AAL is to let users
quickly find the local alarm units just by listening. The
local alarm units will sound the temporal pattern without
interruption. The remote alarm units will sound the pat-
tern with interruption. Every four temporal patterns
(or 16s), the remote units are kept silenced for one pat-
tern (or 4s).
3.9
Tone Pattern
The originating unit conducts the IO cycling. Every four
temporal patterns the IO is driven low for one temporal
pattern. In the remaining three temporal patterns, the
IO is still pulsing to keep the horn synchronized.
The smoke alarm tone pattern can be either a temporal
pattern, or a continuous pattern, depending on the
user’s selection. The temporal horn pattern supports
the NFPA 72® National Fire Alarm and Signaling
Code® for emergency evacuation signals. The
continuous pattern is a 70% duty cycle continuous
pattern.
The RLED of the origination unit and other local smoke
units will be turned on 10 ms every 1s. The RLED of the
remote smoke units will be off.
If a CO alarm is detected through the IO, the unit will
sound the CO tone pattern. The CO tone pattern con-
sists of 4 horn beeps in every 5.8s. Each horn beep is
100ms long and separated by 100ms.
3.10 Horn Synchronization
The horn synchronization function is programmable by
the user.
In an interconnected system, if one unit goes into Local
Alarm, other units will also go into Remote Alarm. The
IO line is driven high by the origination local smoke unit,
and stays high during the alarm.
If the Horn Synchronization function is enabled, at the
end of every temporal horn pattern and when the horn
is off, the origination unit will drive IO low, then high
again. This periodic IO pulsing high and low will cause
the remote smoke units to go into and out of the
Remote Alarm repeatedly. Each time a unit goes into a
Remote Alarm, its timing is reset. The horn sound of all
remote smoke units will be synchronized with the horn
sound of the origination unit.
A protection circuit ensures that the unit which goes
into Local Alarm first will be the controlling unit that con-
trols the horn synchronization. The units that go later
into Local Alarm will not drive the IO line. This prevents
bus contention problem.
This function works with the temporal tone pattern only.
2011-2021 Microchip Technology Inc.
DS20002275C-page 13
RE46C180
NOTES:
DS20002275C-page 14
2011-2021 Microchip Technology Inc.
RE46C180
4.0
USER PROGRAMMING MODES
TABLE 4-2:
STANDBY SENSITIVITY (VSTD
)
PROGRAMMING
CONFIGURATION
AT VDD = 9V
Tables 4-1 to 4-6 show the parameters for user smoke
calibration.
TABLE 4-1:
PARAMETRIC
VSTD Register STTR [5:1] Configuration Values
STTR5 STTR4 STTR3 STTR2 STTR1 VSTD
PROGRAMMING
Parametric
Programming
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
4.5V
4.6V
4.7V
4.8V
4.9V
5.0V
5.1V
5.2V
5.3V
5.4V
5.5V
5.6V
5.7V
5.8V
5.9V
6.0V
2.9V
3.0V
3.1V
3.2V
3.3V
3.4V
3.5V
3.6V
3.7V
3.8V
3.9V
4.0V
4.1V
4.2V
4.3V
4.4V
Range
Standby Smoke
Sensitivity (VSTD
2.9 6.0V (Note 1) 100 mV
)
(Note 1)
Hysteresis (VHYS
)
+50 +225 mV
25 mV
(Note 2)
(Note 2)
HUSH Smoke
Sensitivity (VHSH
-1600 mV-100 mV 100 mV
)
(Note 3)
(Note 3)
CHAMBERVoltage
at PTT/Chamber
Test (VCHAMBER
2.10 6.75V
150 mV
(Note 4)
(Note 4)
)
Note 1: VSTD listed is based on VDD = 9V. The
actual range is (29/90)VDD (60/90)VDD
resolution is VDD/90.
,
2:
3:
4:
VHYS is a positive offset from VSTD. The
listed value is based on VDD = 9V. The
actual range is +(0.5/90)VDD +(2.25/
90)VDD, resolution is (0.25/90)VDD
HSH is a negative offset from VSTD. The
listed value is based on VDD = 9V. The
actual range is –(16/90)VDD
–(1/90)VDD, resolution is VDD/90
.
V
V
V
CHAMBER listed value is based on
DD = 9V. Actual range is (21/90)VDD
.
(67.5/90)VDD, resolution is (1.5/90)VDD
2011-2021 Microchip Technology Inc.
DS20002275C-page 15
RE46C180
TABLE 4-3:
HYSTERESIS (VHYS
)
TABLE 4-5:
CHAMBER VOLTAGE
(VCHAMBER) PROGRAMMING
CONFIGURATION
PROGRAMMING
CONFIGURATION
AT VDD = 9V
AT VDD = 9V
VHYS Register HYTR[3:1]
VCHAMBER Register PTTR[5:1]
Configuration
Values
VHYS
Values
Configuration
HYTR3
HYTR2
HYTR1
VCHAMBER
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
150 mV
175 mV
200 mV
225 mV
50 mV
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
4.50V
4.65V
4.80V
4.95V
5.10V
5.25V
5.40V
5.55V
5.70V
5.85V
6.00V
6.15V
6.30V
6.45V
6.60V
6.75V
2.10V
2.25V
2.40V
2.55V
2.70V
2.85V
3.00V
3.15V
3.30V
3.45V
3.60V
3.75V
3.90V
4.05V
4.20V
4.35V
75 mV
100 mV
125 mV
TABLE 4-4:
HUSH SENSITIVITY (VHSH
PROGRAMMING
CONFIGURATION
AT VDD = 9V
)
VHSH Register TMTR[4:1]
Configuration
Values
VHSH
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
VSTD – 800 mV
VSTD – 700 mV
VSTD – 600 mV
VSTD – 500 mV
VSTD – 400 mV
VSTD – 300 mV
VSTD – 200 mV
VSTD – 100 mV
VSTD – 1600 mV
VSTD – 1500 mV
VSTD – 1400 mV
VSTD – 1300 mV
VSTD – 1200 mV
VSTD – 1100 mV
VSTD – 1000 mV
VSTD – 900 mV
DS20002275C-page 16
2011-2021 Microchip Technology Inc.
RE46C180
4.1
Calibration and Programming
Procedures
TABLE 4-6:
FEATURE PROGRAMMING
Features
Options
Sixteen separate programming and Test modes are
available for user customization. The T2 input is used
to enter these modes and step through them. To enter
these modes, after power-up, T2 must be driven to VDD
and held at that level. To step through the modes, the
TEST input must first be driven to VDD. T2 is then
clocked. TEST has to be high when clocking T2. Any-
time T2 and TEST are both driven to low, the unit will
come out of these modes and go back to the normal
operation mode. FEED and IO are re-configured to
become Test mode inputs. A T2 clock occurs when it
switches from VSS to VDD. The Test mode functions are
outlined in the Table 4-7.
Low Battery Detection Selection
6.9V
7.2V
7.5V
7.8V
10 Year End-of-Life Indicator
Enable/Disable
Enable/Disable
Smart IO with CO
Alarm Sensing
Auto Alarm Locate
Horn Synchronization
Low Battery Hush
Enable/Disable
Enable/Disable
Enable/Disable
Enable/Disable
Alarm Memory Indicator at PTT:
Horn Chirping
Alarm Memory Indicator at PTT:
GLED Flashing
Enable/Disable
Alarm Memory Indicator at
Standby Time Out Period
0/24/48 hr or no
limit
Alarm Memory
HUSH Time Out Period
Smart HUSH
Enable/Disable
9 minutes or 80s
Enable/Disable
Enable/Disable
Enable/Disable
HUSH In Alarm Only
HUSH
Tone Select
Temporal
or Continuous
TABLE 4-7:
TEST MODE FUNCTIONS
T2
Clock
Mode
Descriptions
Normal Operation
TEST
T2
FEED
IO
T3
TESTOUT
M0
Note 1
0
1
2
3
4
PTT/HUSH
0
FEED
IO
Not Used
IO Dump
Note 2
TM0 Speedup Mode
PTT/HUSH
VDD
CLK
IO
Not Used
IO Dump
Note 2
TM1 Load Timer for Spill
EOL Timer Clock VDD
HUSH/LB HUSH
Timer Clock
Alarm Mem Not Used
Timer Clock
Not Used
Not Used
Not Used
TM2 User Feature
Programming
ProgData
VDD
VDD
ProgClk
ProgEn
Not Used
TM3 Horn Test/LED On;
IO High/Low
HornEnB
Note 3
IOHi En
IO Dump EnB
HB/HS En
Note 4
LEDEn
Not Used
TM4 Standby Sen Set
TM5 Hyst Sen Set
5
6
SmkCompEnB
T3EnB
VDD
VDD
CalClk
ReadReg
ReadReg
VSEN
VSEN
SmkCompOut
Note 5
SmkCompEnB
T3EnB
CalClk
SmkCompOut
Note 5
Note 1: After power-up, the unit is in M0, the normal operation mode. When in M0, if T2 is driven to VDD, the unit
will enter TM0.
2: In M0 and TM0, the digital output TESTOUT is driven by the internal IO dump signal.
3: In TM3, if TEST = VSS, the horn is turned on. IO is in weak pull-down; If TEST = VDD, the horn is off. FEED
controls IO and HB/HS.
4: Valid when TEST = VDD
;
5: SmkCompOut – digital comparator output (high if DETECT < VSEN; low if DETECT > VSEN).
6: LBCompOut – digital comparator output (high if VDD < LB trip point; low if VDD > LB trip point).
2011-2021 Microchip Technology Inc.
DS20002275C-page 17
RE46C180
TABLE 4-7:
TEST MODE FUNCTIONS (CONTINUED)
T2
Clock
Mode
Descriptions
TEST
T2
FEED
IO
T3
TESTOUT
TM6 HUSH Sen Set
7
SmkCompEnB
T3EnB
VDD
CalClk
ReadReg
VSEN
SmkCompOut
Note 5
TM7 PTT/Chamber Test
Set
8
SmkCompEnB
T3EnB
VDD
VDD
CalClk
ReadReg
ProgEn
VSEN
SmkCompOut
Note 5
TM8 Program Calibration
TM9 Not Used
9
Not Used
Not Used
Not Used
Not Used
10
11
TM10 Serial Read/Write
Calibration
ProgData
VDD
ProgClk
ProgEn
Not Used
Serial Out
TM11 Not Used
12
13
TM12 Standby Sen Check
SmkCompEnB
T3EnB
VDD
VDD
VDD
VDD
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
VSEN
VSEN
VSEN
VSEN
SmkCompOut
Note 5
TM13 Hyst Sen Check
TM14 HUSH Sen Check
14
15
16
SmkCompEnB
T3EnB
SmkCompOut
Note 5
SmkCompEnB
T3EnB
SmkCompOut
Note 5
TM15 PTT/Chamber Test
CHAMBER Voltage
Check
SmkCompEnB
T3EnB
SmkCompOut
Note 5
TM16 Not Used
TM17 LB Test
17
18
Not Used
ProgData
VDD
VDD
Not Used
ProgClk
LB Test En Not Used
RLED En
LBCompOut
Note 6
TM18 Serial Read/Write
Feature and
19
ProgEn
Not Used
Serial Out
Calibration
TM19 User EE Lock Bit
20
LockSetEn
VDD
Not used
ProgEn
Not Used
Lock Out
Note 1: After power-up, the unit is in M0, the normal operation mode. When in M0, if T2 is driven to VDD, the unit
will enter TM0.
2: In M0 and TM0, the digital output TESTOUT is driven by the internal IO dump signal.
3: In TM3, if TEST = VSS, the horn is turned on. IO is in weak pull-down; If TEST = VDD, the horn is off. FEED
controls IO and HB/HS.
4: Valid when TEST = VDD
;
5: SmkCompOut – digital comparator output (high if DETECT < VSEN; low if DETECT > VSEN).
6: LBCompOut – digital comparator output (high if VDD < LB trip point; low if VDD > LB trip point).
DS20002275C-page 18
2011-2021 Microchip Technology Inc.
RE46C180
+ V1
-
9V
Battery
RE46C180
TEST GUARD2
2 IO
Monitor TESTOUT,
T3 and CHAMBER
1
16
R1 R2
1k
1k
DETECT
GUARD1
15
14
13
12
GLED
3
CHAMBER
4
5
6
T3
T2
RLED
VDD
11
10
9
HS
TESTOUT
FEED
7
8
HB
VSS
V2 V3 V4
V5 V6
FIGURE 4-1:
Nominal Application Circuit for Programming.
4. Apply four clock pulses to the T2 input (VDD to
VSS and back to VDD) to enter in TM4 mode.
This initiates the Calibration mode for the normal
sensitivity setting. Drive TEST from VDD to VSS
to turn on the smoke comparator and enable the
T3 switch. The standby smoke sensitivity VSEN
will appear at T3. The smoke comparator output
will appear at TESTOUT. Clock FEED to
increase or decrease the VSEN levels as
needed. The IO input is pulsed low-to-high to
save the result.
4.2
Smoke Calibration
A separate calibration mode is entered for each mea-
surement mode (Normal, Hysteresis, HUSH and PTT/
Chamber Test) so that independent limits can be set for
each.
In all calibration modes the VSEN voltage, which rep-
resents the smoke sensitivity level, can be accessed at
T3 output. The SmkCompOut output voltage is the
result of the comparison of DETECT and VSEN, and
can be accessed at TESTOUT output. The FEED input
can be clocked to cycle through the available smoke
sensitivity levels. Once the desired smoke sensitivity
level is reached, the IO input is pulsed low to high to
store the result.
5. Drive TEST from VSS to VDD and hold at VDD
.
Apply another clock pulse to the T2 input, to
enter in TM5 mode. This initiates the Calibration
mode for the hysteresis setting. Drive TEST
from VDD to VSS to turn on the smoke compara-
tor and enable the T3 switch. The local alarm
smoke sensitivity VSEN will appear at T3. The
smoke comparator output will appear at
TESTOUT. Clock FEED to increase or decrease
the VSEN levels as needed. The IO input is
pulsed low-to-high to save the result.
The detailed procedure is described in the following
steps:
1. Power-up with the bias condition shown in
Figure 4-1. At power-up:
TEST = IO = FEED = T2 = VSS
,
DETECT = VDD. Now in mode M0.
2. Drive T2 input from VSS to VDD and hold at VDD
to enter TM0.
3. Drive TEST from VSS to VDD and hold at VDD
.
2011-2021 Microchip Technology Inc.
DS20002275C-page 19
RE46C180
6. Drive TEST from VSS to VDD and hold at VDD
.
Apply another clock pulse to the T2 input, to
enter in TM6 mode. This initiates the calibration
mode for the HUSH sensitivity setting. Drive
TEST from VDD to VSS to turn on the smoke
comparator and enable the T3 switch. The
HUSH smoke sensitivity VSEN will appear at T3.
The smoke comparator output will appear at
TESTOUT. Clock FEED to increase or decrease
the VSEN levels as needed. The IO input is
pulsed low-to-high to save the result
7. Drive TEST from VSS to VDD and hold at VDD
.
Apply another clock pulse to the T2 input to
enter in TM7 mode. This initiates the calibration
mode for the CHAMBER voltage at PTT/Cham-
ber Test. Drive TEST from VDD to VSS to turn on
the smoke comparator and enable the T3
switch. The standby smoke sensitivity VSEN will
appear at T3. The smoke comparator output will
appear at TESTOUT. Clock FEED to increase or
decrease the CHAMBER voltages as needed.
The IO input is pulsed low-to-high to save the
result.
8. Drive TEST from VSS to VDD and hold at VDD
.
Apply another clock pulse to the T2 input to
enter in TM8 mode. Pulse IO to save all results
into memory. Before this step, no settings are
stored into memory. Power-down the part to
take effect.
DS20002275C-page 20
2011-2021 Microchip Technology Inc.
RE46C180
FIGURE 4-2:
Timing Diagram for Smoke Calibration (Mode TM4 ~ TM8).
2011-2021 Microchip Technology Inc.
DS20002275C-page 21
RE46C180
4.3
Serial Read/Write Calibration
As an alternative to the steps in Section 4.2, Smoke
Calibration, the sensitivity settings can be entered
directly from a Serial Read/Write Calibration mode (if
the system has been well characterized).
To enter this mode, follow these steps:
1. Power-up with the bias condition shown in
Figure 4-1 to enter M0. At power-up:
TEST = IO = FEED = T2 = VSS
,
DETECT = VDD
,
2. Drive T2 input from VSS to VDD and hold at VDD
to enter TM0.
3. Drive TEST from VSS to VDD and hold at VDD
.
4. Apply 10 clock pulses to the T2 input (VDD to
VSS and back to VDD) to enter in TM10 mode.
This enables the Serial Read/Write Calibration
mode.
5. TEST now acts as a data input (High = VDD
,
Low = VSS). FEED acts as the clock input
(High = VDD, Low = VSS). Clock in the sensitivity
settings.
The data sequence should be as follows:
5 bit
3 bit
4 bit
5 bit
Standby Sensitivity (LSB first)
Hysteresis (LSB first)
HUSH Sensitivity (LSB first)
CHAMBER voltage in PTT/Chamber
Test (LSB first)
6. After all 17 bits have been entered, pulse IO to
store into the EEPROM memory. Power-down
the part to take effect.
DS20002275C-page 22
2011-2021 Microchip Technology Inc.
RE46C180
REGISTER 4-1:
CALIBRATION CONFIGURATION REGISTER
W-x
PTTR5
bit 17
W-x
PTTR4
bit 16
W-x
W-x
W-x
W-x
W-x
W-x
W-x
PTTR3
PTTR2
PTTR1
TMTR4
TMTR3
TMTR2
TMTR1
bit 8
W-x
HYTR3
bit 8
W-x
W-x
W-x
W-x
W-x
W-x
W-x
HYTR2
HYTR1
STTR5
STTR4
STTR3
STTR2
STTR1
bit 1
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 17
bit 16
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
PTTR5: MSB (See Table 4-5)
PTTR4: 4SB
PTTR3: 3SB
PTTR2: 2SB
PTTR1: LSB
TMTR4: MSB (See Table 4-4)
TMTR3: 3SB
TMTR2: 2SB
TMTR1: LSB
bit 8
HYTR3: MSB (See Table 4-3)
HYTR2: 2SB
bit 7
bit 6
HYTR1: LSB
bit 5
STTR5: MSB (See Table 4-2)
STTR4: 4SB
bit 4
bit 3
STTR3: 3SB
bit 2
STTR2: 2SB
bit 1
STTR1: LSB
2011-2021 Microchip Technology Inc.
DS20002275C-page 23
RE46C180
FIGURE 4-3:
Timing Diagram for Mode TM10.
DS20002275C-page 24
2011-2021 Microchip Technology Inc.
RE46C180
3. Drive TEST from VSS to VDD and hold at VDD
4. Apply two clock pulses to the T2 input (VDD to
SS and then back to VDD) to enter in TM2.
.
4.4
User Feature Selections
User feature selections can be clocked in serially using
TEST as data input, and FEED, as a clock input, then
stored in the internal EEPROM.
V
5. Using TEST as data and FEED as clock, shift in
values of 18 bits as selected from Register 4-2.
The detailed steps are as follows:
6. After shifting in data, pull IO input to VDD, then
VSS (minimum pulse-width of 10 ms) to store
shift register contents in the memory.
1. Power-up with the bias condition shown in
Figure 4-1. At power-up:
7. If any changes are required, power-down the
part and return to Step 1. All bit values must be
reentered.
TEST = IO = FEED = T2 = VSS
DETECT = VDD. Now in mode M0.
,
2. Drive T2 input from VSS to VDD and hold at VDD
to enter TM0.
REGISTER 4-2:
USER FEATURE CONFIGURATION REGISTER
U
W-x
—
LBTR2
bit 18
bit 17
W-x
LBTR1
bit 16
W-x
W-x
W-x
W-x
W-x
W-x
W-x
EOLEn
COEn
NoAAL
SyncEn
LBHshEn
AMHCEn
AMLEDEn
bit 8
W-x
AMTO2
bit 8
W-x
W-x
W-x
W-x
W-x
W-x
W-x
AMTO1
AMEn
ShrTO
SmrtH
HIAO
HushEnB
TSEL
bit 1
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 18
bit 17
bit 16
Unimplemented: Read as ‘x’
LBTR2: MSB
LBTR1: LSB
00 =7.5V
01 =7.8V
10 =6.9V
11 =7.2V
bit 15
bit 14
bit 13
bit 12
EOLEn: End-of-Life Indicator Enable Bit
1= Enable
0= Disable
COEn: CO Alarm Function (Smart IO) Enable Bit
1= Enable
0= Disable
NoAAL: Auto Alarm Locate Disable Bit
1= AAL is Disabled
0= AAL is Enabled
SyncEn: Horn Synchronization Enable Bit
1= Enable
0= Disable
2011-2021 Microchip Technology Inc.
DS20002275C-page 25
RE46C180
REGISTER 4-2:
USER FEATURE CONFIGURATION REGISTER (CONTINUED)
bit 11
bit 10
bit 9
LBHshEn: Low Battery Hush Enable Bit
1= Enable
0= Disable
AMHCEn: Alarm Memory PTT Indicator Horn Chirp Enable Bit
1= Enable
0= Disable
AMLEDEn: Alarm Memory PTT Indicator LED Flashing Enable Bit
1= Enable
0= Disable
bit 8
bit 7
AMTO2: MSB
AMTO1: LSB
00=24 Hours Timeout
01=48 Hours Timeout
10=0 Hour Timeout
11=Never Timeout
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
AMEn: Alarm Memory Enable Bit
1= Enable
0= Disable
ShrTO: HUSH Timer Time Out Select Bit
1= 80 seconds
0= 9 minutes
SmrtH: Smart HUSH Bit
1= Enable (Hush is canceled by either high smoke, or remote smoke)
0= Disable (Hush is never canceled until timeout)
HIAO: HUSH-in-Alarm -Only Bit
1= Enable (Hush is activated upon release of PTT during local smoke only)
0= Disable (Hush is activated upon release of PTT at anytime)
HushEnB: HUSH Enable Bit
1= Enable (Hush is disabled)
0= Disable (Hush is enabled)
TSEL: Tone Select Bit
1= Continuous Tone Pattern
0= Temporal Tone Pattern
The minimum pulse-width for FEED is 10 µs, while the
minimum pulse-width for TEST is 100 µs.
Alarm Memory PTT Indicator Horn
Chirp Enable
=
=
=
Yes
Alarm Memory PTT Indicator LED
Flashing Enable
No
For example, for the following options, the sequence
would be:
Alarm memory LED indicator time
out
24 hours
Data
Bit
–
–
–
–
X
1
0
1
1
1
1
0
1
Alarm Memory Enable
HUSH time out
Smart HUSH
=
=
=
=
=
=
Yes
18 17 16 15 14 13 12 11 10
9 minutes
No
Data
Bit
0
0
0
1
0
0
4
=
=
=
=
=
=
1
0
0
9
8
7
6
5
3
2
1
Hush in alarm only
Hush Enable
Yes
Low battery Trip Point
End of Life Enable
CO Enable
6.9V
Yes
Yes
Yes
Yes
No
Yes
Tone Select
Temporal
Auto Alarm Locate Disable
Horn Synchronization Enable
Low Battery Hush Enable
DS20002275C-page 26
2011-2021 Microchip Technology Inc.
RE46C180
FIGURE 4-4:
Timing Diagram for Mode TM2.
2011-2021 Microchip Technology Inc.
DS20002275C-page 27
RE46C180
4.5
Sensitivity Verification
After all sensitivity levels and CHAMBER voltage at
PTT/Chamber Test have been entered and stored into
the memory, additional Test modes are available to ver-
ify if the sensitivities are functioning as expected.
Table 4-8 describes several verification tests.
TABLE 4-8:
SENSITIVITY VERIFICATION DESCRIPTION
Sensitivity
Test Description
Standby Sensitivity Clock T2 to Mode TM12 (12 clocks). With appropriate smoke level in the chamber, pull TEST
to VSS and hold for at least 1 ms. The TESTOUT output will indicate the detection status
(High = smoke detected).
Hysteresis
Clock T2 to Mode TM13 (13 clocks). Pulse TEST and monitor TESTOUT.
Clock T2 to Mode TM14 (14 clocks). Pulse TEST and monitor TESTOUT.
HUSH Sensitivity
CHAMBERvoltageat Clock T2 to Mode TM15 (15 clocks). Pulse TEST and monitor TESTOUT.
PTT/Chamber Test
DS20002275C-page 28
2011-2021 Microchip Technology Inc.
RE46C180
FIGURE 4-5:
Timing Diagram for Sensitivity Verification in Mode TM12 ~ TM15.
2011-2021 Microchip Technology Inc.
DS20002275C-page 29
RE46C180
5. TEST now acts as a data input (High = VDD
,
4.6
Serial Read/Write Calibration and
User Features
Low = VSS). FEED acts as the clock input
(High = VDD, Low = VSS). Clock in the sensitivity
settings. The data sequence should be as
follows:
As an alternative to the steps in Section 4.2, Smoke
Calibration and Section 4.4, User Feature Selec-
tions, the sensitivity settings and user feature selec-
tions can be entered directly from a Serial Read/Write
Calibration mode.
D1 ~ D18
User Features (18 bits, LSB first)
Calibration (17 bits, LSB First)
D19 ~ D35
6. After all 35 bits have been entered, pulse IO to
store into the EEPROM memory.
To enter this mode, follow these steps:
1. Power-up with the bias condition shown in
Figure 4-1 to enter M0. At power-up:
7. Use test mode TM19 to set the lock bit to
unlocked. This will insure TM18 can be used to
read back the data to verify the TM18 write com-
pleted properly.
TEST = IO = FEED = T2 = VSS
,
DETECT = VDD
.
2. Drive T2 input from VSS to VDD and hold at VDD
to enter TM0.
3. Drive TEST from VSS to VDD and hold at VDD
.
4. Apply 18 clock pulses to the T2 input (VDD to
VSS and then back to VDD) to enter in TM18
mode. This enables the Serial Read/Write
Calibration and User Features modes.
REGISTER 4-3:
SERIAL READ/WRITE REGISTER
W-x
PTTR5
bit 35
W-x
W-x
PTTR4
PTTR3
bit 33
W-x
PTTR2
bit 32
W-x
W-x
W-x
W-x
W-x
W-x
W-x
PTTR1
TMTR4
TMTR3
TMTR2
TMTR1
HYTR3
HYTR2
bit 25
W-x
HYTR1
bit 24
W-x
W-x
W-x
W-x
W-x
U
W-x
STTR5
STTR4
STTR3
STTR2
STTR1
—
LBTR2
bit 17
W-x
LBTR1
bit 16
W-x
W-x
W-x
W-x
W-x
W-x
W-x
EOLEn
COEn
NoAAL
SyncEn
LBHshEn
AMHCEn
AMLEDEn
bit 8
W-x
AMTO2
bit 8
W-x
W-x
W-x
W-x
W-x
W-x
W-x
AMTO1
AMEn
ShrTO
SmrtH
HIAO
HushEnB
TSEL
bit 1
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 35
bit 34
bit 33
PTTR5: MSB (See Table 4-5)
PTTR4: 4SB
PTTR3: 3SB
DS20002275C-page 30
2011-2021 Microchip Technology Inc.
RE46C180
REGISTER 4-3:
SERIAL READ/WRITE REGISTER (CONTINUED)
bit 32
bit 31
bit 30
bit 29
bit 28
bit 27
bit 26
bit 25
bit 24
bit 23
bit 22
bit 21
bit 20
bit 19
bit 18
bit 17
bit 16
PTTR2: 2SB
PTTR1: LSB
TMTR4: MSB (See Table 4-4)
TMTR3: 3SB
TMTR2: 2SB
TMTR1: LSB
HYTR3: MSB (See Table 4-3)
HYTR2: 2SB
HYTR1: LSB
STTR5: MSB (See Table 4-2)
STTR4: 4SB
STTR3: 3SB
STTR2: 2SB
STTR1: LSB
Unimplemented: Read as ‘x’
LBTR2: MSB
LBTR1: LSB
00 =7.5V
01 =7.8V
10 =6.9V
11 =7.2V
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
EOLEn: End-of-Life Indicator Enable Bit
1= Enable
0= Disable
COEn: CO Alarm Function (Smart IO) Enable Bit
1= Enable
0= Disable
NoAAL: Auto Alarm Locate Disable Bit
1= AAL is Disabled
0= AAL is Enabled
SyncEn: Horn Synchronization Enable Bit
1= Enable
0= Disable
LBHshEn: Low Battery Hush Enable Bit
1= Enable
0= Disable
AMHCEn: Alarm Memory PTT Indicator Horn Chirp Enable Bit
1= Enable
0= Disable
AMLEDEn: Alarm Memory PTT Indicator LED Flashing Enable Bit
1= Enable
0= Disable
bit 8
bit 7
AMTO2: MSB
AMTO1: LSB
00=24 Hours Timeout
01=48 Hours Timeout
10=0 Hours Timeout
11=Never Timeout
2011-2021 Microchip Technology Inc.
DS20002275C-page 31
RE46C180
REGISTER 4-3:
SERIAL READ/WRITE REGISTER (CONTINUED)
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
AMEn: Alarm Memory Enable Bit
1= Enable
0= Disable
ShrTO: HUSH Timer Time Out Select Bit
1= 80 seconds
0= 9 minutes
SmrtH: Smart HUSH Bit
1= Enable (Hush is canceled by either high smoke, or remote smoke)
0= Disable (Hush is never canceled until timeout)
HIAO: HUSH-in-Alarm-Only Bit
1= Enable (Hush is activated upon release of PTT during local smoke only)
0= Disable (Hush is activated upon release of PTT at anytime)
HushEnB: HUSH Enable Bit
1= Enable (Hush is disabled)
0= Disable (Hush is enabled)
TSEL: Tone Select Bit
1= Continuous Tone Pattern
0= Temporal Tone Pattern
DS20002275C-page 32
2011-2021 Microchip Technology Inc.
RE46C180
FIGURE 4-6:
Timing Diagram for Serial Read/Write Calibration and User Features in Mode TM18.
2011-2021 Microchip Technology Inc.
DS20002275C-page 33
RE46C180
4.7
Horn Test
Test mode TM3 allows the horn to be enabled
indefinitely for audibility testing.
To enter this mode, follow the next steps:
1. Power-up with the bias condition shown in
Figure 4-1 to enter M0. At power-up:
TEST = IO = FEED = T2 = VSS
,
DETECT = VDD
.
2. Drive T2 input from VSS to VDD and hold at VDD
to enter TM0.
3. Drive TEST from VSS to VDD and hold at VDD
.
4. Apply three clock pulses to the T2 input (VDD to
VSS and then back to VDD) to enter in TM3
mode.
5. Drive TEST from VDD to VSS to enable the horn.
VDD
Horn Enabled
TEST
VSS
Min T1 = 20 µs
VDD
T2
VSS
Min TSETUP1 = 10 µs
Min PW1 = 10 µs
MODE
M0
TM0
TM1
TM2
TM3
FIGURE 4-7:
Timing Diagram for Horn Test in Mode TM3.
DS20002275C-page 34
2011-2021 Microchip Technology Inc.
RE46C180
4.8
Low Battery Test
Test mode TM17 allows the low battery trip point to be
tested. To enter this mode, follow these steps:
1. Power-up with the bias condition shown in
Figure 4-1 to enter M0. At power-up:
TEST = IO = FEED = T2 = VSS
,
DETECT = VDD
.
2. Drive T2 input from VSS to VDD and hold at VDD
to enter TM0.
3. Drive TEST from VSS to VDD and hold at VDD
.
4. Apply 17 clock pulses to the T2 input (VDD to
VSS and then back to VDD) to enter in TM17
mode.
5. Drive IO from VSS to VDD to enable the low
battery testing and turn on the RLED. Sweep
VDD from high to low and monitor TESTOUT
output. The TESTOUT output will indicate the
Low Battery status (High = Low Battery
detected).
VDD
TEST
VSS
VDD
T2
VSS
Min TSETUP1 = 10 µs
VDD
Min TPW1 = 10 µs
Min T1 = 20 µs
Low Battery Test Enabled
IO
VSS
9V
VDD
7.5V
6V
VDD
VSS
TESTOUT
MODE
M0
TM0
TM1
TM2
TM3
TM4
TM5
TM6
TM16
TM17
Note: Assume the 7.5V low battery trip point is selected.
FIGURE 4-8:
Timing Diagram for Low Battery Test in Mode TM17.
2011-2021 Microchip Technology Inc.
DS20002275C-page 35
RE46C180
4.9
User Lock Bit Programming
Test mode TM19 allows users to program the user
EE lock bit. Once the user EE lock bit is set, the pro-
grammed user EE data can not be changed unless the
lock bit is reset.
To enter this mode, follow these steps:
1. Power-up with the bias condition shown in
Figure 4-1 to enter M0. At power-up:
TEST = IO = FEED = T2 = VSS
,
DETECT = VDD
.
2. Drive T2 input from VSS to VDD and hold at VDD
to enter TM0.
3. Drive TEST from VSS to VDD and hold at VDD
.
4. Apply 19 clock pulses to the T2 input (VDD to
VSS and then back to VDD) to enter in TM19
mode.
5. Hold TEST at VDD and pulse IO once to set the
lock bit and store into the EEPROM memory.
6. To reset the lock bit from Step 5, drive TEST to
VSS and pulse IO once.
To set user EE lock bit
VDD
TEST
T2
VSS
VDD
VSS
Min TSETUP1 = 10 µs
Min TPW1 = 10 µs
Min T1 = 20 µs
Min PW2 = 10 ms
VDD
VSS
IO
MODE
M0
TM0
TM1
TM2
TM3
TM4
TM5
TM6
TM18
TM19
To reset user EE lock bit
VDD
VSS
VDD
VSS
TEST
T2
Min TSETUP1 = 10 µs
VDD
VSS
Min TPW1 = 10 µs
Min T1 = 20 µs
Min PW2 = 10 ms
IO
MODE
M0
TM0
TM1
TM2
TM3
TM4
TM5
TM6
TM18
TM19
FIGURE 4-9:
Timing Diagram for User Lock Bit Programming in Mode TM19
DS20002275C-page 36
2011-2021 Microchip Technology Inc.
RE46C180
5.0
5.1
APPLICATION NOTES
Standby Current Calculation
A calculation of the standby current is shown in
Table 5-1, based on the following conditions:
VDD
=
=
9V
LED current in loaded
battery check
10 mA
EOLEn
=
1
TABLE 5-1:
STANDBY CURRENT CALCULATION
IDD Component
Current (µA)
Duration (s)
Period (s)
Factor
Average Current (µA)
Fixed IDD
3.8
9.6
Always
0.005
0.01
Always
10
1
3.8
Smoke Check
0.0005
0.00013
0.0048
0.0028
Low Battery Check
(unloaded)
21.4
80
Low Battery Check
(loaded)
10000
9.6
0.01
0.005
3.7
320
320
3.10E-05
1.60E-05
0.012
0.31
Chamber Test
(smoke check)
0.00015
0.038
Chamber Test
(chamber low)
3.2
320
End-of-Life
(reading EE and counting)
35
0.14
0.01
1310400
1310400
1.10E-07
7.40E-09
3.74E-06
7.63E-07
End-of-Life (writing EE)
100
Total
4.16
5.1.1
FIXED IDD
5.1.6
CHAMBER TEST (CHAMBER LOW)
The fixed IDD is the current from the constantly active
internal oscillator, bias circuit and guard amplifier.
The current drawn to pull the chamber low when the
chamber test is performed.
5.1.2
SMOKE CHECK
5.1.7
END-OF-LIFE
(READING EE AND COUNTING)
The current draw from the smoke detection circuitry
during the 5 ms smoke check period.
The current drawn to read EOL bits from EE and then
increase by 1.
5.1.3
LOW BATTERY CHECK
(UNLOADED)
5.1.8
END-OF-LIFE (WRITING EE)
The current drawn by the low battery detection circuitry
during the 10 ms unloaded low battery check period.
The current drawn to write EOL bits back to EE.
5.1.9
TOTAL CURRENT
5.1.4
LOW BATTERY CHECK (LOADED)
The average total current drawn in Standby
The current drawn by the RLED during the 10 ms
loaded low battery check period.
5.1.5
CHAMBER TEST (SMOKE CHECK)
The current drawn by the smoke detection circuitry
during the 5 ms smoke check period, while the cham-
ber is pulled low.
2011-2021 Microchip Technology Inc.
DS20002275C-page 37
RE46C180
5.2
FUNCTIONAL TIMING DIAGRAMS
Figures 5-1 to 5-8 show the timing diagrams for the
smoke detector functions described in Section 3.0,
Device Descriptions.
FIGURE 5-1:
Timing Diagram – Standby, No Alarm.
DS20002275C-page 38
2011-2021 Microchip Technology Inc.
RE46C180
FIGURE 5-2:
Timing Diagram – Low Battery Test Failure and Chamber Test Failure.
2011-2021 Microchip Technology Inc.
DS20002275C-page 39
RE46C180
FIGURE 5-3:
Timing Diagram – From Standby to Local Smoke and Push-To-Test.
DS20002275C-page 40
2011-2021 Microchip Technology Inc.
RE46C180
FIGURE 5-4:
Timing Diagram – Local Smoke Alarm.
2011-2021 Microchip Technology Inc.
DS20002275C-page 41
RE46C180
FIGURE 5-5:
Timing Diagram – IO Smoke Alarm.
DS20002275C-page 42
2011-2021 Microchip Technology Inc.
RE46C180
FIGURE 5-6:
Timing Diagram – Alarm Memory and HUSH Timer.
2011-2021 Microchip Technology Inc.
DS20002275C-page 43
RE46C180
FIGURE 5-7:
Timing Diagram – CO Alarm.
DS20002275C-page 44
2011-2021 Microchip Technology Inc.
RE46C180
FIGURE 5-8:
Timing Diagram – Horn Synchronization and AAL.
2011-2021 Microchip Technology Inc.
DS20002275C-page 45
RE46C180
NOTES:
DS20002275C-page 46
2011-2021 Microchip Technology Inc.
RE46C180
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
16-Lead PDIP (300 mil)
Example
RE46C180-V/P e
3
1123256
16-Lead Narrow SOIC (3.90 mm)
Example
RE46C180
e
3
V/SL
1123256
Legend:XX...XCustomer-specific information
YYear code (last digit of calendar year)
YYYear code (last 2 digits of calendar year)
WWWeek code (week of January 1 is week ‘01’)
NNNAlphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
e
3
)
Note:In the event the full Microchip part number cannot be marked on one line, it will be
carried over to the next line, thus limiting the number of available characters for cus-
tomer-specific information.
2011-2021 Microchip Technology Inc.
DS20002275C-page 47
RE46C180
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+ꢉꢇꢌꢅꢏꢕꢅꢚꢌꢉꢏꢃꢄꢛꢅꢂꢊꢉꢄꢌ
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ꢜꢘꢋꢄꢊ
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DS20002275C-page 48
2011-2021 Microchip Technology Inc.
RE46C180
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2011-2021 Microchip Technology Inc.
DS20002275C-page 49
RE46C180
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20002275C-page 50
2011-2021 Microchip Technology Inc.
RE46C180
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2011-2021 Microchip Technology Inc.
DS20002275C-page 51
RE46C180
NOTES:
DS20002275C-page 52
2011-2021 Microchip Technology Inc.
RE46C180
APPENDIX A: REVISION HISTORY
Revision A (August 2011)
Original release of this document.
Revision B (March 2019)
• Updated Section 6.0 “Packaging Information”
• Updated Section “Product Identification
System”.
Revision C (June 2021)
• Updated Table 4-8
• Updated Section 4.2, Smoke Calibration
• Updated Section 4.3, Serial Read/Write
Calibration
• Updated Section 4.6, Serial Read/Write Calibra-
tion and User Features
2011-2021 Microchip Technology Inc.
DS20002275C-page 53
RE46C180
NOTES:
DS20002275C-page 54
2011-2021 Microchip Technology Inc.
RE46C180
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
XX
PART NO.
Device
X
Examples:
a)
RE46C180E16FA:
RE46C180S16F:
RE46C180S16TF:
16LD PDIP Package
16LD SOIC Package
16LD SOIC Package,
Tape and Reel
Number
of Pins
Package
b)
c)
Device
RE46C180: CMOS Programmable Ionization Smoke
Detector ASIC
RE46C180T: CMOS Programmable Ionization Smoke
Detector ASIC (Tape and Reel, SOIC only)
Package
E
S
=
=
Plastic Dual In-Line, 150 mil. Body, 16-Lead
(PDIP)
Small Plastic Outline - Narrow, 3.90 mm Body,
16-Lead (SOIC)
2011-2021 Microchip Technology Inc.
DS20002275C-page 55
RE46C180
NOTES:
DS20002275C-page 56
2011-2021 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
•
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is secure when used in the intended manner and under normal conditions.
There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip
devices. We believe that these methods require using the Microchip products in a manner outside the operating specifications
contained in Microchip's Data Sheets. Attempts to breach these code protection features, most likely, cannot be accomplished
without violating Microchip's intellectual property rights.
•
•
Microchip is willing to work with any customer who is concerned about the integrity of its code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not
mean that we are guaranteeing the product is "unbreakable." Code protection is constantly evolving. We at Microchip are
committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection
feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or
other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication is provided for the sole
purpose of designing with and using Microchip products. Infor-
mation regarding device applications and the like is provided
only for your convenience and may be superseded by updates.
It is your responsibility to ensure that your application meets
with your specifications.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A. and
other countries.
THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS".
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION INCLUDING BUT NOT
LIMITED TO ANY IMPLIED WARRANTIES OF NON-
INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
PARTICULAR PURPOSE OR WARRANTIES RELATED TO
ITS CONDITION, QUALITY, OR PERFORMANCE.
AgileSwitch, APT, ClockWorks, The Embedded Control Solutions
Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight
Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3,
Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-
Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDI-
RECT, SPECIAL, PUNITIVE, INCIDENTALOR CONSEQUEN-
TIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
WHATSOEVER RELATED TO THE INFORMATION OR ITS
USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES
ARE FORESEEABLE. TO THE FULLEST EXTENT
ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON
ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION
OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF
ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP
FOR THE INFORMATION. Use of Microchip devices in life sup-
port and/or safety applications is entirely at the buyer's risk, and
the buyer agrees to defend, indemnify and hold harmless
Microchip from any and all damages, claims, suits, or expenses
resulting from such use. No licenses are conveyed, implicitly or
otherwise, under any Microchip intellectual property rights
unless otherwise stated.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky,
BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive,
CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net,
Dynamic Average Matching, DAM, ECAN, Espresso T1S,
EtherGREEN, IdealBridge, In-Circuit Serial Programming, ICSP,
INICnet, Intelligent Paralleling, Inter-Chip Connectivity,
JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi,
MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK,
NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net,
PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE,
Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O,
simpleMAP, SimpliPHY, SmartBuffer, SMART-I.S., storClad, SQI,
SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total
Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY,
ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks
of Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2011-2021, Microchip Technology Incorporated, All Rights
Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
ISBN: 978-1-5224-8333-5
2011-2021 Microchip Technology Inc.
DS20002275C-page 57
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
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DS20002275C-page 58
2011-2021 Microchip Technology Inc.
02/28/20
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