SST39LF402C-55-4C-VA [MICROCHIP]
FLASH 2.7V PROM;
| 型号： | SST39LF402C-55-4C-VA |
| 厂家： | 
MICROCHIP |
| 描述： | FLASH 2.7V PROM 可编程只读存储器 |
| 文件： | 总8页 (文件大小：73K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C
SST39LF401C / SST39LF402C
A Microchip Technology Company
Die / Wafer Sales Specifications
Features
• Organized as 256K x16
• Hardware Reset Pin (RST#)
• Latched Address and Data
• Single Voltage Read and Write Operations
– 2.7-3.6V for SST39VF401C/402C
– 3.0-3.6V for SST39LF401C/402C
• Security-ID Feature
– SST: 128 bits; User: 128 words
• Superior Reliability
• Fast Read Access Time:
– Endurance: 100,000 Cycles (Typical)
– Greater than 100 years Data Retention
– 70 ns for SST39VF401C/402C
– 55 ns for SST39LF401C/402C
• Low Power Consumption (typical values at 5 MHz)
• Fast Erase and Word-Program:
– Active Current: 5 mA (typical)
– Standby Current: 3 µA (typical)
– Auto Low Power Mode: 3 µA (typical)
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 40 ms (typical)
– Word-Program Time: 7 µs (typical)
• Hardware Block-Protection/WP# Input Pin
– Top Block-Protection (top 8 KWord)
– Bottom Block-Protection (bottom 8 KWord)
• Automatic Write Timing
– Internal VPP Generation
• Sector-Erase Capability
• End-of-Write Detection
– Uniform 2 KWord sectors
– Toggle Bits
• Block-Erase Capability
– Data# Polling
– Ready/Busy# Pin
– Flexible block architecture; one 8-, two 4-, one 16-, and
seven 32-KWord blocks
• CMOS I/O Compatibility
• Chip-Erase Capability
• JEDEC Standard
• Erase-Suspend/Erase-Resume Capabilities
– Flash EEPROM Pinouts and command sets
Product Description
The SST39VF401C/402C and SST39LF401C/402C devices are 512K x16 CMOS Multi-Purpose Flash
Plus (MPF+) manufactured with SST proprietary, high performance CMOS SuperFlash technology.
The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability
compared with alternate approaches. The SST39VF401C/402C and SST39LF401C/402C write (Program
or Erase) with a 2.7-3.6V power supply. These devices conform to JEDEC standard pinouts for x16
memories.
Featuring high performance Word-Program, the SST39VF401C/402C and SST39LF401C/402C
devices provide a typical Word-Program time of 7 µsec. These devices use Toggle Bit, Data# Polling,
or the RY/BY# pin to indicate the completion of Program operation. To protect against inadvertent
write, they have on-chip hardware and Software Data Protection schemes. Designed, manufactured,
and tested for a wide spectrum of applications, these devices are offered with a guaranteed typical
endurance of 100,000 cycles. Data retention is rated at greater than 100 years.
The SST39VF401C/402C and SST39LF401C/402C devices are suited for applications that require
convenient and economical updating of program, configuration, or data memory. For all system appli-
cations, they significantly improve performance and reliability, while lowering power consumption. They
inherently use less energy during Erase and Program than alternative flash technologies. The total
energy consumed is a function of the applied voltage, current, and time of application. Since for any
©2012 Silicon Storage Technology, Inc.
DS25143A
08/12
www.microchip.com
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C
A Microchip Technology Company
SST39LF401C / SST39LF402C
Die / Wafer Sales Specifications
given voltage range, the SuperFlash technology uses less current to program and has a shorter erase
time, the total energy consumed during any Erase or Program operation is less than alternative flash
technologies. These devices also improve flexibility while lowering the cost for program, data, and con-
figuration storage applications.
This specification provides additional information about die/wafer sales. For device operating condi-
tions, please refer to the SST39VF401C / SST39VF402C / SST39LF401C / SST39LF402C data sheet.
Pad Description and Coordinates
A15
A1 A2 A3 A4 A5 A6 A7 A17 RY/BY# WP#
RST#
WE#
A8 A9 A10 A11 A12 A13 A14
MCHP Logo
REV ID
SST
39VF401C/39VF402C
39LF401C/39LF402C
2.16 x 1.96 mm
Pad opening: 50 µm x 50 µm
REV ID
REV ID
A0 CE# VSS OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 VDD DQ4 DQ12 DQ5 DQ13 DQ6 DQ14 DQ7 DQ15 VSS A16
25143 D1.0
Figure 1: Pad Locations for SST39VF401C / SST39VF402C / SST39LF401C / SST39LF402C
©2012 Silicon Storage Technology, Inc.
DS25143A
08/12
2
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C
A Microchip Technology Company
SST39LF401C / SST39LF402C
Die / Wafer Sales Specifications
Table 1: Pin Description
Symbol
AMS1-A0
Pin Name
Functions
Address Inputs
To provide memory addresses.
During Sector-Erase AMS-A11 address lines will select the sector.
During Block-Erase AMS-A15 address lines will select the block.
DQ15-DQ0 Data Input/output To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
WP#
Write Protect
To protect the top/bottom boot block from Erase/Program operation when
grounded.
RST#
CE#
OE#
WE#
VDD
Reset
To reset and return the device to Read mode.
To activate the device when CE# is low.
To gate the data output buffers.
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
To control the Write operations.
To provide power supply voltage: 2.7-3.6V
VSS
NC
No Connection
Ready/Busy#
Unconnected pins.
RY/BY#
To output the status of a Program or Erase operation
RY/BY# is a open drain output, so a 10K - 100K pull-up resistor is required
to allow RY/BY# to transition high indicating the device is ready to read.
T1.2 25143
1. AMS = Most significant address
AMS = A17
©2012 Silicon Storage Technology, Inc.
DS25143A
08/12
3
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C
A Microchip Technology Company
SST39LF401C / SST39LF402C
Die / Wafer Sales Specifications
Die Size: 2.16 mm x 2.37 mm (85.04 mil x 93.31 mils)
Pad Opening: 50 µm x 50 µm
Die Code: F100600-Ax
Product Revision: A
Table 2: Pad Coordinates (1 of 2)
Signal Name
A15
A14
A13
A12
A11
A10
A9
X Coordinate
905
Y Coordinate
850
845
850
785
850
710
850
635
850
575
850
504
850
A8
428
850
WE#
RST#
WP#
RYBY#
A17
A7
358
850
157
850
-320
-400
-470
-545
-605
-665
-725
-785
-845
-905
-865
-802
-740
-679
-614
-554
-494
-434
-374
-314
-254
-70
850
850
850
850
A6
850
A5
850
A4
850
A3
850
A2
850
A1
850
A0
-857
-857
-857
-857
-857
-857
-857
-857
-857
-857
-857
-857
-857
-857
-857
-857
-857
CE#
VSS
OE#
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
-10
56
VDD
117
DQ4
190
DQ12
250
©2012 Silicon Storage Technology, Inc.
DS25143A
08/12
4
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C
A Microchip Technology Company
SST39LF401C / SST39LF402C
Die / Wafer Sales Specifications
Table 2: Pad Coordinates (Continued) (2 of 2)
Signal Name
DQ5
X Coordinate
310
Y Coordinate
-857
DQ13
DQ6
370
-857
430
-857
DQ14
DQ7
490
-857
550
-857
DQ15
610
-857
680
-857
VSS
A16
739
-857
865
-857
T2.1 25143
©2012 Silicon Storage Technology, Inc.
DS25143A
08/12
5
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C
A Microchip Technology Company
SST39LF401C / SST39LF402C
Die / Wafer Sales Specifications
Product Ordering Information
SST 39 VF 401C
-
70
-
4C
-
UA
-
XX XX XXXX
-
XX
-
XX
XX
Package Modifier
A = Die revision
Package Type
U = Unencapsulated die
V = Wafer
Temperature Range
C = Commercial = 0°C to +70°C
I = Industrial = -40°C to +85°C
Minimum Endurance
4 = 10,000 cycles
Read Access Speed
70 = 70 ns
55 = 55 ns
Hardware Block Protection
1 = Bottom Boot-Block
2 = Top Boot-Block
Device Density
40 = 4 Mbit
Voltage
V = 2.7-3.6V
L = 3.0-3.6V
Product Series
©2012 Silicon Storage Technology, Inc.
DS25143A
08/12
6
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C
A Microchip Technology Company
SST39LF401C / SST39LF402C
Die / Wafer Sales Specifications
Valid Combinations for SST39VF401C
SST39VF401C-70-4C-UA
SST39VF401C-70-4C-VA
SST39VF401C-70-4I-UA
SST39VF401C-70-4I-VA
Valid Combinations for SST39VF402C
SST39VF402C-70-4C-UA
SST39VF402C-70-4C-VA
SST39VF402C-70-4I-UA
SST39VF402C-70-4I-VA
Valid Combinations for SST39LF401C
SST39LF401C-55-4C-UA
SST39LF401C-55-4C-VA
Valid Combinations for SST39LF402C
SST39LF402C-55-4C-UA
SST39LF402C-55-4C-VA
Note:Valid combinations are those products in mass production or will be in mass production. Consult your SST
sales representative to confirm availability of valid combinations and to determine availability of new combi-
nations.
©2012 Silicon Storage Technology, Inc.
DS25143A
08/12
7
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C
A Microchip Technology Company
SST39LF401C / SST39LF402C
Die / Wafer Sales Specifications
Table 3: Revision History
Number
Description
Date
A
Aug 2012
•
Initial release of specification
ISBN:978-1-62076-472-5
© 2012 Silicon Storage Technology, Inc–a Microchip Technology Company. All rights reserved.
SST, Silicon Storage Technology, the SST logo, SuperFlash, MTP, and FlashFlex are registered trademarks of Silicon Storage Tech-
nology, Inc. MPF, SQI, Serial Quad I/O, and Z-Scale are trademarks of Silicon Storage Technology, Inc. All other trademarks and
registered trademarks mentioned herein are the property of their respective owners.
Specifications are subject to change without notice. Refer to www.microchip.com for the most recent documentation. For the most current
package drawings, please see the Packaging Specification located at http://www.microchip.com/packaging.
Memory sizes denote raw storage capacity; actual usable capacity may be less.
SST makes no warranty for the use of its products other than those expressly contained in the Standard Terms and Conditions of
Sale.
For sales office locations and information, please see www.microchip.com.
Silicon Storage Technology, Inc.
A Microchip Technology Company
www.microchip.com
©2012 Silicon Storage Technology, Inc.
DS25143A
08/12
8
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